2019-09-09 00:07:19 -07:00
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/*
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* This file is part of the libsigrok project.
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*
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* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
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* Copyright (C) 2013 DreamSourceLab <support@dreamsourcelab.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBDSL_HARDWARE_DEMO_H
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#define LIBDSL_HARDWARE_DEMO_H
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2022-02-16 11:37:06 +08:00
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#include <glib.h>
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2021-11-24 17:04:12 +08:00
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#include "../../libsigrok-internal.h"
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2023-05-04 10:46:56 +08:00
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#include <minizip/unzip.h>
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2023-05-25 15:51:17 +08:00
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#define DEFAULT_LOGIC_FILE "protocol"
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#define SEC 1
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#define LOGIC_POST_DATA_PER_SECOND(n) ((n)/(8))
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#define LOGIC_PACKET_NUM_PER_SEC (gdouble)1000
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#define LOGIC_PACKET_TIME(n) (gdouble)((SEC)/(n))
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#define LOGIC_PACKET_LEN(n) (ceil((LOGIC_POST_DATA_PER_SECOND(n))/(LOGIC_PACKET_NUM_PER_SEC)/(8))*(8))
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#define LOGIC_MIN_PACKET_LEN 8
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#define LOGIC_MIN_PACKET_NUM(n) (LOGIC_POST_DATA_PER_SECOND(n))/(LOGIC_MIN_PACKET_LEN)
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#define LOGIC_MIN_PACKET_TIME(n) ((SEC)/(gdouble)(LOGIC_MIN_PACKET_NUM(n)))
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#define LOGIC_MAX_PACKET_LEN 62504
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#define LOGIC_MAX_PACKET_NUM(n) (LOGIC_POST_DATA_PER_SECOND(n))/(LOGIC_MAX_PACKET_LEN)
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#define LOGIC_MAX_PACKET_TIME(n) ((SEC)/(gdouble)(LOGIC_MAX_PACKET_NUM(n)))
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#define LOGIC_BLOCK_LEN SR_MB(2)
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#define LOGIC_BUF_LEN SR_MB(2)
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#define LOGIC_FREQ_LIMIT SR_MHZ(100)
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#define DSO_PACKET_NUM_PER_SEC (gdouble)200
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#define DSO_PACKET_TIME ((SEC)/(DSO_PACKET_NUM_PER_SEC))
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#define DSO_PACKET_LEN 20000
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#define DSO_RANDOM_DATA rand()%120 +68
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#define DSO_BUF_LEN SR_MB(1)
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#define ANALOG_PROBE_NUM 2
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#define ANALOG_PACKET_NUM_PER_SEC 200
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#define ANALOG_POST_DATA_PER_SECOND(n) ((n)*(ANALOG_PROBE_NUM))
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#define ANALOG_PACKET_LEN(n) ((ANALOG_POST_DATA_PER_SECOND(n))/(ANALOG_PACKET_NUM_PER_SEC))
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#define ANALOG_PACKET_TIME(n) (gdouble)((SEC)/(gdouble)(n))
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#define ANALOG_MIN_PACKET_LEN 2
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#define ANALOG_MIN_PACKET_NUM(n) ((ANALOG_POST_DATA_PER_SECOND(n))/(ANALOG_MIN_PACKET_LEN))
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#define ANALOG_PACKET_ALIGN 2
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#define LOGIC_HW_DEPTH (SR_GHZ(10))
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#define LOGIC_MAX_PROBE_NUM 16
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#define LOGIC_HIGH_LEVEL 255
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#define LOGIC_LOW_LEVEL 0
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#define DSO_DEFAULT_VDIV 1000
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#define DSO_MID_VAL 128
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#define DSO_MAX_VAL 0
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#define DSO_MIN_VAL 255
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#define DSO_EXPAND_MID_VAL(i) ((i)*(uint16_t)(256))
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#define DSO_LIMIT 255
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#define ANALOG_HW_DEPTH (SR_MHZ(12.5))
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#define ANALOG_DEFAULT_VDIV 1000
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#define ANALOG_MID_VAL 128
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#define ANALOG_MAX_VAL 0
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#define ANALOG_MIN_VAL 255
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#define ANALOG_CYCLE_RATIO ((gdouble)(103) / (gdouble)(2048))
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#define ANALOG_DATA_LEN_PER_CYCLE 206
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#define ANALOG_RANDOM_DATA rand()%120 +68
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#define ANALOG_PROBE_NUM 2
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#define ANALOG_RETE(n) ((n/SR_HZ(10)))
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//defult value
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#define LOGIC_DEFAULT_SAMPLERATE SR_MHZ(1)
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#define LOGIC_DEFAULT_TOTAL_SAMPLES SR_MHZ(1)
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#define LOGIC_DEFAULT_NUM_PROBE 16
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#define DSO_DEFAULT_SAMPLERATE SR_MHZ(100)
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#define DSO_DEFAULT_TOTAL_SAMPLES SR_KHZ(10)
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#define DSO_DEFAULT_NUM_PROBE 2
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#define DSO_DEFAULT_NUM_BLOCK 1
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#define DSO_DEFAULT_ENABLE TRUE
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#define DSO_DEFAULT_COUPLING 1
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#define DSO_DEFAULT_VIDV SR_V(1)
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#define DSO_DEFAULT_VFACOTR SR_V(1)
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#define DSO_DEFAULT_HW_OFFSET 128
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#define DSO_DEFAULT_OFFSET 128
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#define DSO_DEFAULT_TRIG_VAL 128
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#define ANALOG_DEFAULT_SAMPLERATE SR_MHZ(1)
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#define ANALOG_DEFAULT_TOTAL_SAMPLES SR_MHZ(1)
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#define ANALOG_DEFAULT_NUM_PROBE 2
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#define ANALOG_DEFAULT_NUM_BLOCK 1
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#define ANALOG_DEFAULT_BIT 8
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#define ANALOG_DEFAULT_ENABLE TRUE
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#define ANALOG_DEFAULT_COUPLING 1
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#define ANALOG_DEFAULT_VIDV SR_V(1)
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#define ANALOG_DEFAULT_VFACOTR SR_mV(1)
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#define ANALOG_DEFAULT_HW_OFFSET 128
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#define ANALOG_DEFAULT_OFFSET 128
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#define ANALOG_DEFAULT_TRIG_VAL 128
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#define ANALOG_DEFAULT_MAP_DEFAULT TRUE
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#define ANALOG_DEFAULT_MAP_UNIT "V"
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#define ANALOG_DEFAULT_MAP_MIN (gdouble)-5
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#define ANALOG_DEFAULT_MAP_MAX (gdouble)+5
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2019-09-09 00:07:19 -07:00
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enum DEMO_PATTERN {
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2023-05-04 10:46:56 +08:00
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PATTERN_INVALID = -1,
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PATTERN_RANDOM = 0,
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PATTERN_DEFAULT = 1,
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2019-09-09 00:07:19 -07:00
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};
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2023-05-19 14:41:52 +08:00
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enum DEMO_LOGIC_CHANNEL_ID {
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DEMO_LOGIC125x16 = 16,
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DEMO_LOGIC250x12 = 17,
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DEMO_LOGIC500x6 = 18,
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DEMO_LOGIC1000x3 = 19,
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};
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enum DEMO_CHANNEL_ID {
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DEMO_LOGIC100x16 = 0,
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DEMO_ANALOG10x2 = 1 ,
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DEMO_DSO200x2 = 2,
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};
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enum DEMO_LOGIC_CHANNEL_INDEX {
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LOGIC125x16 = 0,
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LOGIC250x12 = 1,
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LOGIC500x6 = 2,
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LOGIC1000x3 = 3,
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};
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2023-05-15 14:00:05 +08:00
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static char *pattern_strings_logic[100] = {"random"};
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static char *pattern_strings_dso[100] = {"random"};
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static char *pattern_strings_analog[100] = {"random"};
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2023-05-04 10:46:56 +08:00
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static int pattern_logic_count = 1;
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static int pattern_dso_count= 1;
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static int pattern_analog_count= 1;
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static uint64_t samplerates_file[1];
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static uint64_t samplecounts_file[1];
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2023-05-25 15:51:17 +08:00
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2023-05-04 10:46:56 +08:00
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static GTimer *packet_interval = NULL;
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2023-05-04 13:57:29 +08:00
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static GTimer *run_time = NULL;
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2023-05-25 15:51:17 +08:00
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2023-05-05 09:57:41 +08:00
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static int max_probe_num = 0;
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2023-05-04 10:46:56 +08:00
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extern char DS_RES_PATH[500];
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2023-05-10 14:27:43 +08:00
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static int64_t analog_count = 0;
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2023-05-23 16:15:57 +08:00
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static gboolean channel_mode_change = FALSE;
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2023-05-24 17:40:33 +08:00
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static uint64_t packet_num;
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2023-05-25 15:51:17 +08:00
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static void *logic_post_buf = NULL;
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2023-05-04 10:46:56 +08:00
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2023-05-19 14:41:52 +08:00
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2023-05-04 10:46:56 +08:00
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struct session_packet_buffer;
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2023-05-05 09:57:41 +08:00
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static const uint64_t vdivs10to2000[] = {
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SR_mV(10),
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SR_mV(20),
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SR_mV(50),
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SR_mV(100),
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SR_mV(200),
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SR_mV(500),
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SR_V(1),
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SR_V(2),
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0,
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};
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2023-05-04 10:46:56 +08:00
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struct session_vdev
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{
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int version;
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unzFile archive; // zip document
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int capfile; // current inner file open status
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uint16_t samplerates_min_index;
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uint16_t samplerates_max_index;
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2023-05-05 09:57:41 +08:00
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2023-05-25 15:51:17 +08:00
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uint8_t sample_generator;
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2023-05-04 10:46:56 +08:00
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void *logic_buf;
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uint64_t logic_buf_len;
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2023-05-05 09:57:41 +08:00
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2023-05-18 17:34:10 +08:00
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void *dso_buf;
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2023-05-04 10:46:56 +08:00
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void *analog_buf;
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uint64_t analog_buf_len;
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uint64_t analog_read_pos;
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int cur_block;
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int num_blocks;
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uint64_t samplerate;
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uint64_t total_samples;
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int64_t trig_time;
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uint64_t trig_pos;
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int num_probes;
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int enabled_probes;
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uint64_t timebase;
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uint64_t max_timebase;
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uint64_t min_timebase;
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uint8_t unit_bits;
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uint32_t ref_min;
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uint32_t ref_max;
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uint8_t max_height;
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struct sr_status mstatus;
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struct session_packet_buffer *packet_buffer;
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2023-05-08 10:04:15 +08:00
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2023-05-25 15:51:17 +08:00
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//time
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uint64_t packet_len;
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gdouble packet_time;
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//status
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gboolean instant;
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gboolean load_data;
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gboolean vdiv_change;
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gboolean offset_change;
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gboolean timebase_change;
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gboolean channel_mode_change;
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//post
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uint64_t post_data_len;
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//logic
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uint64_t logci_cur_packet_num; //dso or analog
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uint8_t logic_sel_probe_list[LOGIC_MAX_PROBE_NUM];
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uint8_t logic_sel_probe_num;
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enum DEMO_LOGIC_CHANNEL_ID logic_ch_mode;
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enum DEMO_LOGIC_CHANNEL_INDEX logic_ch_mode_index;
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2023-05-08 10:04:15 +08:00
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int is_loop;
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2023-05-04 10:46:56 +08:00
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};
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#define SESSION_MAX_CHANNEL_COUNT 512
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struct session_packet_buffer
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{
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void *post_buf;
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uint64_t post_buf_len;
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uint64_t post_len;
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uint64_t block_buf_len;
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uint64_t block_chan_read_pos;
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uint64_t block_data_len;
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void *block_bufs[SESSION_MAX_CHANNEL_COUNT];
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uint64_t block_read_positions[SESSION_MAX_CHANNEL_COUNT];
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2019-09-09 00:07:19 -07:00
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};
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struct DEMO_caps {
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uint64_t mode_caps;
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uint64_t feature_caps;
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uint64_t channels;
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uint64_t hw_depth;
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uint64_t dso_depth;
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uint8_t intest_channel;
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const uint64_t *vdivs;
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uint8_t vga_id;
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uint16_t default_channelmode;
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2023-05-16 16:57:02 +08:00
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int default_pattern; /**enum DEMO_PATTERN type*/
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2019-09-09 00:07:19 -07:00
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uint64_t default_timebase;
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};
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struct DEMO_profile {
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const char *vendor;
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const char *model;
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const char *model_version;
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struct DEMO_caps dev_caps;
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};
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struct DEMO_channels {
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2022-10-19 18:41:13 +08:00
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enum DEMO_CHANNEL_ID id;
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2019-09-09 00:07:19 -07:00
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enum OPERATION_MODE mode;
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enum CHANNEL_TYPE type;
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uint16_t num;
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uint8_t unit_bits;
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uint64_t default_samplerate;
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uint64_t default_samplelimit;
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uint64_t min_samplerate;
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uint64_t max_samplerate;
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const char *descr;
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};
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static const uint64_t samplerates[] = {
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SR_HZ(10),
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SR_HZ(20),
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SR_HZ(50),
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SR_HZ(100),
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SR_HZ(200),
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SR_HZ(500),
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SR_KHZ(1),
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SR_KHZ(2),
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SR_KHZ(5),
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SR_KHZ(10),
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SR_KHZ(20),
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SR_KHZ(40),
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SR_KHZ(50),
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SR_KHZ(100),
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SR_KHZ(200),
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SR_KHZ(400),
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SR_KHZ(500),
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SR_MHZ(1),
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SR_MHZ(2),
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SR_MHZ(4),
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SR_MHZ(5),
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SR_MHZ(10),
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SR_MHZ(20),
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SR_MHZ(25),
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SR_MHZ(40),
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SR_MHZ(50),
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2023-05-22 09:12:15 +08:00
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SR_MHZ(100),
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2023-05-19 14:41:52 +08:00
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SR_MHZ(125),
|
|
|
|
SR_MHZ(250),
|
2019-09-09 00:07:19 -07:00
|
|
|
SR_MHZ(400),
|
|
|
|
SR_MHZ(500),
|
|
|
|
SR_MHZ(800),
|
|
|
|
SR_GHZ(1),
|
|
|
|
SR_GHZ(2),
|
|
|
|
SR_GHZ(5),
|
|
|
|
SR_GHZ(10),
|
|
|
|
};
|
|
|
|
|
2022-07-26 15:45:46 +08:00
|
|
|
/* hardware Capabilities */
|
|
|
|
#define CAPS_MODE_LOGIC (1 << 0)
|
|
|
|
#define CAPS_MODE_ANALOG (1 << 1)
|
|
|
|
#define CAPS_MODE_DSO (1 << 2)
|
2019-09-09 00:07:19 -07:00
|
|
|
|
2022-07-26 15:45:46 +08:00
|
|
|
#define CAPS_FEATURE_NONE 0
|
|
|
|
// zero calibration ability
|
|
|
|
#define CAPS_FEATURE_ZERO (1 << 4)
|
|
|
|
/* end */
|
|
|
|
|
|
|
|
|
|
|
|
static const char *maxHeights[] = {
|
|
|
|
"1X",
|
|
|
|
"2X",
|
|
|
|
"3X",
|
|
|
|
"4X",
|
|
|
|
"5X",
|
|
|
|
};
|
|
|
|
|
|
|
|
/* We name the probes 0-7 on our demo driver. */
|
|
|
|
static const char *probe_names[] = {
|
|
|
|
"0", "1", "2", "3",
|
|
|
|
"4", "5", "6", "7",
|
|
|
|
"8", "9", "10", "11",
|
|
|
|
"12", "13", "14", "15",
|
|
|
|
NULL,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const char *probeMapUnits[] = {
|
|
|
|
"V",
|
|
|
|
"A",
|
|
|
|
"°C",
|
|
|
|
"°F",
|
|
|
|
"g",
|
|
|
|
"m",
|
|
|
|
"m/s",
|
|
|
|
};
|
|
|
|
|
|
|
|
static const int hwoptions[] = {
|
|
|
|
SR_CONF_PATTERN_MODE,
|
|
|
|
SR_CONF_MAX_HEIGHT,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const int32_t sessions[] = {
|
|
|
|
SR_CONF_SAMPLERATE,
|
|
|
|
SR_CONF_LIMIT_SAMPLES,
|
|
|
|
SR_CONF_PATTERN_MODE,
|
|
|
|
SR_CONF_MAX_HEIGHT,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const int32_t probeOptions[] = {
|
|
|
|
SR_CONF_PROBE_COUPLING,
|
|
|
|
SR_CONF_PROBE_VDIV,
|
|
|
|
SR_CONF_PROBE_MAP_DEFAULT,
|
|
|
|
SR_CONF_PROBE_MAP_UNIT,
|
|
|
|
SR_CONF_PROBE_MAP_MIN,
|
|
|
|
SR_CONF_PROBE_MAP_MAX,
|
|
|
|
};
|
|
|
|
|
2023-05-04 10:46:56 +08:00
|
|
|
static const int32_t probeSessions[] = {
|
|
|
|
SR_CONF_PROBE_COUPLING,
|
|
|
|
SR_CONF_PROBE_VDIV,
|
|
|
|
SR_CONF_PROBE_MAP_DEFAULT,
|
|
|
|
SR_CONF_PROBE_MAP_UNIT,
|
|
|
|
SR_CONF_PROBE_MAP_MIN,
|
|
|
|
SR_CONF_PROBE_MAP_MAX,
|
|
|
|
};
|
|
|
|
|
2022-07-26 15:45:46 +08:00
|
|
|
static const uint8_t probeCoupling[] = {
|
|
|
|
SR_DC_COUPLING,
|
|
|
|
SR_AC_COUPLING,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const gboolean default_ms_en[] = {
|
|
|
|
FALSE, /* DSO_MS_BEGIN */
|
|
|
|
TRUE, /* DSO_MS_FREQ */
|
|
|
|
FALSE, /* DSO_MS_PERD */
|
|
|
|
TRUE, /* DSO_MS_VMAX */
|
|
|
|
TRUE, /* DSO_MS_VMIN */
|
|
|
|
FALSE, /* DSO_MS_VRMS */
|
|
|
|
FALSE, /* DSO_MS_VMEA */
|
|
|
|
FALSE, /* DSO_MS_VP2P */
|
|
|
|
};
|
|
|
|
|
|
|
|
static const struct DEMO_profile supported_Demo[] = {
|
|
|
|
/*
|
|
|
|
* Demo
|
|
|
|
*/
|
|
|
|
{"DreamSourceLab", "Demo Device", NULL,
|
|
|
|
{CAPS_MODE_LOGIC | CAPS_MODE_ANALOG | CAPS_MODE_DSO,
|
|
|
|
CAPS_FEATURE_NONE,
|
|
|
|
(1 << DEMO_LOGIC100x16) |
|
|
|
|
(1 << DEMO_ANALOG10x2) |
|
|
|
|
(1 << DEMO_DSO200x2),
|
|
|
|
SR_Mn(100),
|
|
|
|
SR_Kn(20),
|
|
|
|
0,
|
|
|
|
vdivs10to2000,
|
|
|
|
0,
|
2023-05-04 10:46:56 +08:00
|
|
|
DEMO_LOGIC100x16,
|
|
|
|
PATTERN_RANDOM,
|
2022-07-26 15:45:46 +08:00
|
|
|
SR_NS(500)}
|
|
|
|
},
|
|
|
|
|
|
|
|
{ 0, 0, 0, {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}
|
|
|
|
};
|
2019-09-09 00:07:19 -07:00
|
|
|
|
2023-05-25 15:51:17 +08:00
|
|
|
static int vdev_init(struct sr_dev_inst* sdi);
|
2019-09-09 00:07:19 -07:00
|
|
|
|
2023-05-24 17:40:33 +08:00
|
|
|
static void dso_status_update(struct session_vdev *vdev);
|
|
|
|
|
2023-05-19 14:41:52 +08:00
|
|
|
static int get_logic_probe_type_index_by_probe_type(int probe_type);
|
|
|
|
|
|
|
|
static int logic_adjust_probe(struct sr_dev_inst *sdi, int num_probes);
|
|
|
|
|
|
|
|
static void logic_adjust_samplerate(struct session_vdev * vdev);
|
|
|
|
|
2023-05-16 16:31:41 +08:00
|
|
|
static void init_analog_random_data(struct session_vdev * vdev);
|
2023-05-11 11:08:29 +08:00
|
|
|
|
2023-05-25 15:51:17 +08:00
|
|
|
static int delay_time(struct session_vdev *vdev);
|
2023-05-11 11:08:29 +08:00
|
|
|
|
2023-05-25 15:51:17 +08:00
|
|
|
static void get_last_packet_len(struct sr_datafeed_logic *logic,struct session_vdev * vdev);
|
2023-05-06 18:05:53 +08:00
|
|
|
|
2023-05-16 16:31:41 +08:00
|
|
|
static void init_pattern_mode_list();
|
|
|
|
|
|
|
|
static int get_bit(uint64_t timebase);
|
2023-05-04 10:46:56 +08:00
|
|
|
|
|
|
|
static int get_pattern_mode_index_by_string(uint8_t device_mode , const char* str);
|
|
|
|
|
2023-05-25 15:51:17 +08:00
|
|
|
static int get_pattern_mode_from_file(uint8_t device_mode);
|
2023-05-04 10:46:56 +08:00
|
|
|
|
2023-05-16 16:31:41 +08:00
|
|
|
static void scan_dsl_file(struct sr_dev_inst *sdi);
|
2023-05-10 14:27:43 +08:00
|
|
|
|
2023-05-16 16:31:41 +08:00
|
|
|
static int reset_dsl_path(struct sr_dev_inst *sdi,uint8_t device_mode ,uint8_t pattern_mode);
|
2023-05-04 10:46:56 +08:00
|
|
|
|
|
|
|
static void adjust_samplerate(struct sr_dev_inst *sdi);
|
|
|
|
|
2023-05-16 16:31:41 +08:00
|
|
|
static void init_random_data(struct session_vdev * vdev,struct sr_dev_inst *sdi);
|
2023-05-04 10:46:56 +08:00
|
|
|
|
|
|
|
static int hw_init(struct sr_context *sr_ctx);
|
|
|
|
|
|
|
|
static GSList *hw_scan(GSList *options);
|
|
|
|
|
|
|
|
static const GSList *hw_dev_mode_list(const struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int hw_dev_open(struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int hw_dev_close(struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int dev_destroy(struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
|
|
|
|
static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
|
|
|
|
const struct sr_channel *ch,
|
|
|
|
const struct sr_channel_group *cg);
|
|
|
|
|
|
|
|
static int config_set(int id, GVariant *data, struct sr_dev_inst *sdi,
|
|
|
|
struct sr_channel *ch,
|
|
|
|
struct sr_channel_group *cg);
|
|
|
|
|
|
|
|
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
|
|
|
|
const struct sr_channel_group *cg);
|
|
|
|
|
|
|
|
static int hw_dev_acquisition_start(struct sr_dev_inst *sdi,
|
|
|
|
void *cb_data);
|
|
|
|
|
|
|
|
static int hw_dev_acquisition_stop(const struct sr_dev_inst *sdi, void *cb_data);
|
|
|
|
|
|
|
|
static int hw_dev_status_get(const struct sr_dev_inst *sdi, struct sr_status *status, gboolean prg);
|
|
|
|
|
|
|
|
static int load_virtual_device_session(struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int receive_data_logic(int fd, int revents, const struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int receive_data_logic_decoder(int fd, int revents, const struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int receive_data_dso(int fd, int revents, const struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static int receive_data_analog(int fd, int revents, const struct sr_dev_inst *sdi);
|
|
|
|
|
|
|
|
static void send_error_packet(const struct sr_dev_inst *cb_sdi, struct session_vdev *vdev, struct sr_datafeed_packet *packet);
|
|
|
|
|
|
|
|
static int close_archive(struct session_vdev *vdev);
|
|
|
|
|
|
|
|
|
2019-09-09 00:07:19 -07:00
|
|
|
#endif
|