Update decoder libraries

This commit is contained in:
DreamSourceLab 2020-01-06 17:53:24 +08:00
parent abbb5a6a62
commit caad239315
6 changed files with 29 additions and 79 deletions

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@ -3,6 +3,10 @@ rm ./cmake_install.cmake
rm -r ./CMakeFiles
rm ./Makefile
rm ./CMakeCache.txt
rm ./*.cmake
rm ./DSView
rm ./DSView.qrc.depends
rm ./install_manifest.txt
find . -name 'moc_*.cpp*' | xargs rm -rf
find . -name 'qrc_*.cpp' | xargs rm -rf
echo "rm cmake cache end..."

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@ -1,69 +0,0 @@
/*
* This file is part of the libsigrok project.
*
* Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBSIGROK_VERSION_H
#define LIBSIGROK_VERSION_H
/**
* @file
*
* Version number definitions and macros.
*/
/**
* @ingroup grp_versions
*
* @{
*/
/*
* Package version macros (can be used for conditional compilation).
*/
/** The libsigrok package 'major' version number. */
#define SR_PACKAGE_VERSION_MAJOR 0
/** The libsigrok package 'minor' version number. */
#define SR_PACKAGE_VERSION_MINOR 2
/** The libsigrok package 'micro' version number. */
#define SR_PACKAGE_VERSION_MICRO 0
/** The libsigrok package version ("major.minor.micro") as string. */
#define SR_PACKAGE_VERSION_STRING "0.2.0"
/*
* Library/libtool version macros (can be used for conditional compilation).
*/
/** The libsigrok libtool 'current' version number. */
#define SR_LIB_VERSION_CURRENT 1
/** The libsigrok libtool 'revision' version number. */
#define SR_LIB_VERSION_REVISION 2
/** The libsigrok libtool 'age' version number. */
#define SR_LIB_VERSION_AGE 0
/** The libsigrok libtool version ("current:revision:age") as string. */
#define SR_LIB_VERSION_STRING "1:2:0"
/** @} */
#endif

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@ -103,6 +103,8 @@ class Decoder(srd.Decoder):
'values': ('ascii', 'dec', 'hex', 'oct', 'bin')},
{'id': 'invert', 'desc': 'Invert Signal?', 'default': 'no',
'values': ('yes', 'no')},
{'id': 'anno_startstop', 'desc': 'Display Start/Stop?', 'default': 'yes',
'values': ('yes', 'no')},
)
annotations = (
('108', 'data', 'data'),
@ -127,7 +129,10 @@ class Decoder(srd.Decoder):
def putx(self, data):
s, halfbit = self.startsample, self.bit_width / 2.0
self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_ann, data)
if self.options['anno_startstop'] == 'yes' :
self.put(s - floor(halfbit), self.samplenum + ceil(halfbit), self.out_ann, data)
else :
self.put(self.frame_start, self.samplenum + ceil(halfbit * (1+self.options['num_stop_bits'])), self.out_ann, data)
def putpx(self, data):
s, halfbit = self.startsample, self.bit_width / 2.0
@ -220,7 +225,8 @@ class Decoder(srd.Decoder):
self.startsample = -1
self.putp(['STARTBIT', 0, self.startbit])
self.putg([1, ['Start bit', 'Start', 'S']])
if self.options['anno_startstop'] == 'yes':
self.putg([1, ['Start bit', 'Start', 'S']])
self.state = 'GET DATA BITS'
@ -332,7 +338,8 @@ class Decoder(srd.Decoder):
self.frame_valid = False
self.putp(['STOPBIT', 0, self.stopbit1])
self.putg([2, ['Stop bit', 'Stop', 'T']])
if self.options['anno_startstop'] == 'yes':
self.putg([2, ['Stop bit', 'Stop', 'T']])
# Pass the complete UART frame to upper layers.
es = self.samplenum + ceil(self.bit_width / 2.0)

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@ -27,6 +27,9 @@ ANN_STROBE, ANN_SINGLE_READ, ANN_SINGLE_WRITE, ANN_BURST_READ, \
Pos = namedtuple('Pos', ['ss', 'es'])
Data = namedtuple('Data', ['mosi', 'miso'])
class ChannelError(Exception):
pass
class Decoder(srd.Decoder):
api_version = 3
id = 'cc1101'

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@ -72,6 +72,8 @@ class Decoder(srd.Decoder):
options = (
{'id': 'chip', 'desc': 'Chip type',
'default': 'nrf24l01', 'values': ('nrf24l01', 'xn297')},
{'id': 'hex_display', 'desc': 'Display payload in Hex', 'default': 'yes',
'values': ('yes', 'no')},
)
annotations = (
# Sent from the host to the chip.
@ -250,12 +252,13 @@ class Decoder(srd.Decoder):
return c
data = ''.join([escape(b) for b in data])
text = '{} = "{}"'.format(label, data)
text = '{} = "{}"'.format(label, data.strip())
self.putp(pos, ann, text)
def finish_command(self, pos):
'''Decodes the remaining data bytes at position 'pos'.'''
always_hex = self.options['hex_display'] == 'yes'
if self.cmd == 'R_REGISTER':
self.decode_register(pos, self.ann_reg,
self.dat, self.miso_bytes())
@ -264,15 +267,15 @@ class Decoder(srd.Decoder):
self.dat, self.mosi_bytes())
elif self.cmd == 'R_RX_PAYLOAD':
self.decode_mb_data(pos, self.ann_rx,
self.miso_bytes(), 'RX payload', False)
self.miso_bytes(), 'RX payload', always_hex)
elif (self.cmd == 'W_TX_PAYLOAD' or
self.cmd == 'W_TX_PAYLOAD_NOACK'):
self.decode_mb_data(pos, self.ann_tx,
self.mosi_bytes(), 'TX payload', False)
self.mosi_bytes(), 'TX payload', always_hex)
elif self.cmd == 'W_ACK_PAYLOAD':
lbl = 'ACK payload for pipe {}'.format(self.dat)
self.decode_mb_data(pos, self.ann_tx,
self.mosi_bytes(), lbl, False)
self.mosi_bytes(), lbl, always_hex)
elif self.cmd == 'R_RX_PL_WID':
msg = 'Payload width = {}'.format(self.mb[0][1])
self.putp(pos, self.ann_reg, msg)

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@ -45,7 +45,7 @@ digits = {
class Decoder(srd.Decoder):
api_version = 3
id = 'seven_segment'
name = '7-segment'
name = 'Segment-7'
longname = '7-segment display'
desc = '7-segment display protocol.'
license = 'gplv2+'
@ -91,7 +91,8 @@ class Decoder(srd.Decoder):
return digits.get(pins, None)
def decode(self):
oldpins = self.wait()
(s0, s1, s2, s3, s4, s5, s6, dp) = self.wait()
oldpins = (s0, s1, s2, s3, s4, s5, s6, dp)
# Check if at least the 7 signals are present.
if False in [p in (0, 1) for p in oldpins[:7]]:
@ -108,7 +109,8 @@ class Decoder(srd.Decoder):
while True:
# Wait for any change.
pins = self.wait(conditions)
(s0, s1, s2, s3, s4, s5, s6, dp) = self.wait(conditions)
pins = (s0, s1, s2, s3, s4, s5, s6, dp)
if self.options['polarity'] == 'common-anode':
# Invert all data lines if a common anode display is used.