Merge branch 'dev-1.3.2' of https://github.com/dreamsourcelab/DSView into dev-1.3.2

This commit is contained in:
dreamsourcelabTAI 2024-01-22 16:24:01 +08:00
commit ef3bb8b945
19 changed files with 199 additions and 148 deletions

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@ -2,7 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2010-2016 Uwe Hermann <uwe@hermann-uwe.de> ## Copyright (C) 2010-2016 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2019 DreamSourceLab <support@dreamsourcelab.com> ## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -22,6 +22,10 @@
# TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0). # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
# TODO: Implement support for detecting various bus errors. # TODO: Implement support for detecting various bus errors.
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
''' '''

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@ -2,7 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2010-2016 Uwe Hermann <uwe@hermann-uwe.de> ## Copyright (C) 2010-2016 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2019 DreamSourceLab <support@dreamsourcelab.com> ## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -22,6 +22,10 @@
# TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0). # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
# TODO: Implement support for detecting various bus errors. # TODO: Implement support for detecting various bus errors.
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
''' '''

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2020 Richard Li <richard.li@ces.hk> ## Copyright (C) 2020 Richard Li <richard.li@ces.hk>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
class ChannelError(Exception): class ChannelError(Exception):

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2017 Karl Palsson <karlp@etactica.com> ## Copyright (C) 2017 Karl Palsson <karlp@etactica.com>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## Permission is hereby granted, free of charge, to any person obtaining a copy ## Permission is hereby granted, free of charge, to any person obtaining a copy
## of this software and associated documentation files (the "Software"), to deal ## of this software and associated documentation files (the "Software"), to deal
@ -21,6 +22,10 @@
## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
## SOFTWARE. ## SOFTWARE.
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import math import math
import sigrokdecode as srd import sigrokdecode as srd
from .lists import * from .lists import *

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au> ## Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
regs = { regs = {

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2020 Analog Devices Inc. ## Copyright (C) 2020 Analog Devices Inc.
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from common.srdhelper import SrdIntEnum from common.srdhelper import SrdIntEnum
from .lists import * from .lists import *

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2019 Marco Geisler <m-sigrok@mageis.de> ## Copyright (C) 2019 Marco Geisler <m-sigrok@mageis.de>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from collections import namedtuple from collections import namedtuple
from .lists import * from .lists import *

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2019 Jiahao Li <reg@ljh.me> ## Copyright (C) 2019 Jiahao Li <reg@ljh.me>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## Permission is hereby granted, free of charge, to any person obtaining a copy ## Permission is hereby granted, free of charge, to any person obtaining a copy
## of this software and associated documentation files (the "Software"), to deal ## of this software and associated documentation files (the "Software"), to deal
@ -21,6 +22,10 @@
## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
## SOFTWARE. ## SOFTWARE.
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from .lists import * from .lists import *

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2015 Paul Evans <leonerd@leonerd.org.uk> ## Copyright (C) 2015 Paul Evans <leonerd@leonerd.org.uk>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import re import re
import sigrokdecode as srd import sigrokdecode as srd

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au> ## Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from .lists import * from .lists import *

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@ -2,7 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2014 Jens Steinhauser <jens.steinhauser@gmail.com> ## Copyright (C) 2014 Jens Steinhauser <jens.steinhauser@gmail.com>
## Copyright (C) 2019 DreamSourceLab <support@dreamsourcelab.com> ## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -18,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
class ChannelError(Exception): class ChannelError(Exception):

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2020 Jorge Solla Rubiales <jorgesolla@gmail.com> ## Copyright (C) 2020 Jorge Solla Rubiales <jorgesolla@gmail.com>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## Permission is hereby granted, free of charge, to any person obtaining a copy ## Permission is hereby granted, free of charge, to any person obtaining a copy
## of this software and associated documentation files (the "Software"), to deal ## of this software and associated documentation files (the "Software"), to deal
@ -21,6 +22,10 @@
## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
## SOFTWARE. ## SOFTWARE.
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from common.srdhelper import SrdIntEnum from common.srdhelper import SrdIntEnum

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2018 Steve R <steversig@virginmedia.com> ## Copyright (C) 2018 Steve R <steversig@virginmedia.com>
## Copyright (C) 2023 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# 2024/1/4 putp when end
#
import sigrokdecode as srd import sigrokdecode as srd
''' '''
@ -63,16 +68,16 @@ class Decoder(srd.Decoder):
('info', 'Info'), ('info', 'Info'),
('1111', '1111'), ('1111', '1111'),
('1010', '1010'), ('1010', '1010'),
('diffman', 'Diff Man'), ('diffman', 'Diff man'),
('nrz', 'NRZ'), ('nrz', 'NRZ'),
) )
annotation_rows = ( annotation_rows = (
('frame', 'Framing',(0,)), ('frames', 'Framing', (0,)),
('info', 'Info', (1,)), ('info-vals', 'Info', (1,)),
('man1111', 'Man 1111', (2,)), ('man1111', 'Man 1111', (2,)),
('man1010', 'Man 1010', (3,)), ('man1010', 'Man 1010', (3,)),
('diffman', 'Diff Man', (4,)), ('diffmans', 'Diff man', (4,)),
('nrz', 'NRZ', (5,)), ('nrz-vals', 'NRZ', (5,)),
) )
binary = ( binary = (
('pulse-lengths', 'Pulse lengths'), ('pulse-lengths', 'Pulse lengths'),
@ -438,6 +443,9 @@ class Decoder(srd.Decoder):
self.decoded_1010 = [] # Decoded bits for man 1010 self.decoded_1010 = [] # Decoded bits for man 1010
self.pulse_lengths = [] self.pulse_lengths = []
def end(self):
self.putp(self.decoded)
def decode(self): def decode(self):
while True: while True:
if self.edge_count == 0: # Waiting for a signal. if self.edge_count == 0: # Waiting for a signal.

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@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2014 Sławek Piotrowski <sentinel@atteo.org> ## Copyright (C) 2014 Sławek Piotrowski <sentinel@atteo.org>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
class Decoder(srd.Decoder): class Decoder(srd.Decoder):

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@ -1,7 +1,8 @@
## ##
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2012-2020 Uwe Hermann <uwe@hermann-uwe.de> ## Copyright (C) 2012-2014 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,16 +18,13 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from common.srdhelper import SrdIntEnum
from common.sdcard import (cmd_names, acmd_names) from common.sdcard import (cmd_names, acmd_names)
responses = '1 1b 2 3 7'.split()
a = ['CMD%d' % i for i in range(64)] + ['ACMD%d' % i for i in range(64)] + \
['R' + r.upper() for r in responses] + ['BIT', 'BIT_WARNING']
Ann = SrdIntEnum.from_list('Ann', a)
class Decoder(srd.Decoder): class Decoder(srd.Decoder):
api_version = 3 api_version = 3
id = 'sdcard_spi' id = 'sdcard_spi'
@ -37,16 +35,23 @@ class Decoder(srd.Decoder):
inputs = ['spi'] inputs = ['spi']
outputs = [] outputs = []
tags = ['Memory'] tags = ['Memory']
# annotations length: 135 + 1
annotations = \ annotations = \
tuple(('cmd%d' % i, 'CMD%d' % i) for i in range(64)) + \ tuple(('cmd%d' % i, 'CMD%d' % i) for i in range(64)) + \
tuple(('acmd%d' % i, 'ACMD%d' % i) for i in range(64)) + \ tuple(('acmd%d' % i, 'ACMD%d' % i) for i in range(64)) + ( \
tuple(('r%s' % r, 'R%s response' % r) for r in responses) + ( \ ('r1', 'R1 reply'),
('bit', 'Bit'), ('r1b', 'R1B reply'),
('bit-warning', 'Bit warning'), ('r2', 'R2 reply'),
('r3', 'R3 reply'),
('r7', 'R7 reply'),
('bits:', 'Bits'),
('bits', 'Bits'),
('bit-warnings', 'Bit warnings'),
) )
annotation_rows = ( annotation_rows = (
('bits', 'Bits', (Ann.BIT, Ann.BIT_WARNING)), ('bits', 'Bits', (134, 135)),
('commands-replies', 'Commands/replies', Ann.prefixes('CMD ACMD R')), ('cmd-reply', 'Commands/replies', tuple(range(133))), #0-132
) )
def __init__(self): def __init__(self):
@ -57,7 +62,6 @@ class Decoder(srd.Decoder):
self.ss, self.es = 0, 0 self.ss, self.es = 0, 0
self.ss_bit, self.es_bit = 0, 0 self.ss_bit, self.es_bit = 0, 0
self.ss_cmd, self.es_cmd = 0, 0 self.ss_cmd, self.es_cmd = 0, 0
self.ss_busy, self.es_busy = 0, 0
self.cmd_token = [] self.cmd_token = []
self.cmd_token_bits = [] self.cmd_token_bits = []
self.is_acmd = False # Indicates CMD vs. ACMD self.is_acmd = False # Indicates CMD vs. ACMD
@ -66,9 +70,6 @@ class Decoder(srd.Decoder):
self.cmd_str = '' self.cmd_str = ''
self.is_cmd24 = False self.is_cmd24 = False
self.cmd24_start_token_found = False self.cmd24_start_token_found = False
self.is_cmd17 = False
self.cmd17_start_token_found = False
self.busy_first_byte = False
def start(self): def start(self):
self.out_ann = self.register(srd.OUTPUT_ANN) self.out_ann = self.register(srd.OUTPUT_ANN)
@ -79,6 +80,9 @@ class Decoder(srd.Decoder):
def putc(self, cmd, desc): def putc(self, cmd, desc):
self.putx([cmd, ['%s: %s' % (self.cmd_str, desc)]]) self.putx([cmd, ['%s: %s' % (self.cmd_str, desc)]])
def putc_4(self, cmd, desc, v):
self.putx([cmd, ['%s: %s' % (self.cmd_str, desc), '@%04X' % v]])
def putb(self, data): def putb(self, data):
self.put(self.ss_bit, self.es_bit, self.out_ann, data) self.put(self.ss_bit, self.es_bit, self.out_ann, data)
@ -125,39 +129,39 @@ class Decoder(srd.Decoder):
# Bits[47:47]: Start bit (always 0) # Bits[47:47]: Start bit (always 0)
bit, self.ss_bit, self.es_bit = tb(5, 7)[0], tb(5, 7)[1], tb(5, 7)[2] bit, self.ss_bit, self.es_bit = tb(5, 7)[0], tb(5, 7)[1], tb(5, 7)[2]
if bit == 0: if bit == 0:
self.putb([Ann.BIT, ['Start bit: %d' % bit]]) self.putb([134, ['Start bit: %d' % bit]])
else: else:
self.putb([Ann.BIT_WARNING, ['Start bit: %s (Warning: Must be 0!)' % bit]]) self.putb([135, ['Start bit: %s (Warning: Must be 0!)' % bit]])
# Bits[46:46]: Transmitter bit (1 == host) # Bits[46:46]: Transmitter bit (1 == host)
bit, self.ss_bit, self.es_bit = tb(5, 6)[0], tb(5, 6)[1], tb(5, 6)[2] bit, self.ss_bit, self.es_bit = tb(5, 6)[0], tb(5, 6)[1], tb(5, 6)[2]
if bit == 1: if bit == 1:
self.putb([Ann.BIT, ['Transmitter bit: %d' % bit]]) self.putb([134, ['Transmitter bit: %d' % bit]])
else: else:
self.putb([Ann.BIT_WARNING, ['Transmitter bit: %d (Warning: Must be 1!)' % bit]]) self.putb([135, ['Transmitter bit: %d (Warning: Must be 1!)' % bit]])
# Bits[45:40]: Command index (BCD; valid: 0-63) # Bits[45:40]: Command index (BCD; valid: 0-63)
cmd = self.cmd_index = t[0] & 0x3f cmd = self.cmd_index = t[0] & 0x3f
self.ss_bit, self.es_bit = tb(5, 5)[1], tb(5, 0)[2] self.ss_bit, self.es_bit = tb(5, 5)[1], tb(5, 0)[2]
self.putb([Ann.BIT, ['Command: %s%d (%s)' % (s, cmd, self.cmd_name(cmd))]]) self.putb([134, ['Command: %s%d (%s)' % (s, cmd, self.cmd_name(cmd))]])
# Bits[39:8]: Argument # Bits[39:8]: Argument
self.arg = (t[1] << 24) | (t[2] << 16) | (t[3] << 8) | t[4] self.arg = (t[1] << 24) | (t[2] << 16) | (t[3] << 8) | t[4]
self.ss_bit, self.es_bit = tb(4, 7)[1], tb(1, 0)[2] self.ss_bit, self.es_bit = tb(4, 7)[1], tb(1, 0)[2]
self.putb([Ann.BIT, ['Argument: 0x%04x' % self.arg]]) self.putb([134, ['Argument: {$}', '@%04X' % self.arg]])
# Bits[7:1]: CRC7 # Bits[7:1]: CRC7
# TODO: Check CRC7. # TODO: Check CRC7.
crc = t[5] >> 1 crc = t[5] >> 1
self.ss_bit, self.es_bit = tb(0, 7)[1], tb(0, 1)[2] self.ss_bit, self.es_bit = tb(0, 7)[1], tb(0, 1)[2]
self.putb([Ann.BIT, ['CRC7: 0x%01x' % crc]]) self.putb([134, ['CRC7: {$}', '@%01X' % crc]])
# Bits[0:0]: End bit (always 1) # Bits[0:0]: End bit (always 1)
bit, self.ss_bit, self.es_bit = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2] bit, self.ss_bit, self.es_bit = tb(0, 0)[0], tb(0, 0)[1], tb(0, 0)[2]
if bit == 1: if bit == 1:
self.putb([Ann.BIT, ['End bit: %d' % bit]]) self.putb([134, ['End bit: %d' % bit]])
else: else:
self.putb([Ann.BIT_WARNING, ['End bit: %d (Warning: Must be 1!)' % bit]]) self.putb([135, ['End bit: %d (Warning: Must be 1!)' % bit]])
# Handle command. # Handle command.
if cmd in (0, 1, 9, 16, 17, 24, 41, 49, 55, 59): if cmd in (0, 1, 9, 16, 17, 24, 41, 49, 55, 59):
@ -165,26 +169,26 @@ class Decoder(srd.Decoder):
self.cmd_str = '%s%d (%s)' % (s, cmd, self.cmd_name(cmd)) self.cmd_str = '%s%d (%s)' % (s, cmd, self.cmd_name(cmd))
else: else:
self.state = 'HANDLE CMD999' self.state = 'HANDLE CMD999'
a = '%s%d: %02x %02x %02x %02x %02x %02x' % ((s, cmd) + tuple(t)) a = '%s%d: {$}' % (s, cmd)
self.putx([cmd, [a]]) self.putx([cmd, [a, '@' + '%02x %02x %02x %02x %02x %02x' % (tuple(t))]])
def handle_cmd0(self): def handle_cmd0(self):
# CMD0: GO_IDLE_STATE # CMD0: GO_IDLE_STATE
self.putc(Ann.CMD0, 'Reset the SD card') self.putc(0, 'Reset the SD card')
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_cmd1(self): def handle_cmd1(self):
# CMD1: SEND_OP_COND # CMD1: SEND_OP_COND
self.putc(Ann.CMD1, 'Send HCS info and activate the card init process') self.putc(1, 'Send HCS info and activate the card init process')
hcs = (self.arg & (1 << 30)) >> 30 hcs = (self.arg & (1 << 30)) >> 30
self.ss_bit = self.cmd_token_bits[5 - 4][6][1] self.ss_bit = self.cmd_token_bits[5 - 4][6][1]
self.es_bit = self.cmd_token_bits[5 - 4][6][2] self.es_bit = self.cmd_token_bits[5 - 4][6][2]
self.putb([Ann.BIT, ['HCS: %d' % hcs]]) self.putb([134, ['HCS: %d' % hcs]])
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_cmd9(self): def handle_cmd9(self):
# CMD9: SEND_CSD (128 bits / 16 bytes) # CMD9: SEND_CSD (128 bits / 16 bytes)
self.putc(Ann.CMD9, 'Ask card to send its card specific data (CSD)') self.putc(9, 'Ask card to send its card specific data (CSD)')
if len(self.read_buf) == 0: if len(self.read_buf) == 0:
self.ss_cmd = self.ss self.ss_cmd = self.ss
self.read_buf.append(self.miso) self.read_buf.append(self.miso)
@ -194,7 +198,7 @@ class Decoder(srd.Decoder):
return return
self.es_cmd = self.es self.es_cmd = self.es
self.read_buf = self.read_buf[4:] # TODO: Document or redo. self.read_buf = self.read_buf[4:] # TODO: Document or redo.
self.putx([Ann.CMD9, ['CSD: %s' % self.read_buf]]) self.putx([9, ['CSD: %s' % self.read_buf]])
# TODO: Decode all bits. # TODO: Decode all bits.
self.read_buf = [] self.read_buf = []
### self.state = 'GET RESPONSE R1' ### self.state = 'GET RESPONSE R1'
@ -202,11 +206,11 @@ class Decoder(srd.Decoder):
def handle_cmd10(self): def handle_cmd10(self):
# CMD10: SEND_CID (128 bits / 16 bytes) # CMD10: SEND_CID (128 bits / 16 bytes)
self.putc(Ann.CMD10, 'Ask card to send its card identification (CID)') self.putc(10, 'Ask card to send its card identification (CID)')
self.read_buf.append(self.miso) self.read_buf.append(self.miso)
if len(self.read_buf) < 16: if len(self.read_buf) < 16:
return return
self.putx([Ann.CMD10, ['CID: %s' % self.read_buf]]) self.putx([10, ['CID: %s' % self.read_buf]])
# TODO: Decode all bits. # TODO: Decode all bits.
self.read_buf = [] self.read_buf = []
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
@ -215,18 +219,26 @@ class Decoder(srd.Decoder):
# CMD16: SET_BLOCKLEN # CMD16: SET_BLOCKLEN
self.blocklen = self.arg self.blocklen = self.arg
# TODO: Sanity check on block length. # TODO: Sanity check on block length.
self.putc(Ann.CMD16, 'Set the block length to %d bytes' % self.blocklen) self.putc(16, 'Set the block length to %d bytes' % self.blocklen)
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_cmd17(self): def handle_cmd17(self):
# CMD17: READ_SINGLE_BLOCK # CMD17: READ_SINGLE_BLOCK
self.putc(Ann.CMD17, 'Read a block from address 0x%04x' % self.arg) self.putc_4(17, 'Read a block from address {$}', self.arg)
self.is_cmd17 = True if len(self.read_buf) == 0:
self.ss_cmd = self.ss
self.read_buf.append(self.miso)
if len(self.read_buf) < self.blocklen + 2: # FIXME
return
self.es_cmd = self.es
self.read_buf = self.read_buf[2:] # FIXME
self.putx([17, ['Block data: %s' % self.read_buf]])
self.read_buf = []
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_cmd24(self): def handle_cmd24(self):
# CMD24: WRITE_BLOCK # CMD24: WRITE_BLOCK
self.putc(Ann.CMD24, 'Write a block to address 0x%04x' % self.arg) self.putc_4(24, 'Write a block to address {$}', self.arg)
self.is_cmd24 = True self.is_cmd24 = True
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
@ -235,7 +247,7 @@ class Decoder(srd.Decoder):
def handle_cmd55(self): def handle_cmd55(self):
# CMD55: APP_CMD # CMD55: APP_CMD
self.putc(Ann.CMD55, 'Next command is an application-specific command') self.putc(55, 'Next command is an application-specific command')
self.is_acmd = True self.is_acmd = True
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
@ -243,12 +255,12 @@ class Decoder(srd.Decoder):
# CMD59: CRC_ON_OFF # CMD59: CRC_ON_OFF
crc_on_off = self.arg & (1 << 0) crc_on_off = self.arg & (1 << 0)
s = 'on' if crc_on_off == 1 else 'off' s = 'on' if crc_on_off == 1 else 'off'
self.putc(Ann.CMD59, 'Turn the SD card CRC option %s' % s) self.putc(59, 'Turn the SD card CRC option %s' % s)
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_acmd41(self): def handle_acmd41(self):
# ACMD41: SD_SEND_OP_COND # ACMD41: SD_SEND_OP_COND
self.putc(Ann.ACMD41, 'Send HCS info and activate the card init process') self.putc(64 + 41, 'Send HCS info and activate the card init process')
self.state = 'GET RESPONSE R1' self.state = 'GET RESPONSE R1'
def handle_cmd999(self): def handle_cmd999(self):
@ -296,12 +308,12 @@ class Decoder(srd.Decoder):
# Sent by the card after every command except for SEND_STATUS. # Sent by the card after every command except for SEND_STATUS.
self.ss_cmd, self.es_cmd = self.miso_bits[7][1], self.miso_bits[0][2] self.ss_cmd, self.es_cmd = self.miso_bits[7][1], self.miso_bits[0][2]
self.putx([Ann.R1, ['R1: 0x%02x' % res]]) self.putx([65, ['R1: {$}', '@%02x' % res]])
def putbit(bit, data): def putbit(bit, data):
b = self.miso_bits[bit] b = self.miso_bits[bit]
self.ss_bit, self.es_bit = b[1], b[2] self.ss_bit, self.es_bit = b[1], b[2]
self.putb([Ann.BIT, data]) self.putb([134, data])
# Bit 0: 'In idle state' bit # Bit 0: 'In idle state' bit
s = '' if (res & (1 << 0)) else 'not ' s = '' if (res & (1 << 0)) else 'not '
@ -334,8 +346,6 @@ class Decoder(srd.Decoder):
# Bit 7: Always set to 0 # Bit 7: Always set to 0
putbit(7, ['Bit 7 (always 0)']) putbit(7, ['Bit 7 (always 0)'])
if self.is_cmd17:
self.state = 'HANDLE DATA BLOCK CMD17'
if self.is_cmd24: if self.is_cmd24:
self.state = 'HANDLE DATA BLOCK CMD24' self.state = 'HANDLE DATA BLOCK CMD24'
@ -359,36 +369,6 @@ class Decoder(srd.Decoder):
# TODO # TODO
pass pass
def handle_data_cmd17(self, miso):
# CMD17 returns one byte R1, then some bytes 0xff, then a Start Block
# (single byte 0xfe), then self.blocklen bytes of data, then always
# 2 bytes of CRC.
if self.cmd17_start_token_found:
if len(self.read_buf) == 0:
self.ss_data = self.ss
if not self.blocklen:
# Assume a fixed block size when inspection of the previous
# traffic did not provide the respective parameter value.
# TODO: Make the default block size a PD option?
self.blocklen = 512
self.read_buf.append(miso)
# Wait until block transfer completed.
if len(self.read_buf) < self.blocklen:
return
if len(self.read_buf) == self.blocklen:
self.es_data = self.es
self.put(self.ss_data, self.es_data, self.out_ann, [Ann.CMD17, ['Block data: %s' % self.read_buf]])
elif len(self.read_buf) == (self.blocklen + 1):
self.ss_crc = self.ss
elif len(self.read_buf) == (self.blocklen + 2):
self.es_crc = self.es
# TODO: Check CRC.
self.put(self.ss_crc, self.es_crc, self.out_ann, [Ann.CMD17, ['CRC']])
self.state = 'IDLE'
elif miso == 0xfe:
self.put(self.ss, self.es, self.out_ann, [Ann.CMD17, ['Start Block']])
self.cmd17_start_token_found = True
def handle_data_cmd24(self, mosi): def handle_data_cmd24(self, mosi):
if self.cmd24_start_token_found: if self.cmd24_start_token_found:
if len(self.read_buf) == 0: if len(self.read_buf) == 0:
@ -404,11 +384,11 @@ class Decoder(srd.Decoder):
if len(self.read_buf) < self.blocklen: if len(self.read_buf) < self.blocklen:
return return
self.es_data = self.es self.es_data = self.es
self.put(self.ss_data, self.es_data, self.out_ann, [Ann.CMD24, ['Block data: %s' % self.read_buf]]) self.put(self.ss_data, self.es_data, self.out_ann, [24, ['Block data: %s' % self.read_buf]])
self.read_buf = [] self.read_buf = []
self.state = 'DATA RESPONSE' self.state = 'DATA RESPONSE'
elif mosi == 0xfe: elif mosi == 0xfe:
self.put(self.ss, self.es, self.out_ann, [Ann.CMD24, ['Start Block']]) self.put(self.ss, self.es, self.out_ann, [24, ['Start Block']])
self.cmd24_start_token_found = True self.cmd24_start_token_found = True
def handle_data_response(self, miso): def handle_data_response(self, miso):
@ -428,40 +408,22 @@ class Decoder(srd.Decoder):
# Should we return to IDLE here? # Should we return to IDLE here?
return return
m = self.miso_bits m = self.miso_bits
self.put(m[7][1], m[5][2], self.out_ann, [Ann.BIT, ['Don\'t care']]) self.put(m[7][1], m[5][2], self.out_ann, [134, ['Don\'t care']])
self.put(m[4][1], m[4][2], self.out_ann, [Ann.BIT, ['Always 0']]) self.put(m[4][1], m[4][2], self.out_ann, [134, ['Always 0']])
if miso == 0x05: if miso == 0x05:
self.put(m[3][1], m[1][2], self.out_ann, [Ann.BIT, ['Data accepted']]) self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data accepted']])
elif miso == 0x0b: elif miso == 0x0b:
self.put(m[3][1], m[1][2], self.out_ann, [Ann.BIT, ['Data rejected (CRC error)']]) self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data rejected (CRC error)']])
elif miso == 0x0d: elif miso == 0x0d:
self.put(m[3][1], m[1][2], self.out_ann, [Ann.BIT, ['Data rejected (write error)']]) self.put(m[3][1], m[1][2], self.out_ann, [134, ['Data rejected (write error)']])
self.put(m[0][1], m[0][2], self.out_ann, [Ann.BIT, ['Always 1']]) self.put(m[0][1], m[0][2], self.out_ann, [134, ['Always 1']])
cls = Ann.CMD24 if self.is_cmd24 else None ann_class = None
if cls is not None:
self.put(self.ss, self.es, self.out_ann, [cls, ['Data Response']])
if self.is_cmd24: if self.is_cmd24:
# We just send a block of data to be written to the card, ann_class = 24
# this takes some time. if ann_class is not None:
self.state = 'WAIT WHILE CARD BUSY' self.put(self.ss, self.es, self.out_ann, [ann_class, ['Data Response']])
self.busy_first_byte = True
else:
self.state = 'IDLE' self.state = 'IDLE'
def wait_while_busy(self, miso):
if miso != 0x00:
cls = Ann.CMD24 if self.is_cmd24 else None
if cls is not None:
self.put(self.ss_busy, self.es_busy, self.out_ann, [cls, ['Card is busy']])
self.state = 'IDLE'
return
else:
if self.busy_first_byte:
self.ss_busy = self.ss
self.busy_first_byte = False
else:
self.es_busy = self.es
def decode(self, ss, es, data): def decode(self, ss, es, data):
ptype, mosi, miso = data ptype, mosi, miso = data
@ -508,11 +470,7 @@ class Decoder(srd.Decoder):
handle_response = getattr(self, s) handle_response = getattr(self, s)
self.state = 'IDLE' self.state = 'IDLE'
handle_response(miso) handle_response(miso)
elif self.state == 'HANDLE DATA BLOCK CMD17':
self.handle_data_cmd17(miso)
elif self.state == 'HANDLE DATA BLOCK CMD24': elif self.state == 'HANDLE DATA BLOCK CMD24':
self.handle_data_cmd24(mosi) self.handle_data_cmd24(mosi)
elif self.state == 'DATA RESPONSE': elif self.state == 'DATA RESPONSE':
self.handle_data_response(miso) self.handle_data_response(miso)
elif self.state == 'WAIT WHILE CARD BUSY':
self.wait_while_busy(miso)

View File

@ -1,7 +1,8 @@
## ##
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2011-2020 Uwe Hermann <uwe@hermann-uwe.de> ## Copyright (C) 2011-2016 Uwe Hermann <uwe@hermann-uwe.de>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,15 +18,21 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
import re
from common.srdhelper import SrdIntEnum
from .lists import * from .lists import *
L = len(cmds) L = len(cmds)
a = [re.sub('\/', '_', c[0]).replace('2READ', 'READ2X') for c in cmds.values()] + ['BIT', 'FIELD', 'WARN'] # Don't forget to keep this in sync with 'cmds' is lists.py.
Ann = SrdIntEnum.from_list('Ann', a) class Ann:
WRSR, PP, READ, WRDI, RDSR, WREN, FAST_READ, SE, RDSCUR, WRSCUR, \
RDSR2, CE, ESRY, DSRY, WRITE1, WRITE2, REMS, RDID, RDP_RES, CP, ENSO, DP, \
READ2X, EXSO, CE2, STATUS, BE, REMS2, \
BIT, FIELD, WARN = range(L + 3)
def cmd_annotation_classes(): def cmd_annotation_classes():
return tuple([tuple([cmd[0].lower(), cmd[1]]) for cmd in cmds.values()]) return tuple([tuple([cmd[0].lower(), cmd[1]]) for cmd in cmds.values()])
@ -71,9 +78,9 @@ def decode_status_reg(data):
class Decoder(srd.Decoder): class Decoder(srd.Decoder):
api_version = 3 api_version = 3
id = 'spiflash' id = 'spiflash'
name = 'SPI flash/EEPROM' name = 'SPI flash'
longname = 'SPI flash/EEPROM chips' longname = 'SPI flash chips'
desc = 'xx25 series SPI (NOR) flash/EEPROM chip protocol.' desc = 'xx25 series SPI (NOR) flash chip protocol.'
license = 'gplv2+' license = 'gplv2+'
inputs = ['spi'] inputs = ['spi']
outputs = [] outputs = []
@ -162,15 +169,17 @@ class Decoder(srd.Decoder):
self.addr |= (mosi << ((4 - self.cmdstate) * 8)) self.addr |= (mosi << ((4 - self.cmdstate) * 8))
b = ((3 - (self.cmdstate - 2)) * 8) - 1 b = ((3 - (self.cmdstate - 2)) * 8) - 1
self.putx([Ann.BIT, self.putx([Ann.BIT,
['Address bits %d..%d: 0x%02x' % (b, b - 7, mosi), ['Address bits %d..%d: {$}' % (b, b - 7),
'Addr bits %d..%d: 0x%02x' % (b, b - 7, mosi), 'Addr bits %d..%d: {$}' % (b, b - 7),
'Addr bits %d..%d' % (b, b - 7), 'A%d..A%d' % (b, b - 7)]]) 'Addr bits %d..%d' % (b, b - 7),
'A%d..A%d' % (b, b - 7),
'@%02X' % mosi
]])
if self.cmdstate == 2: if self.cmdstate == 2:
self.ss_field = self.ss self.ss_field = self.ss
if self.cmdstate == 4: if self.cmdstate == 4:
self.es_field = self.es self.es_field = self.es
self.putf([Ann.FIELD, ['Address: 0x%06x' % self.addr, self.putf([Ann.FIELD, ['Address: {$}', 'Addr: {$}', '{$}', '@%06x' % self.addr]])
'Addr: 0x%06x' % self.addr, '0x%06x' % self.addr]])
def handle_wren(self, mosi, miso): def handle_wren(self, mosi, miso):
self.putx([Ann.WREN, self.cmd_ann_list()]) self.putx([Ann.WREN, self.cmd_ann_list()])
@ -186,14 +195,14 @@ class Decoder(srd.Decoder):
self.emit_cmd_byte() self.emit_cmd_byte()
elif self.cmdstate == 2: elif self.cmdstate == 2:
# Byte 2: Slave sends the JEDEC manufacturer ID. # Byte 2: Slave sends the JEDEC manufacturer ID.
self.putx([Ann.FIELD, ['Manufacturer ID: 0x%02x' % miso]]) self.putx([Ann.FIELD, ['Manufacturer ID: {$}', '@%02x' % miso]])
elif self.cmdstate == 3: elif self.cmdstate == 3:
# Byte 3: Slave sends the memory type. # Byte 3: Slave sends the memory type.
self.putx([Ann.FIELD, ['Memory type: 0x%02x' % miso]]) self.putx([Ann.FIELD, ['Memory type: {$}', '@%02x' % miso]])
elif self.cmdstate == 4: elif self.cmdstate == 4:
# Byte 4: Slave sends the device ID. # Byte 4: Slave sends the device ID.
self.device_id = miso self.device_id = miso
self.putx([Ann.FIELD, ['Device ID: 0x%02x' % miso]]) self.putx([Ann.FIELD, ['Device ID: {$}', '@%02x' % miso]])
if self.cmdstate == 4: if self.cmdstate == 4:
self.es_cmd = self.es self.es_cmd = self.es
@ -314,7 +323,7 @@ class Decoder(srd.Decoder):
# Bytes 2/3/4: Master sends read address (24bits, MSB-first). # Bytes 2/3/4: Master sends read address (24bits, MSB-first).
self.emit_addr_bytes(mosi) self.emit_addr_bytes(mosi)
elif self.cmdstate == 5: elif self.cmdstate == 5:
self.putx([Ann.BIT, ['Dummy byte: 0x%02x' % mosi]]) self.putx([Ann.BIT, ['Dummy byte: {$}', '@%02x' % mosi]])
elif self.cmdstate >= 6: elif self.cmdstate >= 6:
# Bytes 6-x: Master reads data bytes (until CS# de-asserted). # Bytes 6-x: Master reads data bytes (until CS# de-asserted).
self.es_field = self.es # Will be overwritten for each byte. self.es_field = self.es # Will be overwritten for each byte.
@ -344,7 +353,7 @@ class Decoder(srd.Decoder):
# Byte 5: Dummy byte. Also handle byte 4 (address LSB) here. # Byte 5: Dummy byte. Also handle byte 4 (address LSB) here.
self.emit_addr_bytes(b1) self.emit_addr_bytes(b1)
self.cmdstate = 5 self.cmdstate = 5
self.putx([Ann.BIT, ['Dummy byte: 0x%02x' % b2]]) self.putx([Ann.BIT, ['Dummy byte: {$}', '@%02x' % b2]])
elif self.cmdstate >= 6: elif self.cmdstate >= 6:
# Bytes 6-x: Master reads data bytes (until CS# de-asserted). # Bytes 6-x: Master reads data bytes (until CS# de-asserted).
self.es_field = self.es # Will be overwritten for each byte. self.es_field = self.es # Will be overwritten for each byte.
@ -366,7 +375,7 @@ class Decoder(srd.Decoder):
self.es_field = self.es self.es_field = self.es
if self.cmdstate == 2: if self.cmdstate == 2:
self.ss_field = self.ss self.ss_field = self.ss
self.putx([Ann.BIT, ['Status register byte %d: 0x%02x' % ((self.cmdstate % 2) + 1, miso)]]) self.putx([Ann.BIT, ['Status register byte %d: {$}' % ((self.cmdstate % 2) + 1, '@%02x' % miso)]])
self.cmdstate += 1 self.cmdstate += 1
# TODO: Warn/abort if we don't see the necessary amount of bytes. # TODO: Warn/abort if we don't see the necessary amount of bytes.
@ -382,8 +391,8 @@ class Decoder(srd.Decoder):
if self.cmdstate == 4: if self.cmdstate == 4:
self.es_cmd = self.es self.es_cmd = self.es
d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr) d = ['Erase sector %d ({$})' % self.addr, '@%06x' % self.addr]
self.putc([Ann.SE, [d]]) self.putc([Ann.SE, d])
# TODO: Max. size depends on chip, check that too if possible. # TODO: Max. size depends on chip, check that too if possible.
if self.addr % 4096 != 0: if self.addr % 4096 != 0:
# Sector addresses must be 4K-aligned (same for all 3 chips). # Sector addresses must be 4K-aligned (same for all 3 chips).
@ -435,7 +444,7 @@ class Decoder(srd.Decoder):
self.emit_cmd_byte() self.emit_cmd_byte()
elif self.cmdstate in (2, 3, 4): elif self.cmdstate in (2, 3, 4):
# Bytes 2/3/4: Master sends three dummy bytes. # Bytes 2/3/4: Master sends three dummy bytes.
self.putx([Ann.FIELD, ['Dummy byte: %02x' % mosi]]) self.putx([Ann.FIELD, ['Dummy byte: {$}', '@%02x' % mosi]])
elif self.cmdstate == 5: elif self.cmdstate == 5:
# Byte 5: Slave sends device ID. # Byte 5: Slave sends device ID.
self.es_cmd = self.es self.es_cmd = self.es
@ -452,7 +461,7 @@ class Decoder(srd.Decoder):
self.emit_cmd_byte() self.emit_cmd_byte()
elif self.cmdstate in (2, 3): elif self.cmdstate in (2, 3):
# Bytes 2/3: Master sends two dummy bytes. # Bytes 2/3: Master sends two dummy bytes.
self.putx([Ann.FIELD, ['Dummy byte: 0x%02x' % mosi]]) self.putx([Ann.FIELD, ['Dummy byte: {$}', '@%02X' % mosi]])
elif self.cmdstate == 4: elif self.cmdstate == 4:
# Byte 4: Master sends 0x00 or 0x01. # Byte 4: Master sends 0x00 or 0x01.
# 0x00: Master wants manufacturer ID as first reply byte. # 0x00: Master wants manufacturer ID as first reply byte.
@ -464,12 +473,12 @@ class Decoder(srd.Decoder):
# Byte 5: Slave sends manufacturer ID (or device ID). # Byte 5: Slave sends manufacturer ID (or device ID).
self.ids = [miso] self.ids = [miso]
d = 'Manufacturer' if self.manufacturer_id_first else 'Device' d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
self.putx([Ann.FIELD, ['%s ID: 0x%02x' % (d, miso)]]) self.putx([Ann.FIELD, ['%s ID: {$}' % d, '@%02X' % miso]])
elif self.cmdstate == 6: elif self.cmdstate == 6:
# Byte 6: Slave sends device ID (or manufacturer ID). # Byte 6: Slave sends device ID (or manufacturer ID).
self.ids.append(miso) self.ids.append(miso)
d = 'Device' if self.manufacturer_id_first else 'Manufacturer' d = 'Device' if self.manufacturer_id_first else 'Manufacturer'
self.putx([Ann.FIELD, ['%s ID: 0x%02x' % (d, miso)]]) self.putx([Ann.FIELD, ['%s ID: {$}' % d, '@%02X' % miso]])
if self.cmdstate == 6: if self.cmdstate == 6:
id_ = self.ids[1] if self.manufacturer_id_first else self.ids[0] id_ = self.ids[1] if self.manufacturer_id_first else self.ids[0]
@ -510,8 +519,7 @@ class Decoder(srd.Decoder):
else: else:
s = ''.join(map(chr, self.data)) s = ''.join(map(chr, self.data))
self.putf([Ann.FIELD, ['%s (%d bytes)' % (label, len(self.data))]]) self.putf([Ann.FIELD, ['%s (%d bytes)' % (label, len(self.data))]])
self.putc([idx, ['%s (addr 0x%06x, %d bytes): %s' % \ self.putc([idx, ['%s (addr {$}, %d bytes): %s' % (cmds[self.state][1], len(self.data), s), '@%06x' % self.addr]])
(cmds[self.state][1], self.addr, len(self.data), s)]])
def decode(self, ss, es, data): def decode(self, ss, es, data):
ptype, mosi, miso = data ptype, mosi, miso = data
@ -533,5 +541,5 @@ class Decoder(srd.Decoder):
try: try:
self.cmd_handlers[self.state](mosi, miso) self.cmd_handlers[self.state](mosi, miso)
except KeyError: except KeyError:
self.putx([Ann.BIT, ['Unknown command: 0x%02x' % mosi]]) self.putx([Ann.BIT, ['Unknown command: {$}', '@%02x' % mosi]])
self.state = None self.state = None

View File

@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2019-2020 Benjamin Vernoux <bvernoux@gmail.com> ## Copyright (C) 2019-2020 Benjamin Vernoux <bvernoux@gmail.com>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from collections import namedtuple from collections import namedtuple
from common.srdhelper import SrdIntEnum from common.srdhelper import SrdIntEnum

View File

@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2016 Sean Burford <sburford@google.com> ## Copyright (C) 2016 Sean Burford <sburford@google.com>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import sigrokdecode as srd import sigrokdecode as srd
from common.srdhelper import bits2int from common.srdhelper import bits2int

View File

@ -2,6 +2,7 @@
## This file is part of the libsigrokdecode project. ## This file is part of the libsigrokdecode project.
## ##
## Copyright (C) 2018 Stefan Petersen <spe@ciellt.se> ## Copyright (C) 2018 Stefan Petersen <spe@ciellt.se>
## Copyright (C) 2024 DreamSourceLab <support@dreamsourcelab.com>
## ##
## This program is free software; you can redistribute it and/or modify ## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by ## it under the terms of the GNU General Public License as published by
@ -17,6 +18,10 @@
## along with this program; if not, see <http://www.gnu.org/licenses/>. ## along with this program; if not, see <http://www.gnu.org/licenses/>.
## ##
#
# DreamSourceLab :Choose hex, dec, oct, bin, or ascii to display the decoding result
#
import re import re
import sigrokdecode as srd import sigrokdecode as srd