mirror of
https://github.com/DreamSourceLab/DSView.git
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138 lines
4.3 KiB
Python
Executable File
138 lines
4.3 KiB
Python
Executable File
##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sigrokdecode as srd
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from .lists import *
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class Decoder(srd.Decoder):
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api_version = 3
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id = 'mrf24j40'
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name = 'MRF24J40'
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longname = 'Microchip MRF24J40'
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desc = 'IEEE 802.15.4 2.4 GHz RF tranceiver chip.'
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license = 'gplv2+'
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inputs = ['spi']
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outputs = []
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tags = ['IC', 'Wireless/RF']
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annotations = (
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('sread', 'Short register read commands'),
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('swrite', 'Short register write commands'),
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('lread', 'Long register read commands'),
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('lwrite', 'Long register write commands'),
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('warning', 'Warnings'),
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)
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annotation_rows = (
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('read', 'Read', (0, 2)),
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('write', 'Write', (1, 3)),
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('warnings', 'Warnings', (4,)),
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)
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def __init__(self):
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self.reset()
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def reset(self):
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self.ss_cmd, self.es_cmd = 0, 0
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self.mosi_bytes = []
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self.miso_bytes = []
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def start(self):
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self.out_ann = self.register(srd.OUTPUT_ANN)
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def putx(self, data):
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self.put(self.ss_cmd, self.es_cmd, self.out_ann, data)
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def putw(self, pos, msg):
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self.put(pos[0], pos[1], self.out_ann, [4, [msg]])
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def reset_data(self):
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self.mosi_bytes = []
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self.miso_bytes = []
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def handle_short(self):
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write = self.mosi_bytes[0] & 0x1
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reg = (self.mosi_bytes[0] >> 1) & 0x3f
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reg_desc = sregs.get(reg, 'illegal')
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if write:
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self.putx([1, ['%s: %#x' % (reg_desc, self.mosi_bytes[1])]])
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else:
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self.putx([0, ['%s: %#x' % (reg_desc, self.miso_bytes[1])]])
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def handle_long(self):
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dword = self.mosi_bytes[0] << 8 | self.mosi_bytes[1]
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write = dword & (0x1 << 4)
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reg = dword >> 5 & 0x3ff
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if reg >= 0x0:
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reg_desc = 'TX:%#x' % reg
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if reg >= 0x80:
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reg_desc = 'TX beacon:%#x' % reg
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if reg >= 0x100:
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reg_desc = 'TX GTS1:%#x' % reg
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if reg >= 0x180:
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reg_desc = 'TX GTS2:%#x' % reg
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if reg >= 0x200:
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reg_desc = lregs.get(reg, 'illegal')
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if reg >= 0x280:
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reg_desc = 'Security keys:%#x' % reg
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if reg >= 0x2c0:
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reg_desc = 'Reserved:%#x' % reg
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if reg >= 0x300:
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reg_desc = 'RX:%#x' % reg
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if write:
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self.putx([3, ['%s: %#x' % (reg_desc, self.mosi_bytes[2])]])
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else:
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self.putx([2, ['%s: %#x' % (reg_desc, self.miso_bytes[2])]])
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def decode(self, ss, es, data):
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ptype = data[0]
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if ptype == 'CS-CHANGE':
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# If we transition high mid-stream, toss out our data and restart.
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cs_old, cs_new = data[1:]
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if cs_old is not None and cs_old == 0 and cs_new == 1:
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if len(self.mosi_bytes) not in (0, 2, 3):
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self.putw([self.ss_cmd, es], 'Misplaced CS!')
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self.reset_data()
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return
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# Don't care about anything else.
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if ptype != 'DATA':
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return
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mosi, miso = data[1:]
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self.ss, self.es = ss, es
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if len(self.mosi_bytes) == 0:
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self.ss_cmd = ss
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self.mosi_bytes.append(mosi)
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self.miso_bytes.append(miso)
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# Everything is either 2 bytes or 3 bytes.
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if len(self.mosi_bytes) < 2:
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return
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if self.mosi_bytes[0] & 0x80:
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if len(self.mosi_bytes) == 3:
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self.es_cmd = es
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self.handle_long()
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self.reset_data()
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else:
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self.es_cmd = es
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self.handle_short()
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self.reset_data()
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