mirror of
https://github.com/DreamSourceLab/DSView.git
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261 lines
9.2 KiB
Python
261 lines
9.2 KiB
Python
##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2013-2016 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sigrokdecode as srd
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from common.srdhelper import bitpack
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'''
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OUTPUT_PYTHON format:
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Packet:
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[<ptype>, <pdata>]
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<ptype>, <pdata>
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- 'ITEM', [<item>, <itembitsize>]
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- 'WORD', [<word>, <wordbitsize>, <worditemcount>]
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<item>:
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- A single item (a number). It can be of arbitrary size. The max. number
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of bits in this item is specified in <itembitsize>.
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<itembitsize>:
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- The size of an item (in bits). For a 4-bit parallel bus this is 4,
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for a 16-bit parallel bus this is 16, and so on.
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<word>:
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- A single word (a number). It can be of arbitrary size. The max. number
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of bits in this word is specified in <wordbitsize>. The (exact) number
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of items in this word is specified in <worditemcount>.
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<wordbitsize>:
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- The size of a word (in bits). For a 2-item word with 8-bit items
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<wordbitsize> is 16, for a 3-item word with 4-bit items <wordbitsize>
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is 12, and so on.
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<worditemcount>:
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- The size of a word (in number of items). For a 4-item word (no matter
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how many bits each item consists of) <worditemcount> is 4, for a 7-item
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word <worditemcount> is 7, and so on.
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'''
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def channel_list(num_channels):
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l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}]
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for i in range(num_channels):
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d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i}
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l.append(d)
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return tuple(l)
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class ChannelError(Exception):
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pass
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NUM_CHANNELS = 32
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class Decoder(srd.Decoder):
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api_version = 3
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id = 'parallel'
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name = 'Parallel'
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longname = 'Parallel sync bus'
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desc = 'Generic parallel synchronous bus.'
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license = 'gplv2+'
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inputs = ['logic']
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outputs = ['parallel']
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tags = ['Util']
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optional_channels = channel_list(NUM_CHANNELS)
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options = (
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{'id': 'clock_edge', 'desc': 'Clock edge to sample on',
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'default': 'rising', 'values': ('rising', 'falling'), 'idn':'dec_parallel_opt_clock_edge'},
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{'id': 'wordsize', 'desc': 'Data wordsize (# bus cycles)',
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'default': 0, 'idn':'dec_parallel_opt_wordsize'},
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{'id': 'endianness', 'desc': 'Data endianness',
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'default': 'little', 'values': ('little', 'big'), 'idn':'dec_parallel_opt_endianness'},
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)
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annotations = (
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('items', 'Items'),
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('words', 'Words'),
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)
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annotation_rows = (
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('items', 'Items', (0,)),
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('words', 'Words', (1,)),
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)
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def __init__(self):
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self.reset()
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def reset(self):
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self.items = []
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self.saved_item = None
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self.saved_word = None
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self.ss_word = self.es_word = None
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self.first = True
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self.have_clock = True
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self.prv_dex = 0
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self.num_item_bits = None
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def start(self):
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self.out_python = self.register(srd.OUTPUT_PYTHON)
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self.out_ann = self.register(srd.OUTPUT_ANN)
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def putpw(self, data):
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self.put(self.ss_word, self.es_word, self.out_python, data)
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def putw(self, data):
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self.put(self.ss_word, self.es_word, self.out_ann, data)
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def put_ann(self, s, e, data):
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self.put(s, e, self.out_ann, data)
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def put_py(self, s, e, data):
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self.put(s, e, self.out_python, data)
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def handle_bits(self, item):
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# If a word was previously accumulated, then emit its annotation
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# now after its end samplenumber became available.
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cur_dex = self.samplenum
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# Defer annotations for individual items until the next sample
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# is taken, and the previous sample's end samplenumber has
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# become available.
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if self.first:
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# Save the start sample and item for later (no output yet).
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if not self.have_clock:
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self.put_py(self.prv_dex, cur_dex, ['ITEM', self.saved_item])
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self.put_ann(self.prv_dex, cur_dex, [0, [self.fmt_item.format(self.saved_item)]])
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self.first = False
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self.saved_item = item
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else:
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# Output the saved item (from the last CLK edge to the current).
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self.put_py(self.prv_dex, cur_dex, ['ITEM', self.saved_item])
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self.put_ann(self.prv_dex, cur_dex, [0, [self.fmt_item.format(self.saved_item)]])
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self.saved_item = item
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self.prv_dex = cur_dex
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self.handel_word(item, cur_dex)
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#word
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def handel_word(self, item, cur_dex):
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if self.saved_word is not None:
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if self.options['wordsize'] > 0:
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self.es_word = cur_dex
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self.putw([1, [self.fmt_word.format(self.saved_word)]])
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self.putpw(['WORD', self.saved_word])
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self.saved_word = None
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if item is None:
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return
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# Get as many items as the configured wordsize specifies.
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if not self.items:
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self.ss_word = cur_dex
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self.items.append(item)
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ws = self.options['wordsize']
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if len(self.items) < ws:
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return
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# Collect words and prepare annotation details, but defer emission
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# until the end samplenumber becomes available.
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endian = self.options['endianness']
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if endian == 'big':
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self.items.reverse()
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word = sum([self.items[i] << (i * self.num_item_bits) for i in range(ws)])
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self.saved_word = word
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self.items = []
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def end(self):
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cur_dex = self.last_samplenum
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#the last annotation
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if self.saved_item != None:
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self.put_py(self.prv_dex, cur_dex, ['ITEM', self.saved_item])
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self.put_ann(self.prv_dex, cur_dex, [0, [self.fmt_item.format(self.saved_item)]])
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self.handel_word(None, cur_dex)
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def decode(self):
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# Determine which (optional) channels have input data. Insist in
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# a non-empty input data set. Cope with sparse connection maps.
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# Store enough state to later "compress" sampled input data.
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max_possible = len(self.optional_channels)
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idx_channels = [
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idx if self.has_channel(idx) else None
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for idx in range(max_possible)
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]
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has_channels = [idx for idx in idx_channels if idx is not None]
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if not has_channels:
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raise ChannelError('At least one channel has to be supplied.')
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max_connected = max(has_channels)
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self.have_clock = self.has_channel(0)
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self.prv_dex = self.samplenum
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have_clock = self.have_clock
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# Determine .wait() conditions, depending on the presence of a
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# clock signal. Either inspect samples on the configured edge of
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# the clock, or inspect samples upon ANY edge of ANY of the pins
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# which provide input data.
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if have_clock:
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edge = self.options['clock_edge'][0]
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conds = {0: edge} #'f' or 'r'
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else:
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conds = [{idx: 'e'} for idx in has_channels]
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# Pre-determine which input data to strip off, the width of
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# individual items and multiplexed words, as well as format
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# strings here. This simplifies call sites which run in tight
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# loops later.
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idx_strip = max_connected + 1
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num_item_bits = idx_strip - 1
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num_word_items = self.options['wordsize']
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num_word_bits = num_item_bits * num_word_items
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num_digits = (num_item_bits + 3) // 4
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self.fmt_item = "@{{:0{}X}}".format(num_digits)
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num_digits = (num_word_bits + 3) // 4
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self.fmt_word = "@{{:0{}X}}".format(num_digits)
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self.num_item_bits = num_item_bits
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# Keep processing the input stream. Assume "always zero" for
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# not-connected input lines. Pass data bits (all inputs except
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# clock) to the handle_bits() method.
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is_first = True
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the_conds = conds
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while True:
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if not have_clock and is_first:
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#get the value at sample 0
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conds = None
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else:
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conds = the_conds
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(clk, d0, d1, d2, d3, d4, d5, d6, d7,d8, d9,d10 ,d11 ,d12 ,d13 ,d14 ,d15 ,d16 ,d17 ,d18 ,d19 ,d20 ,d21 ,d22 ,d23 ,d24 ,d25 ,d26 ,d27 ,d28 ,d29 ,d30 ,d31 ) = self.wait(conds)
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pins = (clk, d0, d1, d2, d3, d4, d5, d6, d7,d8, d9, d10, d11, d12,d13 ,d14 ,d15 ,d16 ,d17 ,d18 ,d19 ,d20 ,d21 ,d22 ,d23 ,d24 ,d25 ,d26 ,d27 ,d28 ,d29 ,d30 ,d31 )
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bits = [0 if idx is None else pins[idx] for idx in idx_channels]
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item = bitpack(bits[1:idx_strip])
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if not have_clock and is_first:
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is_first = False
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self.saved_item = item
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continue
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self.handle_bits(item)
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