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87 lines
2.6 KiB
Python
87 lines
2.6 KiB
Python
##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2020 Analog Devices Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 3 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sigrokdecode as srd
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input_voltage_format = ['%.6fV', '%.2fV']
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class Decoder(srd.Decoder):
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api_version = 3
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id = 'ltc242x'
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name = 'LTC242x'
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longname = 'Linear Technology LTC242x'
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desc = 'Linear Technology LTC2421/LTC2422 1-/2-channel 20-bit ADC.'
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license = 'gplv2+'
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inputs = ['spi']
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outputs = []
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tags = ['IC', 'Analog/digital']
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annotations = (
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('ch0_voltage', 'CH0 voltage'),
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('ch1_voltage', 'CH1 voltage'),
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)
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annotation_rows = (
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('ch0_voltages', 'CH0 voltages', (0,)),
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('ch1_voltages', 'CH1 voltages', (1,)),
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)
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options = (
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{'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5},
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)
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def __init__(self):
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self.reset()
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def reset(self):
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self.data = 0
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self.ss, self.es = 0, 0
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def start(self):
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self.out_ann = self.register(srd.OUTPUT_ANN)
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def handle_input_voltage(self, data):
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input_voltage = data & 0x3FFFFF
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input_voltage = -(2**21 - input_voltage)
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input_voltage = (input_voltage / 0xfffff) * self.options['vref']
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ann = []
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for format in input_voltage_format:
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ann.append(format % input_voltage)
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channel = (data & (1 << 22)) >> 22
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self.put(self.ss, self.es, self.out_ann, [channel, ann])
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def decode(self, ss, es, data):
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ptype = data[0]
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if ptype == 'CS-CHANGE':
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cs_old, cs_new = data[1:]
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if cs_old is not None and cs_old == 0 and cs_new == 1:
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self.es = es
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self.data >>= 1
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self.handle_input_voltage(self.data)
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self.data = 0
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elif cs_old is not None and cs_old == 1 and cs_new == 0:
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self.ss = ss
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elif ptype == 'BITS':
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miso = data[2]
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for bit in reversed(miso):
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self.data = self.data | bit[0]
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self.data <<= 1
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