mirror of
https://github.com/DreamSourceLab/DSView.git
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175 lines
6.5 KiB
Python
175 lines
6.5 KiB
Python
##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
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## Copyright (C) 2012-2014 Uwe Hermann <uwe@hermann-uwe.de>
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## Copyright (C) 2022 DreamSourceLab <support@dreamsourcelab.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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## 开发脚本的前提条件是必须掌握python语言
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## 非windows用户，想要打印出信息，用self.printlog(string),并在控制台下运行DSView。但是最终需要注释掉，因为影响性能。
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## 更复杂的协议请查考(0-i2c、0-spi、 0-uart、1-i2c、1-spi、1-uart)
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## 底层模块提供的属性有：
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## 1. samplenum 数据样品位置
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## 2. matched 本次查找调用wait匹配的信息，返回一个uint64类型数值，表示０到63个通道的匹配信息
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## The prerequisite for developing scripts is to master Python language
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## text block fill color table:
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## [#EF2929,#F66A32,#FCAE3E,#FBCA47,#FCE94F,#CDF040,#8AE234,#4EDC44,#55D795,#64D1D2
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## ,#729FCF,#D476C4,#9D79B9,#AD7FA8,#C2629B,#D7476F]
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## 导出核心模块类
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import sigrokdecode as srd
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## 本协议模块具体代码
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class Decoder(srd.Decoder):
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api_version = 3
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## 协议标识，必须唯一
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## The protocol ID, which must be unique
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id = 'example'
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## 协议名称, 不一定要求跟标识一致
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## The protocol name, it not necessarily consistent with ID
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name = 'example'
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## 协议长名称
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## Long name
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longname = 'example-devel'
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## 简介内容
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## Descript text
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desc = 'This is an example of protocol development'
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## 开源协议
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license = 'gplv2+'
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## 接收的输入的数据源名
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## Ten input data source name
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inputs = ['logic']
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## 输出的数据类别名，可作为下层协议的输入数据源名
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## The output data source name
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outputs = ['test']
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## 适用范围标签
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tags = ['Embedded/industrial']
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## 必须要绑定的通道定义，将在界面上可见
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## id:通道标识, 任意命名
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## type:类型，根据需要设置一个值
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## name:标签名
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## desc:该通道的说明
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channels = (
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{'id': 'c1', type:0, 'name': 'c1', 'desc': 'chan1-input'},
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)
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## 可选通道，其它跟上面的一样
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optional_channels = (
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{'id': 'c2', type:0, 'name': 'c2', 'desc': 'chan２-input'},
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)
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## 提供给用户通过界面设置的参数，根据业务需要来定义
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options = (
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{'id': 'bit-len', 'desc': 'match bit length', 'default': 16, 'values': (8,16)},
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{'id': 'mode', 'desc': 'work mode', 'default': 'up','values': ('up','low')},
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)
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## 解析结果定义
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#＃ annotations里的每一项可以有2到3个属性，当有３个属性时，第一个表示类型
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## 类型对应0-16个颜色，当类型范围在200-299时，将绘制边沿箭头
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annotations = (
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(100, 'test-data1', 'example test data1'),
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(201, 'test-data2', 'example test data2'),
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(1, 'test-data3', 'example test data3'),
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)
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## 解析结果的行定义
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annotation_rows = (
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('lab1', 'the lab1', (0,)), #可输出第1个定义的annotations类型
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('lab2', 'the lab2', (1,2)), #可输出第1个和第2个定义的annotations类型
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)
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## 构造函数，自动被调用
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def __init__(self):
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self.reset()
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## 在这里做一些重置和定义私有变量工作
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def reset(self):
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self.count = 0
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## 脚本开始运行时，会自动调用
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## 注册一些解析结果类型
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## 有: OUTPUT_ANN，OUTPUT_PYTHON，OUTPUT_BINARY，OUTPUT_META
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def start(self):
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self.out_ann = self.register(srd.OUTPUT_ANN)
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#self.out_python = self.register(srd.OUTPUT_PYTHON)
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## 定义一个输出函数
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## a,b为采样起点和终点, value为要输出的数值
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def put_row1(self, a, b, value):
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#'@%02X', 前边加@是告诉底层模块这是一个数值数据，显示格式可转化为hex/oct/bin/acii/dec
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# {$}是占位符,内容由数值部分填充
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# @特殊符号和{$}占位符的特性，只有DSView版本在1.2.0以上才支持
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# []描述输出内容，第一个元素表示annotation序号,annotation的行号由annotation_row决定
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self.put(a, b, self.out_ann, [0, ['{$}', '@%02X' % value]])
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def put_row2(self, a, b, value):
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self.put(a, b, self.out_ann, [1, ['{$}', '@%02X' % value]])
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def put_row3(self, a, b, value):
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self.put(a, b, self.out_ann, [2, ['row3']])
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## 触发解析工作
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def decode(self):
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step = 0
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times = 0
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lst_dex = self.samplenum
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b_f = False
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flag_arr = [{0:'r'}, {0:'f'}]
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flag_dex = 0
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while True:
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# 从原始数据中按条件匹配数据，用于接受返回值的元组里的变量个数由通道数决定
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# 如果可选通道未绑定真实通道，则返回255,比如这里的b变成255
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# wait()不带条件，表示进行所有匹配
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#(a,b) = self.wait()
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(a,b) = self.wait(flag_arr[flag_dex])
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if b_f == False:
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b_f = True
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flag_dex = 1
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lst_dex = self.samplenum
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else:
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flag_dex = 0
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b_f = False
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times += 1
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if times % 2 == 0:
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self.put_row1(lst_dex, self.samplenum, self.samplenum - lst_dex)
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else:
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self.put_row2(lst_dex, self.samplenum, self.samplenum - lst_dex)
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#self.put_row3(lst_dex, self.samplenum, 0)
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# wait({0:'f'}), 0表示通道序号(从0开始)，'f'表示查找下边沿
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# wait()可传多个条件，与条件:{0:'f',１:'r'}, 或条件：[{0:'f'},{１:'r'}]
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# h:高电平，l:低电平，r:上边沿，f:下边沿，e:上沿或下沿, n:要么０，要么１
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# (a,b) = self.wait([{0:'f'}])
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step += 1
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