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https://github.com/armink/FreeModbus_Slave-Master-RTT-STM32.git
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a5528950d0
2、【修改】FreeModbus的port文件夹下相关文件的命名方式，从机保留FreeModbus原有的文件，主机则在文件名后面增加“_m”以区分，尽量保证FreeModbus源码的统一性； 3、【增加】FreeModbus主机初始化、使能、失能及定时器状态机相关方法，定时器超时状态机还需要后期完善，发送状态机及接收状态机还未实现； Signed-off-by: armink <armink.ztl@gmail.com>
108 lines
3.7 KiB
C
108 lines
3.7 KiB
C
/*
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* FreeModbus Libary: STM32 Port
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* Copyright (C) 2013 Armink <armink.ztl@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* File: $Id: porttimer_m.c,v 1.60 2013/08/13 15:07:05 Armink add Master Functions$
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*/
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/* ----------------------- Platform includes --------------------------------*/
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#include "port.h"
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/* ----------------------- Modbus includes ----------------------------------*/
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#include "mb.h"
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#include "mbport.h"
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/* ----------------------- static functions ---------------------------------*/
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static void prvvTIMERExpiredISR(void);
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/* ----------------------- Start implementation -----------------------------*/
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BOOL xMBMasterPortTimersInit(USHORT usTim1Timerout50us)
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{
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uint16_t PrescalerValue = 0;
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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//====================================ʱ<>ӳ<EFBFBD>ʼ<EFBFBD><CABC>===========================
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//ʹ<>ܶ<EFBFBD>ʱ<EFBFBD><CAB1>2ʱ<32><CAB1>
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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//====================================<3D><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>===========================
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//<2F><>ʱ<EFBFBD><CAB1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><CBB5>
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//HCLKΪ72MHz<48><7A>APB1<42><31><EFBFBD><EFBFBD>2<EFBFBD><32>ƵΪ36MHz
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//TIM2<4D><32>ʱ<EFBFBD>ӱ<EFBFBD>Ƶ<EFBFBD><C6B5>Ϊ72MHz<48><7A>Ӳ<EFBFBD><D3B2><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>Ƶ,<2C>ﵽ<EFBFBD><EFB5BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//TIM2<4D>ķ<EFBFBD>Ƶϵ<C6B5><CFB5>Ϊ3599<39><39>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5>Ϊ72 / (1 + Prescaler) = 20KHz,<2C><>Ϊ50us
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//TIM<49><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵΪusTim1Timerout50u
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PrescalerValue = (uint16_t) (SystemCoreClock / 20000) - 1;
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//<2F><>ʱ<EFBFBD><CAB1>1<EFBFBD><31>ʼ<EFBFBD><CABC>
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TIM_TimeBaseStructure.TIM_Period = (uint16_t) usTim1Timerout50us;
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TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
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TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
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//Ԥװ<D4A4><D7B0>ʹ<EFBFBD><CAB9>
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TIM_ARRPreloadConfig(TIM2, ENABLE);
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//====================================<3D>жϳ<D0B6>ʼ<EFBFBD><CABC>===========================
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//<2F><><EFBFBD><EFBFBD>NVIC<49><43><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>ΪGroup2<70><32>0-3<><33>ռʽ<D5BC><CABD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD>0-3<><33><EFBFBD><EFBFBD>Ӧʽ<D3A6><CABD><EFBFBD>ȼ<EFBFBD>
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־λ
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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//<2F><>ʱ<EFBFBD><CAB1>3<EFBFBD><33><EFBFBD><EFBFBD><EFBFBD>жϹر<CFB9>
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TIM_ITConfig(TIM2, TIM_IT_Update, DISABLE);
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//<2F><>ʱ<EFBFBD><CAB1>3<EFBFBD><33><EFBFBD><EFBFBD>
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TIM_Cmd(TIM2, DISABLE);
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return TRUE;
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}
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void vMBMasterPortTimersEnable()
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{
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
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TIM_SetCounter(TIM2, 0);
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TIM_Cmd(TIM2, ENABLE);
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}
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void vMBMasterPortTimersDisable()
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{
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
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TIM_ITConfig(TIM2, TIM_IT_Update, DISABLE);
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TIM_SetCounter(TIM2, 0);
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TIM_Cmd(TIM2, DISABLE);
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}
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void prvvTIMERExpiredISR(void)
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{
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(void) pxMBMasterPortCBTimerExpired();
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}
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void TIM2_IRQHandler(void)
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{
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rt_interrupt_enter();
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if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET)
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{
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TIM_ClearFlag(TIM2, TIM_FLAG_Update); //<2F><><EFBFBD>жϱ<D0B6><CFB1><EFBFBD>
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TIM_ClearITPendingBit(TIM2, TIM_IT_Update); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>TIM2<4D><32><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־λ
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prvvTIMERExpiredISR();
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}
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rt_interrupt_leave();
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}
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