mirror of
https://github.com/armfly/H7-TOOL_STM32H7_App.git
synced 2024-08-09 10:05:34 +08:00
armfly
GitHub
commit
4cb87051b2
50
Doc/01.例程功能说明.txt
Executable file
50
Doc/01.例程功能说明.txt
Executable file
@ -0,0 +1,50 @@
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程序名字： H7-TOOL_App
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统一源代码。源代码功能.
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1. 逻辑分析仪功能、示波器、虚拟串口、虚拟CAN、I2C控制器、SPI控制器、PWM控制器、GPIO控制
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DAC控制、电流检测、编码器输入、频率计.
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2. CMSIS DAP下载器功能、USB虚拟串口功能
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3. 脱机下载器
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- STM32
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- EEPROM
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- SPI FLASH
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function disp(_addr, _len)
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init(0xA0,1,8)
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s=read(_addr,_len)
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s1=""
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for i=1,string.len(s),1 do
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if (((i - 1) % 16) == 0) then
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s1=s1.."\r\n"
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end
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s1=s1..string.format("%02X ",string.byte(s,i))
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end
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print(s1)
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end
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write(0,"12345678",5)
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disp(0,32)
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for i=0,512,16 do
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write(i,"8234567890123456")
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end
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--- 内存查看 ---
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--为了有干净的环境,先把可以收集的其他垃圾赶走先
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collectgarbage("collect");
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local c1 = collectgarbage("count")
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print("最开始,Lua的内存为", c1)
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local c2 = collectgarbage("count")
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print("结束后,Lua的内存为", c2)
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87
Doc/02.例程修改记录.txt
Executable file
87
Doc/02.例程修改记录.txt
Executable file
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【待解决】
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1. USB虚拟串口，波特率最高6M，以上频率不对。1200bps一下波特率不正确。
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2. usbd_cdc_interface.h 文件中的宏定义移到c文件中，编译过，但是运行异常，奇怪。
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3. qspi_read(), lua连续读取存在问题. 2019-07-07
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----------------------------------------------------------------------------
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2019-10-20 V1.02
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1.lua脚本增加bsp_GetRunTimer等时间函数，方便统计时间
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2.主程序状态函数重新整理了一下
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3.adc均值计算增加滤波算法， bsp_cpu_adc.c
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static float AdcSumAvg(uint8_t _AdcNo, uint8_t _Offset)
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4.NTC电阻校准点增加到4点。0欧和20欧各一点，解决低阻值误差7欧问题。还不完善。
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----------------------------------------------------------------------------
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2019-10-18 V1.01
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1.bsp_CheckRunTime() 函数BUG
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2.上电等主界面清蓝屏后再开背光，避免上电黑屏感觉颜色不均问题。
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3.MAC地址根据CPU SN修改取值方式。1.00版取的字段不好，出来MAC都一样
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----------------------------------------------------------------------------
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2019-10-17 V1.00
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1.发布生产用程序版本
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- Lua小程序，相对比较完善。已应用到H7-TOOL批量检测
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- 示波器功能，还存在不少BUG，后期再解决。
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- 固件升级（USB串口方式）
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- 其他功能均未做
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----------------------------------------------------------------------------
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2019-09-20 V0.5 - 模拟量校准
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1.添加校准寄存器的读写功能
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2019-09-13 V0.4 - 调试第6版主板
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1. 修改LCD接口GPIO
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2.
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PA0/TIM2_CH1
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----------------------------------------------------------------------------
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2019-08-16 V0.4 - 调试emmc
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- USB 虚拟磁盘，需要在这个地方设置断点，等USB枚举才能正常。
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usdd_desc.c 文件，函数 uint8_t *USBD_MSC_SerialStrDescriptor
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----------------------------------------------------------------------------
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2019-08-13 V0.4 - 针对第5版硬件
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1. 蜂鸣器 PH12 -- > PG1
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2. EIO_D4_Config PH12调整
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----------------------------------------------------------------------------
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2019-06-29 V0.3 - 针对第4版硬件
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1. 针对第4版主板，LCD口线调整。用软件方式。
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2. 按键
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PF5/D7_DIR 改为 PF2/KEY2
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PI1/KEY2 已到 PI1/D7_DIR
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3. 【D10 TTLTX】- 方向 PE3 = 1 ==> PC6
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【D0】 - 方向 PE0/D0_DIR ---> PH8/DO_DIR
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----------------------------------------------------------------------------
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2019-04-26
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----------------------------------------------------------------------------
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1. 示波器模块，增加STMPE811，控制增益和耦合
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2.
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2019-03-24
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----------------------------------------------------------------------------
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1. 移植lua
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----------------------------------------------------------------------------
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2019-02-06 V0.2
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3.上电lwip ping 只能持续5秒
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----------------------------------------------------------------------------
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2019-02-05 V0.2
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1.eeprom驱动。解决BUG。
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2.添加modbus驱动
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----------------------------------------------------------------------------
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2018-12-02 V0.1
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1. 首版
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73
Doc/03.通信协议.txt
Executable file
73
Doc/03.通信协议.txt
Executable file
@ -0,0 +1,73 @@
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3. 脱机下载器
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- STM32
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- EEPROM
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- SPI FLASH
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-------------------------------------------------------------
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64H - 下载LUA程序，支持分包传输
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主机发送:
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01 ; 站号
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64 ; 功能码
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0100 0000 ; 总长度 4字节
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0000 0000 : 偏移地址 4字节
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0020 0000 : 本包数据长度 4字节
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xx ... xx : 程序数据，n个
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CCCC : CRC16
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从机应答:
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01 ; 从机地址
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64 ; 功能码
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00 ; 执行结果，0表示OK 1表示错误
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CCCC : CRC16
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-------------------------------------------------------------
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65H - 执行临时的LUA程序，命令帧带程序
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主机发送:
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01 ; 从机地址
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65 ; 功能码
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0100 : 本包数据长度 4字节
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xxxx : 数据，0结束
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CCCC : CRC16
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||||
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||||
从机应答:
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||||
01 ; 从机地址
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65 ; 功能码
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00 ; 执行结果，0表示OK 1表示错误
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||||
CCCC : CRC16
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||||
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||||
-------------------------------------------------------------
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66H - write file
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主机发送:
|
||||
01 ; 站号
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||||
66 ; 功能码
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||||
0100 0000 ; 总长度 4字节
|
||||
0000 0000 : 偏移地址 4字节
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||||
0020 0000 : 本包数据长度 4字节
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||||
xx ... xx : 数据，n个
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CCCC : CRC16
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||||
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||||
从机应答:
|
||||
01 ; 从机地址
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||||
65 ; 功能码
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00 ; 执行结果，0表示OK 1表示错误
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CCCC : CRC16
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||||
-------------------------------------------------------------
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67H - read file
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主机发送:
|
||||
01 ; 站号
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||||
67 ; 功能码
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||||
0100 0000 ; 总长度 4字节 -- 先保留，好像用不到
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0000 0000 : 偏移地址 4字节
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||||
0020 0000 : 数据长度 4字节
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CCCC : CRC16
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||||
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||||
从机应答:
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||||
01 ; 从机地址
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||||
67 ; 功能码
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||||
00 ; 执行结果，0表示OK 1表示错误
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||||
0000 0000 : 偏移地址 4字节
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0000 0000 : 后续数据长度
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xxx : 数据体
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CCCC : CRC16
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37
Doc/04.Lua开发.txt
Executable file
37
Doc/04.Lua开发.txt
Executable file
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/*
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lua 增加调试代码的方法:
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||||
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lobject.c文件:
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const char *luaO_pushfstring (lua_State *L, const char *fmt, ...) {
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||||
#if 1
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printf("%s", msg);
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#endif
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||||
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||||
ldebug.c 文件 luaG_runerror 函数，增加printf
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||||
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||||
lauxlib.c 文件 luaL_error函数，增加printf
|
||||
|
||||
ldo.c 文件 luaD_throw 函数 printf("\r\nthrow errcode=%d\r\n", errcode);
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||||
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lua.h 定义错误代码
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#define LUA_ERRRUN 2
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#define LUA_ERRSYNTAX 3
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#define LUA_ERRMEM 4
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#define LUA_ERRGCMM 5
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#define LUA_ERRERR 6
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一次分配内存不可以大于 MAX_SIZET
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||||
*/
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||||
/*
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luaconf.h 文件对浮点和整数的处理。 缺省64位整数，双精度浮点
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||||
default configuration for 64-bit Lua ('long long' and 'double')
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||||
*/
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||||
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||||
luaconf.h
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#if LUA_FLOAT_TYPE == LUA_FLOAT_LONGDOUBLE
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#define LUAL_BUFFERSIZE 8192
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#else
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#define LUAL_BUFFERSIZE ((int)(0x80 * sizeof(void*) * sizeof(lua_Integer)))
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#endif
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65
Doc/Lua脚本/H7_校准AD7606_DAC8563.lua
Executable file
65
Doc/Lua脚本/H7_校准AD7606_DAC8563.lua
Executable file
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beep()
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print("H7_校准AD7606_DAC8563.lua")
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write_tvcc_dac(47) --3.3V接口电平
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delayms(500)
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extio_start()
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print("扩展IO板已启动")
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|
||||
--根据2点方程求值
|
||||
function cacul(x1,y1,x2,y2,x)
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local ff
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|
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if (x2 == x1) then
|
||||
ff = 0
|
||||
else
|
||||
ff = y1 + ((y2 - y1) * (x - x1)) / (x2 - x1);
|
||||
end
|
||||
return ff
|
||||
end
|
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|
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--返回0-7通道的电压 V
|
||||
function ad7606_volt(ch)
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local X1 = {75, 75, 74, 72, 73, 74, 73, 71}
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local Y1 = {0, 0, 0, 0, 0, 0, 0, 0}
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local X2 = {29417, 29362, 29520, 29396, 29407, 29407, 29407, 29407}
|
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local Y2 = {8.999, 8.999, 8.999, 8.999, 8.999, 8.999, 8.999, 8.999}
|
||||
local adc
|
||||
local volt
|
||||
|
||||
adc = extio_get_adc(ch)
|
||||
volt = cacul(X1[ch+1], Y1[ch+1], X2[ch+1], Y2[ch+1], adc)
|
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return volt
|
||||
end
|
||||
|
||||
--返回0-7通道的电流 mA
|
||||
function ad7606_curr(ch)
|
||||
local X1 = {75, 75, 74, 72, 73, 74, 73, 71}
|
||||
local Y1 = {0, 0, 0, 0, 0, 0, 0, 0}
|
||||
local X2 = {29417, 29362, 29520, 29396, 29407, 29812, 31786, 29017}
|
||||
local Y2 = {8.999, 8.999, 8.999, 8.999, 8.999, 454.64, 19.482, 88.900}
|
||||
local adc
|
||||
local curr
|
||||
|
||||
adc = extio_get_adc(ch)
|
||||
curr = cacul(X1[ch+1], Y1[ch+1], X2[ch+1], Y2[ch+1], adc)
|
||||
return curr
|
||||
end
|
||||
|
||||
--设置DAC8563输出电压，单位V, 浮点
|
||||
function dac8563_volt(volt)
|
||||
local X1 = 1000
|
||||
local Y1 = -9.8551
|
||||
local X2 = 32767
|
||||
local Y2 = -0.003030
|
||||
local X3 = 64000
|
||||
local Y3 = 9.6802
|
||||
local dac
|
||||
|
||||
if (volt < Y2) then
|
||||
dac = cacul(Y1,X1,Y2,X2,volt)
|
||||
else
|
||||
dac = cacul(Y2,X2,Y3,X3,volt)
|
||||
end
|
||||
extio_set_dac(0, dac)
|
||||
end
|
||||
566
Doc/Lua脚本/H7_自动校准.lua
Executable file
566
Doc/Lua脚本/H7_自动校准.lua
Executable file
@ -0,0 +1,566 @@
|
||||
beep()
|
||||
|
||||
--根据2点方程求值
|
||||
function cacul(x1,y1,x2,y2,x)
|
||||
local ff
|
||||
|
||||
if (x2 == x1) then
|
||||
ff = 0
|
||||
else
|
||||
ff = y1 + ((y2 - y1) * (x - x1)) / (x2 - x1);
|
||||
end
|
||||
return ff
|
||||
end
|
||||
|
||||
--返回0-7通道的电压 V
|
||||
function ad7606_volt(ch)
|
||||
local X1 = {39, 39, 39, 36, 73, 74, 73, 71}
|
||||
local Y1 = {0, 0, 0, 0, 0, 0, 0, 0}
|
||||
local X2 = {29417, 29362, 29520, 29396, 29407, 29407, 29407, 29407}
|
||||
local Y2 = {8.999, 8.999, 8.999, 8.999, 8.999, 8.999, 8.999, 8.999}
|
||||
local adc
|
||||
local volt
|
||||
|
||||
adc = ex_adc(ch)
|
||||
volt = cacul(X1[ch+1], Y1[ch+1], X2[ch+1], Y2[ch+1], adc)
|
||||
return volt
|
||||
end
|
||||
|
||||
--返回0-7通道的电流 mA
|
||||
function ad7606_curr(ch)
|
||||
local X1 = {75, 75, 74, 72, 73, 74, 73, 71}
|
||||
local Y1 = {0, 0, 0, 0, 0, 0, 0, 0}
|
||||
local X2 = {29417, 29362, 29520, 29396, 29407, 29812, 31786, 29017}
|
||||
local Y2 = {8.999, 8.999, 8.999, 8.999, 8.999, 454.64, 19.482, 88.900}
|
||||
local adc
|
||||
local curr
|
||||
|
||||
adc = ex_adc(ch)
|
||||
curr = cacul(X1[ch+1], Y1[ch+1], X2[ch+1], Y2[ch+1], adc)
|
||||
return curr
|
||||
end
|
||||
|
||||
--设置DAC8563输出电压，单位V, 浮点
|
||||
function dac8563_volt(volt)
|
||||
local X1 = 1000
|
||||
local Y1 = -9.8551
|
||||
local X2 = 32767
|
||||
local Y2 = -0.003030
|
||||
local X3 = 64000
|
||||
local Y3 = 9.6802
|
||||
local dac
|
||||
|
||||
if (volt < Y2) then
|
||||
dac = cacul(Y1,X1,Y2,X2,volt)
|
||||
else
|
||||
dac = cacul(Y2,X2,Y3,X3,volt)
|
||||
end
|
||||
ex_dac(0, dac)
|
||||
end
|
||||
|
||||
--启动示波器，ADC采集，多通道模式
|
||||
function start_dso(void)
|
||||
print("启动多通道低速测量模式")
|
||||
write_reg16(0x01FF, 2) --多通道低速测量
|
||||
write_reg16(0x0200, 1) -- CH1选DC耦合
|
||||
write_reg16(0x0201, 1) -- CH2选DC耦合
|
||||
write_reg16(0x0202, 0) -- CH1通道增益0档，不放大
|
||||
write_reg16(0x0203, 0) -- CH2通道增益0档，不放大
|
||||
write_reg16(0x0204, 0) -- CH1通道直流偏值，未用
|
||||
write_reg16(0x0205, 0) -- CH2通道直流偏值，未用
|
||||
write_reg16(0x0206, 12) --采样频率1M
|
||||
write_reg16(0x0207, 0) --采样深度1K
|
||||
write_reg16(0x0208, 0) --触发电平
|
||||
write_reg16(0x0209, 50) --触发位置
|
||||
write_reg16(0x020A, 0) --触发模式 0=自动
|
||||
write_reg16(0x020B, 0) --触发通道CH1
|
||||
write_reg16(0x020C, 0) --触发边沿
|
||||
write_reg16(0x020D, 2) --通道使能
|
||||
write_reg16(0x020E, 1) --开始采集
|
||||
end
|
||||
|
||||
|
||||
--检查一个值是否在公差范围 1表示err 0表示ok
|
||||
function check_err(data, mid, diff)
|
||||
local re
|
||||
local dd
|
||||
|
||||
if (mid < 0) then
|
||||
dd = -mid * diff
|
||||
else
|
||||
dd = mid * diff
|
||||
end
|
||||
|
||||
if ((data >= mid - dd) and (data <= mid + dd)) then
|
||||
re = 0
|
||||
else
|
||||
re = 1
|
||||
end
|
||||
return re
|
||||
end
|
||||
|
||||
--关闭所有的继电器
|
||||
function colse_all_y(void)
|
||||
return ch
|
||||
end
|
||||
|
||||
--成功叫一声，失败叫三声
|
||||
function disp_result(err)
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
--校准初始化
|
||||
function calib_init(void)
|
||||
write_tvcc_dac(43) --设置TVCC大概3.3V
|
||||
delayms(100)
|
||||
ex_start() --会关闭全部继电器
|
||||
start_dso() --启动多通道低速采集模式
|
||||
write_reg16(0xBFFF, 1) --打开校准开关
|
||||
end
|
||||
|
||||
--校准TVCC设置电压和采样电压
|
||||
function calib_tvcc_volt(void)
|
||||
local adc
|
||||
local volt
|
||||
local err
|
||||
|
||||
err = 0
|
||||
--先校准TVCC设置电压和检测电压
|
||||
print("")
|
||||
print("---校准TVCC---")
|
||||
|
||||
---第1档
|
||||
write_tvcc_dac(36) --4.4V左右
|
||||
delayms(1500)
|
||||
volt = ad7606_volt(0) --读取AD7606 TVCC电压
|
||||
if (check_err(volt, 4.416, 0.05)==1) then
|
||||
print("SET= 36", "实际电压=", volt, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("SET= 36", "实际电压=", volt, "ok")
|
||||
write_regfloat(0xC0C0, 36)
|
||||
write_regfloat(0xC0C2, volt)
|
||||
end
|
||||
|
||||
adc = read_adc(4) --读cpu adc tvcc电压
|
||||
if (check_err(adc, 46368, 0.1)==1) then
|
||||
print("TVCC Volt ADC =", adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("TVCC Volt ADC =", adc, "ok")
|
||||
write_regfloat(0xC0AC, adc)
|
||||
write_regfloat(0xC0AE, volt)
|
||||
end
|
||||
|
||||
adc = read_adc(2) --读cpu adc 高侧电压
|
||||
if (check_err(adc, 8117, 0.1)==1) then
|
||||
print("HighSide Volt ADC =", adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("HighSide Volt ADC =", adc, "ok")
|
||||
write_regfloat(0xC084, adc)
|
||||
write_regfloat(0xC086, volt)
|
||||
end
|
||||
|
||||
---第2档
|
||||
print("")
|
||||
write_tvcc_dac(100)
|
||||
delayms(1500)
|
||||
volt = ad7606_volt(0) --读取AD7606 TVCC 电压
|
||||
if (check_err(volt, 1.59, 0.1)==1) then
|
||||
print("SET=100", "实际电压=", volt, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("SET=100", "实际电压=", volt, "ok")
|
||||
write_regfloat(0xC0C4, 100)
|
||||
write_regfloat(0xC0C6, volt)
|
||||
end
|
||||
|
||||
adc = read_adc(4) --读cpu adc tvcc电压
|
||||
if (check_err(adc, 16679, 0.1)==1) then
|
||||
print("TVCC Volt ADC =", adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("TVCC Volt ADC =", adc, "ok")
|
||||
write_regfloat(0xC0A8, adc)
|
||||
write_regfloat(0xC0AA, volt)
|
||||
end
|
||||
|
||||
adc = read_adc(2) --读cpu adc 高侧电压
|
||||
if (check_err(adc, 2879, 0.1)==1) then
|
||||
print("HighSide Volt ADC =", adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("HighSide Volt ADC =", adc, "ok")
|
||||
write_regfloat(0xC080, adc)
|
||||
write_regfloat(0xC082, volt)
|
||||
end
|
||||
|
||||
--恢复TVCC电压3.3，后面就不动了
|
||||
write_tvcc_dac(47)
|
||||
return err
|
||||
end
|
||||
|
||||
--校准CPU的DAC输出电压和电流
|
||||
function calib_dac(void)
|
||||
local i
|
||||
local err
|
||||
local volt
|
||||
local curr
|
||||
local dac
|
||||
local dac_tab = {500, 1500, 2500, 3500}
|
||||
local volt_mid = {-9.176, -3.235, 2.711, 8.661}
|
||||
local curr_mid = {2.592, 7.723, 12.857, 17.992}
|
||||
local volt_err = 0.1
|
||||
local curr_err = 0.1
|
||||
|
||||
err = 0
|
||||
dac_on() --打开DAC电源，设置为直流输出
|
||||
delayms(100)
|
||||
|
||||
print("")
|
||||
print("---校准DAC电压和电流---")
|
||||
for i = 0, 3, 1 do
|
||||
dac = dac_tab[i + 1]
|
||||
dac_write(dac) --CPU DAC输出
|
||||
delayms(500)
|
||||
|
||||
volt = ad7606_volt(1)
|
||||
if (check_err(volt, volt_mid[i + 1], volt_err) == 1) then
|
||||
print("DAC电压", dac, volt, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("DAC电压", dac, volt, "ok")
|
||||
write_reg16(0xC0C8 + i * 2, dac)
|
||||
write_reg16(0xC0C9 + i * 2, volt * 1000)
|
||||
end
|
||||
|
||||
curr = ad7606_curr(6) --20mA电流
|
||||
if (check_err(curr, curr_mid[i + 1], curr_err) == 1) then
|
||||
print("DAC电流", dac, curr, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print("DAC电流", dac, curr, "ok")
|
||||
write_reg16(0xC0D0 + i * 2, dac)
|
||||
write_reg16(0xC0D1 + i * 2, curr * 1000)
|
||||
end
|
||||
end
|
||||
return err
|
||||
end
|
||||
|
||||
--校准示波器功能
|
||||
function calib_ch1ch2(void)
|
||||
local i
|
||||
local err
|
||||
local volt
|
||||
local adc
|
||||
local ch_tab = {9.0, 6.0, 3.0, 1.5, 0.75, 0.375, 0.170, 0.09}
|
||||
local zero_mid = {32768, 32768, 32768, 32768, 32768, 32768, 32768, 32768}
|
||||
local full_mid = {53641, 60506, 60629, 60686, 60857, 60915, 58393, 60166}
|
||||
local adc_err1 = 0.22
|
||||
local adc_err2 = 0.12
|
||||
|
||||
close_all()
|
||||
ex_dout(4,1)
|
||||
|
||||
print("")
|
||||
print("---校准示波器电压---")
|
||||
err = 0
|
||||
print("悬空校准零位")
|
||||
for i = 0, 7, 1 do
|
||||
write_reg16(0x0202, i) -- CH1通道增益0档，不放大
|
||||
write_reg16(0x0203, i) -- CH2通道增益0档，不放大
|
||||
|
||||
if (i == 0) then
|
||||
delayms(1200)
|
||||
else
|
||||
delayms(1200)
|
||||
end
|
||||
adc = read_adc(0)
|
||||
if (check_err(adc, zero_mid[i + 1], adc_err1)==1) then
|
||||
print(" CH1", i, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" CH1", i, adc, "ok")
|
||||
write_regfloat(0xC000 + 8 * i, adc)
|
||||
write_regfloat(0xC002 + 8 * i, 0)
|
||||
end
|
||||
|
||||
adc = read_adc(1)
|
||||
if (check_err(adc, zero_mid[i + 1], adc_err1)==1) then
|
||||
print(" CH2", i, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" CH2", i, adc, "ok")
|
||||
write_regfloat(0xC040 + 8 * i, adc)
|
||||
write_regfloat(0xC042 + 8 * i, 0)
|
||||
end
|
||||
end
|
||||
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
close_all()
|
||||
ex_dout(12,1)
|
||||
ex_dout(13,1)
|
||||
ex_dout(14,1)
|
||||
delayms(1000)
|
||||
|
||||
print("校准满位")
|
||||
for i = 0, 7, 1 do
|
||||
write_reg16(0x0202, i) -- CH1通道增益0档，不放大
|
||||
write_reg16(0x0203, i) -- CH2通道增益0档，不放大
|
||||
|
||||
dac8563_volt(ch_tab[i + 1])
|
||||
|
||||
delayms(1000)
|
||||
adc = read_adc(0)
|
||||
volt = ad7606_volt(1)
|
||||
if (check_err(adc, full_mid[i + 1], adc_err2)==1) then
|
||||
print(" CH1", i, volt, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" CH1", i, volt, adc, "ok")
|
||||
write_regfloat(0xC004 + 8 * i, adc)
|
||||
write_regfloat(0xC006 + 8 * i, volt)
|
||||
end
|
||||
|
||||
adc = read_adc(1)
|
||||
volt = ad7606_volt(1)
|
||||
if (check_err(adc, full_mid[i + 1], adc_err2)==1) then
|
||||
print(" CH2", i, volt, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" CH2", i, volt, adc, "ok")
|
||||
write_regfloat(0xC044 + 8 * i, adc)
|
||||
write_regfloat(0xC046 + 8 * i, volt)
|
||||
end
|
||||
end
|
||||
|
||||
::quit::
|
||||
if (err > 0)
|
||||
return err
|
||||
end
|
||||
|
||||
--校准tvcc电流和高侧电流
|
||||
function calib_curr(void)
|
||||
local i
|
||||
local err
|
||||
local curr
|
||||
local adc
|
||||
local set_tabe1 = {0, 0.15 * 10, 0.3*10, 0.4*10}
|
||||
local high_mid1 = {160, 7700, 15330, 20296}
|
||||
local tvcc_mid = {477, 21458, 42877, 56882}
|
||||
local adc_err1 = {0.5,0.1,0.1,0.1}
|
||||
|
||||
local set_tabe2 = {0, 0.03 * 50, 0.05*50, 0.09 * 50}
|
||||
local high_mid2 = {1300, 16421, 26873, 48841}
|
||||
local adc_err2 = {0.9,0.1,0.1,0.1}
|
||||
local volt
|
||||
|
||||
print("")
|
||||
print("---校准TVCC电流和高侧电流---")
|
||||
err = 0
|
||||
|
||||
close_all()
|
||||
ex_dout(20,1)
|
||||
ex_dout(21,1)
|
||||
|
||||
--TVCC电流和高侧电流相同。先测1.2A量程
|
||||
print("---1.2A---")
|
||||
write_reg16(0x0211, 1) --1.2A量程 HIGH_SIDE
|
||||
for i = 0, 3, 1 do
|
||||
volt = set_tabe1[i+1]
|
||||
print("输出电压", volt)
|
||||
if (volt == 0) then
|
||||
ex_dout(20,0)
|
||||
ex_dout(21,0)
|
||||
|
||||
ex_dout(22,0)
|
||||
ex_dout(23,0)
|
||||
set_tvcc(5) --设置TVCC输出电压5v 校准0位
|
||||
delayms(1000)
|
||||
else
|
||||
ex_dout(20,1)
|
||||
ex_dout(21,1)
|
||||
|
||||
set_tvcc(volt) --设置TVCC输出电压。负载电阻为10欧
|
||||
ex_dout(23,0)
|
||||
ex_dout(22,1) --选择10欧负载
|
||||
end
|
||||
|
||||
delayms(1000)
|
||||
|
||||
if (volt == 0) then
|
||||
curr = 0
|
||||
else
|
||||
curr = ad7606_curr(5) --10欧负载，大电流
|
||||
end
|
||||
|
||||
adc = read_adc(3) --3=高侧电流cpu ADC
|
||||
if (check_err(adc, high_mid1[i + 1], adc_err1[i + 1])==1) then
|
||||
print(" 高侧电流", curr, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" 高侧电流", curr, adc, "ok")
|
||||
write_regfloat(0xC098 + 4 * i, adc)
|
||||
write_regfloat(0xC09A + 4 * i, curr)
|
||||
end
|
||||
|
||||
adc = read_adc(5) --5=tvcc电流
|
||||
if (check_err(adc, tvcc_mid[i + 1], adc_err1[i + 1])==1) then
|
||||
print(" TVCC电流", curr, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" TVCC电流", curr, adc, "ok")
|
||||
write_regfloat(0xC0B0 + 4 * i, adc)
|
||||
write_regfloat(0xC0B2 + 4 * i, curr)
|
||||
end
|
||||
end
|
||||
|
||||
--高侧电流相同。测高侧电流100量程
|
||||
print("")
|
||||
print("---120mA---")
|
||||
write_reg16(0x0211, 0) --120mA量程 HIGH_SIDE
|
||||
for i = 0, 3, 1 do
|
||||
volt = set_tabe2[i+1]
|
||||
print("输出电压", volt)
|
||||
if (volt == 0) then
|
||||
ex_dout(22,0)
|
||||
ex_dout(23,0)
|
||||
else
|
||||
set_tvcc(volt) --设置TVCC输出电压。负载电阻为10欧
|
||||
ex_dout(22,0)
|
||||
ex_dout(23,1)--选择50欧负载
|
||||
end
|
||||
|
||||
delayms(1000)
|
||||
|
||||
if (volt == 0) then
|
||||
curr = 0
|
||||
else
|
||||
curr = ad7606_curr(7) --50欧负载，大电流
|
||||
end
|
||||
|
||||
adc = read_adc(3) --3=高侧电流cpu ADC
|
||||
if (check_err(adc, high_mid2[i + 1], adc_err2[i + 1])==1) then
|
||||
print(" 高侧电流", curr, adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" 高侧电流", curr, adc, "ok")
|
||||
write_regfloat(0xC088 + 4 * i, adc)
|
||||
write_regfloat(0xC08A + 4 * i, curr)
|
||||
end
|
||||
end
|
||||
|
||||
return err
|
||||
end
|
||||
|
||||
--校准NTC
|
||||
function calib_ntc(void)
|
||||
local i
|
||||
local err
|
||||
local adc
|
||||
local ref = {0.0003, 0.0222, 9.9732, 99.958}
|
||||
local Y = {5,6,16,17}
|
||||
local adc_mid = {90, 283, 43376, 62376}
|
||||
local adc_err = {0.5, 0.5, 0.1, 0.1}
|
||||
|
||||
print("")
|
||||
print("---校准NTC---")
|
||||
err = 0
|
||||
|
||||
for i=0,3,1 do
|
||||
close_all()
|
||||
ex_dout(Y[i+1],1)
|
||||
delayms(1000)
|
||||
adc = read_adc(6) --6=NTC adc
|
||||
if (check_err(adc, adc_mid[i+1], adc_err[i+1])==1) then
|
||||
print(" 电阻", ref[i+1], adc, "err")
|
||||
err = err + 1
|
||||
else
|
||||
print(" 电阻", ref[i+1], adc, "ok")
|
||||
write_regfloat(0xC0D8+4*i, adc)
|
||||
write_regfloat(0xC0DA+4*i, ref[i+1])
|
||||
end
|
||||
end
|
||||
return err
|
||||
end
|
||||
|
||||
--关闭所有的继电器
|
||||
function close_all(void)
|
||||
local i
|
||||
|
||||
for i=0,23,1 do
|
||||
ex_dout(i, 0)
|
||||
end
|
||||
end
|
||||
|
||||
--测试主函数
|
||||
function test_calib(void)
|
||||
local err
|
||||
local time1
|
||||
local time2
|
||||
|
||||
time1 = get_runtime()
|
||||
|
||||
print(time1)
|
||||
|
||||
err = 0
|
||||
--calib_init()
|
||||
|
||||
close_all()
|
||||
ex_dout(20,1)
|
||||
ex_dout(21,1)
|
||||
err = err + calib_tvcc_volt() --校准TVCC电压
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
close_all()
|
||||
ex_dout(0,1)
|
||||
ex_dout(19,1)
|
||||
err = err + calib_dac() --校准DAC
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
err = err + calib_ch1ch2() --校准示波器
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
err = err + calib_curr() --校准TVCC电流和高侧电流
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
err = err + calib_ntc() --校准ntc
|
||||
if (err > 0) then
|
||||
goto quit
|
||||
end
|
||||
|
||||
save_param() --保存参数到eeprom
|
||||
|
||||
::quit::
|
||||
disp_result(err)
|
||||
|
||||
close_all()
|
||||
|
||||
time2 = get_runtime()
|
||||
print("测试时间: ", (time2 - time1) / 1000)
|
||||
end
|
||||
|
||||
calib_init()
|
||||
|
||||
297
Doc/Lua脚本/h7_tool_test_gpio.lua
Executable file
297
Doc/Lua脚本/h7_tool_test_gpio.lua
Executable file
@ -0,0 +1,297 @@
|
||||
--H7-TOOL测试程序
|
||||
beep()
|
||||
|
||||
--测试GPIO输入输出
|
||||
function test_gpio(void)
|
||||
local err
|
||||
local terr
|
||||
local i
|
||||
print("")
|
||||
print("----开始测试----")
|
||||
err=0
|
||||
terr=0
|
||||
--设置TVCC输出3.3V
|
||||
set_tvcc(3.3)
|
||||
|
||||
--变换输入输出方向，再测一遍
|
||||
gpio_cfg(0, 0)
|
||||
gpio_cfg(1, 1)
|
||||
gpio_cfg(2, 0)
|
||||
gpio_cfg(3, 1)
|
||||
gpio_cfg(4, 0)
|
||||
gpio_cfg(5, 1)
|
||||
gpio_cfg(6, 0)
|
||||
gpio_cfg(7, 1)
|
||||
gpio_cfg(8, 0)
|
||||
gpio_cfg(9, 1)
|
||||
|
||||
gpio_write(1, 1) if (gpio_read(0)==1) then err=0 else err=1 end
|
||||
gpio_write(1, 0) if (gpio_read(0)==1) then err=err+1 end
|
||||
if (err == 0) then print("D1->D0 ok") else print("D1->D0 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(3, 1) if (gpio_read(2)==1) then err=0 else err=1 end
|
||||
gpio_write(3, 0) if (gpio_read(2)==1) then err=err+1 end
|
||||
if (err == 0) then print("D3->D2 ok") else print("D3->D2 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(5, 1) if (gpio_read(4)==1) then err=0 else err=1 end
|
||||
gpio_write(5, 0) if (gpio_read(4)==1) then err=err+1 end
|
||||
if (err == 0) then print("D5->D4 ok") else print("D5->D4 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(7, 1) if (gpio_read(6)==1) then err=0 else err=1 end
|
||||
gpio_write(7, 0) if (gpio_read(6)==1) then err=err+1 end
|
||||
if (err == 0) then print("D7->D6 ok") else print("D7->D6 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(9, 1) if (gpio_read(8)==1) then err=0 else err=1 end
|
||||
gpio_write(9, 0) if (gpio_read(8)==1) then err=err+1 end
|
||||
if (err == 0) then print("D9->D8 ok") else print("D9->D8 Error") terr=terr+1 end
|
||||
|
||||
--4对GPIO，输入输出自动测试
|
||||
gpio_cfg(0, 1) -- 配置D0为输出
|
||||
gpio_cfg(1, 0) -- 配置D1未输入
|
||||
gpio_cfg(2, 1)
|
||||
gpio_cfg(3, 0)
|
||||
gpio_cfg(4, 1)
|
||||
gpio_cfg(5, 0)
|
||||
gpio_cfg(6, 1)
|
||||
gpio_cfg(7, 0)
|
||||
gpio_cfg(8, 1)
|
||||
gpio_cfg(9, 0)
|
||||
|
||||
gpio_write(0, 1) if (gpio_read(1)==1) then err=0 else err=1 end
|
||||
gpio_write(0, 0) if (gpio_read(1)==1) then err=err+1 end
|
||||
if (err == 0) then print("D0->D1 ok") else print("D0->D1 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(2, 1) if (gpio_read(3)==1) then err=0 else err=1 end
|
||||
gpio_write(2, 0) if (gpio_read(3)==1) then err=err+1 end
|
||||
if (err == 0) then print("D2->D3 ok") else print("D2->D3 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(4, 1) if (gpio_read(5)==1) then err=0 else err=1 end
|
||||
gpio_write(4, 0) if (gpio_read(5)==1) then err=err+1 end
|
||||
if (err == 0) then print("D4->D5 ok") else print("D4->D5 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(6, 1) if (gpio_read(7)==1) then err=0 else err=1 end
|
||||
gpio_write(6, 0) if (gpio_read(7)==1) then err=err+1 end
|
||||
if (err == 0) then print("D6->D7 ok") else print("D6->D7 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(8, 1) if (gpio_read(9)==1) then err=0 else err=1 end
|
||||
gpio_write(8, 0) if (gpio_read(9)==1) then err=err+1 end
|
||||
if (err == 0) then print("D8->D9 ok") else print("D8->D9 Error") terr=terr+1 end
|
||||
|
||||
--测试CAN
|
||||
gpio_cfg(12, 1)
|
||||
gpio_cfg(13, 0)
|
||||
|
||||
err = 0
|
||||
for i=0,10,1 do
|
||||
gpio_write(12, 0) delayus(1) if (gpio_read(13)==1) then err=err+1 end
|
||||
delayus(100)
|
||||
gpio_write(12, 1) delayus(1) if (gpio_read(13)==0) then err=err+1 end
|
||||
delayus(100)
|
||||
end
|
||||
if (err == 0) then print("CANTX->CANRX ok") else print("CANTX->CANRX Error", err) terr=terr+1 end
|
||||
|
||||
--测试TTL-UART
|
||||
gpio_cfg(100, 1)
|
||||
gpio_write(100, 0)
|
||||
|
||||
gpio_cfg(10, 1)
|
||||
gpio_cfg(11, 0)
|
||||
|
||||
err = 0
|
||||
for i=0,10,1 do
|
||||
gpio_write(10, 0) delayus(10) if (gpio_read(11)==1) then err=err+1 end
|
||||
delayus(100)
|
||||
gpio_write(10, 1) delayus(10) if (gpio_read(11)==0) then err=err+1 end
|
||||
delayus(100)
|
||||
end
|
||||
if (err == 0) then print("TTL UART ok") else print("TTL UART Error", err) terr=terr+1 end
|
||||
|
||||
if (terr > 0) then
|
||||
print("*****测试失败 terr = ", terr)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
else
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
--启动示波器，ADC采集，多通道模式
|
||||
function start_dso(void)
|
||||
print("启动多通道低速测量模式")
|
||||
write_reg16(0x01FF, 2) --多通道低速测量
|
||||
write_reg16(0x0200, 1) -- CH1选DC耦合
|
||||
write_reg16(0x0201, 1) -- CH2选DC耦合
|
||||
write_reg16(0x0202, 0) -- CH1通道增益0档，不放大
|
||||
write_reg16(0x0203, 0) -- CH2通道增益0档，不放大
|
||||
write_reg16(0x0204, 0) -- CH1通道直流偏值，未用
|
||||
write_reg16(0x0205, 0) -- CH2通道直流偏值，未用
|
||||
write_reg16(0x0206, 12) --采样频率1M
|
||||
write_reg16(0x0207, 0) --采样深度1K
|
||||
write_reg16(0x0208, 0) --触发电平
|
||||
write_reg16(0x0209, 50) --触发位置
|
||||
write_reg16(0x020A, 0) --触发模式 0=自动
|
||||
write_reg16(0x020B, 0) --触发通道CH1
|
||||
write_reg16(0x020C, 0) --触发边沿
|
||||
write_reg16(0x020D, 2) --通道使能
|
||||
write_reg16(0x020E, 1) --开始采集
|
||||
end
|
||||
|
||||
function test_ch1ch2(void)
|
||||
local err
|
||||
local i
|
||||
local adc
|
||||
local dac
|
||||
local errd
|
||||
--DAC大致关系
|
||||
--CH1 4095=12.356V 2500=2.75V 2058=95mV
|
||||
--CH2(电流采样电阻200欧)
|
||||
--CH1的8档量程判据
|
||||
local dac1 = {2047, -1024, 512, 256, 128, 64, 32, 10}
|
||||
local mid1 = {60760, 4666, 60844, 60785, 60634, 60127, 59042, 46390}
|
||||
local diff1 = {0.02, 0.2, 0.05, 0.06, 0.10, 0.15, 0.18, 0.32} --公差系数
|
||||
--CH2的8档量程判据
|
||||
local dac2 = {4095, 1024, 512, 256, 128, 64, 32, 16}
|
||||
local mid2 = {43121, 41400, 37714, 37575, 37556, 37494, 37633, 40601}
|
||||
local diff2 = {0.2, 0.1, 0.08, 0.08, 0.08, 0.08, 0.12, 0.15}
|
||||
|
||||
print("")
|
||||
print("----开始示波器电路----")
|
||||
start_dso();
|
||||
err = 0
|
||||
|
||||
dac_on() --打开DAC电源，设置为电平模式
|
||||
|
||||
print("正在测CH1,DC耦合...")
|
||||
for i=1,8,1 do
|
||||
write_reg16(0x0202, i-1) -- CH1通道增益0-7
|
||||
dac = dac1[i] + 2044
|
||||
dac_write(dac) delayms(500)
|
||||
adc = read_adc(0)
|
||||
errd = mid1[i] * diff1[i];
|
||||
if (adc < mid1[i] - errd or adc > mid1[i] + errd) then
|
||||
err = err + 1
|
||||
print("dac=", dac, adc, "error")
|
||||
else
|
||||
print("dac=", dac, adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
print("正在测CH2,DC耦合...")
|
||||
for i=1,8,1 do
|
||||
write_reg16(0x0203, i-1) -- CH2通道增益0-7
|
||||
dac = dac2[i]
|
||||
dac_write(dac) delayms(500)
|
||||
adc = read_adc(1)
|
||||
errd = mid2[i] * diff2[i];
|
||||
if (adc < mid2[i] - errd or adc > mid2[i] + errd) then
|
||||
err = err + 1
|
||||
print("dac=", dac, adc, "error")
|
||||
else
|
||||
print("dac=", dac, adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
write_reg16(0x0200, 0) -- CH1耦合AC
|
||||
write_reg16(0x0201, 0) -- CH2耦合AC
|
||||
write_reg16(0x0202, 0) -- CH1通道增益0
|
||||
write_reg16(0x0203, 0) -- CH2通道增益0
|
||||
delayms(2000)
|
||||
adc = read_adc(0)
|
||||
if (adc < 32768 - 200 or adc > 32768 + 200) then
|
||||
print("CH1 AC耦合", adc, "errpr")
|
||||
err = err + 1
|
||||
else
|
||||
print("CH1 AC耦合", adc, "ok")
|
||||
end
|
||||
|
||||
adc = read_adc(1)
|
||||
if (adc < 32733 - 200 or adc > 32750 + 200) then
|
||||
print("CH2 AC耦合", adc, "errpr")
|
||||
err = err + 1
|
||||
else
|
||||
print("CH2 AC耦合", adc, "ok")
|
||||
end
|
||||
|
||||
::quit::
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
function test_tvcc(void)
|
||||
local err
|
||||
local i
|
||||
local adc
|
||||
|
||||
local mid1 = {2485, 1539, 13919, 4167, 43393, 11378, 50701}
|
||||
local mid2 = {8157, 4809, 46031, 13299, 43391, 11367, 50469}
|
||||
local diff1 = {0.2, 0.2, 0.2, 0.3, 0.1, 0.1, 0.1}
|
||||
local diff2 = {0.1, 0.1, 0.1, 0.2, 0.1, 0.1, 0.1}
|
||||
local name = {"高侧电压", "高侧电流", "TVCC电压", "TVCC电流", "NTC 电阻","12V 电压","USB 电压"}
|
||||
|
||||
print("")
|
||||
print("----开始测试TVCC NTC ----")
|
||||
--start_dso();
|
||||
err = 0
|
||||
print("TVCC = 120")
|
||||
write_tvcc_dac(120)
|
||||
|
||||
delayms(1000)
|
||||
|
||||
for i = 1,7,1 do
|
||||
adc = read_adc(i+1)
|
||||
errd = mid1[i] * diff1[i];
|
||||
if (adc < mid1[i] - errd or adc > mid1[i] + errd) then
|
||||
err = err + 1
|
||||
print(name[i], adc, "error")
|
||||
else
|
||||
print(name[i], adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
print("")
|
||||
print("TVCC = 36")
|
||||
write_tvcc_dac(36)
|
||||
delayms(1000)
|
||||
for i = 1,7,1 do
|
||||
adc = read_adc(i+1)
|
||||
errd = mid2[i] * diff2[i];
|
||||
if (adc < mid2[i] - errd or adc > mid2[i] + errd) then
|
||||
err = err + 1
|
||||
print(name[i], adc, "error")
|
||||
else
|
||||
print(name[i], adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
::quit::
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
test_gpio()
|
||||
test_ch1ch2()
|
||||
test_tvcc()
|
||||
294
Doc/Lua脚本/h7_主板功能测试.lua
Executable file
294
Doc/Lua脚本/h7_主板功能测试.lua
Executable file
@ -0,0 +1,294 @@
|
||||
--H7-TOOL主板功能初测
|
||||
beep()
|
||||
print("H7-TOOL主板功能初测程序已加载")
|
||||
|
||||
--测试GPIO输入输出
|
||||
function test_gpio(void)
|
||||
local err
|
||||
local terr
|
||||
local i
|
||||
print("")
|
||||
print("----开始测试----")
|
||||
err=0
|
||||
terr=0
|
||||
--设置TVCC输出3.3V
|
||||
set_tvcc(3.3)
|
||||
|
||||
--变换输入输出方向，再测一遍
|
||||
gpio_cfg(0, 0)
|
||||
gpio_cfg(1, 1)
|
||||
gpio_cfg(2, 0)
|
||||
gpio_cfg(3, 1)
|
||||
gpio_cfg(4, 0)
|
||||
gpio_cfg(5, 1)
|
||||
gpio_cfg(6, 0)
|
||||
gpio_cfg(7, 1)
|
||||
gpio_cfg(8, 0)
|
||||
gpio_cfg(9, 1)
|
||||
|
||||
gpio_write(1, 1) if (gpio_read(0)==1) then err=0 else err=1 end
|
||||
gpio_write(1, 0) if (gpio_read(0)==1) then err=err+1 end
|
||||
if (err == 0) then print("D1->D0 ok") else print("D1->D0 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(3, 1) if (gpio_read(2)==1) then err=0 else err=1 end
|
||||
gpio_write(3, 0) if (gpio_read(2)==1) then err=err+1 end
|
||||
if (err == 0) then print("D3->D2 ok") else print("D3->D2 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(5, 1) if (gpio_read(4)==1) then err=0 else err=1 end
|
||||
gpio_write(5, 0) if (gpio_read(4)==1) then err=err+1 end
|
||||
if (err == 0) then print("D5->D4 ok") else print("D5->D4 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(7, 1) if (gpio_read(6)==1) then err=0 else err=1 end
|
||||
gpio_write(7, 0) if (gpio_read(6)==1) then err=err+1 end
|
||||
if (err == 0) then print("D7->D6 ok") else print("D7->D6 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(9, 1) if (gpio_read(8)==1) then err=0 else err=1 end
|
||||
gpio_write(9, 0) if (gpio_read(8)==1) then err=err+1 end
|
||||
if (err == 0) then print("D9->D8 ok") else print("D9->D8 Error") terr=terr+1 end
|
||||
|
||||
--4对GPIO，输入输出自动测试
|
||||
gpio_cfg(0, 1) -- 配置D0为输出
|
||||
gpio_cfg(1, 0) -- 配置D1未输入
|
||||
gpio_cfg(2, 1)
|
||||
gpio_cfg(3, 0)
|
||||
gpio_cfg(4, 1)
|
||||
gpio_cfg(5, 0)
|
||||
gpio_cfg(6, 1)
|
||||
gpio_cfg(7, 0)
|
||||
gpio_cfg(8, 1)
|
||||
gpio_cfg(9, 0)
|
||||
|
||||
gpio_write(0, 1) if (gpio_read(1)==1) then err=0 else err=1 end
|
||||
gpio_write(0, 0) if (gpio_read(1)==1) then err=err+1 end
|
||||
if (err == 0) then print("D0->D1 ok") else print("D0->D1 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(2, 1) if (gpio_read(3)==1) then err=0 else err=1 end
|
||||
gpio_write(2, 0) if (gpio_read(3)==1) then err=err+1 end
|
||||
if (err == 0) then print("D2->D3 ok") else print("D2->D3 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(4, 1) if (gpio_read(5)==1) then err=0 else err=1 end
|
||||
gpio_write(4, 0) if (gpio_read(5)==1) then err=err+1 end
|
||||
if (err == 0) then print("D4->D5 ok") else print("D4->D5 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(6, 1) if (gpio_read(7)==1) then err=0 else err=1 end
|
||||
gpio_write(6, 0) if (gpio_read(7)==1) then err=err+1 end
|
||||
if (err == 0) then print("D6->D7 ok") else print("D6->D7 Error") terr=terr+1 end
|
||||
|
||||
gpio_write(8, 1) if (gpio_read(9)==1) then err=0 else err=1 end
|
||||
gpio_write(8, 0) if (gpio_read(9)==1) then err=err+1 end
|
||||
if (err == 0) then print("D8->D9 ok") else print("D8->D9 Error") terr=terr+1 end
|
||||
|
||||
--测试CAN
|
||||
gpio_cfg(12, 1)
|
||||
gpio_cfg(13, 0)
|
||||
|
||||
err = 0
|
||||
for i=0,10,1 do
|
||||
gpio_write(12, 0) delayus(1) if (gpio_read(13)==1) then err=err+1 end
|
||||
delayus(100)
|
||||
gpio_write(12, 1) delayus(1) if (gpio_read(13)==0) then err=err+1 end
|
||||
delayus(100)
|
||||
end
|
||||
if (err == 0) then print("CANTX->CANRX ok") else print("CANTX->CANRX Error", err) terr=terr+1 end
|
||||
|
||||
--测试TTL-UART
|
||||
gpio_cfg(100, 1)
|
||||
gpio_write(100, 0)
|
||||
|
||||
gpio_cfg(10, 1)
|
||||
gpio_cfg(11, 0)
|
||||
|
||||
err = 0
|
||||
for i=0,10,1 do
|
||||
gpio_write(10, 0) delayus(10) if (gpio_read(11)==1) then err=err+1 end
|
||||
delayus(100)
|
||||
gpio_write(10, 1) delayus(10) if (gpio_read(11)==0) then err=err+1 end
|
||||
delayus(100)
|
||||
end
|
||||
if (err == 0) then print("TTL UART ok") else print("TTL UART Error", err) terr=terr+1 end
|
||||
|
||||
if (terr > 0) then
|
||||
print("*****测试失败 terr = ", terr)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
else
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
--启动示波器，ADC采集，多通道模式
|
||||
function start_dso(void)
|
||||
print("启动多通道低速测量模式")
|
||||
write_reg16(0x01FF, 2) --多通道低速测量
|
||||
write_reg16(0x0200, 1) -- CH1选DC耦合
|
||||
write_reg16(0x0201, 1) -- CH2选DC耦合
|
||||
write_reg16(0x0202, 0) -- CH1通道增益0档，不放大
|
||||
write_reg16(0x0203, 0) -- CH2通道增益0档，不放大
|
||||
write_reg16(0x0204, 0) -- CH1通道直流偏值，未用
|
||||
write_reg16(0x0205, 0) -- CH2通道直流偏值，未用
|
||||
write_reg16(0x0206, 12) --采样频率1M
|
||||
write_reg16(0x0207, 0) --采样深度1K
|
||||
write_reg16(0x0208, 0) --触发电平
|
||||
write_reg16(0x0209, 50) --触发位置
|
||||
write_reg16(0x020A, 0) --触发模式 0=自动
|
||||
write_reg16(0x020B, 0) --触发通道CH1
|
||||
write_reg16(0x020C, 0) --触发边沿
|
||||
write_reg16(0x020D, 2) --通道使能
|
||||
write_reg16(0x020E, 1) --开始采集
|
||||
end
|
||||
|
||||
function test_ch1ch2(void)
|
||||
local err
|
||||
local i
|
||||
local adc
|
||||
local dac
|
||||
local errd
|
||||
--DAC大致关系
|
||||
--CH1 4095=12.356V 2500=2.75V 2058=95mV
|
||||
--CH2(电流采样电阻200欧)
|
||||
--CH1的8档量程判据
|
||||
local dac1 = {2047, -1024, 512, 256, 128, 64, 32, 10}
|
||||
local mid1 = {60760, 4666, 60844, 60785, 60634, 60127, 59042, 46390}
|
||||
local diff1 = {0.02, 0.2, 0.05, 0.06, 0.10, 0.15, 0.18, 0.32} --公差系数
|
||||
--CH2的8档量程判据
|
||||
local dac2 = {4095, 1024, 512, 256, 128, 64, 32, 16}
|
||||
local mid2 = {43121, 41400, 37714, 37575, 37556, 37494, 37633, 40601}
|
||||
local diff2 = {0.2, 0.1, 0.08, 0.08, 0.08, 0.08, 0.12, 0.15}
|
||||
|
||||
print("")
|
||||
print("----开始示波器电路----")
|
||||
start_dso();
|
||||
err = 0
|
||||
|
||||
dac_on() --打开DAC电源，设置为电平模式
|
||||
|
||||
print("正在测CH1,DC耦合...")
|
||||
for i=1,8,1 do
|
||||
write_reg16(0x0202, i-1) -- CH1通道增益0-7
|
||||
dac = dac1[i] + 2044
|
||||
dac_write(dac) delayms(500)
|
||||
adc = read_adc(0)
|
||||
errd = mid1[i] * diff1[i];
|
||||
if (adc < mid1[i] - errd or adc > mid1[i] + errd) then
|
||||
err = err + 1
|
||||
print("dac=", dac, adc, "error")
|
||||
else
|
||||
print("dac=", dac, adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
print("正在测CH2,DC耦合...")
|
||||
for i=1,8,1 do
|
||||
write_reg16(0x0203, i-1) -- CH2通道增益0-7
|
||||
dac = dac2[i]
|
||||
dac_write(dac) delayms(500)
|
||||
adc = read_adc(1)
|
||||
errd = mid2[i] * diff2[i];
|
||||
if (adc < mid2[i] - errd or adc > mid2[i] + errd) then
|
||||
err = err + 1
|
||||
print("dac=", dac, adc, "error")
|
||||
else
|
||||
print("dac=", dac, adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
write_reg16(0x0200, 0) -- CH1耦合AC
|
||||
write_reg16(0x0201, 0) -- CH2耦合AC
|
||||
write_reg16(0x0202, 0) -- CH1通道增益0
|
||||
write_reg16(0x0203, 0) -- CH2通道增益0
|
||||
delayms(2000)
|
||||
adc = read_adc(0)
|
||||
if (adc < 32768 - 200 or adc > 32768 + 200) then
|
||||
print("CH1 AC耦合", adc, "errpr")
|
||||
err = err + 1
|
||||
else
|
||||
print("CH1 AC耦合", adc, "ok")
|
||||
end
|
||||
|
||||
adc = read_adc(1)
|
||||
if (adc < 32733 - 200 or adc > 32750 + 200) then
|
||||
print("CH2 AC耦合", adc, "errpr")
|
||||
err = err + 1
|
||||
else
|
||||
print("CH2 AC耦合", adc, "ok")
|
||||
end
|
||||
|
||||
::quit::
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
function test_tvcc(void)
|
||||
local err
|
||||
local i
|
||||
local adc
|
||||
|
||||
local mid1 = {2485, 1539, 13919, 4167, 43393, 11378, 50701}
|
||||
local mid2 = {8157, 4809, 46031, 13299, 43391, 11367, 50469}
|
||||
local diff1 = {0.2, 0.2, 0.2, 0.3, 0.1, 0.1, 0.1}
|
||||
local diff2 = {0.1, 0.1, 0.1, 0.2, 0.1, 0.1, 0.1}
|
||||
local name = {"高侧电压", "高侧电流", "TVCC电压", "TVCC电流", "NTC 电阻","12V 电压","USB 电压"}
|
||||
|
||||
print("")
|
||||
print("----开始测试TVCC NTC ----")
|
||||
--start_dso();
|
||||
err = 0
|
||||
print("TVCC = 120")
|
||||
write_tvcc_dac(120)
|
||||
|
||||
delayms(1000)
|
||||
|
||||
for i = 1,7,1 do
|
||||
adc = read_adc(i+1)
|
||||
errd = mid1[i] * diff1[i];
|
||||
if (adc < mid1[i] - errd or adc > mid1[i] + errd) then
|
||||
err = err + 1
|
||||
print(name[i], adc, "error")
|
||||
else
|
||||
print(name[i], adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
print("")
|
||||
print("TVCC = 36")
|
||||
write_tvcc_dac(36)
|
||||
delayms(1000)
|
||||
for i = 1,7,1 do
|
||||
adc = read_adc(i+1)
|
||||
errd = mid2[i] * diff2[i];
|
||||
if (adc < mid2[i] - errd or adc > mid2[i] + errd) then
|
||||
err = err + 1
|
||||
print(name[i], adc, "error")
|
||||
else
|
||||
print(name[i], adc, "ok")
|
||||
end
|
||||
end
|
||||
|
||||
::quit::
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
149
Doc/Lua脚本/h7_扩展板.lua
Executable file
149
Doc/Lua脚本/h7_扩展板.lua
Executable file
@ -0,0 +1,149 @@
|
||||
beep()
|
||||
--测试转接板，循环点灯
|
||||
function test_ledout(void)
|
||||
local i
|
||||
local err
|
||||
local fmc
|
||||
local flag
|
||||
|
||||
print("")
|
||||
print("----开始测试转接板(输出+FMC总线输入)----")
|
||||
|
||||
--设置TVCC输出
|
||||
write_tvcc_dac(47)
|
||||
|
||||
--设置D7-D0为输出
|
||||
gpio_cfg(0, 1)
|
||||
gpio_cfg(1, 1)
|
||||
gpio_cfg(2, 1)
|
||||
gpio_cfg(3, 1)
|
||||
gpio_cfg(4, 1)
|
||||
gpio_cfg(5, 1)
|
||||
gpio_cfg(6, 1)
|
||||
gpio_cfg(7, 1)
|
||||
--全灭
|
||||
for i=0,7,1 do
|
||||
gpio_write(i, 0)
|
||||
end
|
||||
--循环点亮
|
||||
flag = 1
|
||||
err = 0
|
||||
for i=0,7,1 do
|
||||
gpio_write(i, 1)
|
||||
delayms(100)
|
||||
fmc = read_bus() % 256
|
||||
printhex(fmc, 1)
|
||||
if (fmc ~= (flag)) then
|
||||
err = err + 1
|
||||
end
|
||||
flag = flag * 2
|
||||
gpio_write(i, 0)
|
||||
delayms(100)
|
||||
end
|
||||
--全部点亮
|
||||
for i=0,7,1 do
|
||||
gpio_write(i, 1)
|
||||
end
|
||||
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("测试通过")
|
||||
beep()
|
||||
else
|
||||
print("测试失败")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
|
||||
--测试扩展板继电器
|
||||
function test_extio_open_do(void)
|
||||
local i
|
||||
|
||||
print("依次打开24个继电器 - 开始")
|
||||
beep()
|
||||
extio_start()
|
||||
for i=0,23,1 do
|
||||
print(i)
|
||||
extio_set_do(i, 1)
|
||||
delayms(500)
|
||||
end
|
||||
print("依次打开24个继电器 - 结束")
|
||||
end
|
||||
|
||||
--测试扩展板继电器
|
||||
function test_extio_close_do(void)
|
||||
local i
|
||||
|
||||
print("依次关闭24个继电器 - 开始")
|
||||
beep()
|
||||
extio_start()
|
||||
for i=0,23,1 do
|
||||
print(i)
|
||||
extio_set_do(i, 1)
|
||||
delayms(500)
|
||||
end
|
||||
print("依次关闭24个继电器 - 结束")
|
||||
end
|
||||
|
||||
--测试扩展板DI
|
||||
function test_extio_di(void)
|
||||
local i
|
||||
|
||||
print("测试扩展板DI")
|
||||
beep()
|
||||
for i=0,15,1 do
|
||||
print(extio_get_di(i))
|
||||
end
|
||||
end
|
||||
|
||||
--测试扩展板ADC
|
||||
function test_extio_adc(void)
|
||||
local i
|
||||
|
||||
print("测试扩展板ADC")
|
||||
beep()
|
||||
for i=0,7,1 do
|
||||
print(extio_get_adc(i))
|
||||
end
|
||||
end
|
||||
|
||||
--测试转接板，循环点灯
|
||||
function test_swd(void)
|
||||
local err
|
||||
local id
|
||||
local str
|
||||
|
||||
print("")
|
||||
print("----开始测SWD功能----")
|
||||
err = 0
|
||||
swd_init(3.3) --配置SWD，3.3V电压
|
||||
id = swd_getid() --读ID
|
||||
printhex(id,4)
|
||||
if (id ~= 0x0BB11477) then
|
||||
err = err + 1
|
||||
end
|
||||
|
||||
swd_write(0x20000000, "12345678")
|
||||
str = swd_read(0x20000000, 8)
|
||||
print(str)
|
||||
if (str ~= "12345678") then
|
||||
err = err + 1
|
||||
end
|
||||
|
||||
--成功叫一声，失败叫三声
|
||||
if (err == 0) then
|
||||
print("*****测试通过*****")
|
||||
beep()
|
||||
else
|
||||
print("*****测试失败*****")
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
delayms(100)
|
||||
beep()
|
||||
end
|
||||
end
|
||||
25547
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h
Executable file
25547
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h743xx.h
Executable file
File diff suppressed because it is too large
Load Diff
25810
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h750xx.h
Executable file
25810
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h750xx.h
Executable file
File diff suppressed because it is too large
Load Diff
25811
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h753xx.h
Executable file
25811
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h753xx.h
Executable file
File diff suppressed because it is too large
Load Diff
201
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h
Executable file
201
Libraries/CMSIS/Device/ST/STM32H7xx/Include/stm32h7xx.h
Executable file
@ -0,0 +1,201 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS STM32H7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32H7xx device used in the target application
|
||||
* - To use or not the peripheral<EFBFBD>s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral<EFBFBD>s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef STM32H7xx_H
|
||||
#define STM32H7xx_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief STM32 Family
|
||||
*/
|
||||
#if !defined (STM32H7)
|
||||
#define STM32H7
|
||||
#endif /* STM32H7 */
|
||||
|
||||
|
||||
/* Uncomment the line below according to the target STM32H7 device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32H743xx) && !defined (STM32H753xx) && !defined (STM32H750xx)
|
||||
/* #define STM32H743xx */ /*!< STM32H743VI, STM32H743ZI, STM32H743II, STM32H743BI, STM32H743XI Devices */
|
||||
/* #define STM32H753xx */ /*!< STM32H753VI, STM32H753ZI, STM32H753II, STM32H753BI, STM32H753XI Devices */
|
||||
/* #define STM32H750xx */ /*!< STM32H750V, STM32H750I, STM32H750X Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
/*#define USE_HAL_DRIVER */
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.3.0
|
||||
*/
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32H7xx_CMSIS_DEVICE_VERSION ((__CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB1 << 16)\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_SUB2 << 8 )\
|
||||
|(__CMSIS_DEVICE_HAL_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32H743xx)
|
||||
#include "stm32h743xx.h"
|
||||
#elif defined(STM32H753xx)
|
||||
#include "stm32h753xx.h"
|
||||
#elif defined(STM32H750xx)
|
||||
#include "stm32h750xx.h"
|
||||
#else
|
||||
#error "Please select first the target STM32H7xx device used in your application (in stm32h7xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ERROR = 0,
|
||||
SUCCESS = !ERROR
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32h7xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* STM32H7xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
121
Libraries/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h
Executable file
121
Libraries/CMSIS/Device/ST/STM32H7xx/Include/system_stm32h7xx.h
Executable file
@ -0,0 +1,121 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h7xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-Mx Device System Source File for STM32H7xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef SYSTEM_STM32H7XX_H
|
||||
#define SYSTEM_STM32H7XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Domain1 Clock Frequency */
|
||||
extern uint32_t SystemD2Clock; /*!< System Domain2 Clock Frequency */
|
||||
extern const uint8_t D1CorePrescTable[16] ; /*!< D1CorePrescTable prescalers table values */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_STM32H7XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
238
Libraries/CMSIS/Device/ST/STM32H7xx/Release_Notes.html
Executable file
238
Libraries/CMSIS/Device/ST/STM32H7xx/Release_Notes.html
Executable file
@ -0,0 +1,238 @@
|
||||
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
|
||||
<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns="http://www.w3.org/TR/REC-html40"><head>
|
||||
|
||||
|
||||
|
||||
<meta content="text/html; charset=ISO-8859-1" http-equiv="content-type">
|
||||
<link rel="File-List" href="Library_files/filelist.xml">
|
||||
<link rel="Edit-Time-Data" href="Library_files/editdata.mso"><!--[if !mso]> <style> v\:* {behavior:url(#default#VML);} o\:* {behavior:url(#default#VML);} w\:* {behavior:url(#default#VML);} .shape {behavior:url(#default#VML);} </style> <![endif]--><title>Release Notes for STM32H7xx CMSIS</title><!--[if gte mso 9]><xml> <o:DocumentProperties> <o:Author>STMicroelectronics</o:Author> <o:LastAuthor>STMicroelectronics</o:LastAuthor> <o:Revision>37</o:Revision> <o:TotalTime>136</o:TotalTime> <o:Created>2009-02-27T19:26:00Z</o:Created> <o:LastSaved>2009-03-01T17:56:00Z</o:LastSaved> <o:Pages>1</o:Pages> <o:Words>522</o:Words> <o:Characters>2977</o:Characters> <o:Company>STMicroelectronics</o:Company> <o:Lines>24</o:Lines> <o:Paragraphs>6</o:Paragraphs> <o:CharactersWithSpaces>3493</o:CharactersWithSpaces> <o:Version>11.6568</o:Version> </o:DocumentProperties> </xml><![endif]--><!--[if gte mso 9]><xml> <w:WordDocument> <w:Zoom>110</w:Zoom> <w:ValidateAgainstSchemas/> <w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid> <w:IgnoreMixedContent>false</w:IgnoreMixedContent> <w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText> <w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel> </w:WordDocument> </xml><![endif]--><!--[if gte mso 9]><xml> <w:LatentStyles DefLockedState="false" LatentStyleCount="156"> </w:LatentStyles> </xml><![endif]-->
|
||||
|
||||
|
||||
|
||||
<style>
|
||||
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|
||||
/* Style Definitions */
|
||||
p.MsoNormal, li.MsoNormal, div.MsoNormal
|
||||
{mso-style-parent:"";
|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
a:link, span.MsoHyperlink
|
||||
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|
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|
||||
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|
||||
a:visited, span.MsoHyperlinkFollowed
|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
div.Section1
|
||||
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|
||||
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|
||||
</style><!--[if gte mso 10]> <style> /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-parent:""; mso-padding-alt:0in 5.4pt 0in 5.4pt; mso-para-margin:0in; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:10.0pt; font-family:"Times New Roman"; mso-ansi-language:#0400; mso-fareast-language:#0400; mso-bidi-language:#0400;} </style> <![endif]--><!--[if gte mso 9]><xml> <o:shapedefaults v:ext="edit" spidmax="5122"/> </xml><![endif]--><!--[if gte mso 9]><xml> <o:shapelayout v:ext="edit"> <o:idmap v:ext="edit" data="1"/> </o:shapelayout></xml><![endif]-->
|
||||
<meta content="MCD Application Team" name="author"></head>
|
||||
<body link="blue" vlink="blue">
|
||||
<div class="Section1">
|
||||
<p class="MsoNormal"><span style="font-family: Arial;"><o:p><br>
|
||||
</o:p></span></p>
|
||||
<div align="center">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr style="">
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="vertical-align: top;"><span style="font-size: 8pt; font-family: Arial; color: blue;"><a href="../../../../../Release_Notes.html">Back to
|
||||
Release page</a></span></td>
|
||||
</tr>
|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 18pt; text-align: center;" align="center"><span style="font-size: 20pt; font-family: Verdana; color: rgb(51, 102, 255);">Release
|
||||
Notes
|
||||
for STM32H7xx CMSIS</span><span style="font-size: 20pt; font-family: Verdana;"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;">Copyright
|
||||
2017
|
||||
STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: Arial; color: black;"><img alt="" id="_x0000_i1025" src="../../../../../_htmresc/st_logo.png" style="border: 0px solid ; width: 86px; height: 65px;"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-family: Arial; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody>
|
||||
<tr>
|
||||
<td style="padding: 0cm;" valign="top">
|
||||
<span style="font-family: "Times New Roman";"></span>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update
|
||||
History</span></h2>
|
||||
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.3.0
|
||||
/ 29-June-2018</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p>
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Add support for <span style="font-weight: bold;">stm32h750xx</span> value line devices</span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Add "stm32h750xx.h" file</span></li><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Add startup files startup_stm32h750xx.s for EWARM, MDK-ARM and SW4STM32<br></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.2.0
|
||||
/
|
||||
29-December-2017</span></h3>
|
||||
|
||||
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p>
|
||||
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Update FDCAN bit definition.</span></li><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Update SystemCoreClockUpdate() function in system_stm32h7xx.c file to use direct register access.<br>
|
||||
</span></li>
|
||||
</ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0
|
||||
/
|
||||
31-August-2017</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Update
|
||||
USB OTG bit definition.</span></li>
|
||||
<li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">Adjust
|
||||
PLL fractional computation.</span></li>
|
||||
</ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0
|
||||
/
|
||||
21-April-2017</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square">
|
||||
<li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana; font-size: 10pt;">First
|
||||
official release for </span><span style="font-family: Verdana; font-size: 10pt;"><span style="font-style: italic; font-weight: bold;">STM32H743xx/753xx</span>
|
||||
devices</span></li>
|
||||
</ul>
|
||||
<span style="font-size: 10pt; font-family: Verdana;"></span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;"></span></span>
|
||||
<ul style="margin-top: 0in;" type="disc">
|
||||
</ul>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal"></p>
|
||||
<div style="text-align: center;">
|
||||
<div style="text-align: justify;">
|
||||
<div style="text-align: justify;"><font size="-1"><span style="font-family: "Verdana","sans-serif";">Redistribution
|
||||
and
|
||||
use in source and binary forms, with or
|
||||
without
|
||||
modification, are permitted provided that the
|
||||
following conditions are
|
||||
met:</span><br>
|
||||
</font>
|
||||
<ol>
|
||||
<li><font size="-1"><span style="font-family: "Verdana","sans-serif";">Redistributions
|
||||
of
|
||||
source code must retain the above
|
||||
copyright notice, this list of
|
||||
conditions and the following disclaimer.</span><span style="font-family: "Verdana","sans-serif";"></span></font></li>
|
||||
<li><font size="-1"><span style="font-family: "Verdana","sans-serif";">Redistributions
|
||||
in
|
||||
binary form must reproduce the above
|
||||
copyright notice, this list of
|
||||
conditions and the following disclaimer in
|
||||
</span><span style="font-family: "Verdana","sans-serif";">the
|
||||
documentation
|
||||
and/or other materials provided with the
|
||||
distribution.</span><span style="font-family: "Verdana","sans-serif";"></span></font></li>
|
||||
<li><font size="-1"><span style="font-family: "Verdana","sans-serif";">Neither
|
||||
the
|
||||
name of STMicroelectronics nor the names
|
||||
of its contributors may be
|
||||
used to endorse or promote products
|
||||
derived </span><br>
|
||||
</font> </li>
|
||||
</ol>
|
||||
<font size="-1"><span style="font-family: "Verdana","sans-serif";">
|
||||
from
|
||||
this software without specific prior written
|
||||
permission.</span><br>
|
||||
<span style="font-family: "Verdana","sans-serif";"></span><br>
|
||||
<span style="font-family: "Verdana","sans-serif";">THIS
|
||||
SOFTWARE
|
||||
IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||
CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED</span><span style="font-family: "Verdana","sans-serif";">
|
||||
WARRANTIES,
|
||||
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A </span><span style="font-family: "Verdana","sans-serif";">PARTICULAR
|
||||
PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
COPYRIGHT HOLDER OR
|
||||
CONTRIBUTORS BE LIABLE FOR ANY </span><span style="font-family: "Verdana","sans-serif";">DIRECT,
|
||||
INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES
|
||||
(INCLUDING, BUT NOT LIMITED TO, </span><span style="font-family: "Verdana","sans-serif";">PROCUREMENT
|
||||
OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
DATA, OR PROFITS; OR
|
||||
BUSINESS INTERRUPTION) HOWEVER</span><span style="font-family: "Verdana","sans-serif";">
|
||||
CAUSED AND ON
|
||||
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
STRICT LIABILITY, OR TORT
|
||||
(INCLUDING NEGLIGENCE OR </span><span style="font-family: "Verdana","sans-serif";">OTHERWISE)
|
||||
ARISING
|
||||
IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
EVEN IF ADVISED OF
|
||||
THE POSSIBILITY OF SUCH DAMAGE.</span></font>
|
||||
</div>
|
||||
<span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"></span></div>
|
||||
<span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"></span></div>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"> </span></p>
|
||||
<span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"></span>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%"></span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt; text-align: center;" align="center"><span style="font-size: 10pt; font-family: Verdana; color: black;">For
|
||||
complete
|
||||
documentation on </span><span style="font-size: 10pt; font-family: Verdana;">STM32<span style="color: black;"> Microcontrollers
|
||||
visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/family/141.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody>
|
||||
</table>
|
||||
</div>
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
</div>
|
||||
</body></html>
|
||||
612
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s
Executable file
612
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s
Executable file
@ -0,0 +1,612 @@
|
||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h743xx.s
|
||||
;* @author MCD Application Team
|
||||
;* Description : STM32H7xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00001000
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00001000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_AVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT1_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT1_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FDCAN_CAL_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
EXPORT SAI2_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT CEC_IRQHandler [WEAK]
|
||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
||||
EXPORT SPDIF_RX_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_Master_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIME_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_FLT_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
|
||||
EXPORT SAI3_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_IRQHandler [WEAK]
|
||||
EXPORT JPEG_IRQHandler [WEAK]
|
||||
EXPORT MDMA_IRQHandler [WEAK]
|
||||
EXPORT SDMMC2_IRQHandler [WEAK]
|
||||
EXPORT HSEM1_IRQHandler [WEAK]
|
||||
EXPORT ADC3_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX2_OVR_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel0_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel1_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel2_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel3_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel4_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel5_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel6_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel7_IRQHandler [WEAK]
|
||||
EXPORT COMP1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT LPTIM3_IRQHandler [WEAK]
|
||||
EXPORT LPTIM4_IRQHandler [WEAK]
|
||||
EXPORT LPTIM5_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
EXPORT SAI4_IRQHandler [WEAK]
|
||||
EXPORT WAKEUP_PIN_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_AVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
FDCAN1_IT0_IRQHandler
|
||||
FDCAN2_IT0_IRQHandler
|
||||
FDCAN1_IT1_IRQHandler
|
||||
FDCAN2_IT1_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
FDCAN_CAL_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
SAI2_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
CEC_IRQHandler
|
||||
I2C4_EV_IRQHandler
|
||||
I2C4_ER_IRQHandler
|
||||
SPDIF_RX_IRQHandler
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
HRTIM1_Master_IRQHandler
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
HRTIM1_TIME_IRQHandler
|
||||
HRTIM1_FLT_IRQHandler
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
SAI3_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
MDIOS_WKUP_IRQHandler
|
||||
MDIOS_IRQHandler
|
||||
JPEG_IRQHandler
|
||||
MDMA_IRQHandler
|
||||
SDMMC2_IRQHandler
|
||||
HSEM1_IRQHandler
|
||||
ADC3_IRQHandler
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
BDMA_Channel0_IRQHandler
|
||||
BDMA_Channel1_IRQHandler
|
||||
BDMA_Channel2_IRQHandler
|
||||
BDMA_Channel3_IRQHandler
|
||||
BDMA_Channel4_IRQHandler
|
||||
BDMA_Channel5_IRQHandler
|
||||
BDMA_Channel6_IRQHandler
|
||||
BDMA_Channel7_IRQHandler
|
||||
COMP1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
LPTIM3_IRQHandler
|
||||
LPTIM4_IRQHandler
|
||||
LPTIM5_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
CRS_IRQHandler
|
||||
SAI4_IRQHandler
|
||||
WAKEUP_PIN_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
614
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s
Executable file
614
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h750xx.s
Executable file
@ -0,0 +1,614 @@
|
||||
;******************** (C) COPYRIGHT 2018 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h750xx.s
|
||||
;* @author MCD Application Team
|
||||
;* Description : STM32H7xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD CRYP_IRQHandler ; CRYP crypto
|
||||
DCD HASH_RNG_IRQHandler ; Hash and Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_AVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT1_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT1_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FDCAN_CAL_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT CRYP_IRQHandler [WEAK]
|
||||
EXPORT HASH_RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
EXPORT SAI2_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT CEC_IRQHandler [WEAK]
|
||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
||||
EXPORT SPDIF_RX_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_Master_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIME_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_FLT_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
|
||||
EXPORT SAI3_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_IRQHandler [WEAK]
|
||||
EXPORT JPEG_IRQHandler [WEAK]
|
||||
EXPORT MDMA_IRQHandler [WEAK]
|
||||
EXPORT SDMMC2_IRQHandler [WEAK]
|
||||
EXPORT HSEM1_IRQHandler [WEAK]
|
||||
EXPORT ADC3_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX2_OVR_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel0_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel1_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel2_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel3_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel4_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel5_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel6_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel7_IRQHandler [WEAK]
|
||||
EXPORT COMP1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT LPTIM3_IRQHandler [WEAK]
|
||||
EXPORT LPTIM4_IRQHandler [WEAK]
|
||||
EXPORT LPTIM5_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
EXPORT SAI4_IRQHandler [WEAK]
|
||||
EXPORT WAKEUP_PIN_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_AVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
FDCAN1_IT0_IRQHandler
|
||||
FDCAN2_IT0_IRQHandler
|
||||
FDCAN1_IT1_IRQHandler
|
||||
FDCAN2_IT1_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
FDCAN_CAL_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
CRYP_IRQHandler
|
||||
HASH_RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
SAI2_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
CEC_IRQHandler
|
||||
I2C4_EV_IRQHandler
|
||||
I2C4_ER_IRQHandler
|
||||
SPDIF_RX_IRQHandler
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
HRTIM1_Master_IRQHandler
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
HRTIM1_TIME_IRQHandler
|
||||
HRTIM1_FLT_IRQHandler
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
SAI3_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
MDIOS_WKUP_IRQHandler
|
||||
MDIOS_IRQHandler
|
||||
JPEG_IRQHandler
|
||||
MDMA_IRQHandler
|
||||
SDMMC2_IRQHandler
|
||||
HSEM1_IRQHandler
|
||||
ADC3_IRQHandler
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
BDMA_Channel0_IRQHandler
|
||||
BDMA_Channel1_IRQHandler
|
||||
BDMA_Channel2_IRQHandler
|
||||
BDMA_Channel3_IRQHandler
|
||||
BDMA_Channel4_IRQHandler
|
||||
BDMA_Channel5_IRQHandler
|
||||
BDMA_Channel6_IRQHandler
|
||||
BDMA_Channel7_IRQHandler
|
||||
COMP1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
LPTIM3_IRQHandler
|
||||
LPTIM4_IRQHandler
|
||||
LPTIM5_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
CRS_IRQHandler
|
||||
SAI4_IRQHandler
|
||||
WAKEUP_PIN_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
614
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h753xx.s
Executable file
614
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h753xx.s
Executable file
@ -0,0 +1,614 @@
|
||||
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h753xx.s
|
||||
;* @author MCD Application Team
|
||||
;* Description : STM32H7xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
; You may not use this file except in compliance with the License.
|
||||
; You may obtain a copy of the License at:
|
||||
;
|
||||
; http://www.st.com/software_license_agreement_liberty_v2
|
||||
;
|
||||
; Unless required by applicable law or agreed to in writing, software
|
||||
; distributed under the License is distributed on an "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
; See the License for the specific language governing permissions and
|
||||
; limitations under the License.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD CRYP_IRQHandler ; CRYP crypto
|
||||
DCD HASH_RNG_IRQHandler ; Hash and Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
|
||||
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_AVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT0_IRQHandler [WEAK]
|
||||
EXPORT FDCAN1_IT1_IRQHandler [WEAK]
|
||||
EXPORT FDCAN2_IT1_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FDCAN_CAL_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT CRYP_IRQHandler [WEAK]
|
||||
EXPORT HASH_RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
EXPORT SAI2_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT CEC_IRQHandler [WEAK]
|
||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
||||
EXPORT SPDIF_RX_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_Master_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMA_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMB_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMC_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIMD_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_TIME_IRQHandler [WEAK]
|
||||
EXPORT HRTIM1_FLT_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
|
||||
EXPORT SAI3_IRQHandler [WEAK]
|
||||
EXPORT SWPMI1_IRQHandler [WEAK]
|
||||
EXPORT TIM15_IRQHandler [WEAK]
|
||||
EXPORT TIM16_IRQHandler [WEAK]
|
||||
EXPORT TIM17_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_IRQHandler [WEAK]
|
||||
EXPORT JPEG_IRQHandler [WEAK]
|
||||
EXPORT MDMA_IRQHandler [WEAK]
|
||||
EXPORT SDMMC2_IRQHandler [WEAK]
|
||||
EXPORT HSEM1_IRQHandler [WEAK]
|
||||
EXPORT ADC3_IRQHandler [WEAK]
|
||||
EXPORT DMAMUX2_OVR_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel0_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel1_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel2_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel3_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel4_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel5_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel6_IRQHandler [WEAK]
|
||||
EXPORT BDMA_Channel7_IRQHandler [WEAK]
|
||||
EXPORT COMP1_IRQHandler [WEAK]
|
||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
||||
EXPORT LPTIM3_IRQHandler [WEAK]
|
||||
EXPORT LPTIM4_IRQHandler [WEAK]
|
||||
EXPORT LPTIM5_IRQHandler [WEAK]
|
||||
EXPORT LPUART1_IRQHandler [WEAK]
|
||||
EXPORT CRS_IRQHandler [WEAK]
|
||||
EXPORT SAI4_IRQHandler [WEAK]
|
||||
EXPORT WAKEUP_PIN_IRQHandler [WEAK]
|
||||
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_AVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
FDCAN1_IT0_IRQHandler
|
||||
FDCAN2_IT0_IRQHandler
|
||||
FDCAN1_IT1_IRQHandler
|
||||
FDCAN2_IT1_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_IRQHandler
|
||||
TIM1_UP_IRQHandler
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
FDCAN_CAL_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
CRYP_IRQHandler
|
||||
HASH_RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
SAI2_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
CEC_IRQHandler
|
||||
I2C4_EV_IRQHandler
|
||||
I2C4_ER_IRQHandler
|
||||
SPDIF_RX_IRQHandler
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
HRTIM1_Master_IRQHandler
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
HRTIM1_TIME_IRQHandler
|
||||
HRTIM1_FLT_IRQHandler
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
SAI3_IRQHandler
|
||||
SWPMI1_IRQHandler
|
||||
TIM15_IRQHandler
|
||||
TIM16_IRQHandler
|
||||
TIM17_IRQHandler
|
||||
MDIOS_WKUP_IRQHandler
|
||||
MDIOS_IRQHandler
|
||||
JPEG_IRQHandler
|
||||
MDMA_IRQHandler
|
||||
SDMMC2_IRQHandler
|
||||
HSEM1_IRQHandler
|
||||
ADC3_IRQHandler
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
BDMA_Channel0_IRQHandler
|
||||
BDMA_Channel1_IRQHandler
|
||||
BDMA_Channel2_IRQHandler
|
||||
BDMA_Channel3_IRQHandler
|
||||
BDMA_Channel4_IRQHandler
|
||||
BDMA_Channel5_IRQHandler
|
||||
BDMA_Channel6_IRQHandler
|
||||
BDMA_Channel7_IRQHandler
|
||||
COMP1_IRQHandler
|
||||
LPTIM2_IRQHandler
|
||||
LPTIM3_IRQHandler
|
||||
LPTIM4_IRQHandler
|
||||
LPTIM5_IRQHandler
|
||||
LPUART1_IRQHandler
|
||||
CRS_IRQHandler
|
||||
SAI4_IRQHandler
|
||||
WAKEUP_PIN_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
761
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s
Executable file
761
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s
Executable file
@ -0,0 +1,761 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32h743xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32H743xx Devices vector table for GCC based toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m7
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
|
||||
.word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
|
||||
.word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
|
||||
.word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
|
||||
.word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
|
||||
.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word 0 /* Reserved */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FMC_IRQHandler /* FMC */
|
||||
.word SDMMC1_IRQHandler /* SDMMC1 */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word ETH_IRQHandler /* Ethernet */
|
||||
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
.word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word 0 /* Reserved */
|
||||
.word RNG_IRQHandler /* Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
.word UART7_IRQHandler /* UART7 */
|
||||
.word UART8_IRQHandler /* UART8 */
|
||||
.word SPI4_IRQHandler /* SPI4 */
|
||||
.word SPI5_IRQHandler /* SPI5 */
|
||||
.word SPI6_IRQHandler /* SPI6 */
|
||||
.word SAI1_IRQHandler /* SAI1 */
|
||||
.word LTDC_IRQHandler /* LTDC */
|
||||
.word LTDC_ER_IRQHandler /* LTDC error */
|
||||
.word DMA2D_IRQHandler /* DMA2D */
|
||||
.word SAI2_IRQHandler /* SAI2 */
|
||||
.word QUADSPI_IRQHandler /* QUADSPI */
|
||||
.word LPTIM1_IRQHandler /* LPTIM1 */
|
||||
.word CEC_IRQHandler /* HDMI_CEC */
|
||||
.word I2C4_EV_IRQHandler /* I2C4 Event */
|
||||
.word I2C4_ER_IRQHandler /* I2C4 Error */
|
||||
.word SPDIF_RX_IRQHandler /* SPDIF_RX */
|
||||
.word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */
|
||||
.word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
|
||||
.word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */
|
||||
.word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */
|
||||
.word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */
|
||||
.word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */
|
||||
.word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */
|
||||
.word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */
|
||||
.word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */
|
||||
.word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
|
||||
.word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
|
||||
.word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
|
||||
.word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
|
||||
.word SAI3_IRQHandler /* SAI3 global Interrupt */
|
||||
.word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
|
||||
.word TIM15_IRQHandler /* TIM15 global Interrupt */
|
||||
.word TIM16_IRQHandler /* TIM16 global Interrupt */
|
||||
.word TIM17_IRQHandler /* TIM17 global Interrupt */
|
||||
.word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
|
||||
.word MDIOS_IRQHandler /* MDIOS global Interrupt */
|
||||
.word JPEG_IRQHandler /* JPEG global Interrupt */
|
||||
.word MDMA_IRQHandler /* MDMA global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
|
||||
.word HSEM1_IRQHandler /* HSEM1 global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word ADC3_IRQHandler /* ADC3 global Interrupt */
|
||||
.word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
|
||||
.word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */
|
||||
.word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */
|
||||
.word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */
|
||||
.word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */
|
||||
.word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */
|
||||
.word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */
|
||||
.word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */
|
||||
.word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */
|
||||
.word COMP1_IRQHandler /* COMP1 global Interrupt */
|
||||
.word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
|
||||
.word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
|
||||
.word LPTIM4_IRQHandler /* LP TIM4 global interrupt */
|
||||
.word LPTIM5_IRQHandler /* LP TIM5 global interrupt */
|
||||
.word LPUART1_IRQHandler /* LP UART1 interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word CRS_IRQHandler /* Clock Recovery Global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SAI4_IRQHandler /* SAI4 global interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_AVD_IRQHandler
|
||||
.thumb_set PVD_AVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT0_IRQHandler
|
||||
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT0_IRQHandler
|
||||
.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT1_IRQHandler
|
||||
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT1_IRQHandler
|
||||
.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN_CAL_IRQHandler
|
||||
.thumb_set FDCAN_CAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_IRQHandler
|
||||
.thumb_set RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART7_IRQHandler
|
||||
.thumb_set UART7_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART8_IRQHandler
|
||||
.thumb_set UART8_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI5_IRQHandler
|
||||
.thumb_set SPI5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI6_IRQHandler
|
||||
.thumb_set SPI6_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_IRQHandler
|
||||
.thumb_set LTDC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_ER_IRQHandler
|
||||
.thumb_set LTDC_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2D_IRQHandler
|
||||
.thumb_set DMA2D_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI2_IRQHandler
|
||||
.thumb_set SAI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_EV_IRQHandler
|
||||
.thumb_set I2C4_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_ER_IRQHandler
|
||||
.thumb_set I2C4_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPDIF_RX_IRQHandler
|
||||
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_Master_IRQHandler
|
||||
.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMA_IRQHandler
|
||||
.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMB_IRQHandler
|
||||
.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMC_IRQHandler
|
||||
.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMD_IRQHandler
|
||||
.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIME_IRQHandler
|
||||
.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_FLT_IRQHandler
|
||||
.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT0_IRQHandler
|
||||
.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT1_IRQHandler
|
||||
.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT2_IRQHandler
|
||||
.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT3_IRQHandler
|
||||
.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI3_IRQHandler
|
||||
.thumb_set SAI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_WKUP_IRQHandler
|
||||
.thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_IRQHandler
|
||||
.thumb_set MDIOS_IRQHandler,Default_Handler
|
||||
|
||||
.weak JPEG_IRQHandler
|
||||
.thumb_set JPEG_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDMA_IRQHandler
|
||||
.thumb_set MDMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC2_IRQHandler
|
||||
.thumb_set SDMMC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak HSEM1_IRQHandler
|
||||
.thumb_set HSEM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX2_OVR_IRQHandler
|
||||
.thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel0_IRQHandler
|
||||
.thumb_set BDMA_Channel0_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel1_IRQHandler
|
||||
.thumb_set BDMA_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel2_IRQHandler
|
||||
.thumb_set BDMA_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel3_IRQHandler
|
||||
.thumb_set BDMA_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel4_IRQHandler
|
||||
.thumb_set BDMA_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel5_IRQHandler
|
||||
.thumb_set BDMA_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel6_IRQHandler
|
||||
.thumb_set BDMA_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel7_IRQHandler
|
||||
.thumb_set BDMA_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP1_IRQHandler
|
||||
.thumb_set COMP1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM3_IRQHandler
|
||||
.thumb_set LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM4_IRQHandler
|
||||
.thumb_set LPTIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM5_IRQHandler
|
||||
.thumb_set LPTIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI4_IRQHandler
|
||||
.thumb_set SAI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak WAKEUP_PIN_IRQHandler
|
||||
.thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
764
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s
Executable file
764
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h750xx.s
Executable file
@ -0,0 +1,764 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32h750xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32H750xx Devices vector table for GCC based toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2018 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m7
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
|
||||
.word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
|
||||
.word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
|
||||
.word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
|
||||
.word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
|
||||
.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word 0 /* Reserved */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FMC_IRQHandler /* FMC */
|
||||
.word SDMMC1_IRQHandler /* SDMMC1 */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word ETH_IRQHandler /* Ethernet */
|
||||
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
.word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word CRYP_IRQHandler /* Crypto */
|
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
.word UART7_IRQHandler /* UART7 */
|
||||
.word UART8_IRQHandler /* UART8 */
|
||||
.word SPI4_IRQHandler /* SPI4 */
|
||||
.word SPI5_IRQHandler /* SPI5 */
|
||||
.word SPI6_IRQHandler /* SPI6 */
|
||||
.word SAI1_IRQHandler /* SAI1 */
|
||||
.word LTDC_IRQHandler /* LTDC */
|
||||
.word LTDC_ER_IRQHandler /* LTDC error */
|
||||
.word DMA2D_IRQHandler /* DMA2D */
|
||||
.word SAI2_IRQHandler /* SAI2 */
|
||||
.word QUADSPI_IRQHandler /* QUADSPI */
|
||||
.word LPTIM1_IRQHandler /* LPTIM1 */
|
||||
.word CEC_IRQHandler /* HDMI_CEC */
|
||||
.word I2C4_EV_IRQHandler /* I2C4 Event */
|
||||
.word I2C4_ER_IRQHandler /* I2C4 Error */
|
||||
.word SPDIF_RX_IRQHandler /* SPDIF_RX */
|
||||
.word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */
|
||||
.word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
|
||||
.word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */
|
||||
.word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */
|
||||
.word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */
|
||||
.word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */
|
||||
.word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */
|
||||
.word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */
|
||||
.word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */
|
||||
.word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
|
||||
.word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
|
||||
.word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
|
||||
.word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
|
||||
.word SAI3_IRQHandler /* SAI3 global Interrupt */
|
||||
.word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
|
||||
.word TIM15_IRQHandler /* TIM15 global Interrupt */
|
||||
.word TIM16_IRQHandler /* TIM16 global Interrupt */
|
||||
.word TIM17_IRQHandler /* TIM17 global Interrupt */
|
||||
.word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
|
||||
.word MDIOS_IRQHandler /* MDIOS global Interrupt */
|
||||
.word JPEG_IRQHandler /* JPEG global Interrupt */
|
||||
.word MDMA_IRQHandler /* MDMA global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
|
||||
.word HSEM1_IRQHandler /* HSEM1 global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word ADC3_IRQHandler /* ADC3 global Interrupt */
|
||||
.word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
|
||||
.word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */
|
||||
.word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */
|
||||
.word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */
|
||||
.word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */
|
||||
.word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */
|
||||
.word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */
|
||||
.word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */
|
||||
.word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */
|
||||
.word COMP1_IRQHandler /* COMP1 global Interrupt */
|
||||
.word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
|
||||
.word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
|
||||
.word LPTIM4_IRQHandler /* LP TIM4 global interrupt */
|
||||
.word LPTIM5_IRQHandler /* LP TIM5 global interrupt */
|
||||
.word LPUART1_IRQHandler /* LP UART1 interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word CRS_IRQHandler /* Clock Recovery Global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SAI4_IRQHandler /* SAI4 global interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_AVD_IRQHandler
|
||||
.thumb_set PVD_AVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT0_IRQHandler
|
||||
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT0_IRQHandler
|
||||
.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT1_IRQHandler
|
||||
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT1_IRQHandler
|
||||
.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN_CAL_IRQHandler
|
||||
.thumb_set FDCAN_CAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRYP_IRQHandler
|
||||
.thumb_set CRYP_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART7_IRQHandler
|
||||
.thumb_set UART7_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART8_IRQHandler
|
||||
.thumb_set UART8_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI5_IRQHandler
|
||||
.thumb_set SPI5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI6_IRQHandler
|
||||
.thumb_set SPI6_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_IRQHandler
|
||||
.thumb_set LTDC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_ER_IRQHandler
|
||||
.thumb_set LTDC_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2D_IRQHandler
|
||||
.thumb_set DMA2D_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI2_IRQHandler
|
||||
.thumb_set SAI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_EV_IRQHandler
|
||||
.thumb_set I2C4_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_ER_IRQHandler
|
||||
.thumb_set I2C4_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPDIF_RX_IRQHandler
|
||||
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_Master_IRQHandler
|
||||
.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMA_IRQHandler
|
||||
.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMB_IRQHandler
|
||||
.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMC_IRQHandler
|
||||
.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMD_IRQHandler
|
||||
.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIME_IRQHandler
|
||||
.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_FLT_IRQHandler
|
||||
.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT0_IRQHandler
|
||||
.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT1_IRQHandler
|
||||
.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT2_IRQHandler
|
||||
.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT3_IRQHandler
|
||||
.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI3_IRQHandler
|
||||
.thumb_set SAI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_WKUP_IRQHandler
|
||||
.thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_IRQHandler
|
||||
.thumb_set MDIOS_IRQHandler,Default_Handler
|
||||
|
||||
.weak JPEG_IRQHandler
|
||||
.thumb_set JPEG_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDMA_IRQHandler
|
||||
.thumb_set MDMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC2_IRQHandler
|
||||
.thumb_set SDMMC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak HSEM1_IRQHandler
|
||||
.thumb_set HSEM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX2_OVR_IRQHandler
|
||||
.thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel0_IRQHandler
|
||||
.thumb_set BDMA_Channel0_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel1_IRQHandler
|
||||
.thumb_set BDMA_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel2_IRQHandler
|
||||
.thumb_set BDMA_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel3_IRQHandler
|
||||
.thumb_set BDMA_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel4_IRQHandler
|
||||
.thumb_set BDMA_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel5_IRQHandler
|
||||
.thumb_set BDMA_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel6_IRQHandler
|
||||
.thumb_set BDMA_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel7_IRQHandler
|
||||
.thumb_set BDMA_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP1_IRQHandler
|
||||
.thumb_set COMP1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM3_IRQHandler
|
||||
.thumb_set LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM4_IRQHandler
|
||||
.thumb_set LPTIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM5_IRQHandler
|
||||
.thumb_set LPTIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI4_IRQHandler
|
||||
.thumb_set SAI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak WAKEUP_PIN_IRQHandler
|
||||
.thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
764
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h753xx.s
Executable file
764
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h753xx.s
Executable file
@ -0,0 +1,764 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32h753xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32H753xx Devices vector table for GCC based toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m7
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */
|
||||
.word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */
|
||||
.word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */
|
||||
.word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */
|
||||
.word TIM1_UP_IRQHandler /* TIM1 Update interrupt */
|
||||
.word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word 0 /* Reserved */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FMC_IRQHandler /* FMC */
|
||||
.word SDMMC1_IRQHandler /* SDMMC1 */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word ETH_IRQHandler /* Ethernet */
|
||||
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
.word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word DCMI_IRQHandler /* DCMI */
|
||||
.word CRYP_IRQHandler /* Crypto */
|
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
.word UART7_IRQHandler /* UART7 */
|
||||
.word UART8_IRQHandler /* UART8 */
|
||||
.word SPI4_IRQHandler /* SPI4 */
|
||||
.word SPI5_IRQHandler /* SPI5 */
|
||||
.word SPI6_IRQHandler /* SPI6 */
|
||||
.word SAI1_IRQHandler /* SAI1 */
|
||||
.word LTDC_IRQHandler /* LTDC */
|
||||
.word LTDC_ER_IRQHandler /* LTDC error */
|
||||
.word DMA2D_IRQHandler /* DMA2D */
|
||||
.word SAI2_IRQHandler /* SAI2 */
|
||||
.word QUADSPI_IRQHandler /* QUADSPI */
|
||||
.word LPTIM1_IRQHandler /* LPTIM1 */
|
||||
.word CEC_IRQHandler /* HDMI_CEC */
|
||||
.word I2C4_EV_IRQHandler /* I2C4 Event */
|
||||
.word I2C4_ER_IRQHandler /* I2C4 Error */
|
||||
.word SPDIF_RX_IRQHandler /* SPDIF_RX */
|
||||
.word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */
|
||||
.word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */
|
||||
.word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */
|
||||
.word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */
|
||||
.word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */
|
||||
.word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */
|
||||
.word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */
|
||||
.word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */
|
||||
.word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */
|
||||
.word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */
|
||||
.word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */
|
||||
.word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */
|
||||
.word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */
|
||||
.word SAI3_IRQHandler /* SAI3 global Interrupt */
|
||||
.word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */
|
||||
.word TIM15_IRQHandler /* TIM15 global Interrupt */
|
||||
.word TIM16_IRQHandler /* TIM16 global Interrupt */
|
||||
.word TIM17_IRQHandler /* TIM17 global Interrupt */
|
||||
.word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */
|
||||
.word MDIOS_IRQHandler /* MDIOS global Interrupt */
|
||||
.word JPEG_IRQHandler /* JPEG global Interrupt */
|
||||
.word MDMA_IRQHandler /* MDMA global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */
|
||||
.word HSEM1_IRQHandler /* HSEM1 global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word ADC3_IRQHandler /* ADC3 global Interrupt */
|
||||
.word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */
|
||||
.word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */
|
||||
.word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */
|
||||
.word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */
|
||||
.word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */
|
||||
.word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */
|
||||
.word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */
|
||||
.word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */
|
||||
.word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */
|
||||
.word COMP1_IRQHandler /* COMP1 global Interrupt */
|
||||
.word LPTIM2_IRQHandler /* LP TIM2 global interrupt */
|
||||
.word LPTIM3_IRQHandler /* LP TIM3 global interrupt */
|
||||
.word LPTIM4_IRQHandler /* LP TIM4 global interrupt */
|
||||
.word LPTIM5_IRQHandler /* LP TIM5 global interrupt */
|
||||
.word LPUART1_IRQHandler /* LP UART1 interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word CRS_IRQHandler /* Clock Recovery Global Interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word SAI4_IRQHandler /* SAI4 global interrupt */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_AVD_IRQHandler
|
||||
.thumb_set PVD_AVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT0_IRQHandler
|
||||
.thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT0_IRQHandler
|
||||
.thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN1_IT1_IRQHandler
|
||||
.thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN2_IT1_IRQHandler
|
||||
.thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FMC_IRQHandler
|
||||
.thumb_set FMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC1_IRQHandler
|
||||
.thumb_set SDMMC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_IRQHandler
|
||||
.thumb_set ETH_IRQHandler,Default_Handler
|
||||
|
||||
.weak ETH_WKUP_IRQHandler
|
||||
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FDCAN_CAL_IRQHandler
|
||||
.thumb_set FDCAN_CAL_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DCMI_IRQHandler
|
||||
.thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRYP_IRQHandler
|
||||
.thumb_set CRYP_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART7_IRQHandler
|
||||
.thumb_set UART7_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART8_IRQHandler
|
||||
.thumb_set UART8_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI4_IRQHandler
|
||||
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI5_IRQHandler
|
||||
.thumb_set SPI5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI6_IRQHandler
|
||||
.thumb_set SPI6_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI1_IRQHandler
|
||||
.thumb_set SAI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_IRQHandler
|
||||
.thumb_set LTDC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LTDC_ER_IRQHandler
|
||||
.thumb_set LTDC_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2D_IRQHandler
|
||||
.thumb_set DMA2D_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI2_IRQHandler
|
||||
.thumb_set SAI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak QUADSPI_IRQHandler
|
||||
.thumb_set QUADSPI_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM1_IRQHandler
|
||||
.thumb_set LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CEC_IRQHandler
|
||||
.thumb_set CEC_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_EV_IRQHandler
|
||||
.thumb_set I2C4_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C4_ER_IRQHandler
|
||||
.thumb_set I2C4_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPDIF_RX_IRQHandler
|
||||
.thumb_set SPDIF_RX_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX1_OVR_IRQHandler
|
||||
.thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_Master_IRQHandler
|
||||
.thumb_set HRTIM1_Master_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMA_IRQHandler
|
||||
.thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMB_IRQHandler
|
||||
.thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMC_IRQHandler
|
||||
.thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIMD_IRQHandler
|
||||
.thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_TIME_IRQHandler
|
||||
.thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
|
||||
|
||||
.weak HRTIM1_FLT_IRQHandler
|
||||
.thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT0_IRQHandler
|
||||
.thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT1_IRQHandler
|
||||
.thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT2_IRQHandler
|
||||
.thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DFSDM1_FLT3_IRQHandler
|
||||
.thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI3_IRQHandler
|
||||
.thumb_set SAI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak SWPMI1_IRQHandler
|
||||
.thumb_set SWPMI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_IRQHandler
|
||||
.thumb_set TIM15_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM17_IRQHandler
|
||||
.thumb_set TIM17_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_WKUP_IRQHandler
|
||||
.thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDIOS_IRQHandler
|
||||
.thumb_set MDIOS_IRQHandler,Default_Handler
|
||||
|
||||
.weak JPEG_IRQHandler
|
||||
.thumb_set JPEG_IRQHandler,Default_Handler
|
||||
|
||||
.weak MDMA_IRQHandler
|
||||
.thumb_set MDMA_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDMMC2_IRQHandler
|
||||
.thumb_set SDMMC2_IRQHandler,Default_Handler
|
||||
|
||||
.weak HSEM1_IRQHandler
|
||||
.thumb_set HSEM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMAMUX2_OVR_IRQHandler
|
||||
.thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel0_IRQHandler
|
||||
.thumb_set BDMA_Channel0_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel1_IRQHandler
|
||||
.thumb_set BDMA_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel2_IRQHandler
|
||||
.thumb_set BDMA_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel3_IRQHandler
|
||||
.thumb_set BDMA_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel4_IRQHandler
|
||||
.thumb_set BDMA_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel5_IRQHandler
|
||||
.thumb_set BDMA_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel6_IRQHandler
|
||||
.thumb_set BDMA_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak BDMA_Channel7_IRQHandler
|
||||
.thumb_set BDMA_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP1_IRQHandler
|
||||
.thumb_set COMP1_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM2_IRQHandler
|
||||
.thumb_set LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM3_IRQHandler
|
||||
.thumb_set LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM4_IRQHandler
|
||||
.thumb_set LPTIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPTIM5_IRQHandler
|
||||
.thumb_set LPTIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LPUART1_IRQHandler
|
||||
.thumb_set LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CRS_IRQHandler
|
||||
.thumb_set CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak SAI4_IRQHandler
|
||||
.thumb_set SAI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak WAKEUP_PIN_IRQHandler
|
||||
.thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x10047FFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x24000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2403FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x10047FFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x24000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2403FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2000FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20010000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x10047FFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
@ -0,0 +1,34 @@
|
||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x24000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x24000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x2403FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x24040000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2407FFFF;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ITCMRAM_end__ = 0x0000FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x200;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
define region ITCMRAM_region = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||
|
||||
place in ROM_region { readonly };
|
||||
place in RAM_region { readwrite,
|
||||
block CSTACK, block HEAP };
|
||||
987
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s
Executable file
987
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s
Executable file
@ -0,0 +1,987 @@
|
||||
;/******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h743xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32H743xx devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == _iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog Interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 glob
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||
Reset_Handler
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
PUBWEAK PVD_AVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PVD_AVD_IRQHandler
|
||||
B PVD_AVD_IRQHandler
|
||||
|
||||
PUBWEAK TAMP_STAMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TAMP_STAMP_IRQHandler
|
||||
B TAMP_STAMP_IRQHandler
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream0_IRQHandler
|
||||
B DMA1_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream1_IRQHandler
|
||||
B DMA1_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream2_IRQHandler
|
||||
B DMA1_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream3_IRQHandler
|
||||
B DMA1_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream4_IRQHandler
|
||||
B DMA1_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream5_IRQHandler
|
||||
B DMA1_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream6_IRQHandler
|
||||
B DMA1_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK ADC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC_IRQHandler
|
||||
B ADC_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT0_IRQHandler
|
||||
B FDCAN1_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT0_IRQHandler
|
||||
B FDCAN2_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT1_IRQHandler
|
||||
B FDCAN1_IT1_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT1_IRQHandler
|
||||
B FDCAN2_IT1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_BRK_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_IRQHandler
|
||||
B TIM1_BRK_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_UP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_UP_IRQHandler
|
||||
B TIM1_UP_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_TRG_COM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
B TIM1_TRG_COM_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_BRK_TIM12_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
B TIM8_BRK_TIM12_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_UP_TIM13_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
B TIM8_UP_TIM13_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
B TIM8_TRG_COM_TIM14_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_CC_IRQHandler
|
||||
B TIM8_CC_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream7_IRQHandler
|
||||
B DMA1_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK FMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FMC_IRQHandler
|
||||
B FMC_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC1_IRQHandler
|
||||
B SDMMC1_IRQHandler
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK TIM6_DAC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM6_DAC_IRQHandler
|
||||
B TIM6_DAC_IRQHandler
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream0_IRQHandler
|
||||
B DMA2_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream1_IRQHandler
|
||||
B DMA2_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream2_IRQHandler
|
||||
B DMA2_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream3_IRQHandler
|
||||
B DMA2_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream4_IRQHandler
|
||||
B DMA2_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK ETH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_IRQHandler
|
||||
B ETH_IRQHandler
|
||||
|
||||
PUBWEAK ETH_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_WKUP_IRQHandler
|
||||
B ETH_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN_CAL_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN_CAL_IRQHandler
|
||||
B FDCAN_CAL_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream5_IRQHandler
|
||||
B DMA2_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream6_IRQHandler
|
||||
B DMA2_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream7_IRQHandler
|
||||
B DMA2_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK USART6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART6_IRQHandler
|
||||
B USART6_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_EV_IRQHandler
|
||||
B I2C3_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_ER_IRQHandler
|
||||
B I2C3_ER_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
B OTG_HS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
B OTG_HS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
B OTG_HS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_IRQHandler
|
||||
B OTG_HS_IRQHandler
|
||||
|
||||
PUBWEAK DCMI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DCMI_IRQHandler
|
||||
B DCMI_IRQHandler
|
||||
|
||||
PUBWEAK RNG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RNG_IRQHandler
|
||||
B RNG_IRQHandler
|
||||
|
||||
PUBWEAK FPU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FPU_IRQHandler
|
||||
B FPU_IRQHandler
|
||||
|
||||
PUBWEAK UART7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART7_IRQHandler
|
||||
B UART7_IRQHandler
|
||||
|
||||
PUBWEAK UART8_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART8_IRQHandler
|
||||
B UART8_IRQHandler
|
||||
|
||||
PUBWEAK SPI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI4_IRQHandler
|
||||
B SPI4_IRQHandler
|
||||
|
||||
PUBWEAK SPI5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI5_IRQHandler
|
||||
B SPI5_IRQHandler
|
||||
|
||||
PUBWEAK SPI6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI6_IRQHandler
|
||||
B SPI6_IRQHandler
|
||||
|
||||
PUBWEAK SAI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI1_IRQHandler
|
||||
B SAI1_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_IRQHandler
|
||||
B LTDC_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_ER_IRQHandler
|
||||
B LTDC_ER_IRQHandler
|
||||
|
||||
PUBWEAK DMA2D_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2D_IRQHandler
|
||||
B DMA2D_IRQHandler
|
||||
|
||||
PUBWEAK SAI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI2_IRQHandler
|
||||
B SAI2_IRQHandler
|
||||
|
||||
PUBWEAK QUADSPI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
QUADSPI_IRQHandler
|
||||
B QUADSPI_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM1_IRQHandler
|
||||
B LPTIM1_IRQHandler
|
||||
|
||||
PUBWEAK CEC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CEC_IRQHandler
|
||||
B CEC_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_EV_IRQHandler
|
||||
B I2C4_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_ER_IRQHandler
|
||||
B I2C4_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPDIF_RX_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPDIF_RX_IRQHandler
|
||||
B SPDIF_RX_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
B OTG_FS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
B OTG_FS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
B OTG_FS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_IRQHandler
|
||||
B OTG_FS_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX1_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
B DMAMUX1_OVR_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_Master_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_Master_IRQHandler
|
||||
B HRTIM1_Master_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
B HRTIM1_TIMA_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMB_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
B HRTIM1_TIMB_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
B HRTIM1_TIMC_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
B HRTIM1_TIMD_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIME_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIME_IRQHandler
|
||||
B HRTIM1_TIME_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_FLT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_FLT_IRQHandler
|
||||
B HRTIM1_FLT_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
B DFSDM1_FLT0_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
B DFSDM1_FLT1_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
B DFSDM1_FLT2_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
B DFSDM1_FLT3_IRQHandler
|
||||
|
||||
PUBWEAK SAI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI3_IRQHandler
|
||||
B SAI3_IRQHandler
|
||||
|
||||
PUBWEAK SWPMI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SWPMI1_IRQHandler
|
||||
B SWPMI1_IRQHandler
|
||||
|
||||
PUBWEAK TIM15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM15_IRQHandler
|
||||
B TIM15_IRQHandler
|
||||
|
||||
PUBWEAK TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM16_IRQHandler
|
||||
B TIM16_IRQHandler
|
||||
|
||||
PUBWEAK TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM17_IRQHandler
|
||||
B TIM17_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_WKUP_IRQHandler
|
||||
B MDIOS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_IRQHandler
|
||||
B MDIOS_IRQHandler
|
||||
|
||||
PUBWEAK JPEG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
JPEG_IRQHandler
|
||||
B JPEG_IRQHandler
|
||||
|
||||
PUBWEAK MDMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDMA_IRQHandler
|
||||
B MDMA_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC2_IRQHandler
|
||||
B SDMMC2_IRQHandler
|
||||
|
||||
PUBWEAK HSEM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HSEM1_IRQHandler
|
||||
B HSEM1_IRQHandler
|
||||
|
||||
PUBWEAK ADC3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC3_IRQHandler
|
||||
B ADC3_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX2_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
B DMAMUX2_OVR_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel0_IRQHandler
|
||||
B BDMA_Channel0_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel1_IRQHandler
|
||||
B BDMA_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel2_IRQHandler
|
||||
B BDMA_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel3_IRQHandler
|
||||
B BDMA_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel4_IRQHandler
|
||||
B BDMA_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel5_IRQHandler
|
||||
B BDMA_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel6_IRQHandler
|
||||
B BDMA_Channel6_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel7_IRQHandler
|
||||
B BDMA_Channel7_IRQHandler
|
||||
|
||||
PUBWEAK COMP1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
COMP1_IRQHandler
|
||||
B COMP1_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM2_IRQHandler
|
||||
B LPTIM2_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM3_IRQHandler
|
||||
B LPTIM3_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM4_IRQHandler
|
||||
B LPTIM4_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM5_IRQHandler
|
||||
B LPTIM5_IRQHandler
|
||||
|
||||
PUBWEAK LPUART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPUART1_IRQHandler
|
||||
B LPUART1_IRQHandler
|
||||
|
||||
PUBWEAK CRS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CRS_IRQHandler
|
||||
B CRS_IRQHandler
|
||||
|
||||
PUBWEAK SAI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI4_IRQHandler
|
||||
B SAI4_IRQHandler
|
||||
|
||||
PUBWEAK WAKEUP_PIN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WAKEUP_PIN_IRQHandler
|
||||
B WAKEUP_PIN_IRQHandler
|
||||
END
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
992
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s
Executable file
992
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h750xx.s
Executable file
@ -0,0 +1,992 @@
|
||||
;/******************** (C) COPYRIGHT 2018 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h750xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32H750xx devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == _iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog Interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 glob
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD CRYP_IRQHandler ; CRYP crypto
|
||||
DCD HASH_RNG_IRQHandler ; Hash and Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||
Reset_Handler
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
PUBWEAK PVD_AVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PVD_AVD_IRQHandler
|
||||
B PVD_AVD_IRQHandler
|
||||
|
||||
PUBWEAK TAMP_STAMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TAMP_STAMP_IRQHandler
|
||||
B TAMP_STAMP_IRQHandler
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream0_IRQHandler
|
||||
B DMA1_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream1_IRQHandler
|
||||
B DMA1_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream2_IRQHandler
|
||||
B DMA1_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream3_IRQHandler
|
||||
B DMA1_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream4_IRQHandler
|
||||
B DMA1_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream5_IRQHandler
|
||||
B DMA1_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream6_IRQHandler
|
||||
B DMA1_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK ADC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC_IRQHandler
|
||||
B ADC_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT0_IRQHandler
|
||||
B FDCAN1_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT0_IRQHandler
|
||||
B FDCAN2_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT1_IRQHandler
|
||||
B FDCAN1_IT1_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT1_IRQHandler
|
||||
B FDCAN2_IT1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_BRK_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_IRQHandler
|
||||
B TIM1_BRK_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_UP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_UP_IRQHandler
|
||||
B TIM1_UP_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_TRG_COM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
B TIM1_TRG_COM_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_BRK_TIM12_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
B TIM8_BRK_TIM12_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_UP_TIM13_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
B TIM8_UP_TIM13_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
B TIM8_TRG_COM_TIM14_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_CC_IRQHandler
|
||||
B TIM8_CC_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream7_IRQHandler
|
||||
B DMA1_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK FMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FMC_IRQHandler
|
||||
B FMC_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC1_IRQHandler
|
||||
B SDMMC1_IRQHandler
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK TIM6_DAC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM6_DAC_IRQHandler
|
||||
B TIM6_DAC_IRQHandler
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream0_IRQHandler
|
||||
B DMA2_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream1_IRQHandler
|
||||
B DMA2_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream2_IRQHandler
|
||||
B DMA2_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream3_IRQHandler
|
||||
B DMA2_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream4_IRQHandler
|
||||
B DMA2_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK ETH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_IRQHandler
|
||||
B ETH_IRQHandler
|
||||
|
||||
PUBWEAK ETH_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_WKUP_IRQHandler
|
||||
B ETH_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN_CAL_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN_CAL_IRQHandler
|
||||
B FDCAN_CAL_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream5_IRQHandler
|
||||
B DMA2_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream6_IRQHandler
|
||||
B DMA2_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream7_IRQHandler
|
||||
B DMA2_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK USART6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART6_IRQHandler
|
||||
B USART6_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_EV_IRQHandler
|
||||
B I2C3_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_ER_IRQHandler
|
||||
B I2C3_ER_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
B OTG_HS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
B OTG_HS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
B OTG_HS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_IRQHandler
|
||||
B OTG_HS_IRQHandler
|
||||
|
||||
PUBWEAK DCMI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DCMI_IRQHandler
|
||||
B DCMI_IRQHandler
|
||||
|
||||
PUBWEAK CRYP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CRYP_IRQHandler
|
||||
B CRYP_IRQHandler
|
||||
|
||||
PUBWEAK HASH_RNG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HASH_RNG_IRQHandler
|
||||
B HASH_RNG_IRQHandler
|
||||
|
||||
PUBWEAK FPU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FPU_IRQHandler
|
||||
B FPU_IRQHandler
|
||||
|
||||
PUBWEAK UART7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART7_IRQHandler
|
||||
B UART7_IRQHandler
|
||||
|
||||
PUBWEAK UART8_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART8_IRQHandler
|
||||
B UART8_IRQHandler
|
||||
|
||||
PUBWEAK SPI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI4_IRQHandler
|
||||
B SPI4_IRQHandler
|
||||
|
||||
PUBWEAK SPI5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI5_IRQHandler
|
||||
B SPI5_IRQHandler
|
||||
|
||||
PUBWEAK SPI6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI6_IRQHandler
|
||||
B SPI6_IRQHandler
|
||||
|
||||
PUBWEAK SAI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI1_IRQHandler
|
||||
B SAI1_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_IRQHandler
|
||||
B LTDC_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_ER_IRQHandler
|
||||
B LTDC_ER_IRQHandler
|
||||
|
||||
PUBWEAK DMA2D_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2D_IRQHandler
|
||||
B DMA2D_IRQHandler
|
||||
|
||||
PUBWEAK SAI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI2_IRQHandler
|
||||
B SAI2_IRQHandler
|
||||
|
||||
PUBWEAK QUADSPI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
QUADSPI_IRQHandler
|
||||
B QUADSPI_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM1_IRQHandler
|
||||
B LPTIM1_IRQHandler
|
||||
|
||||
PUBWEAK CEC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CEC_IRQHandler
|
||||
B CEC_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_EV_IRQHandler
|
||||
B I2C4_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_ER_IRQHandler
|
||||
B I2C4_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPDIF_RX_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPDIF_RX_IRQHandler
|
||||
B SPDIF_RX_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
B OTG_FS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
B OTG_FS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
B OTG_FS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_IRQHandler
|
||||
B OTG_FS_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX1_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
B DMAMUX1_OVR_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_Master_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_Master_IRQHandler
|
||||
B HRTIM1_Master_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
B HRTIM1_TIMA_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMB_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
B HRTIM1_TIMB_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
B HRTIM1_TIMC_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
B HRTIM1_TIMD_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIME_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIME_IRQHandler
|
||||
B HRTIM1_TIME_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_FLT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_FLT_IRQHandler
|
||||
B HRTIM1_FLT_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
B DFSDM1_FLT0_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
B DFSDM1_FLT1_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
B DFSDM1_FLT2_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
B DFSDM1_FLT3_IRQHandler
|
||||
|
||||
PUBWEAK SAI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI3_IRQHandler
|
||||
B SAI3_IRQHandler
|
||||
|
||||
PUBWEAK SWPMI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SWPMI1_IRQHandler
|
||||
B SWPMI1_IRQHandler
|
||||
|
||||
PUBWEAK TIM15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM15_IRQHandler
|
||||
B TIM15_IRQHandler
|
||||
|
||||
PUBWEAK TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM16_IRQHandler
|
||||
B TIM16_IRQHandler
|
||||
|
||||
PUBWEAK TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM17_IRQHandler
|
||||
B TIM17_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_WKUP_IRQHandler
|
||||
B MDIOS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_IRQHandler
|
||||
B MDIOS_IRQHandler
|
||||
|
||||
PUBWEAK JPEG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
JPEG_IRQHandler
|
||||
B JPEG_IRQHandler
|
||||
|
||||
PUBWEAK MDMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDMA_IRQHandler
|
||||
B MDMA_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC2_IRQHandler
|
||||
B SDMMC2_IRQHandler
|
||||
|
||||
PUBWEAK HSEM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HSEM1_IRQHandler
|
||||
B HSEM1_IRQHandler
|
||||
|
||||
PUBWEAK ADC3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC3_IRQHandler
|
||||
B ADC3_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX2_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
B DMAMUX2_OVR_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel0_IRQHandler
|
||||
B BDMA_Channel0_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel1_IRQHandler
|
||||
B BDMA_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel2_IRQHandler
|
||||
B BDMA_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel3_IRQHandler
|
||||
B BDMA_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel4_IRQHandler
|
||||
B BDMA_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel5_IRQHandler
|
||||
B BDMA_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel6_IRQHandler
|
||||
B BDMA_Channel6_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel7_IRQHandler
|
||||
B BDMA_Channel7_IRQHandler
|
||||
|
||||
PUBWEAK COMP1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
COMP1_IRQHandler
|
||||
B COMP1_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM2_IRQHandler
|
||||
B LPTIM2_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM3_IRQHandler
|
||||
B LPTIM3_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM4_IRQHandler
|
||||
B LPTIM4_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM5_IRQHandler
|
||||
B LPTIM5_IRQHandler
|
||||
|
||||
PUBWEAK LPUART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPUART1_IRQHandler
|
||||
B LPUART1_IRQHandler
|
||||
|
||||
PUBWEAK CRS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CRS_IRQHandler
|
||||
B CRS_IRQHandler
|
||||
|
||||
PUBWEAK SAI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI4_IRQHandler
|
||||
B SAI4_IRQHandler
|
||||
|
||||
PUBWEAK WAKEUP_PIN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WAKEUP_PIN_IRQHandler
|
||||
B WAKEUP_PIN_IRQHandler
|
||||
END
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
992
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h753xx.s
Executable file
992
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h753xx.s
Executable file
@ -0,0 +1,992 @@
|
||||
;/******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32h753xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32H753xx devices vector table for EWARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == _iar_program_start,
|
||||
;* - Set the vector table entries with the exceptions ISR
|
||||
;* address.
|
||||
;* - Branches to main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the Cortex-M processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;********************************************************************************
|
||||
;*
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;*
|
||||
;*******************************************************************************
|
||||
;
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
|
||||
DATA
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog Interrupt ( wwdg1_it)
|
||||
DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2
|
||||
DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0
|
||||
DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0
|
||||
DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1
|
||||
DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt
|
||||
DCD TIM1_UP_IRQHandler ; TIM1 Update
|
||||
DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD 0 ; Reserved
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 glob
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD CRYP_IRQHandler ; CRYP crypto
|
||||
DCD HASH_RNG_IRQHandler ; Hash and Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out
|
||||
DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt
|
||||
DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts
|
||||
DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt
|
||||
DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt
|
||||
DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt
|
||||
DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt
|
||||
DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt
|
||||
DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt
|
||||
DCD SAI3_IRQHandler ; SAI3 global Interrupt
|
||||
DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt
|
||||
DCD TIM15_IRQHandler ; TIM15 global Interrupt
|
||||
DCD TIM16_IRQHandler ; TIM16 global Interrupt
|
||||
DCD TIM17_IRQHandler ; TIM17 global Interrupt
|
||||
DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt
|
||||
DCD MDIOS_IRQHandler ; MDIOS global Interrupt
|
||||
DCD JPEG_IRQHandler ; JPEG global Interrupt
|
||||
DCD MDMA_IRQHandler ; MDMA global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt
|
||||
DCD HSEM1_IRQHandler ; HSEM1 global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD ADC3_IRQHandler ; ADC3 global Interrupt
|
||||
DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt
|
||||
DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt
|
||||
DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt
|
||||
DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt
|
||||
DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt
|
||||
DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt
|
||||
DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt
|
||||
DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt
|
||||
DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt
|
||||
DCD COMP1_IRQHandler ; COMP1 global Interrupt
|
||||
DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt
|
||||
DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt
|
||||
DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt
|
||||
DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt
|
||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD CRS_IRQHandler ; Clock Recovery Global Interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD SAI4_IRQHandler ; SAI4 global interrupt
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
THUMB
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(2)
|
||||
Reset_Handler
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__iar_program_start
|
||||
BX R0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
NMI_Handler
|
||||
B NMI_Handler
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HardFault_Handler
|
||||
B HardFault_Handler
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MemManage_Handler
|
||||
B MemManage_Handler
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BusFault_Handler
|
||||
B BusFault_Handler
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UsageFault_Handler
|
||||
B UsageFault_Handler
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SVC_Handler
|
||||
B SVC_Handler
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DebugMon_Handler
|
||||
B DebugMon_Handler
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PendSV_Handler
|
||||
B PendSV_Handler
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SysTick_Handler
|
||||
B SysTick_Handler
|
||||
|
||||
PUBWEAK WWDG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WWDG_IRQHandler
|
||||
B WWDG_IRQHandler
|
||||
|
||||
PUBWEAK PVD_AVD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
PVD_AVD_IRQHandler
|
||||
B PVD_AVD_IRQHandler
|
||||
|
||||
PUBWEAK TAMP_STAMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TAMP_STAMP_IRQHandler
|
||||
B TAMP_STAMP_IRQHandler
|
||||
|
||||
PUBWEAK RTC_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_WKUP_IRQHandler
|
||||
B RTC_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FLASH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FLASH_IRQHandler
|
||||
B FLASH_IRQHandler
|
||||
|
||||
PUBWEAK RCC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RCC_IRQHandler
|
||||
B RCC_IRQHandler
|
||||
|
||||
PUBWEAK EXTI0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI0_IRQHandler
|
||||
B EXTI0_IRQHandler
|
||||
|
||||
PUBWEAK EXTI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI1_IRQHandler
|
||||
B EXTI1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI2_IRQHandler
|
||||
B EXTI2_IRQHandler
|
||||
|
||||
PUBWEAK EXTI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI3_IRQHandler
|
||||
B EXTI3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI4_IRQHandler
|
||||
B EXTI4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream0_IRQHandler
|
||||
B DMA1_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream1_IRQHandler
|
||||
B DMA1_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream2_IRQHandler
|
||||
B DMA1_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream3_IRQHandler
|
||||
B DMA1_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream4_IRQHandler
|
||||
B DMA1_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream5_IRQHandler
|
||||
B DMA1_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream6_IRQHandler
|
||||
B DMA1_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK ADC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC_IRQHandler
|
||||
B ADC_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT0_IRQHandler
|
||||
B FDCAN1_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT0_IRQHandler
|
||||
B FDCAN2_IT0_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN1_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN1_IT1_IRQHandler
|
||||
B FDCAN1_IT1_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN2_IT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN2_IT1_IRQHandler
|
||||
B FDCAN2_IT1_IRQHandler
|
||||
|
||||
PUBWEAK EXTI9_5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI9_5_IRQHandler
|
||||
B EXTI9_5_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_BRK_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_BRK_IRQHandler
|
||||
B TIM1_BRK_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_UP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_UP_IRQHandler
|
||||
B TIM1_UP_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_TRG_COM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_TRG_COM_IRQHandler
|
||||
B TIM1_TRG_COM_IRQHandler
|
||||
|
||||
PUBWEAK TIM1_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM1_CC_IRQHandler
|
||||
B TIM1_CC_IRQHandler
|
||||
|
||||
PUBWEAK TIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM2_IRQHandler
|
||||
B TIM2_IRQHandler
|
||||
|
||||
PUBWEAK TIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM3_IRQHandler
|
||||
B TIM3_IRQHandler
|
||||
|
||||
PUBWEAK TIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM4_IRQHandler
|
||||
B TIM4_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_EV_IRQHandler
|
||||
B I2C1_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C1_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C1_ER_IRQHandler
|
||||
B I2C1_ER_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_EV_IRQHandler
|
||||
B I2C2_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C2_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C2_ER_IRQHandler
|
||||
B I2C2_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI1_IRQHandler
|
||||
B SPI1_IRQHandler
|
||||
|
||||
PUBWEAK SPI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI2_IRQHandler
|
||||
B SPI2_IRQHandler
|
||||
|
||||
PUBWEAK USART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART1_IRQHandler
|
||||
B USART1_IRQHandler
|
||||
|
||||
PUBWEAK USART2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART2_IRQHandler
|
||||
B USART2_IRQHandler
|
||||
|
||||
PUBWEAK USART3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART3_IRQHandler
|
||||
B USART3_IRQHandler
|
||||
|
||||
PUBWEAK EXTI15_10_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
EXTI15_10_IRQHandler
|
||||
B EXTI15_10_IRQHandler
|
||||
|
||||
PUBWEAK RTC_Alarm_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
RTC_Alarm_IRQHandler
|
||||
B RTC_Alarm_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_BRK_TIM12_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
B TIM8_BRK_TIM12_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_UP_TIM13_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
B TIM8_UP_TIM13_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
B TIM8_TRG_COM_TIM14_IRQHandler
|
||||
|
||||
PUBWEAK TIM8_CC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM8_CC_IRQHandler
|
||||
B TIM8_CC_IRQHandler
|
||||
|
||||
PUBWEAK DMA1_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA1_Stream7_IRQHandler
|
||||
B DMA1_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK FMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FMC_IRQHandler
|
||||
B FMC_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC1_IRQHandler
|
||||
B SDMMC1_IRQHandler
|
||||
|
||||
PUBWEAK TIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM5_IRQHandler
|
||||
B TIM5_IRQHandler
|
||||
|
||||
PUBWEAK SPI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI3_IRQHandler
|
||||
B SPI3_IRQHandler
|
||||
|
||||
PUBWEAK UART4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART4_IRQHandler
|
||||
B UART4_IRQHandler
|
||||
|
||||
PUBWEAK UART5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART5_IRQHandler
|
||||
B UART5_IRQHandler
|
||||
|
||||
PUBWEAK TIM6_DAC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM6_DAC_IRQHandler
|
||||
B TIM6_DAC_IRQHandler
|
||||
|
||||
PUBWEAK TIM7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM7_IRQHandler
|
||||
B TIM7_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream0_IRQHandler
|
||||
B DMA2_Stream0_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream1_IRQHandler
|
||||
B DMA2_Stream1_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream2_IRQHandler
|
||||
B DMA2_Stream2_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream3_IRQHandler
|
||||
B DMA2_Stream3_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream4_IRQHandler
|
||||
B DMA2_Stream4_IRQHandler
|
||||
|
||||
PUBWEAK ETH_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_IRQHandler
|
||||
B ETH_IRQHandler
|
||||
|
||||
PUBWEAK ETH_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ETH_WKUP_IRQHandler
|
||||
B ETH_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK FDCAN_CAL_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FDCAN_CAL_IRQHandler
|
||||
B FDCAN_CAL_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream5_IRQHandler
|
||||
B DMA2_Stream5_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream6_IRQHandler
|
||||
B DMA2_Stream6_IRQHandler
|
||||
|
||||
PUBWEAK DMA2_Stream7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2_Stream7_IRQHandler
|
||||
B DMA2_Stream7_IRQHandler
|
||||
|
||||
PUBWEAK USART6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
USART6_IRQHandler
|
||||
B USART6_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_EV_IRQHandler
|
||||
B I2C3_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C3_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C3_ER_IRQHandler
|
||||
B I2C3_ER_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
B OTG_HS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
B OTG_HS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
B OTG_HS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_HS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_HS_IRQHandler
|
||||
B OTG_HS_IRQHandler
|
||||
|
||||
PUBWEAK DCMI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DCMI_IRQHandler
|
||||
B DCMI_IRQHandler
|
||||
|
||||
PUBWEAK CRYP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CRYP_IRQHandler
|
||||
B CRYP_IRQHandler
|
||||
|
||||
PUBWEAK HASH_RNG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HASH_RNG_IRQHandler
|
||||
B HASH_RNG_IRQHandler
|
||||
|
||||
PUBWEAK FPU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
FPU_IRQHandler
|
||||
B FPU_IRQHandler
|
||||
|
||||
PUBWEAK UART7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART7_IRQHandler
|
||||
B UART7_IRQHandler
|
||||
|
||||
PUBWEAK UART8_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
UART8_IRQHandler
|
||||
B UART8_IRQHandler
|
||||
|
||||
PUBWEAK SPI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI4_IRQHandler
|
||||
B SPI4_IRQHandler
|
||||
|
||||
PUBWEAK SPI5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI5_IRQHandler
|
||||
B SPI5_IRQHandler
|
||||
|
||||
PUBWEAK SPI6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPI6_IRQHandler
|
||||
B SPI6_IRQHandler
|
||||
|
||||
PUBWEAK SAI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI1_IRQHandler
|
||||
B SAI1_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_IRQHandler
|
||||
B LTDC_IRQHandler
|
||||
|
||||
PUBWEAK LTDC_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LTDC_ER_IRQHandler
|
||||
B LTDC_ER_IRQHandler
|
||||
|
||||
PUBWEAK DMA2D_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMA2D_IRQHandler
|
||||
B DMA2D_IRQHandler
|
||||
|
||||
PUBWEAK SAI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI2_IRQHandler
|
||||
B SAI2_IRQHandler
|
||||
|
||||
PUBWEAK QUADSPI_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
QUADSPI_IRQHandler
|
||||
B QUADSPI_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM1_IRQHandler
|
||||
B LPTIM1_IRQHandler
|
||||
|
||||
PUBWEAK CEC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CEC_IRQHandler
|
||||
B CEC_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_EV_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_EV_IRQHandler
|
||||
B I2C4_EV_IRQHandler
|
||||
|
||||
PUBWEAK I2C4_ER_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
I2C4_ER_IRQHandler
|
||||
B I2C4_ER_IRQHandler
|
||||
|
||||
PUBWEAK SPDIF_RX_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SPDIF_RX_IRQHandler
|
||||
B SPDIF_RX_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_OUT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_OUT_IRQHandler
|
||||
B OTG_FS_EP1_OUT_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_EP1_IN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_EP1_IN_IRQHandler
|
||||
B OTG_FS_EP1_IN_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
B OTG_FS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK OTG_FS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
OTG_FS_IRQHandler
|
||||
B OTG_FS_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX1_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX1_OVR_IRQHandler
|
||||
B DMAMUX1_OVR_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_Master_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_Master_IRQHandler
|
||||
B HRTIM1_Master_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMA_IRQHandler
|
||||
B HRTIM1_TIMA_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMB_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMB_IRQHandler
|
||||
B HRTIM1_TIMB_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMC_IRQHandler
|
||||
B HRTIM1_TIMC_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIMD_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIMD_IRQHandler
|
||||
B HRTIM1_TIMD_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_TIME_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_TIME_IRQHandler
|
||||
B HRTIM1_TIME_IRQHandler
|
||||
|
||||
PUBWEAK HRTIM1_FLT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HRTIM1_FLT_IRQHandler
|
||||
B HRTIM1_FLT_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
B DFSDM1_FLT0_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
B DFSDM1_FLT1_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
B DFSDM1_FLT2_IRQHandler
|
||||
|
||||
PUBWEAK DFSDM1_FLT3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
B DFSDM1_FLT3_IRQHandler
|
||||
|
||||
PUBWEAK SAI3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI3_IRQHandler
|
||||
B SAI3_IRQHandler
|
||||
|
||||
PUBWEAK SWPMI1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SWPMI1_IRQHandler
|
||||
B SWPMI1_IRQHandler
|
||||
|
||||
PUBWEAK TIM15_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM15_IRQHandler
|
||||
B TIM15_IRQHandler
|
||||
|
||||
PUBWEAK TIM16_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM16_IRQHandler
|
||||
B TIM16_IRQHandler
|
||||
|
||||
PUBWEAK TIM17_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
TIM17_IRQHandler
|
||||
B TIM17_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_WKUP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_WKUP_IRQHandler
|
||||
B MDIOS_WKUP_IRQHandler
|
||||
|
||||
PUBWEAK MDIOS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDIOS_IRQHandler
|
||||
B MDIOS_IRQHandler
|
||||
|
||||
PUBWEAK JPEG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
JPEG_IRQHandler
|
||||
B JPEG_IRQHandler
|
||||
|
||||
PUBWEAK MDMA_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
MDMA_IRQHandler
|
||||
B MDMA_IRQHandler
|
||||
|
||||
PUBWEAK SDMMC2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SDMMC2_IRQHandler
|
||||
B SDMMC2_IRQHandler
|
||||
|
||||
PUBWEAK HSEM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
HSEM1_IRQHandler
|
||||
B HSEM1_IRQHandler
|
||||
|
||||
PUBWEAK ADC3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
ADC3_IRQHandler
|
||||
B ADC3_IRQHandler
|
||||
|
||||
PUBWEAK DMAMUX2_OVR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
DMAMUX2_OVR_IRQHandler
|
||||
B DMAMUX2_OVR_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel0_IRQHandler
|
||||
B BDMA_Channel0_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel1_IRQHandler
|
||||
B BDMA_Channel1_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel2_IRQHandler
|
||||
B BDMA_Channel2_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel3_IRQHandler
|
||||
B BDMA_Channel3_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel4_IRQHandler
|
||||
B BDMA_Channel4_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel5_IRQHandler
|
||||
B BDMA_Channel5_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel6_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel6_IRQHandler
|
||||
B BDMA_Channel6_IRQHandler
|
||||
|
||||
PUBWEAK BDMA_Channel7_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
BDMA_Channel7_IRQHandler
|
||||
B BDMA_Channel7_IRQHandler
|
||||
|
||||
PUBWEAK COMP1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
COMP1_IRQHandler
|
||||
B COMP1_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM2_IRQHandler
|
||||
B LPTIM2_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM3_IRQHandler
|
||||
B LPTIM3_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM4_IRQHandler
|
||||
B LPTIM4_IRQHandler
|
||||
|
||||
PUBWEAK LPTIM5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPTIM5_IRQHandler
|
||||
B LPTIM5_IRQHandler
|
||||
|
||||
PUBWEAK LPUART1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
LPUART1_IRQHandler
|
||||
B LPUART1_IRQHandler
|
||||
|
||||
PUBWEAK CRS_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
CRS_IRQHandler
|
||||
B CRS_IRQHandler
|
||||
|
||||
PUBWEAK SAI4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
SAI4_IRQHandler
|
||||
B SAI4_IRQHandler
|
||||
|
||||
PUBWEAK WAKEUP_PIN_IRQHandler
|
||||
SECTION .text:CODE:NOROOT:REORDER(1)
|
||||
WAKEUP_PIN_IRQHandler
|
||||
B WAKEUP_PIN_IRQHandler
|
||||
END
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
576
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c
Executable file
576
Libraries/CMSIS/Device/ST/STM32H7xx/Source/Templates/system_stm32h7xx.c
Executable file
@ -0,0 +1,576 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32h7xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32h7xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32h7xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32h7xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (CSI_VALUE)
|
||||
#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* CSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
/************************* Miscellaneous Configuration ************************/
|
||||
/*!< Uncomment the following line if you need to use external SRAM or SDRAM mounted
|
||||
on EVAL board as data memory */
|
||||
/*#define DATA_IN_ExtSRAM */
|
||||
/*#define DATA_IN_ExtSDRAM*/
|
||||
|
||||
#if defined(DATA_IN_ExtSRAM) && defined(DATA_IN_ExtSDRAM)
|
||||
#error "Please select DATA_IN_ExtSRAM or DATA_IN_ExtSDRAM "
|
||||
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 64000000;
|
||||
uint32_t SystemD2Clock = 64000000;
|
||||
const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32H7xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and External memory
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= RCC_CR_HSION;
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00000000;
|
||||
|
||||
/* Reset HSEON, CSSON , CSION,RC48ON, CSIKERON PLL1ON, PLL2ON and PLL3ON bits */
|
||||
RCC->CR &= (uint32_t)0xEAF6ED7F;
|
||||
|
||||
/* Reset D1CFGR register */
|
||||
RCC->D1CFGR = 0x00000000;
|
||||
|
||||
/* Reset D2CFGR register */
|
||||
RCC->D2CFGR = 0x00000000;
|
||||
|
||||
/* Reset D3CFGR register */
|
||||
RCC->D3CFGR = 0x00000000;
|
||||
|
||||
/* Reset PLLCKSELR register */
|
||||
RCC->PLLCKSELR = 0x00000000;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x00000000;
|
||||
/* Reset PLL1DIVR register */
|
||||
RCC->PLL1DIVR = 0x00000000;
|
||||
/* Reset PLL1FRACR register */
|
||||
RCC->PLL1FRACR = 0x00000000;
|
||||
|
||||
/* Reset PLL2DIVR register */
|
||||
RCC->PLL2DIVR = 0x00000000;
|
||||
|
||||
/* Reset PLL2FRACR register */
|
||||
|
||||
RCC->PLL2FRACR = 0x00000000;
|
||||
/* Reset PLL3DIVR register */
|
||||
RCC->PLL3DIVR = 0x00000000;
|
||||
|
||||
/* Reset PLL3FRACR register */
|
||||
RCC->PLL3FRACR = 0x00000000;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
|
||||
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
|
||||
*((__IO uint32_t*)0x51008108) = 0x00000001;
|
||||
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = D1_AXISRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal ITCMSRAM */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock , it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
|
||||
* HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 4 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
* (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 64 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value
|
||||
* 25 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t pllp = 2, pllsource = 0, pllm = 2 ,tmp, pllfracen =0 , hsivalue = 0;
|
||||
float fracn1, pllvco = 0 ;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3));
|
||||
break;
|
||||
|
||||
case 0x08: /* CSI used as system clock source */
|
||||
SystemCoreClock = CSI_VALUE;
|
||||
break;
|
||||
|
||||
case 0x10: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x18: /* PLL1 used as system clock source */
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
|
||||
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ;
|
||||
pllfracen = RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN;
|
||||
fracn1 = (pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3));
|
||||
switch (pllsource)
|
||||
{
|
||||
|
||||
case 0x00: /* HSI used as PLL clock source */
|
||||
hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ;
|
||||
pllvco = (hsivalue/ pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
|
||||
break;
|
||||
|
||||
case 0x01: /* CSI used as PLL clock source */
|
||||
pllvco = (CSI_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
|
||||
break;
|
||||
|
||||
case 0x02: /* HSE used as PLL clock source */
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
|
||||
break;
|
||||
|
||||
default:
|
||||
pllvco = (CSI_VALUE / pllm) * ((RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/0x2000) +1 );
|
||||
break;
|
||||
}
|
||||
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1 ) ;
|
||||
SystemCoreClock = (uint32_t) (pllvco/pllp);
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = CSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK frequency --------------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> POSITION_VAL(RCC_D1CFGR_D1CPRE_0)];
|
||||
/* HCLK frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32h7xx.s before jump to main.
|
||||
* This function configures the external memories (SRAM/SDRAM)
|
||||
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
#if defined (DATA_IN_ExtSDRAM)
|
||||
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||
register __IO uint32_t index;
|
||||
|
||||
/* Enable GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
|
||||
clock */
|
||||
RCC->AHB4ENR |= 0x000001F8;
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x000000CC;
|
||||
GPIOD->AFR[1] = 0xCC000CCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAFEAFFFA;
|
||||
/* Configure PDx pins speed to 50 MHz */
|
||||
GPIOD->OSPEEDR = 0xA02A000A;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x55555505;
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00000CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAABFFA;
|
||||
/* Configure PEx pins speed to 50 MHz */
|
||||
GPIOE->OSPEEDR = 0xAAAA800A;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x55554005;
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCCC000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAABFFAAA;
|
||||
/* Configure PFx pins speed to 50 MHz */
|
||||
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x55400555;
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||
GPIOG->AFR[1] = 0xC000000C;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0xBFFEFAAA;
|
||||
/* Configure PGx pins speed to 50 MHz */
|
||||
GPIOG->OSPEEDR = 0x80020AAA;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x40010515;
|
||||
/* Connect PHx pins to FMC Alternate function */
|
||||
GPIOH->AFR[0] = 0xCCC00000;
|
||||
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PHx pins in Alternate function mode */
|
||||
GPIOH->MODER = 0xAAAAABFF;
|
||||
/* Configure PHx pins speed to 50 MHz */
|
||||
GPIOH->OSPEEDR = 0xAAAAA800;
|
||||
/* Configure PHx pins Output type to push-pull */
|
||||
GPIOH->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PHx pins */
|
||||
GPIOH->PUPDR = 0x55555400;
|
||||
/* Connect PIx pins to FMC Alternate function */
|
||||
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||
GPIOI->AFR[1] = 0x00000CC0;
|
||||
/* Configure PIx pins in Alternate function mode */
|
||||
GPIOI->MODER = 0xFFEBAAAA;
|
||||
/* Configure PIx pins speed to 50 MHz */
|
||||
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||
/* Configure PIx pins Output type to push-pull */
|
||||
GPIOI->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PIx pins */
|
||||
GPIOI->PUPDR = 0x00145555;
|
||||
/*-- FMC Configuration ------------------------------------------------------*/
|
||||
/* Enable the FMC interface clock */
|
||||
(RCC->AHB3ENR |= (RCC_AHB3ENR_FMCEN));
|
||||
/*SDRAM Timing and access interface configuration*/
|
||||
/*LoadToActiveDelay = 2
|
||||
ExitSelfRefreshDelay = 6
|
||||
SelfRefreshTime = 4
|
||||
RowCycleDelay = 6
|
||||
WriteRecoveryTime = 2
|
||||
RPDelay = 2
|
||||
RCDDelay = 2
|
||||
SDBank = FMC_SDRAM_BANK2
|
||||
ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9
|
||||
RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12
|
||||
MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_32
|
||||
InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4
|
||||
CASLatency = FMC_SDRAM_CAS_LATENCY_2
|
||||
WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE
|
||||
SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2
|
||||
ReadBurst = FMC_SDRAM_RBURST_ENABLE
|
||||
ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0*/
|
||||
|
||||
FMC_Bank5_6->SDCR[0] = 0x00001800;
|
||||
FMC_Bank5_6->SDCR[1] = 0x00000165;
|
||||
FMC_Bank5_6->SDTR[0] = 0x00105000;
|
||||
FMC_Bank5_6->SDTR[1] = 0x01010351;
|
||||
|
||||
/* SDRAM initialization sequence */
|
||||
/* Clock enable command */
|
||||
FMC_Bank5_6->SDCMR = 0x00000009;
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
/* Delay */
|
||||
for (index = 0; index<1000; index++);
|
||||
|
||||
/* PALL command */
|
||||
FMC_Bank5_6->SDCMR = 0x0000000A;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
FMC_Bank5_6->SDCMR = 0x000000EB;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
|
||||
FMC_Bank5_6->SDCMR = 0x0004400C;
|
||||
timeout = 0xFFFF;
|
||||
while((tmpreg != 0) && (timeout-- > 0))
|
||||
{
|
||||
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||
}
|
||||
/* Set refresh count */
|
||||
tmpreg = FMC_Bank5_6->SDRTR;
|
||||
FMC_Bank5_6->SDRTR = (tmpreg | (0x00000603<<1));
|
||||
|
||||
/* Disable write protection */
|
||||
tmpreg = FMC_Bank5_6->SDCR[1];
|
||||
FMC_Bank5_6->SDCR[1] = (tmpreg & 0xFFFFFDFF);
|
||||
|
||||
/*FMC controller Enable*/
|
||||
FMC_Bank1->BTCR[0] |= 0x80000000;
|
||||
|
||||
|
||||
#endif /* DATA_IN_ExtSDRAM */
|
||||
|
||||
#if defined(DATA_IN_ExtSRAM)
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHB4ENR |= 0x00000078;
|
||||
|
||||
/* Connect PDx pins to FMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A8A;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x55550545;
|
||||
|
||||
/* Connect PEx pins to FMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA828A;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x55554145;
|
||||
|
||||
/* Connect PFx pins to FMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCC0000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA000AAA;
|
||||
/* Configure PFx pins speed to 100 MHz */
|
||||
GPIOF->OSPEEDR = 0xFF000FFF;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x55000555;
|
||||
|
||||
/* Connect PGx pins to FMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||
GPIOG->AFR[1] = 0x000000C0;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0x00200AAA;
|
||||
/* Configure PGx pins speed to 100 MHz */
|
||||
GPIOG->OSPEEDR = 0x00300FFF;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00100555;
|
||||
|
||||
/*-- FMC/FSMC Configuration --------------------------------------------------*/
|
||||
/* Enable the FMC/FSMC interface clock */
|
||||
(RCC->AHB3ENR |= (RCC_AHB3ENR_FMCEN));
|
||||
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FMC_Bank1->BTCR[4] = 0x00001091;
|
||||
FMC_Bank1->BTCR[5] = 0x00110212;
|
||||
FMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
|
||||
|
||||
/*FMC controller Enable*/
|
||||
FMC_Bank1->BTCR[0] |= 0x80000000;
|
||||
|
||||
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
121
Libraries/CMSIS/Include/arm_common_tables.h
Executable file
121
Libraries/CMSIS/Include/arm_common_tables.h
Executable file
@ -0,0 +1,121 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
* Description: Extern declaration for common tables
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_H
|
||||
#define _ARM_COMMON_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
extern const uint16_t armBitRevTable[1024];
|
||||
extern const q15_t armRecipTableQ15[64];
|
||||
extern const q31_t armRecipTableQ31[64];
|
||||
extern const float32_t twiddleCoef_16[32];
|
||||
extern const float32_t twiddleCoef_32[64];
|
||||
extern const float32_t twiddleCoef_64[128];
|
||||
extern const float32_t twiddleCoef_128[256];
|
||||
extern const float32_t twiddleCoef_256[512];
|
||||
extern const float32_t twiddleCoef_512[1024];
|
||||
extern const float32_t twiddleCoef_1024[2048];
|
||||
extern const float32_t twiddleCoef_2048[4096];
|
||||
extern const float32_t twiddleCoef_4096[8192];
|
||||
#define twiddleCoef twiddleCoef_4096
|
||||
extern const q31_t twiddleCoef_16_q31[24];
|
||||
extern const q31_t twiddleCoef_32_q31[48];
|
||||
extern const q31_t twiddleCoef_64_q31[96];
|
||||
extern const q31_t twiddleCoef_128_q31[192];
|
||||
extern const q31_t twiddleCoef_256_q31[384];
|
||||
extern const q31_t twiddleCoef_512_q31[768];
|
||||
extern const q31_t twiddleCoef_1024_q31[1536];
|
||||
extern const q31_t twiddleCoef_2048_q31[3072];
|
||||
extern const q31_t twiddleCoef_4096_q31[6144];
|
||||
extern const q15_t twiddleCoef_16_q15[24];
|
||||
extern const q15_t twiddleCoef_32_q15[48];
|
||||
extern const q15_t twiddleCoef_64_q15[96];
|
||||
extern const q15_t twiddleCoef_128_q15[192];
|
||||
extern const q15_t twiddleCoef_256_q15[384];
|
||||
extern const q15_t twiddleCoef_512_q15[768];
|
||||
extern const q15_t twiddleCoef_1024_q15[1536];
|
||||
extern const q15_t twiddleCoef_2048_q15[3072];
|
||||
extern const q15_t twiddleCoef_4096_q15[6144];
|
||||
extern const float32_t twiddleCoef_rfft_32[32];
|
||||
extern const float32_t twiddleCoef_rfft_64[64];
|
||||
extern const float32_t twiddleCoef_rfft_128[128];
|
||||
extern const float32_t twiddleCoef_rfft_256[256];
|
||||
extern const float32_t twiddleCoef_rfft_512[512];
|
||||
extern const float32_t twiddleCoef_rfft_1024[1024];
|
||||
extern const float32_t twiddleCoef_rfft_2048[2048];
|
||||
extern const float32_t twiddleCoef_rfft_4096[4096];
|
||||
|
||||
/* floating-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
|
||||
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
|
||||
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
|
||||
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
|
||||
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
|
||||
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
|
||||
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
|
||||
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
|
||||
|
||||
/* fixed-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
|
||||
|
||||
/* Tables for Fast Math Sine and Cosine */
|
||||
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
|
||||
|
||||
#endif /* ARM_COMMON_TABLES_H */
|
||||
66
Libraries/CMSIS/Include/arm_const_structs.h
Executable file
66
Libraries/CMSIS/Include/arm_const_structs.h
Executable file
@ -0,0 +1,66 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
7157
Libraries/CMSIS/Include/arm_math.h
Executable file
7157
Libraries/CMSIS/Include/arm_math.h
Executable file
File diff suppressed because it is too large
Load Diff
870
Libraries/CMSIS/Include/cmsis_armcc.h
Executable file
870
Libraries/CMSIS/Include/cmsis_armcc.h
Executable file
@ -0,0 +1,870 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_armcc.h
|
||||
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_ARMCC_H
|
||||
#define __CMSIS_ARMCC_H
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
|
||||
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
|
||||
#endif
|
||||
|
||||
/* CMSIS compiler control architecture macros */
|
||||
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
|
||||
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#endif
|
||||
|
||||
/* __ARM_ARCH_8M_BASE__ not applicable */
|
||||
/* __ARM_ARCH_8M_MAIN__ not applicable */
|
||||
|
||||
|
||||
/* CMSIS compiler specific defines */
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE __inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static __inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE static __forceinline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __declspec(noreturn)
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Enable IRQ Interrupts
|
||||
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __enable_irq(); */
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable IRQ Interrupts
|
||||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __disable_irq(); */
|
||||
|
||||
/**
|
||||
\brief Get Control Register
|
||||
\details Returns the content of the Control Register.
|
||||
\return Control Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
return(__regControl);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Control Register
|
||||
\details Writes the given value to the Control Register.
|
||||
\param [in] control Control Register value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
__regControl = control;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get IPSR Register
|
||||
\details Returns the content of the IPSR Register.
|
||||
\return IPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_IPSR(void)
|
||||
{
|
||||
register uint32_t __regIPSR __ASM("ipsr");
|
||||
return(__regIPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get APSR Register
|
||||
\details Returns the content of the APSR Register.
|
||||
\return APSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
register uint32_t __regAPSR __ASM("apsr");
|
||||
return(__regAPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get xPSR Register
|
||||
\details Returns the content of the xPSR Register.
|
||||
\return xPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_xPSR(void)
|
||||
{
|
||||
register uint32_t __regXPSR __ASM("xpsr");
|
||||
return(__regXPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Process Stack Pointer
|
||||
\details Returns the current value of the Process Stack Pointer (PSP).
|
||||
\return PSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PSP(void)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
return(__regProcessStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Process Stack Pointer
|
||||
\details Assigns the given value to the Process Stack Pointer (PSP).
|
||||
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
__regProcessStackPointer = topOfProcStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Main Stack Pointer
|
||||
\details Returns the current value of the Main Stack Pointer (MSP).
|
||||
\return MSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_MSP(void)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
return(__regMainStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Main Stack Pointer
|
||||
\details Assigns the given value to the Main Stack Pointer (MSP).
|
||||
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
__regMainStackPointer = topOfMainStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Priority Mask
|
||||
\details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||||
\return Priority Mask value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
return(__regPriMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Priority Mask
|
||||
\details Assigns the given value to the Priority Mask Register.
|
||||
\param [in] priMask Priority Mask
|
||||
*/
|
||||
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
__regPriMask = (priMask);
|
||||
}
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief Enable FIQ
|
||||
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable FIQ
|
||||
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Base Priority
|
||||
\details Returns the current value of the Base Priority register.
|
||||
\return Base Priority register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
return(__regBasePri);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority
|
||||
\details Assigns the given value to the Base Priority register.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
__regBasePri = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority with condition
|
||||
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
|
||||
or the new value increases the BASEPRI priority level.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePriMax __ASM("basepri_max");
|
||||
__regBasePriMax = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Fault Mask
|
||||
\details Returns the current value of the Fault Mask register.
|
||||
\return Fault Mask register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
return(__regFaultMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Fault Mask
|
||||
\details Assigns the given value to the Fault Mask register.
|
||||
\param [in] faultMask Fault Mask value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
__regFaultMask = (faultMask & (uint32_t)1U);
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief Get FPSCR
|
||||
\details Returns the current value of the Floating Point Status/Control register.
|
||||
\return Floating Point Status/Control register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
return(__regfpscr);
|
||||
#else
|
||||
return(0U);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set FPSCR
|
||||
\details Assigns the given value to the Floating Point Status/Control register.
|
||||
\param [in] fpscr Floating Point Status/Control value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
__regfpscr = (fpscr);
|
||||
#else
|
||||
(void)fpscr;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
|
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */
|
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief No Operation
|
||||
\details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||
*/
|
||||
#define __NOP __nop
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Interrupt
|
||||
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFI __wfi
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Event
|
||||
\details Wait For Event is a hint instruction that permits the processor to enter
|
||||
a low-power state until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFE __wfe
|
||||
|
||||
|
||||
/**
|
||||
\brief Send Event
|
||||
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||
*/
|
||||
#define __SEV __sev
|
||||
|
||||
|
||||
/**
|
||||
\brief Instruction Synchronization Barrier
|
||||
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or memory,
|
||||
after the instruction has been completed.
|
||||
*/
|
||||
#define __ISB() do {\
|
||||
__schedule_barrier();\
|
||||
__isb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Synchronization Barrier
|
||||
\details Acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
#define __DSB() do {\
|
||||
__schedule_barrier();\
|
||||
__dsb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Memory Barrier
|
||||
\details Ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
#define __DMB() do {\
|
||||
__schedule_barrier();\
|
||||
__dmb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (32 bit)
|
||||
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#define __REV __rev
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
|
||||
{
|
||||
rev16 r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
|
||||
{
|
||||
revsh r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right in unsigned value (32 bit)
|
||||
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||
\param [in] op1 Value to rotate
|
||||
\param [in] op2 Number of Bits to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#define __ROR __ror
|
||||
|
||||
|
||||
/**
|
||||
\brief Breakpoint
|
||||
\details Causes the processor to enter Debug state.
|
||||
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
|
||||
\param [in] value is ignored by the processor.
|
||||
If required, a debugger can use it to store additional information about the breakpoint.
|
||||
*/
|
||||
#define __BKPT(value) __breakpoint(value)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse bit order of value
|
||||
\details Reverses the bit order of the given value.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
#define __RBIT __rbit
|
||||
#else
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
||||
|
||||
result = value; /* r will be reversed bits of v; first get LSB of v */
|
||||
for (value >>= 1U; value != 0U; value >>= 1U)
|
||||
{
|
||||
result <<= 1U;
|
||||
result |= value & 1U;
|
||||
s--;
|
||||
}
|
||||
result <<= s; /* shift when v's highest bits are zero */
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Count leading zeros
|
||||
\details Counts the number of leading zeros of a data value.
|
||||
\param [in] value Value to count the leading zeros
|
||||
\return number of leading zeros in value
|
||||
*/
|
||||
#define __CLZ __clz
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (8 bit)
|
||||
\details Executes a exclusive LDR instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (16 bit)
|
||||
\details Executes a exclusive LDR instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (32 bit)
|
||||
\details Executes a exclusive LDR instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (8 bit)
|
||||
\details Executes a exclusive STR instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXB(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (16 bit)
|
||||
\details Executes a exclusive STR instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXH(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (32 bit)
|
||||
\details Executes a exclusive STR instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXW(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Remove the exclusive lock
|
||||
\details Removes the exclusive lock which is created by LDREX.
|
||||
*/
|
||||
#define __CLREX __clrex
|
||||
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __SSAT __ssat
|
||||
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __USAT __usat
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right with Extend (32 bit)
|
||||
\details Moves each bit of a bitstring right by one bit.
|
||||
The carry input is shifted in at the left end of the bitstring.
|
||||
\param [in] value Value to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
rrx r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRBT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRHT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRT(value, ptr) __strt(value, ptr)
|
||||
|
||||
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
#define __SADD8 __sadd8
|
||||
#define __QADD8 __qadd8
|
||||
#define __SHADD8 __shadd8
|
||||
#define __UADD8 __uadd8
|
||||
#define __UQADD8 __uqadd8
|
||||
#define __UHADD8 __uhadd8
|
||||
#define __SSUB8 __ssub8
|
||||
#define __QSUB8 __qsub8
|
||||
#define __SHSUB8 __shsub8
|
||||
#define __USUB8 __usub8
|
||||
#define __UQSUB8 __uqsub8
|
||||
#define __UHSUB8 __uhsub8
|
||||
#define __SADD16 __sadd16
|
||||
#define __QADD16 __qadd16
|
||||
#define __SHADD16 __shadd16
|
||||
#define __UADD16 __uadd16
|
||||
#define __UQADD16 __uqadd16
|
||||
#define __UHADD16 __uhadd16
|
||||
#define __SSUB16 __ssub16
|
||||
#define __QSUB16 __qsub16
|
||||
#define __SHSUB16 __shsub16
|
||||
#define __USUB16 __usub16
|
||||
#define __UQSUB16 __uqsub16
|
||||
#define __UHSUB16 __uhsub16
|
||||
#define __SASX __sasx
|
||||
#define __QASX __qasx
|
||||
#define __SHASX __shasx
|
||||
#define __UASX __uasx
|
||||
#define __UQASX __uqasx
|
||||
#define __UHASX __uhasx
|
||||
#define __SSAX __ssax
|
||||
#define __QSAX __qsax
|
||||
#define __SHSAX __shsax
|
||||
#define __USAX __usax
|
||||
#define __UQSAX __uqsax
|
||||
#define __UHSAX __uhsax
|
||||
#define __USAD8 __usad8
|
||||
#define __USADA8 __usada8
|
||||
#define __SSAT16 __ssat16
|
||||
#define __USAT16 __usat16
|
||||
#define __UXTB16 __uxtb16
|
||||
#define __UXTAB16 __uxtab16
|
||||
#define __SXTB16 __sxtb16
|
||||
#define __SXTAB16 __sxtab16
|
||||
#define __SMUAD __smuad
|
||||
#define __SMUADX __smuadx
|
||||
#define __SMLAD __smlad
|
||||
#define __SMLADX __smladx
|
||||
#define __SMLALD __smlald
|
||||
#define __SMLALDX __smlaldx
|
||||
#define __SMUSD __smusd
|
||||
#define __SMUSDX __smusdx
|
||||
#define __SMLSD __smlsd
|
||||
#define __SMLSDX __smlsdx
|
||||
#define __SMLSLD __smlsld
|
||||
#define __SMLSLDX __smlsldx
|
||||
#define __SEL __sel
|
||||
#define __QADD __qadd
|
||||
#define __QSUB __qsub
|
||||
|
||||
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
|
||||
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
|
||||
|
||||
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
|
||||
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
|
||||
|
||||
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
|
||||
((int64_t)(ARG3) << 32U) ) >> 32U))
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#endif /* __CMSIS_ARMCC_H */
|
||||
1877
Libraries/CMSIS/Include/cmsis_armclang.h
Executable file
1877
Libraries/CMSIS/Include/cmsis_armclang.h
Executable file
File diff suppressed because it is too large
Load Diff
266
Libraries/CMSIS/Include/cmsis_compiler.h
Executable file
266
Libraries/CMSIS/Include/cmsis_compiler.h
Executable file
@ -0,0 +1,266 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
2088
Libraries/CMSIS/Include/cmsis_gcc.h
Executable file
2088
Libraries/CMSIS/Include/cmsis_gcc.h
Executable file
File diff suppressed because it is too large
Load Diff
913
Libraries/CMSIS/Include/cmsis_iccarm.h
Executable file
913
Libraries/CMSIS/Include/cmsis_iccarm.h
Executable file
@ -0,0 +1,913 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_iccarm.h
|
||||
* @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
|
||||
* @version V5.0.5
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2017-2018 IAR Systems
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License")
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#ifndef __CMSIS_ICCARM_H__
|
||||
#define __CMSIS_ICCARM_H__
|
||||
|
||||
#ifndef __ICCARM__
|
||||
#error This file should only be compiled by ICCARM
|
||||
#endif
|
||||
|
||||
#pragma system_include
|
||||
|
||||
#define __IAR_FT _Pragma("inline=forced") __intrinsic
|
||||
|
||||
#if (__VER__ >= 8000000)
|
||||
#define __ICCARM_V8 1
|
||||
#else
|
||||
#define __ICCARM_V8 0
|
||||
#endif
|
||||
|
||||
#ifndef __ALIGNED
|
||||
#if __ICCARM_V8
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#elif (__VER__ >= 7080000)
|
||||
/* Needs IAR language extensions */
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#else
|
||||
#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define compiler macros for CPU architecture, used in CMSIS 5.
|
||||
*/
|
||||
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
|
||||
/* Macros already defined */
|
||||
#else
|
||||
#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
|
||||
#if __ARM_ARCH == 6
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif __ARM_ARCH == 7
|
||||
#if __ARM_FEATURE_DSP
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#else
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
#endif /* __ARM_ARCH */
|
||||
#endif /* __ARM_ARCH_PROFILE == 'M' */
|
||||
#endif
|
||||
|
||||
/* Alternativ core deduction for older ICCARM's */
|
||||
#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
|
||||
!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
|
||||
#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#else
|
||||
#error "Unknown target."
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#else
|
||||
#define __IAR_M0_FAMILY 0
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
|
||||
#ifndef __NO_RETURN
|
||||
#if __ICCARM_V8
|
||||
#define __NO_RETURN __attribute__((__noreturn__))
|
||||
#else
|
||||
#define __NO_RETURN _Pragma("object_attribute=__noreturn")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED __packed
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_STRUCT
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_UNION
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT restrict
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
|
||||
#ifndef __FORCEINLINE
|
||||
#define __FORCEINLINE _Pragma("inline=forced")
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint16_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
|
||||
{
|
||||
*(__packed uint16_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint32_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
|
||||
{
|
||||
*(__packed uint32_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__packed struct __iar_u32 { uint32_t v; };
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
|
||||
#endif
|
||||
|
||||
#ifndef __USED
|
||||
#if __ICCARM_V8
|
||||
#define __USED __attribute__((used))
|
||||
#else
|
||||
#define __USED _Pragma("__root")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __WEAK
|
||||
#if __ICCARM_V8
|
||||
#define __WEAK __attribute__((weak))
|
||||
#else
|
||||
#define __WEAK _Pragma("__weak")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ICCARM_INTRINSICS_VERSION__
|
||||
#define __ICCARM_INTRINSICS_VERSION__ 0
|
||||
#endif
|
||||
|
||||
#if __ICCARM_INTRINSICS_VERSION__ == 2
|
||||
|
||||
#if defined(__CLZ)
|
||||
#undef __CLZ
|
||||
#endif
|
||||
#if defined(__REVSH)
|
||||
#undef __REVSH
|
||||
#endif
|
||||
#if defined(__RBIT)
|
||||
#undef __RBIT
|
||||
#endif
|
||||
#if defined(__SSAT)
|
||||
#undef __SSAT
|
||||
#endif
|
||||
#if defined(__USAT)
|
||||
#undef __USAT
|
||||
#endif
|
||||
|
||||
#include "iccarm_builtin.h"
|
||||
|
||||
#define __disable_fault_irq __iar_builtin_disable_fiq
|
||||
#define __disable_irq __iar_builtin_disable_interrupt
|
||||
#define __enable_fault_irq __iar_builtin_enable_fiq
|
||||
#define __enable_irq __iar_builtin_enable_interrupt
|
||||
#define __arm_rsr __iar_builtin_rsr
|
||||
#define __arm_wsr __iar_builtin_wsr
|
||||
|
||||
|
||||
#define __get_APSR() (__arm_rsr("APSR"))
|
||||
#define __get_BASEPRI() (__arm_rsr("BASEPRI"))
|
||||
#define __get_CONTROL() (__arm_rsr("CONTROL"))
|
||||
#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
|
||||
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
#define __get_FPSCR() (__arm_rsr("FPSCR"))
|
||||
#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
|
||||
#else
|
||||
#define __get_FPSCR() ( 0 )
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#define __get_IPSR() (__arm_rsr("IPSR"))
|
||||
#define __get_MSP() (__arm_rsr("MSP"))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __get_MSPLIM() (0U)
|
||||
#else
|
||||
#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
|
||||
#endif
|
||||
#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
|
||||
#define __get_PSP() (__arm_rsr("PSP"))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __get_PSPLIM() (0U)
|
||||
#else
|
||||
#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
|
||||
#endif
|
||||
|
||||
#define __get_xPSR() (__arm_rsr("xPSR"))
|
||||
|
||||
#define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
|
||||
#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
|
||||
#define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
|
||||
#define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
|
||||
#define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __set_MSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
|
||||
#endif
|
||||
#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
|
||||
#define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __set_PSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
|
||||
#endif
|
||||
|
||||
#define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
|
||||
#define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
|
||||
#define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
|
||||
#define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
|
||||
#define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
|
||||
#define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
|
||||
#define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
|
||||
#define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
|
||||
#define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
|
||||
#define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
|
||||
#define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
|
||||
#define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
|
||||
#define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
|
||||
#define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
|
||||
#define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
|
||||
#define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
|
||||
#define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
|
||||
#define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
|
||||
|
||||
#define __NOP __iar_builtin_no_operation
|
||||
|
||||
#define __CLZ __iar_builtin_CLZ
|
||||
#define __CLREX __iar_builtin_CLREX
|
||||
|
||||
#define __DMB __iar_builtin_DMB
|
||||
#define __DSB __iar_builtin_DSB
|
||||
#define __ISB __iar_builtin_ISB
|
||||
|
||||
#define __LDREXB __iar_builtin_LDREXB
|
||||
#define __LDREXH __iar_builtin_LDREXH
|
||||
#define __LDREXW __iar_builtin_LDREX
|
||||
|
||||
#define __RBIT __iar_builtin_RBIT
|
||||
#define __REV __iar_builtin_REV
|
||||
#define __REV16 __iar_builtin_REV16
|
||||
|
||||
__IAR_FT int16_t __REVSH(int16_t val)
|
||||
{
|
||||
return (int16_t) __iar_builtin_REVSH(val);
|
||||
}
|
||||
|
||||
#define __ROR __iar_builtin_ROR
|
||||
#define __RRX __iar_builtin_RRX
|
||||
|
||||
#define __SEV __iar_builtin_SEV
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __SSAT __iar_builtin_SSAT
|
||||
#endif
|
||||
|
||||
#define __STREXB __iar_builtin_STREXB
|
||||
#define __STREXH __iar_builtin_STREXH
|
||||
#define __STREXW __iar_builtin_STREX
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __USAT __iar_builtin_USAT
|
||||
#endif
|
||||
|
||||
#define __WFE __iar_builtin_WFE
|
||||
#define __WFI __iar_builtin_WFI
|
||||
|
||||
#if __ARM_MEDIA__
|
||||
#define __SADD8 __iar_builtin_SADD8
|
||||
#define __QADD8 __iar_builtin_QADD8
|
||||
#define __SHADD8 __iar_builtin_SHADD8
|
||||
#define __UADD8 __iar_builtin_UADD8
|
||||
#define __UQADD8 __iar_builtin_UQADD8
|
||||
#define __UHADD8 __iar_builtin_UHADD8
|
||||
#define __SSUB8 __iar_builtin_SSUB8
|
||||
#define __QSUB8 __iar_builtin_QSUB8
|
||||
#define __SHSUB8 __iar_builtin_SHSUB8
|
||||
#define __USUB8 __iar_builtin_USUB8
|
||||
#define __UQSUB8 __iar_builtin_UQSUB8
|
||||
#define __UHSUB8 __iar_builtin_UHSUB8
|
||||
#define __SADD16 __iar_builtin_SADD16
|
||||
#define __QADD16 __iar_builtin_QADD16
|
||||
#define __SHADD16 __iar_builtin_SHADD16
|
||||
#define __UADD16 __iar_builtin_UADD16
|
||||
#define __UQADD16 __iar_builtin_UQADD16
|
||||
#define __UHADD16 __iar_builtin_UHADD16
|
||||
#define __SSUB16 __iar_builtin_SSUB16
|
||||
#define __QSUB16 __iar_builtin_QSUB16
|
||||
#define __SHSUB16 __iar_builtin_SHSUB16
|
||||
#define __USUB16 __iar_builtin_USUB16
|
||||
#define __UQSUB16 __iar_builtin_UQSUB16
|
||||
#define __UHSUB16 __iar_builtin_UHSUB16
|
||||
#define __SASX __iar_builtin_SASX
|
||||
#define __QASX __iar_builtin_QASX
|
||||
#define __SHASX __iar_builtin_SHASX
|
||||
#define __UASX __iar_builtin_UASX
|
||||
#define __UQASX __iar_builtin_UQASX
|
||||
#define __UHASX __iar_builtin_UHASX
|
||||
#define __SSAX __iar_builtin_SSAX
|
||||
#define __QSAX __iar_builtin_QSAX
|
||||
#define __SHSAX __iar_builtin_SHSAX
|
||||
#define __USAX __iar_builtin_USAX
|
||||
#define __UQSAX __iar_builtin_UQSAX
|
||||
#define __UHSAX __iar_builtin_UHSAX
|
||||
#define __USAD8 __iar_builtin_USAD8
|
||||
#define __USADA8 __iar_builtin_USADA8
|
||||
#define __SSAT16 __iar_builtin_SSAT16
|
||||
#define __USAT16 __iar_builtin_USAT16
|
||||
#define __UXTB16 __iar_builtin_UXTB16
|
||||
#define __UXTAB16 __iar_builtin_UXTAB16
|
||||
#define __SXTB16 __iar_builtin_SXTB16
|
||||
#define __SXTAB16 __iar_builtin_SXTAB16
|
||||
#define __SMUAD __iar_builtin_SMUAD
|
||||
#define __SMUADX __iar_builtin_SMUADX
|
||||
#define __SMMLA __iar_builtin_SMMLA
|
||||
#define __SMLAD __iar_builtin_SMLAD
|
||||
#define __SMLADX __iar_builtin_SMLADX
|
||||
#define __SMLALD __iar_builtin_SMLALD
|
||||
#define __SMLALDX __iar_builtin_SMLALDX
|
||||
#define __SMUSD __iar_builtin_SMUSD
|
||||
#define __SMUSDX __iar_builtin_SMUSDX
|
||||
#define __SMLSD __iar_builtin_SMLSD
|
||||
#define __SMLSDX __iar_builtin_SMLSDX
|
||||
#define __SMLSLD __iar_builtin_SMLSLD
|
||||
#define __SMLSLDX __iar_builtin_SMLSLDX
|
||||
#define __SEL __iar_builtin_SEL
|
||||
#define __QADD __iar_builtin_QADD
|
||||
#define __QSUB __iar_builtin_QSUB
|
||||
#define __PKHBT __iar_builtin_PKHBT
|
||||
#define __PKHTB __iar_builtin_PKHTB
|
||||
#endif
|
||||
|
||||
#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#define __CLZ __cmsis_iar_clz_not_active
|
||||
#define __SSAT __cmsis_iar_ssat_not_active
|
||||
#define __USAT __cmsis_iar_usat_not_active
|
||||
#define __RBIT __cmsis_iar_rbit_not_active
|
||||
#define __get_APSR __cmsis_iar_get_APSR_not_active
|
||||
#endif
|
||||
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
|
||||
#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
|
||||
#endif
|
||||
|
||||
#ifdef __INTRINSICS_INCLUDED
|
||||
#error intrinsics.h is already included previously!
|
||||
#endif
|
||||
|
||||
#include <intrinsics.h>
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#undef __CLZ
|
||||
#undef __SSAT
|
||||
#undef __USAT
|
||||
#undef __RBIT
|
||||
#undef __get_APSR
|
||||
|
||||
__STATIC_INLINE uint8_t __CLZ(uint32_t data)
|
||||
{
|
||||
if (data == 0U) { return 32U; }
|
||||
|
||||
uint32_t count = 0U;
|
||||
uint32_t mask = 0x80000000U;
|
||||
|
||||
while ((data & mask) == 0U)
|
||||
{
|
||||
count += 1U;
|
||||
mask = mask >> 1U;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __RBIT(uint32_t v)
|
||||
{
|
||||
uint8_t sc = 31U;
|
||||
uint32_t r = v;
|
||||
for (v >>= 1U; v; v >>= 1U)
|
||||
{
|
||||
r <<= 1U;
|
||||
r |= v & 1U;
|
||||
sc--;
|
||||
}
|
||||
return (r << sc);
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm("MRS %0,APSR" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#undef __get_FPSCR
|
||||
#undef __set_FPSCR
|
||||
#define __get_FPSCR() (0)
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#pragma diag_suppress=Pe940
|
||||
#pragma diag_suppress=Pe177
|
||||
|
||||
#define __enable_irq __enable_interrupt
|
||||
#define __disable_irq __disable_interrupt
|
||||
#define __NOP __no_operation
|
||||
|
||||
#define __get_xPSR __get_PSR
|
||||
|
||||
#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
|
||||
|
||||
__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
|
||||
{
|
||||
return __LDREX((unsigned long *)ptr);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
|
||||
{
|
||||
return __STREX(value, (unsigned long *)ptr);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
#if (__CORTEX_M >= 0x03)
|
||||
|
||||
__IAR_FT uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
|
||||
return(result);
|
||||
}
|
||||
|
||||
__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
|
||||
}
|
||||
|
||||
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||||
{
|
||||
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
|
||||
}
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
__IAR_FT uint32_t __get_MSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,MSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_MSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR MSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __get_PSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,PSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_PSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR PSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_SP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,SP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
__IAR_FT void __TZ_set_SP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR SP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
|
||||
__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
|
||||
{
|
||||
__ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
|
||||
{
|
||||
__ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
|
||||
{
|
||||
__ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
|
||||
__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#undef __IAR_FT
|
||||
#undef __IAR_M0_FAMILY
|
||||
#undef __ICCARM_V8
|
||||
|
||||
#pragma diag_default=Pe940
|
||||
#pragma diag_default=Pe177
|
||||
|
||||
#endif /* __CMSIS_ICCARM_H__ */
|
||||
39
Libraries/CMSIS/Include/cmsis_version.h
Executable file
39
Libraries/CMSIS/Include/cmsis_version.h
Executable file
@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.2
|
||||
* @date 19. April 2017
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
1896
Libraries/CMSIS/Include/core_armv8mbl.h
Executable file
1896
Libraries/CMSIS/Include/core_armv8mbl.h
Executable file
File diff suppressed because it is too large
Load Diff
2960
Libraries/CMSIS/Include/core_armv8mml.h
Executable file
2960
Libraries/CMSIS/Include/core_armv8mml.h
Executable file
File diff suppressed because it is too large
Load Diff
888
Libraries/CMSIS/Include/core_cm0.h
Executable file
888
Libraries/CMSIS/Include/core_cm0.h
Executable file
@ -0,0 +1,888 @@
|
||||
/**************************************************************************//**
|
||||
* @file core_cm0.h
|
||||
* @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File
|
||||
* @version V5.0.3
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CORE_CM0_H_GENERIC
|
||||
#define __CORE_CM0_H_GENERIC
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
\page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
|
||||
CMSIS violates the following MISRA-C:2004 rules:
|
||||
|
||||
\li Required Rule 8.5, object/function definition in header file.<br>
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
|
||||
\li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
|
||||
Unions are used for effective representation of core registers.
|
||||
|
||||
\li Advisory Rule 19.7, Function-like macro defined.<br>
|
||||
Function-like macros are used to allow more efficient code.
|
||||
*/
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* CMSIS definitions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\ingroup Cortex_M0
|
||||
@{
|
||||
*/
|
||||
|
||||
#include "cmsis_version.h"
|
||||
|
||||
/* CMSIS CM0 definitions */
|
||||
#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
|
||||
#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
|
||||
#define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */
|
||||
|
||||
#define __CORTEX_M (0U) /*!< Cortex-M Core */
|
||||
|
||||
/** __FPU_USED indicates whether an FPU is used or not.
|
||||
This core does not support an FPU at all
|
||||
*/
|
||||
#define __FPU_USED 0U
|
||||
|
||||
#if defined ( __CC_ARM )
|
||||
#if defined __TARGET_FPU_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#if defined __ARM_PCS_VFP
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
#if defined __ARMVFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#if defined __TI_VFP_SUPPORT__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __TASKING__ )
|
||||
#if defined __FPU_VFP__
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#elif defined ( __CSMC__ )
|
||||
#if ( __CSMC__ & 0x400U)
|
||||
#error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#include "cmsis_compiler.h" /* CMSIS compiler specific defines */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0_H_GENERIC */
|
||||
|
||||
#ifndef __CMSIS_GENERIC
|
||||
|
||||
#ifndef __CORE_CM0_H_DEPENDANT
|
||||
#define __CORE_CM0_H_DEPENDANT
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* check device defines and use defaults */
|
||||
#if defined __CHECK_DEVICE_DEFINES
|
||||
#ifndef __CM0_REV
|
||||
#define __CM0_REV 0x0000U
|
||||
#warning "__CM0_REV not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __NVIC_PRIO_BITS
|
||||
#define __NVIC_PRIO_BITS 2U
|
||||
#warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
|
||||
#endif
|
||||
|
||||
#ifndef __Vendor_SysTickConfig
|
||||
#define __Vendor_SysTickConfig 0U
|
||||
#warning "__Vendor_SysTickConfig not defined in device header file; using default!"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* IO definitions (access restrictions to peripheral registers) */
|
||||
/**
|
||||
\defgroup CMSIS_glob_defs CMSIS Global Defines
|
||||
|
||||
<strong>IO Type Qualifiers</strong> are used
|
||||
\li to specify the access to peripheral variables.
|
||||
\li for automatic generation of peripheral register debug information.
|
||||
*/
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /*!< Defines 'read only' permissions */
|
||||
#else
|
||||
#define __I volatile const /*!< Defines 'read only' permissions */
|
||||
#endif
|
||||
#define __O volatile /*!< Defines 'write only' permissions */
|
||||
#define __IO volatile /*!< Defines 'read / write' permissions */
|
||||
|
||||
/* following defines should be used for structure members */
|
||||
#define __IM volatile const /*! Defines 'read only' structure member permissions */
|
||||
#define __OM volatile /*! Defines 'write only' structure member permissions */
|
||||
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
|
||||
|
||||
/*@} end of group Cortex_M0 */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Register Abstraction
|
||||
Core Register contain:
|
||||
- Core Register
|
||||
- Core NVIC Register
|
||||
- Core SCB Register
|
||||
- Core SysTick Register
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_core_register Defines and Type Definitions
|
||||
\brief Type definitions and defines for Cortex-M processor based devices.
|
||||
*/
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CORE Status and Control Registers
|
||||
\brief Core Register type definitions.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Union type to access the Application Program Status Register (APSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} APSR_Type;
|
||||
|
||||
/* APSR Register Definitions */
|
||||
#define APSR_N_Pos 31U /*!< APSR: N Position */
|
||||
#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */
|
||||
|
||||
#define APSR_Z_Pos 30U /*!< APSR: Z Position */
|
||||
#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */
|
||||
|
||||
#define APSR_C_Pos 29U /*!< APSR: C Position */
|
||||
#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */
|
||||
|
||||
#define APSR_V_Pos 28U /*!< APSR: V Position */
|
||||
#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Interrupt Program Status Register (IPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} IPSR_Type;
|
||||
|
||||
/* IPSR Register Definitions */
|
||||
#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */
|
||||
#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Special-Purpose Program Status Registers (xPSR).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */
|
||||
uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */
|
||||
uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */
|
||||
uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */
|
||||
uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
|
||||
uint32_t C:1; /*!< bit: 29 Carry condition code flag */
|
||||
uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
|
||||
uint32_t N:1; /*!< bit: 31 Negative condition code flag */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} xPSR_Type;
|
||||
|
||||
/* xPSR Register Definitions */
|
||||
#define xPSR_N_Pos 31U /*!< xPSR: N Position */
|
||||
#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */
|
||||
|
||||
#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */
|
||||
#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */
|
||||
|
||||
#define xPSR_C_Pos 29U /*!< xPSR: C Position */
|
||||
#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */
|
||||
|
||||
#define xPSR_V_Pos 28U /*!< xPSR: V Position */
|
||||
#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */
|
||||
|
||||
#define xPSR_T_Pos 24U /*!< xPSR: T Position */
|
||||
#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */
|
||||
|
||||
#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */
|
||||
#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */
|
||||
|
||||
|
||||
/**
|
||||
\brief Union type to access the Control Registers (CONTROL).
|
||||
*/
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
uint32_t _reserved0:1; /*!< bit: 0 Reserved */
|
||||
uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */
|
||||
uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */
|
||||
} b; /*!< Structure used for bit access */
|
||||
uint32_t w; /*!< Type used for word access */
|
||||
} CONTROL_Type;
|
||||
|
||||
/* CONTROL Register Definitions */
|
||||
#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */
|
||||
#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */
|
||||
|
||||
/*@} end of group CMSIS_CORE */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC)
|
||||
\brief Type definitions for the NVIC Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the Nested Vectored Interrupt Controller (NVIC).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */
|
||||
uint32_t RESERVED0[31U];
|
||||
__IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */
|
||||
uint32_t RSERVED1[31U];
|
||||
__IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */
|
||||
uint32_t RESERVED2[31U];
|
||||
__IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */
|
||||
uint32_t RESERVED3[31U];
|
||||
uint32_t RESERVED4[64U];
|
||||
__IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */
|
||||
} NVIC_Type;
|
||||
|
||||
/*@} end of group CMSIS_NVIC */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SCB System Control Block (SCB)
|
||||
\brief Type definitions for the System Control Block Registers
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Control Block (SCB).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
|
||||
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
|
||||
uint32_t RESERVED0;
|
||||
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
|
||||
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
|
||||
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
|
||||
uint32_t RESERVED1;
|
||||
__IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */
|
||||
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
|
||||
} SCB_Type;
|
||||
|
||||
/* SCB CPUID Register Definitions */
|
||||
#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */
|
||||
#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */
|
||||
|
||||
#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */
|
||||
#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */
|
||||
|
||||
#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */
|
||||
#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */
|
||||
|
||||
#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */
|
||||
#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */
|
||||
|
||||
#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */
|
||||
#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */
|
||||
|
||||
/* SCB Interrupt Control State Register Definitions */
|
||||
#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */
|
||||
#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */
|
||||
#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */
|
||||
#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
|
||||
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
|
||||
|
||||
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
|
||||
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */
|
||||
#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */
|
||||
|
||||
#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */
|
||||
#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */
|
||||
#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */
|
||||
|
||||
#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */
|
||||
#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */
|
||||
|
||||
/* SCB Application Interrupt and Reset Control Register Definitions */
|
||||
#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */
|
||||
#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */
|
||||
#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */
|
||||
|
||||
#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */
|
||||
#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */
|
||||
|
||||
#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */
|
||||
#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */
|
||||
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */
|
||||
#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */
|
||||
|
||||
/* SCB System Control Register Definitions */
|
||||
#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */
|
||||
#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */
|
||||
#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */
|
||||
|
||||
#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */
|
||||
#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */
|
||||
|
||||
/* SCB Configuration Control Register Definitions */
|
||||
#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */
|
||||
#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */
|
||||
|
||||
#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */
|
||||
#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */
|
||||
|
||||
/* SCB System Handler Control and State Register Definitions */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */
|
||||
#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */
|
||||
|
||||
/*@} end of group CMSIS_SCB */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_SysTick System Tick Timer (SysTick)
|
||||
\brief Type definitions for the System Timer Registers.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Structure type to access the System Timer (SysTick).
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
|
||||
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
|
||||
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
|
||||
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
|
||||
} SysTick_Type;
|
||||
|
||||
/* SysTick Control / Status Register Definitions */
|
||||
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
|
||||
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
|
||||
|
||||
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
|
||||
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
|
||||
|
||||
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
|
||||
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
|
||||
|
||||
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
|
||||
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
|
||||
|
||||
/* SysTick Reload Register Definitions */
|
||||
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
|
||||
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
|
||||
|
||||
/* SysTick Current Register Definitions */
|
||||
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
|
||||
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
|
||||
|
||||
/* SysTick Calibration Register Definitions */
|
||||
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
|
||||
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
|
||||
|
||||
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
|
||||
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
|
||||
|
||||
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
|
||||
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
|
||||
|
||||
/*@} end of group CMSIS_SysTick */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
|
||||
\brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
|
||||
Therefore they are not covered by the Cortex-M0 header file.
|
||||
@{
|
||||
*/
|
||||
/*@} end of group CMSIS_CoreDebug */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_bitfield Core register bit field macros
|
||||
\brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Mask and shift a bit field value for use in a register bit range.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
|
||||
\return Masked and shifted value.
|
||||
*/
|
||||
#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
|
||||
|
||||
/**
|
||||
\brief Mask and shift a register value to extract a bit filed value.
|
||||
\param[in] field Name of the register bit field.
|
||||
\param[in] value Value of register. This parameter is interpreted as an uint32_t type.
|
||||
\return Masked and shifted bit field value.
|
||||
*/
|
||||
#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
|
||||
|
||||
/*@} end of group CMSIS_core_bitfield */
|
||||
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_core_register
|
||||
\defgroup CMSIS_core_base Core Definitions
|
||||
\brief Definitions for base addresses, unions, and structures.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Memory mapping of Core Hardware */
|
||||
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
|
||||
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
|
||||
#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
|
||||
|
||||
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
|
||||
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
|
||||
#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */
|
||||
|
||||
|
||||
/*@} */
|
||||
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Hardware Abstraction Layer
|
||||
Core Function Interface contains:
|
||||
- Core NVIC Functions
|
||||
- Core SysTick Functions
|
||||
- Core Register Access Functions
|
||||
******************************************************************************/
|
||||
/**
|
||||
\defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/* ########################## NVIC functions #################################### */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_NVICFunctions NVIC Functions
|
||||
\brief Functions that manage interrupts and exceptions via the NVIC.
|
||||
@{
|
||||
*/
|
||||
|
||||
#ifdef CMSIS_NVIC_VIRTUAL
|
||||
#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
|
||||
#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
|
||||
#endif
|
||||
#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
|
||||
#else
|
||||
/*#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping not available for Cortex-M0 */
|
||||
/*#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping not available for Cortex-M0 */
|
||||
#define NVIC_EnableIRQ __NVIC_EnableIRQ
|
||||
#define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ
|
||||
#define NVIC_DisableIRQ __NVIC_DisableIRQ
|
||||
#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
|
||||
#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
|
||||
#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
|
||||
/*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */
|
||||
#define NVIC_SetPriority __NVIC_SetPriority
|
||||
#define NVIC_GetPriority __NVIC_GetPriority
|
||||
#define NVIC_SystemReset __NVIC_SystemReset
|
||||
#endif /* CMSIS_NVIC_VIRTUAL */
|
||||
|
||||
#ifdef CMSIS_VECTAB_VIRTUAL
|
||||
#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
|
||||
#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
|
||||
#endif
|
||||
#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
|
||||
#else
|
||||
#define NVIC_SetVector __NVIC_SetVector
|
||||
#define NVIC_GetVector __NVIC_GetVector
|
||||
#endif /* (CMSIS_VECTAB_VIRTUAL) */
|
||||
|
||||
#define NVIC_USER_IRQ_OFFSET 16
|
||||
|
||||
|
||||
/* Interrupt Priorities are WORD accessible only under Armv6-M */
|
||||
/* The following MACROS handle generation of the register offset and byte masks */
|
||||
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
|
||||
#define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
|
||||
#define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable Interrupt
|
||||
\details Enables a device specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Enable status
|
||||
\details Returns a device specific interrupt enable status from the NVIC interrupt controller.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\return 0 Interrupt is not enabled.
|
||||
\return 1 Interrupt is enabled.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
else
|
||||
{
|
||||
return(0U);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable Interrupt
|
||||
\details Disables a device specific interrupt in the NVIC interrupt controller.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Pending Interrupt
|
||||
\details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\return 0 Interrupt status is not pending.
|
||||
\return 1 Interrupt status is pending.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
|
||||
}
|
||||
else
|
||||
{
|
||||
return(0U);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Pending Interrupt
|
||||
\details Sets the pending bit of a device specific interrupt in the NVIC pending register.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clear Pending Interrupt
|
||||
\details Clears the pending bit of a device specific interrupt in the NVIC pending register.
|
||||
\param [in] IRQn Device specific interrupt number.
|
||||
\note IRQn must not be negative.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Interrupt Priority
|
||||
\details Sets the priority of a device specific interrupt or a processor exception.
|
||||
The interrupt number can be positive to specify a device specific interrupt,
|
||||
or negative to specify a processor exception.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\param [in] priority Priority to set.
|
||||
\note The priority cannot be set for every processor exception.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
||||
{
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
else
|
||||
{
|
||||
SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
|
||||
(((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Priority
|
||||
\details Reads the priority of a device specific interrupt or a processor exception.
|
||||
The interrupt number can be positive to specify a device specific interrupt,
|
||||
or negative to specify a processor exception.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return Interrupt Priority.
|
||||
Value is aligned automatically to the implemented priority bits of the microcontroller.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
|
||||
{
|
||||
|
||||
if ((int32_t)(IRQn) >= 0)
|
||||
{
|
||||
return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
else
|
||||
{
|
||||
return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Interrupt Vector
|
||||
\details Sets an interrupt vector in SRAM based interrupt vector table.
|
||||
The interrupt number can be positive to specify a device specific interrupt,
|
||||
or negative to specify a processor exception.
|
||||
Address 0 must be mapped to SRAM.
|
||||
\param [in] IRQn Interrupt number
|
||||
\param [in] vector Address of interrupt handler function
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t *)0x0U;
|
||||
vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Interrupt Vector
|
||||
\details Reads an interrupt vector from interrupt vector table.
|
||||
The interrupt number can be positive to specify a device specific interrupt,
|
||||
or negative to specify a processor exception.
|
||||
\param [in] IRQn Interrupt number.
|
||||
\return Address of interrupt handler function
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t *)0x0U;
|
||||
return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief System Reset
|
||||
\details Initiates a system reset request to reset the MCU.
|
||||
*/
|
||||
__STATIC_INLINE void __NVIC_SystemReset(void)
|
||||
{
|
||||
__DSB(); /* Ensure all outstanding memory accesses included
|
||||
buffered write are completed before reset */
|
||||
SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
||||
SCB_AIRCR_SYSRESETREQ_Msk);
|
||||
__DSB(); /* Ensure completion of memory access */
|
||||
|
||||
for(;;) /* wait until reset */
|
||||
{
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_NVICFunctions */
|
||||
|
||||
|
||||
/* ########################## FPU functions #################################### */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_FpuFunctions FPU Functions
|
||||
\brief Function that provides FPU type.
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief get FPU type
|
||||
\details returns the FPU type
|
||||
\returns
|
||||
- \b 0: No FPU
|
||||
- \b 1: Single precision FPU
|
||||
- \b 2: Double + Single precision FPU
|
||||
*/
|
||||
__STATIC_INLINE uint32_t SCB_GetFPUType(void)
|
||||
{
|
||||
return 0U; /* No FPU */
|
||||
}
|
||||
|
||||
|
||||
/*@} end of CMSIS_Core_FpuFunctions */
|
||||
|
||||
|
||||
|
||||
/* ################################## SysTick function ############################################ */
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_SysTickFunctions SysTick Functions
|
||||
\brief Functions that configure the System.
|
||||
@{
|
||||
*/
|
||||
|
||||
#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
|
||||
|
||||
/**
|
||||
\brief System Tick Configuration
|
||||
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
|
||||
Counter is in free running mode to generate periodic interrupts.
|
||||
\param [in] ticks Number of ticks between two interrupts.
|
||||
\return 0 Function succeeded.
|
||||
\return 1 Function failed.
|
||||
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
||||
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
||||
must contain a vendor-specific implementation of this function.
|
||||
*/
|
||||
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
||||
{
|
||||
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
||||
{
|
||||
return (1UL); /* Reload value impossible */
|
||||
}
|
||||
|
||||
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
||||
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
||||
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
||||
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
||||
SysTick_CTRL_TICKINT_Msk |
|
||||
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
||||
return (0UL); /* Function successful */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*@} end of CMSIS_Core_SysTickFunctions */
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __CORE_CM0_H_DEPENDANT */
|
||||
|
||||
#endif /* __CMSIS_GENERIC */
|
||||
1023
Libraries/CMSIS/Include/core_cm0plus.h
Executable file
1023
Libraries/CMSIS/Include/core_cm0plus.h
Executable file
File diff suppressed because it is too large
Load Diff
1899
Libraries/CMSIS/Include/core_cm23.h
Executable file
1899
Libraries/CMSIS/Include/core_cm23.h
Executable file
File diff suppressed because it is too large
Load Diff
1933
Libraries/CMSIS/Include/core_cm3.h
Executable file
1933
Libraries/CMSIS/Include/core_cm3.h
Executable file
File diff suppressed because it is too large
Load Diff
2963
Libraries/CMSIS/Include/core_cm33.h
Executable file
2963
Libraries/CMSIS/Include/core_cm33.h
Executable file
File diff suppressed because it is too large
Load Diff
2118
Libraries/CMSIS/Include/core_cm4.h
Executable file
2118
Libraries/CMSIS/Include/core_cm4.h
Executable file
File diff suppressed because it is too large
Load Diff
2660
Libraries/CMSIS/Include/core_cm7.h
Executable file
2660
Libraries/CMSIS/Include/core_cm7.h
Executable file
File diff suppressed because it is too large
Load Diff
1016
Libraries/CMSIS/Include/core_sc000.h
Executable file
1016
Libraries/CMSIS/Include/core_sc000.h
Executable file
File diff suppressed because it is too large
Load Diff
1903
Libraries/CMSIS/Include/core_sc300.h
Executable file
1903
Libraries/CMSIS/Include/core_sc300.h
Executable file
File diff suppressed because it is too large
Load Diff
197
Libraries/CMSIS/Include/mpu_armv7.h
Executable file
197
Libraries/CMSIS/Include/mpu_armv7.h
Executable file
@ -0,0 +1,197 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U)
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U)
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U)
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU)
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU)
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU)
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU)
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU)
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU)
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU)
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU)
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU)
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU)
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU)
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU)
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U
|
||||
#define ARM_MPU_AP_PRIV 1U
|
||||
#define ARM_MPU_AP_URO 2U
|
||||
#define ARM_MPU_AP_FULL 3U
|
||||
#define ARM_MPU_AP_PRO 5U
|
||||
#define ARM_MPU_AP_RO 6U
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
((((DisableExec ) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((TypeExtField ) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable ) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable ) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable ) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size ) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(MPU_RASR_ENABLE_Msk))
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
orderedCpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
333
Libraries/CMSIS/Include/mpu_armv8.h
Executable file
333
Libraries/CMSIS/Include/mpu_armv8.h
Executable file
@ -0,0 +1,333 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv8.h
|
||||
* @brief CMSIS MPU API for Armv8-M MPU
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV8_H
|
||||
#define ARM_MPU_ARMV8_H
|
||||
|
||||
/** \brief Attribute for device memory (outer only) */
|
||||
#define ARM_MPU_ATTR_DEVICE ( 0U )
|
||||
|
||||
/** \brief Attribute for non-cacheable, normal memory */
|
||||
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
|
||||
|
||||
/** \brief Attribute for normal memory (outer and inner)
|
||||
* \param NT Non-Transient: Set to 1 for non-transient data.
|
||||
* \param WB Write-Back: Set to 1 to use write-back update policy.
|
||||
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
|
||||
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
|
||||
*/
|
||||
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
|
||||
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
|
||||
|
||||
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
|
||||
|
||||
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
|
||||
|
||||
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
|
||||
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
|
||||
|
||||
/** \brief Memory Attribute
|
||||
* \param O Outer memory attributes
|
||||
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
|
||||
*/
|
||||
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
|
||||
|
||||
/** \brief Normal memory non-shareable */
|
||||
#define ARM_MPU_SH_NON (0U)
|
||||
|
||||
/** \brief Normal memory outer shareable */
|
||||
#define ARM_MPU_SH_OUTER (2U)
|
||||
|
||||
/** \brief Normal memory inner shareable */
|
||||
#define ARM_MPU_SH_INNER (3U)
|
||||
|
||||
/** \brief Memory access permissions
|
||||
* \param RO Read-Only: Set to 1 for read-only memory.
|
||||
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
|
||||
*/
|
||||
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
|
||||
|
||||
/** \brief Region Base Address Register value
|
||||
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
|
||||
* \param SH Defines the Shareability domain for this memory region.
|
||||
* \param RO Read-Only: Set to 1 for a read-only memory region.
|
||||
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
|
||||
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
|
||||
((BASE & MPU_RBAR_BASE_Pos) | \
|
||||
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
|
||||
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
|
||||
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
|
||||
|
||||
/** \brief Region Limit Address Register value
|
||||
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
|
||||
* \param IDX The attribute index to be associated with this memory region.
|
||||
*/
|
||||
#define ARM_MPU_RLAR(LIMIT, IDX) \
|
||||
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
|
||||
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
|
||||
(MPU_RLAR_EN_Msk))
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; /*!< Region Base Address Register value */
|
||||
uint32_t RLAR; /*!< Region Limit Address Register value */
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Enable the Non-secure MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Disable the Non-secure MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
|
||||
{
|
||||
__DSB();
|
||||
__ISB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Set the memory attribute encoding to the given MPU.
|
||||
* \param mpu Pointer to the MPU to be configured.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
|
||||
{
|
||||
const uint8_t reg = idx / 4U;
|
||||
const uint32_t pos = ((idx % 4U) * 8U);
|
||||
const uint32_t mask = 0xFFU << pos;
|
||||
|
||||
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
|
||||
return; // invalid index
|
||||
}
|
||||
|
||||
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
|
||||
}
|
||||
|
||||
/** Set the memory attribute encoding.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Set the memory attribute encoding to the Non-secure MPU.
|
||||
* \param idx The attribute index to be set [0-7]
|
||||
* \param attr The attribute value to be set.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
|
||||
{
|
||||
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Clear and disable the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RLAR = 0U;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU, rnr);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Clear and disable the given Non-secure MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
|
||||
{
|
||||
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Configure the given MPU region of the given MPU.
|
||||
* \param mpu Pointer to MPU to be used.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
mpu->RNR = rnr;
|
||||
mpu->RBAR = rbar;
|
||||
mpu->RLAR = rlar;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Configure the given Non-secure MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rlar Value for RLAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
|
||||
{
|
||||
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
|
||||
}
|
||||
#endif
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void orderedCpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table to the given MPU.
|
||||
* \param mpu Pointer to the MPU registers to be used.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
if (cnt == 1U) {
|
||||
mpu->RNR = rnr;
|
||||
orderedCpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
|
||||
} else {
|
||||
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
|
||||
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
|
||||
|
||||
mpu->RNR = rnrBase;
|
||||
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
|
||||
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
|
||||
orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
|
||||
table += c;
|
||||
cnt -= c;
|
||||
rnrOffset = 0U;
|
||||
rnrBase += MPU_TYPE_RALIASES;
|
||||
mpu->RNR = rnrBase;
|
||||
}
|
||||
|
||||
orderedCpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
|
||||
}
|
||||
|
||||
#ifdef MPU_NS
|
||||
/** Load the given number of MPU regions from a table to the Non-secure MPU.
|
||||
* \param rnr First region number to be configured.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
70
Libraries/CMSIS/Include/tz_context.h
Executable file
70
Libraries/CMSIS/Include/tz_context.h
Executable file
@ -0,0 +1,70 @@
|
||||
/******************************************************************************
|
||||
* @file tz_context.h
|
||||
* @brief Context Management for Armv8-M TrustZone
|
||||
* @version V1.0.1
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef TZ_CONTEXT_H
|
||||
#define TZ_CONTEXT_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef TZ_MODULEID_T
|
||||
#define TZ_MODULEID_T
|
||||
/// \details Data type that identifies secure software modules called by a process.
|
||||
typedef uint32_t TZ_ModuleId_t;
|
||||
#endif
|
||||
|
||||
/// \details TZ Memory ID identifies an allocated memory slot.
|
||||
typedef uint32_t TZ_MemoryId_t;
|
||||
|
||||
/// Initialize secure context memory system
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_InitContextSystem_S (void);
|
||||
|
||||
/// Allocate context memory for calling secure software modules in TrustZone
|
||||
/// \param[in] module identifies software modules called from non-secure mode
|
||||
/// \return value != 0 id TrustZone memory slot identifier
|
||||
/// \return value 0 no memory available or internal error
|
||||
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
|
||||
|
||||
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Load secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
|
||||
|
||||
/// Store secure context (called on RTOS thread context switch)
|
||||
/// \param[in] id TrustZone memory slot identifier
|
||||
/// \return execution status (1: success, 0: error)
|
||||
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
|
||||
|
||||
#endif // TZ_CONTEXT_H
|
||||
142
Libraries/FatFs/doc/00index_e.html
Executable file
142
Libraries/FatFs/doc/00index_e.html
Executable file
@ -0,0 +1,142 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<meta http-equiv="cache-control" content="no-cache">
|
||||
<meta name="description" content="Open source FAT file system for embedded projects">
|
||||
<link rel="start" title="Site Top" href="../../">
|
||||
<link rel="up" title="Freewares" href="../../fsw_e.html">
|
||||
<link rel="alternate" hreflang="en" title="Original" href="http://elm-chan.org/fsw/ff/00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese version" href="00index_j.html">
|
||||
<link rel="stylesheet" href="css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - Generic FAT File System Module (R0.12c)</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<h1>FatFs - Generic FAT File System Module (R0.12c)</h1>
|
||||
<hr>
|
||||
|
||||
<div class="abst">
|
||||
<img src="res/layers.png" class="rset" width="245" height="255" alt="layer">
|
||||
<p>FatFs is a generic FAT/exFAT file system module for small embedded systems. The FatFs module is written in compliance with ANSI C (C89) and completely separated from the disk I/O layer. Therefore it is independent of the platform. It can be incorporated into small microcontrollers with limited resource, such as 8051, PIC, AVR, ARM, Z80, 78K and etc. Also Petit FatFs module for tiny microcontrollers is available <a href="http://elm-chan.org/fsw/ff/00index_p.html">here</a>.</p>
|
||||
|
||||
<h4>Features</h4>
|
||||
<ul>
|
||||
<li>DOS/Windows compatible FAT/exFAT file system.</li>
|
||||
<li>Platform independent. Easy to port.</li>
|
||||
<li>Very small footprint for program code and work area.</li>
|
||||
<li>Various <a href="en/config.html">configuration options</a> to support for:
|
||||
<ul>
|
||||
<li>Multiple volumes (physical drives and partitions).</li>
|
||||
<li>Multiple ANSI/OEM code pages including DBCS.</li>
|
||||
<li>Long file name in ANSI/OEM or Unicode.</li>
|
||||
<li>exFAT file system.</li>
|
||||
<li>RTOS envilonment.</li>
|
||||
<li>Fixed or variable sector size.</li>
|
||||
<li>Read-only, optional API, I/O buffer and etc...</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>Application Interface</h3>
|
||||
<img src="res/layers1.png" class="rset" width="245" height="220" alt="layer">
|
||||
<p>FatFs provides various file control functions for the applications as shown below.</p>
|
||||
<ul>
|
||||
<li>File Access
|
||||
<ul>
|
||||
<li><a href="en/open.html">f_open</a> - Open/Create a file</li>
|
||||
<li><a href="en/close.html">f_close</a> - Close an open file</li>
|
||||
<li><a href="en/read.html">f_read</a> - Read data</li>
|
||||
<li><a href="en/write.html">f_write</a> - Write data</li>
|
||||
<li><a href="en/lseek.html">f_lseek</a> - Move read/write pointer, Expand size</li>
|
||||
<li><a href="en/truncate.html">f_truncate</a> - Truncate size</li>
|
||||
<li><a href="en/sync.html">f_sync</a> - Flush cached data</li>
|
||||
<li><a href="en/forward.html">f_forward</a> - Forward data to the stream</li>
|
||||
<li><a href="en/expand.html">f_expand</a> - Allocate a contiguous block to the file</li>
|
||||
<li><a href="en/gets.html">f_gets</a> - Read a string</li>
|
||||
<li><a href="en/putc.html">f_putc</a> - Write a character</li>
|
||||
<li><a href="en/puts.html">f_puts</a> - Write a string</li>
|
||||
<li><a href="en/printf.html">f_printf</a> - Write a formatted string</li>
|
||||
<li><a href="en/tell.html">f_tell</a> - Get current read/write pointer</li>
|
||||
<li><a href="en/eof.html">f_eof</a> - Test for end-of-file</li>
|
||||
<li><a href="en/size.html">f_size</a> - Get size</li>
|
||||
<li><a href="en/error.html">f_error</a> - Test for an error</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Directory Access
|
||||
<ul>
|
||||
<li><a href="en/opendir.html">f_opendir</a> - Open a directory</li>
|
||||
<li><a href="en/closedir.html">f_closedir</a> - Close an open directory</li>
|
||||
<li><a href="en/readdir.html">f_readdir</a> - Read an directory item</li>
|
||||
<li><a href="en/findfirst.html">f_findfirst</a> - Open a directory and read first item matched</li>
|
||||
<li><a href="en/findnext.html">f_findnext</a> - Read a next item matched</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>File/Directory Management
|
||||
<ul>
|
||||
<li><a href="en/stat.html">f_stat</a> - Check existance of a file or sub-directory</li>
|
||||
<li><a href="en/unlink.html">f_unlink</a> - Remove a file or sub-directory</li>
|
||||
<li><a href="en/rename.html">f_rename</a> - Rename or move a file or sub-directory</li>
|
||||
<li><a href="en/chmod.html">f_chmod</a> - Change attribute of a file or sub-directory</li>
|
||||
<li><a href="en/utime.html">f_utime</a> - Change timestamp of a file or sub-directory</li>
|
||||
<li><a href="en/mkdir.html">f_mkdir</a> - Create a sub-directory</li>
|
||||
<li><a href="en/chdir.html">f_chdir</a> - Change current directory</li>
|
||||
<li><a href="en/chdrive.html">f_chdrive</a> - Change current drive</li>
|
||||
<li><a href="en/getcwd.html">f_getcwd</a> - Retrieve the current directory and drive</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>Volume Management
|
||||
<ul>
|
||||
<li><a href="en/mount.html">f_mount</a> - Register/Unregister a work area of a volume</li>
|
||||
<li><a href="en/mkfs.html">f_mkfs</a> - Create an FAT volume on the logical drive</li>
|
||||
<li><a href="en/fdisk.html">f_fdisk</a> - Create logical drives on the physical drive</li>
|
||||
<li><a href="en/getfree.html">f_getfree</a> - Get total size and free size on the volume</li>
|
||||
<li><a href="en/getlabel.html">f_getlabel</a> - Get volume label</li>
|
||||
<li><a href="en/setlabel.html">f_setlabel</a> - Set volume label</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>Media Access Interface</h3>
|
||||
<img src="res/layers2.png" class="rset" width="245" height="220" alt="layer">
|
||||
<p>Since the FatFs module is just a file system layer independent of platform and storage device. It is completely separated from the physical devices, such as memory card, harddisk and any type of storage device. The low level device control module is <em>not a part of FatFs module</em> and it needs to be provided by implementer. FatFs accesses the storage devices via a simple media access interface shown below. Also sample implementations for some platforms are available in the downloads.</p>
|
||||
<ul>
|
||||
<li><a href="en/dstat.html">disk_status</a> - Get device status</li>
|
||||
<li><a href="en/dinit.html">disk_initialize</a> - Initialize device</li>
|
||||
<li><a href="en/dread.html">disk_read</a> - Read sector(s)</li>
|
||||
<li><a href="en/dwrite.html">disk_write</a> - Write sector(s)</li>
|
||||
<li><a href="en/dioctl.html">disk_ioctl</a> - Control device dependent functions</li>
|
||||
<li><a href="en/fattime.html">get_fattime</a> - Get current time</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>Resources</h3>
|
||||
<p>The FatFs module is a free software opened for education, research and development. You can use, modify and/or redistribute it for personal projects or commercial products without any restriction under your responsibility. For further information, refer to the application note.</p>
|
||||
<ul>
|
||||
<li>Read first: <a href="en/appnote.html">FatFs module application note</a></li>
|
||||
<li>Community: <a href="http://elm-chan.org/fsw/ff/bd/">FatFs User Forum</a></li>
|
||||
<li><a href="https://msdn.microsoft.com/en-us/windows/hardware/gg463080.aspx">FAT32 Specification by Microsoft</a>↗ (The authorized document on FAT file system)</li>
|
||||
<li><a href="http://elm-chan.org/docs/fat.html">The basics of FAT file system [ja]</a></li>
|
||||
<li><a href="http://elm-chan.org/docs/mmc/mmc_e.html">How to Use MMC/SDC</a></li>
|
||||
<li><a href="http://elm-chan.org/junk/fa/faff.html">Playing with FlashAir and FatFs</a></li>
|
||||
<li><a href="http://stm32f4-discovery.com/2014/07/library-21-read-sd-card-fatfs-stm32f4xx-devices/">Read SD card with FatFs on STM32F4xx devices by Tilen Majerle</a>↗ (Quick and easy implementation for STM32F4-Discovery)</li>
|
||||
<li><a href="http://nemuisan.blog.bai.ne.jp/">Nemuisan's Blog</a>↗ (Well written implementations for STM32F/SPI & SDIO and LPC4088/SDMMC)</li>
|
||||
<li><a href="http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/arm_memcards/index.html">ARM-Projects by Martin THOMAS</a>↗ (Examples for LPC2000, AT91SAM and STM32)</li>
|
||||
<li><a href="res/rwtest1.png">Benchmark 1</a> (ATmega1284/20MHz with MMC via USART in SPI, CFC via GPIO)</li>
|
||||
<li><a href="res/rwtest2.png">Benchmark 2</a> (LPC2368/72MHz with MMC via MCI)</li>
|
||||
</div>
|
||||
|
||||
|
||||
<hr>
|
||||
<p class="foot"><a href="http://elm-chan.org/fsw/ff/00index_e.html">FatFs Homepage</a></p>
|
||||
</body>
|
||||
</html>
|
||||
142
Libraries/FatFs/doc/00index_j.html
Executable file
142
Libraries/FatFs/doc/00index_j.html
Executable file
@ -0,0 +1,142 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="ja">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<meta http-equiv="cache-control" content="no-cache">
|
||||
<meta name="description" content="組み込みシステム向け汎用FATファイルシステム">
|
||||
<link rel="start" title="Site Top" href="../../index_j.html">
|
||||
<link rel="up" title="Freewares" href="../../fsw.html">
|
||||
<link rel="alternate" hreflang="ja" title="オリジナル版" href="http://elm-chan.org/fsw/ff/00index_j.html">
|
||||
<link rel="alternate" hreflang="en" title="英文版" href="00index_e.html">
|
||||
<link rel="stylesheet" href="css_j.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs 汎用FATファイルシステム モジュール (R0.12c)</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<h1>FatFs 汎用FATファイルシステム モジュール (R0.12c)</h1>
|
||||
<hr>
|
||||
|
||||
<div class="abst">
|
||||
<img src="res/layers.png" class="rset" width="245" height="255" alt="layer">
|
||||
<p>FatFsは小規模な組み込みシステム向けの汎用FAT/exFATファイルシステム モジュールです。ANSI C(C89)準拠でハードウェア アーキテクチャには依存しないので、必要なワーク エリアが確保できれば、8051, PIC, AVR, SH, Z80, 68k, H8, ARMなど安価なマイコンでも使用可能です。このほか、FatFsを極小マイコン向けにシュリンクした<a href="http://elm-chan.org/fsw/ff/00index_p.html">ぷちFatFs</a>もあります。</p>
|
||||
<h4>FatFsモジュールの特徴</h4>
|
||||
<ul>
|
||||
<li>DOS/Windows互換 FAT/exFATファイルシステム</li>
|
||||
<li>プラットフォーム非依存</li>
|
||||
<li>コンパクトなコードとRAM使用量</li>
|
||||
<li>多くの<a href="ja/config.html">構成オプション</a>:
|
||||
<ul>
|
||||
<li>ボリューム構成(物理ドライブ数・区画)</li>
|
||||
<li>DBCSを含む複数のANSI/OEMコード ページの選択</li>
|
||||
<li>長いファイル名(LFN)への対応</li>
|
||||
<li>exFATファイルシステムへの対応</li>
|
||||
<li>RTOS環境への対応</li>
|
||||
<li>セクタ サイズ(固定/可変)</li>
|
||||
<li>リード オンリー構成、一部APIの削除、バッファ構成、その他…</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>アプリケーション インターフェース</h3>
|
||||
<img src="res/layers1.png" class="rset" width="245" height="220" alt="layer">
|
||||
<p>FatFsモジュールは、上位レイヤに対して次に示すファイルAPIを提供します。</p>
|
||||
<ul>
|
||||
<li>ファイル アクセス
|
||||
<ul>
|
||||
<li><a href="ja/open.html">f_open</a> - ファイルのオープン・作成</li>
|
||||
<li><a href="ja/close.html">f_close</a> - ファイルのクローズ</li>
|
||||
<li><a href="ja/read.html">f_read</a> - データの読み出し</li>
|
||||
<li><a href="ja/write.html">f_write</a> - データの書き込み</li>
|
||||
<li><a href="ja/lseek.html">f_lseek</a> - リード/ライト ポインタの移動, サイズの拡張</li>
|
||||
<li><a href="ja/truncate.html">f_truncate</a> - サイズの切り詰め</li>
|
||||
<li><a href="ja/sync.html">f_sync</a> - キャッシュされたデータのフラッシュ</li>
|
||||
<li><a href="ja/forward.html">f_forward</a> - データをストリーム関数に転送</li>
|
||||
<li><a href="ja/expand.html">f_expand</a> - 連続領域の割り当て</li>
|
||||
<li><a href="ja/gets.html">f_gets</a> - 文字列の読み出し</li>
|
||||
<li><a href="ja/putc.html">f_putc</a> - 文字の書き込み</li>
|
||||
<li><a href="ja/puts.html">f_puts</a> - 文字列の書き込み</li>
|
||||
<li><a href="ja/printf.html">f_printf</a> - 書式化文字列の書き込み</li>
|
||||
<li><a href="ja/tell.html">f_tell</a> - リード/ライト ポインタの取得</li>
|
||||
<li><a href="ja/eof.html">f_eof</a> - 終端の有無の取得</li>
|
||||
<li><a href="ja/size.html">f_size</a> - サイズの取得</li>
|
||||
<li><a href="ja/error.html">f_error</a> - エラーの有無の取得</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>ディレクトリ アクセス
|
||||
<ul>
|
||||
<li><a href="ja/opendir.html">f_opendir</a> - ディレクトリのオープン</li>
|
||||
<li><a href="ja/closedir.html">f_closedir</a> - ディレクトリのクローズ</li>
|
||||
<li><a href="ja/readdir.html">f_readdir</a> - 項目の読み出し</li>
|
||||
<li><a href="ja/findfirst.html">f_findfirst</a> - ディレクトリのオープンと最初の検索項目の読み出し</li>
|
||||
<li><a href="ja/findnext.html">f_findnext</a> - 次の検索項目の読み出し</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>ファイル/ディレクトリ管理
|
||||
<ul>
|
||||
<li><a href="ja/stat.html">f_stat</a> - ファイル/サブ ディレクトリの存在チェックと情報の取得</li>
|
||||
<li><a href="ja/unlink.html">f_unlink</a> - ファイル/サブ ディレクトリの削除</li>
|
||||
<li><a href="ja/rename.html">f_rename</a> - ファイル/サブ ディレクトリの名前の変更・移動</li>
|
||||
<li><a href="ja/chmod.html">f_chmod</a> - ファイル/サブ ディレクトリの属性の変更</li>
|
||||
<li><a href="ja/utime.html">f_utime</a> - ファイル/サブ ディレクトリのタイムスタンプの変更</li>
|
||||
<li><a href="ja/mkdir.html">f_mkdir</a> - サブ ディレクトリの作成</li>
|
||||
<li><a href="ja/chdir.html">f_chdir</a> - カレント ディレクトリの変更</li>
|
||||
<li><a href="ja/chdrive.html">f_chdrive</a> - カレント ドライブの変更</li>
|
||||
<li><a href="ja/getcwd.html">f_getcwd</a> - カレント ディレクトリの取得</li>
|
||||
</ul>
|
||||
</li>
|
||||
<li>ボリューム管理
|
||||
<ul>
|
||||
<li><a href="ja/mount.html">f_mount</a> - ボリューム ワーク エリアの登録・抹消</li>
|
||||
<li><a href="ja/mkfs.html">f_mkfs</a> - 論理ドライブ上にFATボリュームを作成</li>
|
||||
<li><a href="ja/fdisk.html">f_fdisk</a> - 物理ドライブ上に複数の論理ドライブを作成</li>
|
||||
<li><a href="ja/getfree.html">f_getfree</a> - ボリュームのサイズと空きサイズの取得</li>
|
||||
<li><a href="ja/getlabel.html">f_getlabel</a> - ボリューム ラベルの取得</li>
|
||||
<li><a href="ja/setlabel.html">f_setlabel</a> - ボリューム ラベルの設定</li>
|
||||
</ul>
|
||||
</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>デバイス制御インターフェース</h3>
|
||||
<img src="res/layers2.png" class="rset" width="245" height="220" alt="layer">
|
||||
<p>FatFsモジュールは、プラットフォームから独立した単なるファイルシステム レイヤです。ストレージ デバイス(例えばメモリ カード)の制御機能はFatFsの構成部分ではないので、インプリメンタによって提供される必要があります。FatFsモジュールは、下位レイヤに対し標準的には次のインターフェースを要求します。一部の拡張機能(たとえばOS関連機能)を利用するときは、これらに加えてプロセス/メモリ操作関数なども必要になります。サンプル プロジェクトに下位レイヤの実装例を示します。</p>
|
||||
<ul>
|
||||
<li><a href="ja/dstat.html">disk_status</a> - デバイスの状態取得</li>
|
||||
<li><a href="ja/dinit.html">disk_initialize</a> - デバイスの初期化</li>
|
||||
<li><a href="ja/dread.html">disk_read</a> - データの読み出し</li>
|
||||
<li><a href="ja/dwrite.html">disk_write</a> - データの書き込み</li>
|
||||
<li><a href="ja/dioctl.html">disk_ioctl</a> - その他のデバイス制御</li>
|
||||
<li><a href="ja/fattime.html">get_fattime</a> - 日付・時刻の取得</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para">
|
||||
<h3>資料</h3>
|
||||
<p>FatFsモジュールはフリー ソフトウェアとして教育・研究・開発用に公開しています。どのような利用目的（個人利用から商用まで）でも使用・改変・配布について一切の制限はありませんが、全て利用者の責任の下での利用とします。詳しくはアプリケーション ノートを参照してください。</p>
|
||||
<ul>
|
||||
<li>最初に読め: <a href="ja/appnote.html">FatFsモジュール アプリケーション ノート</a></li>
|
||||
<li>コミュニティ: <a href="http://elm-chan.org/fsw/ff/bd/">FatFsユーザ フォーラム</a></li>
|
||||
<li><a href="https://msdn.microsoft.com/en-us/windows/hardware/gg463080.aspx">FATファイルシステム仕様 by Microsoft</a>↗ (The reference document on FAT file system)</li>
|
||||
<li><a href="http://elm-chan.org/docs/fat.html">FATファイルシステム概要</a> (↑を読むためのガイド)</li>
|
||||
<li><a href="http://elm-chan.org/docs/mmc/mmc.html">MMCの使いかた</a></li>
|
||||
<li><a href="http://elm-chan.org/junk/fa/faff.html">FlashAirとFatFs [en]</a></li>
|
||||
<li><a href="http://stm32f4-discovery.com/2014/07/library-21-read-sd-card-fatfs-stm32f4xx-devices/">Read SD card with FatFs on STM32F4xx devices by Tilen Majerle</a>↗ (Quick and easy implementation for STM32F4-Discovery)</li>
|
||||
<li><a href="http://nemuisan.blog.bai.ne.jp/">ねむいさんのぶろぐ</a>↗ (Well written implementations for STM32F/SPI & SDIO and LPC4088/SDMMC)</li>
|
||||
<li><a href="http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/arm_memcards/index.html">ARM-Projects by Martin THOMAS</a>↗ (Examples for LPC2000, AT91SAM and STM32)</li>
|
||||
<li><a href="res/rwtest1.png">パフォーマンス テスト1</a> (ATmega1284/20MHz with MMC via USART in SPI, CFC via GPIO)</li>
|
||||
<li><a href="res/rwtest2.png">パフォーマンス テスト2</a> (LPC2368/72MHz with MMC via MCI)</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<hr>
|
||||
<p class="foot"><a href="http://elm-chan.org/fsw/ff/00index_j.html">FatFsホームページ</a></p>
|
||||
</body>
|
||||
</html>
|
||||
68
Libraries/FatFs/doc/css_e.css
Executable file
68
Libraries/FatFs/doc/css_e.css
Executable file
@ -0,0 +1,68 @@
|
||||
* {margin: 0; padding: 0; border-width: 0;}
|
||||
body {margin: 8px; background-color: #e0ffff; font-color: black; font-family: serif; line-height: 133%; max-width: 1024px;}
|
||||
a:link {color: blue;}
|
||||
a:visited {color: darkmagenta;}
|
||||
a:hover {background-color: #a0ffff;}
|
||||
a:active {color: darkmagenta; overflow: hidden; outline:none; position: relative; top: 1px; left: 1px;}
|
||||
abbr {border-width: 1px;}
|
||||
|
||||
p {margin: 0 0 0.3em 1em;}
|
||||
i {margin: 0 0.3em 0 0;}
|
||||
b {margin: 0 0.1em;}
|
||||
em {font-style: normal; font-weight: bold; margin: 0 0.1em;}
|
||||
strong {}
|
||||
pre {border: 1px dashed gray; margin: 0.5em 1em; padding: 0.5em; line-height: 1.2em; font-size: 85%; font-family: "Consolas", "Courier New", monospace; background-color: white;}
|
||||
pre span.c {color: green;}
|
||||
pre span.k {color: blue;}
|
||||
pre span.b {font-weight: bold;}
|
||||
pre span.arg {font-style: italic;}
|
||||
tt {margin: 0 0.2em; font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; }
|
||||
tt.arg {font-style: italic;}
|
||||
ol {margin: 0.5em 2.5em;}
|
||||
ul {margin: 0.5em 2em;}
|
||||
ul ul {margin: 0 2em 0.5em 1em;}
|
||||
dl {margin: 0.5em 1em;}
|
||||
dd {margin: 0 2em;}
|
||||
dt {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace;}
|
||||
dl.par dt {margin: 0.5em 0 0 0 ; font-style: italic; }
|
||||
dl.ret dt {margin: 0.5em 0 0 0 ; font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; font-weight: bold; }
|
||||
hr {border-width: 1px; margin: 1em;}
|
||||
div.abst {font-family: sans-serif;}
|
||||
div.para {clear: both; font-family: serif;}
|
||||
div.ret a {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; }
|
||||
.equ {text-indent: 0; margin: 1em 2em 1em;}
|
||||
.indent {margin-left: 2em;}
|
||||
.rset {float: right; margin: 0.3em 0 0.5em 0.5em;}
|
||||
.lset {float: left; margin: 0.3em 0.5em 0.5em 0.5em;}
|
||||
ul.flat li {list-style-type: none; margin: 0;}
|
||||
a.imglnk img {border: 1px solid;}
|
||||
.iequ {white-space: nowrap; font-weight: bold;}
|
||||
.clr {clear: both;}
|
||||
.it {font-style: italic;}
|
||||
.mfd {font-size: 0.7em; padding: 0 1px; border: 1px solid; white-space : nowrap}
|
||||
.ral {text-align: right; }
|
||||
.lal {text-align: left; }
|
||||
.cal {text-align: center; }
|
||||
|
||||
h1 {line-height: 1em; font-size: 2em; font-family: sans-serif; padding: 0.3em 0 0.3em;}
|
||||
h2 {font-size: 2em; font-family: sans-serif; background-color: #d8d8FF; padding: 0.5em 0.5em; margin: 0 0 0.5em;}
|
||||
h3 {font-size: 1.5em; font-family: sans-serif; margin: 1.5em 0 0.5em;}
|
||||
div.doc h3 {border-color: #b0d8d8; border-style: solid; border-width: 0px 0px 4px 12px; padding: 4px; margin-top: 3em;}
|
||||
h4 {font-size: 1.2em; font-family: sans-serif; margin: 2em 0 0.2em;}
|
||||
h5 {font-size: 1em; font-family: sans-serif; margin: 1em 0 0em;}
|
||||
p.hdd {float: right; text-align: right; margin-top: 0.5em;}
|
||||
hr.hds {clear: both; margin-bottom: 1em;}
|
||||
kbd {letter-spacing: 0;}
|
||||
small {font-size: 80%;}
|
||||
.indent {margin-left: 2em;}
|
||||
|
||||
/* Tables */
|
||||
table {margin: 0.5em 1em; border-collapse: collapse; border: 2px solid black; }
|
||||
th {background-color: white; border-style: solid; border-width: 1px 1px 2px; border-color: black; padding: 0 3px; vertical-align: top; white-space: nowrap;}
|
||||
td {background-color: white; border: 1px solid black; padding: 0 3px; vertical-align: top; line-height: 1.3em;}
|
||||
table.lst td:first-child {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace;}
|
||||
table.lst2 td {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace;}
|
||||
table caption {font-family: sans-serif; font-weight: bold;}
|
||||
tr.lst3 td { border-width: 2px 1px 1px; }
|
||||
|
||||
p.foot {clear: both; text-indent: 0; margin: 1em 0.5em 1em;}
|
||||
71
Libraries/FatFs/doc/css_j.css
Executable file
71
Libraries/FatFs/doc/css_j.css
Executable file
@ -0,0 +1,71 @@
|
||||
@charset "Shift_JIS";
|
||||
/* Common style sheet for Tech Notes */
|
||||
|
||||
* {margin: 0; padding: 0; border-width: 0;}
|
||||
body {margin: 8px; background-color: #e0ffff; font-color: black; font-family:"<22>l<EFBFBD>r <20>o<EFBFBD><6F><EFBFBD><EFBFBD>", serif; line-height: 150%; letter-spacing: 1px; max-width: 1024px;}
|
||||
a:link {color: blue;}
|
||||
a:visited {color: darkmagenta;}
|
||||
a:hover {background-color: #a0ffff;}
|
||||
a:active {color: darkmagenta; overflow: hidden; outline:none; position: relative; top: 1px; left: 1px;}
|
||||
abbr {border-width: 1px;}
|
||||
|
||||
p {text-indent: 0.8em; margin: 0 0 0.3em 0.5em;}
|
||||
i {margin: 0 0.3em 0 0;}
|
||||
b {margin: 0 0.1em;}
|
||||
em {font-style: normal; font-weight: bold; margin: 0 0.1em;}
|
||||
strong {}
|
||||
pre {border: 1px dashed gray; margin: 0.5em 1em; padding: 0.5em; line-height: 1.2em; letter-spacing: 0; font-size: 0.85em; font-family: "Consolas", "Courier New", "<22>l<EFBFBD>r <20>S<EFBFBD>V<EFBFBD>b<EFBFBD>N", monospace; background-color: white;}
|
||||
pre span.c {color: green;}
|
||||
pre span.k {color: blue;}
|
||||
pre span.b {font-weight: bold;}
|
||||
pre span.arg {font-style: italic;}
|
||||
tt {margin: 0 0.2em; letter-spacing: 0; font-size: 0.85em; font-family: "Consolas", "Courier New", "<22>l<EFBFBD>r <20>S<EFBFBD>V<EFBFBD>b<EFBFBD>N", monospace;}
|
||||
tt.arg {font-style: italic;}
|
||||
ol {margin: 0.5em 2.5em;}
|
||||
ul {margin: 0.5em 2em;}
|
||||
ul ul {margin: 0 2em 0.5em 1em;}
|
||||
dl {margin: 0.5em 1em;}
|
||||
dd {margin: 0em 2em;}
|
||||
dt {font-size: 0.85em; font-family: "Consolas", "Courier New", "<22>l<EFBFBD>r <20>S<EFBFBD>V<EFBFBD>b<EFBFBD>N", monospace;}
|
||||
dl.par dt {margin: 0.5em 0 0 0 ; font-style: italic; letter-spacing: 0;}
|
||||
dl.ret dt {margin: 0.5em 0 0 0 ; font-size: 0.85em; font-family: "Consolas", "Courier New", "<22>l<EFBFBD>r <20>S<EFBFBD>V<EFBFBD>b<EFBFBD>N", monospace; letter-spacing: 0; font-weight: bold; }
|
||||
hr {border-width: 1px; margin: 1em;}
|
||||
div.abst {font-family: "<22>l<EFBFBD>r <20>o<EFBFBD>S<EFBFBD>V<EFBFBD>b<EFBFBD>N",sans-serif;}
|
||||
div.para {clear: both; font-family: "<22>l<EFBFBD>r <20>o<EFBFBD><6F><EFBFBD><EFBFBD>",serif;}
|
||||
div.ret a {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; }
|
||||
.equ {text-indent: 0; margin: 1em 2em 1em;}
|
||||
.indent {margin-left: 2em;}
|
||||
.rset {float: right; margin: 0.3em 0 0.5em 0.5em;}
|
||||
.lset {float: left; margin: 0.3em 0.5em 0.5em 0.5em;}
|
||||
ul.flat li {list-style-type: none; margin: 0;}
|
||||
a.imglnk img {border: 1px solid;}
|
||||
.iequ {white-space: nowrap; font-weight: bold;}
|
||||
.clr {clear: both;}
|
||||
.it {font-style: italic;}
|
||||
.mfd {font-size: 0.7em; padding: 0 1px; border: 1px solid; white-space : nowrap}
|
||||
.ral {text-align: right; }
|
||||
.lal {text-align: left; }
|
||||
.cal {text-align: center; }
|
||||
|
||||
h1 {line-height: 1em; font-size: 2em; font-family: sans-serif; padding: 0.3em 0 0.3em;}
|
||||
h2 {font-size: 2em; font-family: "<22>l<EFBFBD>r <20>o<EFBFBD>S<EFBFBD>V<EFBFBD>b<EFBFBD>N",sans-serif; background-color: #d8d8FF; padding: 0.5em 0.5em; margin: 0 0 0.5em;}
|
||||
h3 {font-size: 1.5em; font-family: "<22>l<EFBFBD>r <20>o<EFBFBD>S<EFBFBD>V<EFBFBD>b<EFBFBD>N",sans-serif; margin: 1.5em 0 0.5em;}
|
||||
div.doc h3 {border-color: #b0d8d8; border-style: solid; border-width: 0px 0px 4px 12px; padding: 4px; margin-top: 3em;}
|
||||
h4 {font-size: 1.2em; font-family: "<22>l<EFBFBD>r <20>o<EFBFBD>S<EFBFBD>V<EFBFBD>b<EFBFBD>N",sans-serif; margin: 2em 0 0.2em;}
|
||||
h5 {font-size: 1em; font-family: "<22>l<EFBFBD>r <20>o<EFBFBD>S<EFBFBD>V<EFBFBD>b<EFBFBD>N",sans-serif; margin: 1em 0 0em;}
|
||||
p.hdd {float: right; text-align: right; margin-top: 0.5em;}
|
||||
hr.hds {clear: both; margin-bottom: 1em;}
|
||||
kbd {letter-spacing: 0;}
|
||||
small {font-size: 80%;}
|
||||
.indent {margin-left: 2em;}
|
||||
|
||||
/* Tables */
|
||||
table {margin: 0.5em 1em; border-collapse: collapse; border: 2px solid black; letter-spacing: 0;}
|
||||
th {background-color: white; border-style: solid; border-width: 1px 1px 2px; border-color: black; padding: 0 3px; vertical-align: top;}
|
||||
td {background-color: white; border: 1px solid black; padding: 0 3px; vertical-align: top; line-height: 1.3em;}
|
||||
table.lst td:first-child {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; white-space: nowrap;}
|
||||
table.lst2 td {font-size: 0.85em; font-family: "Consolas", "Courier New", monospace; white-space: nowrap;}
|
||||
table caption {font-family: sans-serif; font-weight: bold;}
|
||||
tr.lst3 td {border-width: 2px 1px 1px; }
|
||||
|
||||
p.foot {clear: both; text-indent: 0; margin: 1em 0.5em 1em;}
|
||||
282
Libraries/FatFs/doc/en/appnote.html
Executable file
282
Libraries/FatFs/doc/en/appnote.html
Executable file
@ -0,0 +1,282 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/appnote.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs Module Application Note</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<h1>FatFs Module Application Note</h1>
|
||||
<ol class="toc">
|
||||
<li><a href="#port">How to Port</a></li>
|
||||
<li><a href="#limits">Limits</a></li>
|
||||
<li><a href="#memory">Memory Usage</a></li>
|
||||
<li><a href="#reduce">Reducing Module Size</a></li>
|
||||
<li><a href="#lfn">Long File Name</a></li>
|
||||
<li><a href="#unicode">Unicode API</a></li>
|
||||
<li><a href="#exfat">exFAT File System</a></li>
|
||||
<li><a href="#reentrant">Re-entrancy</a></li>
|
||||
<li><a href="#dup">Duplicated File Access</a></li>
|
||||
<li><a href="#fs1">Performance Effective File Access</a></li>
|
||||
<li><a href="#fs2">Considerations on Flash Memory Media</a></li>
|
||||
<li><a href="#critical">Critical Section</a></li>
|
||||
<li><a href="#fs3">Extended Use of FatFs API</a></li>
|
||||
<li><a href="#license">About FatFs License</a></li>
|
||||
</ol>
|
||||
|
||||
<div class="para doc" id="port">
|
||||
<h3>How to Port</h3>
|
||||
|
||||
<h4>Basic considerations</h4>
|
||||
<p>The FatFs module is assuming following conditions on portability.</p>
|
||||
<ul>
|
||||
<li>ANSI C<br>
|
||||
The FatFs module is a middleware written in ANSI C (C89). There is no platform dependence, so long as the compiler is in compliance with ANSI C.</li>
|
||||
<li>Size of integer types<br>
|
||||
The FatFs module assumes that size of <tt>char</tt>/<tt>short</tt>/<tt>long</tt> are 8/16/32 bit and <tt>int</tt> is 16 or 32 bit. These correspondence are defined in <tt>integer.h</tt>. This will not be a problem on most compilers. When a conflict with existing definitions is occured, you must resolve it with care.</li>
|
||||
</ul>
|
||||
|
||||
<h4>System organizations</h4>
|
||||
<p>The dependency diagram shown below is a typical but not specific configuration of the embedded system with FatFs module.</p>
|
||||
<p><img src="../res/modules.png" width="580" height="280" alt="dependency diagram"></p>
|
||||
<p>(a) If a working disk module with FatFs disk interface is provided, nothing else will be needed. (b) To attach existing disk drivers with different interface, glue functions are needed to translate the interfaces between FatFs and the drivers.</p>
|
||||
<p><img src="../res/funcs.png" width="750" height="420" alt="functional diagram"></p>
|
||||
|
||||
<h4>Required functions</h4>
|
||||
<p>You need to provide only low level disk I/O functions required by FatFs module and nothing else. If a working disk module for the target system is already existing, you need to write only glue functions to attach it to the FatFs module. If not, you need to port another disk module or write it from scratch. Most of defined functions are not that always required. For example, disk write function is not required at read-only configuration. Following table shows which function is required depends on the configuration options.</p>
|
||||
<table class="lst2">
|
||||
<tr><th>Function</th><th>Required when</th><th>Note</th></tr>
|
||||
<tr><td>disk_status<br>disk_initialize<br>disk_read</td><td>Always</td><td rowspan="5">Disk I/O functions.<br>Samples available in ffsample.zip.<br>There are many implementations on the web.</td></tr>
|
||||
<tr><td>disk_write<br>get_fattime<br>disk_ioctl (CTRL_SYNC)</td><td>_FS_READONLY == 0</td></tr>
|
||||
<tr><td>disk_ioctl (GET_SECTOR_COUNT)<br>disk_ioctl (GET_BLOCK_SIZE)</td><td>_USE_MKFS == 1</td></tr>
|
||||
<tr><td>disk_ioctl (GET_SECTOR_SIZE)</td><td>_MAX_SS != _MIN_SS</td></tr>
|
||||
<tr><td>disk_ioctl (CTRL_TRIM)</td><td>_USE_TRIM == 1</td></tr>
|
||||
<tr><td>ff_convert<br>ff_wtoupper</td><td>_USE_LFN != 0</td><td>Unicode support functions.<br>Just add option/unicode.c to the project.</td></tr>
|
||||
<tr><td>ff_cre_syncobj<br>ff_del_syncobj<br>ff_req_grant<br>ff_rel_grant</td><td>_FS_REENTRANT == 1</td><td rowspan="2">O/S dependent functions.<br>Samples available in option/syscall.c.</td></tr>
|
||||
<tr><td>ff_mem_alloc<br>ff_mem_free</td><td>_USE_LFN == 3</td></tr>
|
||||
</table>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="limits">
|
||||
<h3>Limits</h3>
|
||||
<ul>
|
||||
<li>File system type: FAT, FAT32(r0.0) and exFAT(r1.0).</li>
|
||||
<li>Number of open files: Unlimited. (depends on available memory)</li>
|
||||
<li>Number of volumes: Upto 10.</li>
|
||||
<li>Volume size: Upto 2 TiB at 512 bytes/sector.</li>
|
||||
<li>File size: Upto 4 GiB - 1 on FAT volume and virtually unlimited on exFAT volume.</li>
|
||||
<li>Cluster size: Upto 128 sectors on FAT volume and upto 16 MiB on exFAT volume.</li>
|
||||
<li>Sector size: 512, 1024, 2048 and 4096 bytes.</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="memory">
|
||||
<h3>Memory Usage</h3>
|
||||
<p>The memory usage varies depends on the <a href="config.html">configuration options</a>.</p>
|
||||
<table class="lst2">
|
||||
<tr><th></th><th>ARM7<small><br>32bit</small></th><th>ARM7<small><br>Thumb</small></th><th>CM3<small><br>Thumb-2</small></th><th>AVR</th><th>H8/300H</th><th>PIC24</th><th>RL78</th><th>V850ES</th><th>SH-2A</th><th>RX600</th><th>IA-32</th></tr>
|
||||
<tr class="cal"> <td>Compiler</td><td>GCC</td><td>GCC</td><td>GCC</td><td>GCC</td><td>CH38</td><td>C30</td><td>CC78K0R</td><td>CA850</td><td>SHC</td><td>RXC</td><td>MSC</td></tr>
|
||||
<!-- ARM Thumb CM3 AVR H8 PIC24 RL78 V850ES SH-2A RX600 IA-32 -->
|
||||
<tr class="ral"><td class="cal">text (Full, R/W)</td><td>10.4k</td><td>6.8k</td><td>6.3k</td><td>12.4k</td> <td>9.8k</td><td>11.1k</td><td>12.8k</td><td>8.6k</td><td>8.9k</td><td>6.4k</td><td>8.5k</td></tr>
|
||||
<tr class="ral"><td class="cal">text (Min, R/W)</td> <td>6.8k</td><td>4.6k</td><td>4.3k</td> <td>8.2k</td> <td>6.7k</td> <td>7.6k</td> <td>9.1k</td><td>6.0k</td><td>5.9k</td><td>4.5k</td><td>5.9k</td></tr>
|
||||
<tr class="ral"><td class="cal">text (Full, R/O)</td> <td>4.8k</td><td>3.1k</td><td>2.8k</td> <td>5.6k</td> <td>4.6k</td> <td>5.3k</td> <td>6.3k</td><td>4.0k</td><td>3.9k</td><td>3.0k</td><td>3.9k</td></tr>
|
||||
<tr class="ral"><td class="cal">text (Min, R/O)</td> <td>3.6k</td><td>2.4k</td><td>2.3k</td> <td>4.4k</td> <td>3.5k</td> <td>4.0k</td> <td>4.9k</td><td>3.3k</td><td>3.0k</td><td>2.4k</td><td>3.1k</td></tr>
|
||||
<tr class="ral"><td class="cal">bss</td><td>V*4 + 2</td><td>V*4 + 2</td><td>V*4 + 2</td><td>V*2 + 2</td><td>V*4 + 2</td><td>V*2 + 2</td><td>V*2 + 2</td><td>V*4 + 2</td><td>V*4 + 2</td><td>V*4 + 2</td><td>V*4 + 2</td></tr>
|
||||
<tr class="ral"><td class="cal">Work area<br><small>(_FS_TINY == 0)</small></td><td>V*564<br>+ F*552</td><td>V*564<br>+ F*552</td><td>V*564<br>+ F*552</td><td>V*560<br>+ F*546</td><td>V*560<br>+ F*546</td><td>V*560<br>+ F*546</td><td>V*560<br>+ F*546</td><td>V*564<br>+ F*552</td><td>V*564<br>+ F*552</td><td>V*564<br>+ F*552</td><td>V*564<br>+ F*552</td></tr>
|
||||
<tr class="ral"><td class="cal">Work area<br><small>(_FS_TINY == 1)</small></td><td>V*564<br>+ F*40</td><td>V*564<br>+ F*40</td><td>V*564<br>+ F*40</td><td>V*560<br>+ F*34</td><td>V*560<br>+ F*34</td><td>V*560<br>+ F*34</td><td>V*560<br>+ F*34</td><td>V*564<br>+ F*40</td><td>V*564<br>+ F*40</td><td>V*564<br>+ F*40</td><td>V*564<br>+ F*40</td></tr>
|
||||
</table>
|
||||
<p>These are the memory usage on some target systems with following condition. The memory sizes are in unit of byte, <em>V</em> denotes option <tt>_VOLUMES</tt> and <em>F</em> denotes number of open files. All samples here are optimezed in code size.</p>
|
||||
<pre>
|
||||
FatFs R0.12b options:
|
||||
_FS_READONLY 0 (R/W) or 1 (R/O)
|
||||
_FS_MINIMIZE 0 (Full, with all basic functions) or 3 (Min, with fully minimized)
|
||||
_FS_TINY 0 (Default) or 1 (Tiny file object)
|
||||
And other options are left unchanged from original setting.
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="reduce">
|
||||
<h3>Reducing Modle Size</h3>
|
||||
<p>Follwing table shows which API function is removed by configuration options for the module size reduction. To use any API function, the row of the function must be clear.</p>
|
||||
<table class="lst2">
|
||||
<tr><td rowspan="2">Function</td><td colspan="4">_FS_<br>MINIMIZE</td><td colspan="2">_FS_<br>READONLY</td><td colspan="2">_USE_<br>STRFUNC</td><td colspan="3">_FS_<br>RPATH</td><td colspan="2">_USE_<br>FIND</td><td colspan="2">_USE_<br>CHMOD</td><td colspan="2">_USE_<br>EXPAND</td><td colspan="2">_USE_<br>LABEL</td><td colspan="2">_USE_<br>MKFS</td><td colspan="2">_USE_<br>FORWARD</td><td colspan="2">_MULTI_<br>PARTITION</td></tr>
|
||||
<tr> <td>0</td><td>1</td><td>2</td><td>3</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td><td>2</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td><td>0</td><td>1</td></tr>
|
||||
<tr class="lst3">
|
||||
<td>f_mount</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_open</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_close</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_read</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_write</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_sync</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_lseek</td> <td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_opendir</td> <td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_closedir</td> <td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_readdir</td> <td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_findfirst</td><td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_findnext</td> <td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_stat</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_getfree</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_truncate</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_unlink</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_mkdir</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_rename</td> <td> </td><td>x</td><td>x</td><td>x</td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_chdir</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_chdrive</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_getcwd</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_chmod</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_utime</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_getlabel</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_setlabel</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_expand</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_forward</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_mkfs</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_fdisk</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td>x</td><td> </td></tr>
|
||||
<tr><td>f_putc</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_puts</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_printf</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
<tr><td>f_gets</td> <td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td>x</td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td><td> </td></tr>
|
||||
</table>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="lfn">
|
||||
<h3>Long File Name</h3>
|
||||
<p>FatFs module supports long file name (LFN). The two different file names, short file name (SFN) and LFN, of a file is transparent on the API except for <tt>f_readdir</tt> function. The support for LFN is disabled by default. To enable the LFN, set <tt><a href="config.html#use_lfn">_USE_LFN</a></tt> to 1, 2 or 3, and add <tt>option/unicode.c</tt> to the project. The LFN requiers a certain working buffer in addition. The buffer size can be configured by <tt><a href="config.html#max_lfn">_MAX_LFN</a></tt> according to the available memory. The length of an LFN will be up to 255 characters, so that the <tt>_MAX_LFN</tt> should be set to 255 for all file names. If the size of working buffer is insufficient for the input file name, the file function fails with <tt>FR_INVALID_NAME</tt>. When use any re-entry to the API with LFN is enabled, <tt>_USE_LFN</tt> must be set to 2 or 3. In this case, the file function allocates the working buffer on the stack or heap. The working buffer occupies <tt>(_MAX_LFN + 1) * 2</tt> bytes and additional <tt>(_MAX_LFN + 44) / 15 * 32</tt> bytes when exFAT is enabled.</p>
|
||||
<table class="lst2 rset">
|
||||
<caption>With LFN at CM3+gcc</caption>
|
||||
<tr><th><tt>_CODE_PAGE</tt></th><th>Code size</th></tr>
|
||||
<tr><td>SBCS</td><td>+2.8K</td></tr>
|
||||
<tr><td>932(Japanese)</td><td>+62.6k</td></tr>
|
||||
<tr><td>936(Simplified Chinese)</td><td>+177k</td></tr>
|
||||
<tr><td>949(Korean)</td><td>+139k</td></tr>
|
||||
<tr><td>950(Traditional Chinese)</td><td>+111k</td></tr>
|
||||
</table>
|
||||
<p>When the LFN is enabled, the module size will be increased depends on the configured code page. Right table shows how much code size increased when LFN is enabled with some code pages. Especially, in the CJK region, tens of thousands of characters are being used. Unfortunately, it requires a huge OEM-Unicode bidirectional conversion table and the module size will be drastically increased as shown in the table. As the result, the FatFs with LFN enebled with those code pages will not able to be ported on the most 8-bit MCU systems.</p>
|
||||
<p>Note that the support for LFN on the FAT volume is a patent of Microsoft Corporation. This is not the case on FAT32 but most FAT32 drivers come with the support for LFN. FatFs can switch the LFN on/off by configuration option. When enable LFN on the commercial products, you will need to be licensed by Microsoft depends on the final destination of the products.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="unicode">
|
||||
<h3>Unicode API</h3>
|
||||
<p>By default, FatFs uses ANSI/OEM code set on the API even at LFN configuration. FatFs can also switch the character encoding on the API to Unicode by configuration option <tt><a href="config.html#lfn_unicode">_LFN_UNICODE</a></tt>. This means that FatFs supports the full featured LFN specification. The data type <tt>TCHAR</tt> specifies strings on the API is an alias of <tt>char</tt>(ANSI/OEM) or <tt>WCHAR</tt>(UTF-16). For more information, refer to the description in the <a href="filename.html#uni">file name</a>.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="exfat">
|
||||
<h3>exFAT File System</h3>
|
||||
<p>The exFAT (Microsoft's Extended File Allocation Table) file system is a replacement of the FAT file system which has been widely used in the embedded systems and consumer devices. It is adopted by SDA (SD Association) as a recommended file system for high capacity SD cards (>32GB) and they are being shipped with this format, so that the exFAT become one of the standard file systems for removable media as well as FAT. The exFAT file system allows the file size larger than 4 GiB limit what FAT file system allows upto and some file system overhead, especially cluster allocation delay, are reduced as well. This feature improves the write throughput to the file.</p>
|
||||
<p>Note that the exFAT is a patent of Microsoft Corporation. The exFAT function of FatFs is an implementation based on <cite>US. Pat. App. Pub. No. 2009/0164440 A1</cite>. FatFs module can swich the exFAT on/off by configuration option. When enable the exFAT on the commercial products, you will need to be licensed by Microsoft depends on the final destination of the products.</p>
|
||||
<p><em>Remark: Enabling exFAT discards ANSI C (C89) compatibility because of need for 64-bit integer type.</em></p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="reentrant">
|
||||
<h3>Re-entrancy</h3>
|
||||
<p>The file operations to the <em>different volume</em> each other is always re-entrant regardless of configurations except when LFN enabled with static working buffer. It can work simultaneously without any mutual exclusion.</p>
|
||||
<p>The file operations to the <em>same volume</em> is not re-entrant. It can also be configured thread-safe by option <tt><a href="config.html#fs_reentrant">_FS_REENTRANT</a></tt>. It enables to control exclusive use of each file system object. In this case, also the OS dependent synchronization object control functions, <tt>ff_cre_syncobj/ff_del_syncobj/ff_req_grant/ff_rel_grant</tt>, needed to be added to the project. There are some examples in the <tt>option/syscall.c</tt>.</p>
|
||||
<p>When a file function is called while the volume is being accessed by other task, the file function to the volume will be suspended until that task leaves the file function. If the wait time exceeded a period defined by <tt>_TIMEOUT</tt>, the file function will abort with <tt>FR_TIMEOUT</tt>. The timeout function might not be supported on the some RTOSs.</p>
|
||||
<p>There is an exception on the re-entrancy for <tt>f_mount/f_mkfs/f_fdisk</tt> function. These volume management functions are not re-entrant on the same volume and corresponding physical drive. When use these functions, other tasks need to avoid to access the volume.</p>
|
||||
<p>Note that this section describes on the re-entrancy of the FatFs module itself. The <tt>_FS_REENTRANT</tt> controls only exclusive use of each file system object and it does not that prevent re-entering the low level disk functions. For example, only <tt>disk_status</tt> function is re-entered at single volume system and every disk function is re-entered at multiple volume system. Thus the low level disk I/O layer must be always thread-safe when FatFs API is re-entered by two or more tasks.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="dup">
|
||||
<h3>Duplicated File Open</h3>
|
||||
<p>FatFs module does not support the read/write collision control of duplicated open to a file. The duplicated open is permitted only when each of open method to a file is read mode. The duplicated open with one or more write mode to a file is always prohibited, and also open file must not be renamed or deleted. A violation of these rules can cause data colluption.</p>
|
||||
<p>The file lock control can be enabled by <tt><a href="config.html#fs_lock">_FS_LOCK</a></tt> option. The value of option defines the number of open objects to manage simultaneously. In this case, if any open, rename or remove that violating the file shareing rule that described above is attempted, the file function will rejected with <tt>FR_LOCKED</tt>. If number of open objects, files and sub-directories, is equal to <tt>_FS_LOCK</tt>, an extra <tt>f_open/f_opendir</tt> function will fail with <tt>FR_TOO_MANY_OPEN_FILES</tt>.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="fs1">
|
||||
<h3>Performance Effective File Access</h3>
|
||||
<p>For good read/write throughput on the small embedded systems with limited size of memory, application programmer should consider what process is done in the FatFs module. The file data on the volume is transferred in following sequence by <tt>f_read</tt> function.</p>
|
||||
<p>Figure 1. Sector misaligned read (short)<br>
|
||||
<img src="../res/f1.png" width="490" height="110" alt="">
|
||||
</p>
|
||||
<p>Figure 2. Sector misaligned read (long)<br>
|
||||
<img src="../res/f2.png" width="490" height="140" alt="">
|
||||
</p>
|
||||
<p>Figure 3. Fully sector aligned read<br>
|
||||
<img src="../res/f3.png" width="490" height="119" alt="">
|
||||
</p>
|
||||
<p>The file I/O buffer is a sector buffer to read/write a part of data on the sector. The sector buffer is either file private sector buffer on each file object or shared sector buffer in the file system object. The buffer configuration option <tt><a href="config.html#fs_tiny">_FS_TINY</a></tt> determins which sector buffer is used for the file data transfer. When tiny buffer configuration (1) is selected, data memory consumption is reduced <tt>_MAX_SS</tt> bytes each file object. In this case, FatFs module uses only a sector buffer in the file system object for file data transfer and FAT/directory access. The disadvantage of the tiny buffer configuration is: the FAT data cached in the sector buffer will be lost by file data transfer and it must be reloaded at every cluster boundary. However it will be suitable for most application from view point of the decent performance and low memory comsumption.</p>
|
||||
<p>Figure 1 shows that a partial sector, sector misaligned part of the file, is transferred via the file I/O buffer. At long data transfer shown in Figure 2, middle of transfer data that covers one or more sector is transferred to the application buffer directly. Figure 3 shows that the case of entier transfer data is aligned to the sector boundary. In this case, file I/O buffer is not used. On the direct transfer, the maximum extent of sectors are read with <tt>disk_read</tt> function at a time but the multiple sector transfer is divided at cluster boundary even if it is contiguous.</p>
|
||||
<p>Therefore taking effort to sector aligned read/write accesss eliminates buffered data transfer and the read/write performance will be improved. Besides the effect, cached FAT data will not be flushed by file data transfer at the tiny configuration, so that it can achieve same performance as non-tiny configuration with small memory footprint.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="fs2">
|
||||
<h3>Considerations on Flash Memory Media</h3>
|
||||
<p>To maximize the write performance of flash memory media, such as SDC, CFC and U Disk, it must be controlled in consideration of its characteristitcs.</p>
|
||||
<h4>Using Mutiple-Sector Write</h4>
|
||||
<div class="rset">
|
||||
Figure 6. Comparison between Multiple/Single Sector Write<br>
|
||||
<img src="../res/f6.png" width="630" height="148" alt="fig.6">
|
||||
</div>
|
||||
<p>The write throughput of the flash memory media becomes the worst at single sector write transaction. The write throughput increases as the number of sectors per a write transaction as shown in Figure 6. This effect more appers at faster interface speed and the performance ratio often becomes grater than ten. <a href="../res/rwtest2.png">This graph</a> is clearly explaining how fast is multiple block write (W:16K, 32 sectors) than single block write (W:100, 1 sector), and also larger card tends to be slow at single block write. Number of write transactions also affects life time of the flash memory media. When compared at same amount of write data, the single sector write in Figure 6 above wears flash memory media 16 times more than multiple sector write in Figure 6 below. Single sector write is pretty pain for the flash memory media.</p>
|
||||
<p>Therefore the application program should write the data in large block as possible. The ideal write chunk size and alighment is size of sector, and size of cluster is the best. Of course all layers between the application and the storage device must have consideration on multiple sector write, however most of open-source memory card drivers lack it. Do not split a multiple sector write request into single sector write transactions or the write throughput gets poor. Note that FatFs module and its sample disk drivers supprt multiple sector read/write operation. </p>
|
||||
<h4>Forcing Memory Erase</h4>
|
||||
<p>When remove a file with <tt>f_unlink</tt> function, the data clusters occupied by the file are marked 'free' on the FAT. But the data sectors containing the file data are not that applied any process, so that the file data left occupies a part of the flash memory array as 'live block'. If the file data can be erased on removing the file, those data blocks will be turned into the free block pool. This may skip internal block erase operation to the data block on next write operation. As the result the write performance might be improved. FatFs can manage this function by setting <tt><a href="config.html#use_trim">_USE_TRIM</a></tt> to 1. Note that this is an expectation of internal process of the storage device and not that always effective. Most applications will not need this function. Also <tt>f_unlink</tt> function can take a time when remove a large file.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="critical">
|
||||
<h3>Critical Section</h3>
|
||||
<p>If a write operation to the FAT volume is interrupted due to an accidental failure, such as sudden blackout, incorrect media removal and unrecoverable disk error, the FAT structure on the volume can be broken. Following images shows the critical section of the FatFs module.</p>
|
||||
<div class="lset">
|
||||
Figure 4. Long critical section<br>
|
||||
<img src="../res/f4.png" width="320" height="436" alt="fig.4">
|
||||
</div>
|
||||
<div class="lset">
|
||||
Figure 5. Minimized critical section<br>
|
||||
<img src="../res/f5.png" width="320" height="436" alt="fig.5">
|
||||
</div>
|
||||
<br class="clr">
|
||||
<p>An interruption in the red section can cause a cross link; as a result, the object being changed can be lost. If an interruption in the yellow section is occured, there is one or more possibility listed below.</p>
|
||||
<ul>
|
||||
<li>The file data being rewrited is collapsed.</li>
|
||||
<li>The file being appended returns initial state.</li>
|
||||
<li>The file created as new is gone.</li>
|
||||
<li>The file created as new or overwritten remains but no content.</li>
|
||||
<li>Efficiency of disk use gets worse due to lost clusters.</li>
|
||||
</ul>
|
||||
<p>Each case does not affect any file not opened in write mode. To minimize risk of data loss, the critical section can be minimized by minimizing the time that file is opened in write mode or using <tt>f_sync</tt> function as shown in Figure 5.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="fs3">
|
||||
<h3>Extended Use of FatFs API</h3>
|
||||
<p>These are examples of extended use of FatFs APIs. New item will be added whenever a useful code is found.</p>
|
||||
<ol>
|
||||
<li><a href="../res/app1.c">Open or create a file for append</a> (for only R0.12 and earlier)</li>
|
||||
<li><a href="../res/app2.c">Empty a directory</a></li>
|
||||
<li><a href="../res/app3.c">Allocate contiguous area to the file</a> (for only R0.11a and earlier)</li>
|
||||
<li><a href="../res/app4.c">Compatibility checker for low level disk I/O module</a></li>
|
||||
<li><a href="../res/mkfatimg.zip">FAT image creator</a></li>
|
||||
</ol>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="license">
|
||||
<h3>About FatFs License</h3>
|
||||
<p>FatFs has being developped as a personal project of the author, ChaN. It is free from the code anyone else wrote at current release. Following code block shows a copy of the FatFs license document that included in the source files.</p>
|
||||
<pre>
|
||||
/*----------------------------------------------------------------------------/
|
||||
/ FatFs - Generic FAT file system module Rx.xx /
|
||||
/-----------------------------------------------------------------------------/
|
||||
/
|
||||
/ Copyright (C) 20xx, ChaN, all right reserved.
|
||||
/
|
||||
/ FatFs module is an open source software. Redistribution and use of FatFs in
|
||||
/ source and binary forms, with or without modification, are permitted provided
|
||||
/ that the following condition is met:
|
||||
/
|
||||
/ 1. Redistributions of source code must retain the above copyright notice,
|
||||
/ this condition and the following disclaimer.
|
||||
/
|
||||
/ This software is provided by the copyright holder and contributors "AS IS"
|
||||
/ and any warranties related to this software are DISCLAIMED.
|
||||
/ The copyright owner or contributors be NOT LIABLE for any damages caused
|
||||
/ by use of this software.
|
||||
/----------------------------------------------------------------------------*/
|
||||
</pre>
|
||||
<p>Therefore FatFs license is one of the BSD-style licenses but there is a significant feature. FatFs is mainly intended for embedded systems. In order to extend the usability for commercial products, the redistributions of FatFs in binary form, such as embedded code, binary library and any forms without source code, does not need to include about FatFs in the documentations. This is equivalent to the 1-clause BSD license. Of course FatFs is compatible with the most of open source software licenses including GNU GPL. When you redistribute the FatFs source code with any changes or create a fork, the license can also be changed to GNU GPL, BSD-style license or any open source software license that not conflict with FatFs license.</p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return Home</a></p>
|
||||
</body>
|
||||
</html>
|
||||
81
Libraries/FatFs/doc/en/chdir.html
Executable file
81
Libraries/FatFs/doc/en/chdir.html
Executable file
@ -0,0 +1,81 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/chdir.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_chdir</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_chdir</h2>
|
||||
<p>The f_chdir function changes the current directory of a drive.</p>
|
||||
<pre>
|
||||
FRESULT f_chdir (
|
||||
const TCHAR* <span class="arg">path</span> <span class="c">/* [IN] Path name */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">directory</a> to go.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_chdir</tt> function changes the current directory of the logical drive. The current directory of a drive is set to the root directory when the drive is mounted. Note that the current directory is retained in the each file system object, so that it also affects other tasks that use the volume.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_RPATH >= 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Change current direcoty of the current drive ('dir1' under root directory) */</span>
|
||||
f_chdir("/dir1");
|
||||
|
||||
<span class="c">/* Change current direcoty of drive 2 (parent directory) */</span>
|
||||
f_chdir("2:..");
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="chdrive.html">f_chdrive</a>, <a href="getcwd.html">f_getcwd</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
60
Libraries/FatFs/doc/en/chdrive.html
Executable file
60
Libraries/FatFs/doc/en/chdrive.html
Executable file
@ -0,0 +1,60 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/chdrive.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_chdrive</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_chdrive</h2>
|
||||
<p>The f_chdrive function changes the current drive.</p>
|
||||
<pre>
|
||||
FRESULT f_chdrive (
|
||||
const TCHAR* <span class="arg">path</span> <span class="c">/* [IN] Logical drive number */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Specifies the <a href="filename.html">logical drive number</a> to be set as the current drive.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_chdrive</tt> function changes the current drive. The initial value of the current drive number is 0. Note that the current drive is retained in a static variable so that it also affects other tasks that using the file functions.</p>
|
||||
</div>
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_RPATH >= 1</tt> and <tt>_VOLUMES >= 2</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="chdir.html">f_chdir</a>, <a href="getcwd.html">f_getcwd</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
89
Libraries/FatFs/doc/en/chmod.html
Executable file
89
Libraries/FatFs/doc/en/chmod.html
Executable file
@ -0,0 +1,89 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/chmod.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_chmod</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_chmod</h2>
|
||||
<p>The f_chmod function changes the attribute of a file or sub-directory.</p>
|
||||
<pre>
|
||||
FRESULT f_chmod (
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Object name */</span>
|
||||
BYTE <span class="arg">attr</span>, <span class="c">/* [IN] Attribute flags */</span>
|
||||
BYTE <span class="arg">mask</span> <span class="c">/* [IN] Attribute masks */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies an <a href="filename.html">object</a> to be changed</dd>
|
||||
<dt>attr</dt>
|
||||
<dd>Attribute flags to be set in one or more combination of the following flags. The specified flags are set and others are cleard.<br>
|
||||
<table class="lst">
|
||||
<tr><th>Attribute</th><th>Description</th></tr>
|
||||
<tr><td>AM_RDO</td><td>Read only</td></tr>
|
||||
<tr><td>AM_ARC</td><td>Archive</td></tr>
|
||||
<tr><td>AM_SYS</td><td>System</td></tr>
|
||||
<tr><td>AM_HID</td><td>Hidden</td></tr>
|
||||
</table>
|
||||
</dd>
|
||||
<dt>mask</dt>
|
||||
<dd>Attribute mask that specifies which attribute is changed. The specified attributes are set or cleard and others are left unchanged.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#ok">FR_NO_FILE</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#wp">FR_WRITE_PROTECTED</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_chmod</tt> function changes the attribute of a file or sub-directory.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_READONLY == 0</tt> and <tt>_USE_CHMOD == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Set read-only flag, clear archive flag and others are left unchanged. */</span>
|
||||
f_chmod("file.txt", AM_RDO, AM_RDO | AM_ARC);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
65
Libraries/FatFs/doc/en/close.html
Executable file
65
Libraries/FatFs/doc/en/close.html
Executable file
@ -0,0 +1,65 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/close.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_close</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_close</h2>
|
||||
<p>The f_close function closes an open file.</p>
|
||||
<pre>
|
||||
FRESULT f_close (
|
||||
FIL* <span class="arg">fp</span> <span class="c">/* [IN] Pointer to the file object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameter</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structure to be closed.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_close</tt> function closes an open file object. If any data has been written to the file, the cached information of the file is written back to the volume. After the function succeeded, the file object is no longer valid and it can be discarded.</p>
|
||||
<p>Note that if the file object is in read-only mode and <tt>_FS_LOCK</tt> is not enabled, the file object can also be discarded without this process. However this is not recommended for future compatibility.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Always available.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="read.html">f_read</a>, <a href="write.html">f_write</a>, <a href="sync.html">f_sync</a>, <a href="sfile.html">FIL</a>, <a href="sfatfs.html">FATFS</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
64
Libraries/FatFs/doc/en/closedir.html
Executable file
64
Libraries/FatFs/doc/en/closedir.html
Executable file
@ -0,0 +1,64 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/close.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_closedir</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_closedir</h2>
|
||||
<p>The f_closedir function closes an open directory.</p>
|
||||
<pre>
|
||||
FRESULT f_closedir (
|
||||
DIR* <span class="arg">dp</span> <span class="c">/* [IN] Pointer to the directory object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameter</h4>
|
||||
<dl class="par">
|
||||
<dt>dp</dt>
|
||||
<dd>Pointer to the open directory object structure to be closed.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_closedir</tt> function closes an open directory object. After the function succeeded, the directory object is no longer valid and it can be discarded.</p>
|
||||
<p>Note that the directory object can also be discarded without this process when option <tt>_FS_LOCK</tt> is not enabled. However this is not recommended for future compatibility.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_MINIMIZE <= 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="opendir.html">f_opendir</a>, <a href="readdir.html">f_readdir</a>, <a href="sdir.html">DIR</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
204
Libraries/FatFs/doc/en/config.html
Executable file
204
Libraries/FatFs/doc/en/config.html
Executable file
@ -0,0 +1,204 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/config.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - Configuration Options</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<h1>Configuration Options</h1>
|
||||
<p>There are many options to configure the functions of FatFs for each project. The configuration options are defined in the <tt>ffconf.h</tt>.</p>
|
||||
|
||||
<div class="para doc" id="func">
|
||||
<h3>Function Configurations</h3>
|
||||
|
||||
<h4 id="fs_readonly">_FS_READONLY</h4>
|
||||
<p>Read/Write (0) or Read-only (1). Read-only configuration removes writing API functions, <tt>f_write</tt>, <tt>f_sync</tt>, <tt>f_unlink</tt>, <tt>f_mkdir</tt>, <tt>f_chmod</tt>, <tt>f_rename</tt>, <tt>f_truncate</tt>, <tt>f_getfree</tt> and optional writing functions as well.</p>
|
||||
|
||||
<h4 id="fs_minimize">_FS_MINIMIZE</h4>
|
||||
<p>This option defines minimization level to remove some basic API functions as follows:</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>All basic API functions are available.</td></tr>
|
||||
<tr><td>1</td><td><tt>f_stat</tt>, <tt>f_getfree</tt>, <tt>f_unlink</tt>, <tt>f_mkdir</tt>, <tt>f_chmod</tt>, <tt>f_utime</tt>, <tt>f_truncate</tt> and <tt>f_rename</tt> function are removed.</td></tr>
|
||||
<tr><td>2</td><td><tt>f_opendir</tt>, <tt>f_readdir</tt> and <tt>f_closedir</tt> function are removed in addition to 1.</td></tr>
|
||||
<tr><td>3</td><td><tt>f_lseek</tt> function is removed in addition to 2.</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="use_strfunc">_USE_STRFUNC</h4>
|
||||
<p>This option switches string functions, <tt>f_gets</tt>, <tt>f_putc</tt>, <tt>f_puts</tt> and <tt>f_printf</tt>.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>Disable string functions.</td></tr>
|
||||
<tr><td>1</td><td>Enable string functions without LF-CRLF conversion.</td></tr>
|
||||
<tr><td>2</td><td>Enable string functions with LF-CRLF conversion.</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="use_find">_USE_FIND</h4>
|
||||
<p>Disable (0) or Enable (1) filtered directory read functions, <tt>f_findfirst</tt> and <tt>f_findnext</tt>. Also <tt>_FS_MINIMIZE</tt> needs to be 0 or 1.</p>
|
||||
|
||||
<h4 id="use_mkfs">_USE_MKFS</h4>
|
||||
<p>Disable (0) or Enable (1) <tt>f_mkfs</tt> function.</p>
|
||||
|
||||
<h4 id="use_fastseek">_USE_FASTSEEK</h4>
|
||||
<p>Disable (0) or Enable (1) fast seek function to enable accelerated mode for <tt>f_lseek</tt>, <tt>f_read</tt> and <tt>f_write</tt> function. For more information, read <a href="lseek.html">here</a>.</p>
|
||||
|
||||
<h4 id="use_expand">_USE_EXPAND</h4>
|
||||
<p>Disable (0) or Enable (1) , <tt>f_enpand</tt> function. Also <tt>_FS_READONLY</tt> needs to be 0.</p>
|
||||
|
||||
<h4 id="use_chmod">_USE_CHMOD</h4>
|
||||
<p>Disable (0) or Enable (1) metadata control functions, <tt>f_chmod</tt> and <tt>f_utime</tt>. Also <tt>_FS_READONLY</tt> needs to be 0.</p>
|
||||
|
||||
<h4 id="use_label">_USE_LABEL</h4>
|
||||
<p>Disable (0) or Enable (1) API functions for volume label, <tt>f_getlabel</tt> and <tt>f_setlabel</tt>.</p>
|
||||
|
||||
<h4 id="use_forward">_USE_FORWARD</h4>
|
||||
<p>Disable (0) or Enable (1) <tt>f_forward</tt> function.</p>
|
||||
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para doc" id="name">
|
||||
<h3>Namespace and Locale Configurations</h3>
|
||||
|
||||
<h4 id="code_page">_CODE_PAGE</h4>
|
||||
<p>This option specifies the OEM code page to be used on the target system. Incorrect setting of the code page can cause a file open failure. If any extended character is not used at all, there is no difference between any code pages.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>1</td><td>ASCII (valid at non-LFN cfg.)</td></tr>
|
||||
<tr><td>437</td><td>U.S.</td></tr>
|
||||
<tr><td>720</td><td>Arabic</td></tr>
|
||||
<tr><td>737</td><td>Greek</td></tr>
|
||||
<tr><td>771</td><td>KBL</td></tr>
|
||||
<tr><td>775</td><td>Baltic</td></tr>
|
||||
<tr><td>850</td><td>Latin 1</td></tr>
|
||||
<tr><td>852</td><td>Latin 2</td></tr>
|
||||
<tr><td>855</td><td>Cyrillic</td></tr>
|
||||
<tr><td>857</td><td>Turkish</td></tr>
|
||||
<tr><td>860</td><td>Portuguese</td></tr>
|
||||
<tr><td>861</td><td>Icelandic</td></tr>
|
||||
<tr><td>862</td><td>Hebrew</td></tr>
|
||||
<tr><td>863</td><td>Canadian French</td></tr>
|
||||
<tr><td>864</td><td>Arabic</td></tr>
|
||||
<tr><td>865</td><td>Nordic</td></tr>
|
||||
<tr><td>866</td><td>Russian</td></tr>
|
||||
<tr><td>869</td><td>Greek 2</td></tr>
|
||||
<tr><td>932</td><td>Japanese (DBCS)</td></tr>
|
||||
<tr><td>936</td><td>Simplified Chinese (DBCS)</td></tr>
|
||||
<tr><td>949</td><td>Korean (DBCS)</td></tr>
|
||||
<tr><td>950</td><td>Traditional Chinese (DBCS)</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="use_lfn">_USE_LFN</h4>
|
||||
<p>This option switches the support for long file name (LFN). When enable the LFN, Unicode support functions <tt>option/unicode.c</tt> need to be added to the project. The working buffer occupies <tt>(_MAX_LFN + 1) * 2</tt> bytes and additional 608 bytes when exFAT enabled. When use stack for the working buffer, take care on stack overflow. When use heap memory for the working buffer, memory management functions, <tt>ff_memalloc</tt> and <tt>ff_memfree</tt>, need to be added to the project.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>Disable LFN. Only 8.3 format can be used.</td></tr>
|
||||
<tr><td>1</td><td>Enable LFN with static working buffer on the BSS. Always NOT thread-safe.</td></tr>
|
||||
<tr><td>2</td><td>Enable LFN with dynamic working buffer on the STACK.</td></tr>
|
||||
<tr><td>3</td><td>Enable LFN with dynamic working buffer on the HEAP.</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="max_lfn">_MAX_LFN</h4>
|
||||
<p>This option defines the size of LFN working buffer from 12 to 255 in unit of character. This option has no effect when LFN is disabled.</p>
|
||||
|
||||
<h4 id="lfn_unicode">_LFN_UNICODE</h4>
|
||||
<p>ANSI/OEM (0) or Unicode (1). This option switches character encoding on the API. To use Unicode (UTF16) string for the path name, enable LFN and set this option to 1. This option also affects behavior of string I/O functions. When LFN is disabled, this option must be 0. For more information, read <a href="filename.html#uni">here</a>.</p>
|
||||
|
||||
<h4 id="strf_encode">_STRF_ENCODE</h4>
|
||||
<p>When Unicode API is selected by setting <tt>_LFN_UNICODE</tt> 1, this option defines the assumption of character encoding on the file to be read/written via string I/O functions, <tt>f_gets</tt>, <tt>f_putc</tt>, <tt>f_puts</tt> and <tt>f_printf</tt>. This option has no effect when <tt>_LFN_UNICODE = 0</tt>.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>ANSI/OEM</td></tr>
|
||||
<tr><td>1</td><td>UTF-16LE</td></tr>
|
||||
<tr><td>2</td><td>UTF-16BE</td></tr>
|
||||
<tr><td>3</td><td>UTF-8</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="fs_rpath">_FS_RPATH</h4>
|
||||
<p>This option configures relative path function. For more information, read <a href="filename.html#nam">here</a>.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>Disable relative path function and remove related functions.</td></tr>
|
||||
<tr><td>1</td><td>Enable relative path function. <tt>f_chdir</tt> and <tt>f_chdrive</tt> function is available.</td></tr>
|
||||
<tr><td>2</td><td><tt>f_getcwd</tt> function is available in addition to 1</td></tr>
|
||||
</table>
|
||||
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para doc" id="volume">
|
||||
<h3>Volume/Drive Configurations</h3>
|
||||
|
||||
<h4 id="volumes">_VOLUMES</h4>
|
||||
<p>This option configures number of volumes (logical drives, from 1 to 10) to be used.</p>
|
||||
|
||||
<h4 id="str_volume_id">_STR_VOLUME_ID</h4>
|
||||
<p>Disable (0) or Enable (1). This option switches the support for string volume ID. When enabled, also pre-defined strings in <tt>_VOLUME_STRS</tt> can be used as drive identifier in the path name.</p>
|
||||
|
||||
<h4 id="volume_strs">_VOLUME_STRS</h4>
|
||||
<p>This option defines the drive ID strings for each logical drives. Number of items must not be less than <tt>_VOLUMES</tt>. Valid characters for the drive ID string are: A-Z and 0-9.</p>
|
||||
|
||||
<h4 id="multi_partition">_MULTI_PARTITION</h4>
|
||||
<p>Disable (0) or Enable (1). This option switches multi-partition function. By default (0), each logical drive number is bound to the same physical drive number and only an FAT volume in the physical drive is mounted. When enabled, each logical drive is bound to the partition on the physical drive listed in the user defined partition resolution table <tt>VolToPart[]</tt>. Also <tt>f_fdisk</tt> funciton will be available. For more information, read <a href="filename.html#vol">here</a>.</p>
|
||||
|
||||
<h4 id="max_ss">_MIN_SS, _MAX_SS</h4>
|
||||
<p>This set of options defines the size of sector on low level disk I/O interface, <tt>disk_read</tt> and <tt>disk_write</tt> function. Valid values are 512, 1024, 2048 and 4096. <tt>_MIN_SS</tt> defines minimum sector size and <tt>_MAX_SS</tt> defines the maximum sector size. Always set both 512 for memory card and harddisk. But a larger value may be required for on-board flash memory and some type of optical media. When <tt>_MAX_SS > _MIN_SS</tt>, support of variable sector size is enabled and <tt>GET_SECTOR_SIZE</tt> command needs to be implemented to the <tt>disk_ioctl</tt> function.</p>
|
||||
|
||||
<h4 id="use_trim">_USE_TRIM</h4>
|
||||
<p>Disable (0) or Enable (1). This option switches ATA-TRIM function. To enable Trim function, also <tt>CTRL_TRIM</tt> command should be implemented to the <tt>disk_ioctl</tt> function.</p>
|
||||
|
||||
<h4 id="fs_nofsinfo">_FS_NOFSINFO</h4>
|
||||
<p>0 to 3. If you need to know correct free space on the FAT32 volume, set bit 0 of this option, and <tt>f_getfree</tt> function at first time after volume mount will force a full FAT scan. Bit 1 controls the use of last allocated cluster number.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>bit0=0</td><td>Use free cluster count in the FSINFO if available.</td></tr>
|
||||
<tr><td>bit0=1</td><td>Do not trust free cluster count in the FSINFO.</td></tr>
|
||||
<tr><td>bit1=0</td><td>Use last allocated cluster number in the FSINFO to find a free cluster if available.</td></tr>
|
||||
<tr><td>bit1=1</td><td>Do not trust last allocated cluster number in the FSINFO.</td></tr>
|
||||
</table>
|
||||
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para doc" id="system">
|
||||
<h3>System Configurations</h3>
|
||||
|
||||
<h4 id="fs_tiny">_FS_TINY</h4>
|
||||
<p>Normal (0) or Tiny (1). At the tiny configuration, size of the file object <tt>FIL</tt> is reduced <tt>_MAX_SS</tt> bytes. Instead of private data buffer eliminated from the file object, common sector buffer in the file system object <tt>FATFS</tt> is used for the file data transfer.</p>
|
||||
|
||||
<h4 id="fs_exfat">_FS_EXFAT</h4>
|
||||
<p>This option switches support for the exFAT file system in addition to the FAT file system, Enabled(1) or Disabled(1). To enable this feature, also LFN must be enabled and configureing <tt>_LFN_UNICODE = 1</tt> and <tt>_MAX_LFN = 255</tt> is recommended for full-featured exFAT function. Note that enabling exFAT discards C89 compatibility because of need for 64-bit integer type.</p>
|
||||
|
||||
<h4 id="fs_nortc">_FS_NORTC</h4>
|
||||
<p>Use RTC (0) or Do not use RTC (1). This option controls timestamp function. If the system does not have an RTC function or valid timestamp is not needed, set <tt>_FS_NORTC</tt> to 1 to disable the timestamp function. Any object modified by FatFs will have a fixed timestamp defined by <tt>_NORTC_MON</tt>, <tt>_NORTC_MDAY</tt> and <tt>_NORTC_YEAR</tt>. To use the timestamp function, set <tt>_FS_NORTC = 0</tt> and add <tt>get_fattime</tt> function to the project to get the current time form real-time clock. This option has no effect at read-only configuration.</p>
|
||||
|
||||
<h4 id="nortc_time">_NORTC_MON, _NORTC_MDAY, _NORTC_YEAR</h4>
|
||||
<p>This set of options defines the time to be used at no RTC systems. This option has no effect at read-only configuration or <tt>_FS_NORTC = 0</tt>.</p>
|
||||
|
||||
<h4 id="fs_lock">_FS_LOCK</h4>
|
||||
<p>This option switches file lock function to control duplicated file open and illegal operations to open objects. Note that the file lock function is independent of re-entrancy. This option must be 0 at read-only configuration.</p>
|
||||
<table class="lst1">
|
||||
<tr><th>Value</th><th>Description</th></tr>
|
||||
<tr><td>0</td><td>Disable file lock function. To avoid collapsing file by wrong file operation, application program needs to avoid illegal open, remove and rename to the open objects.</td></tr>
|
||||
<tr><td>>0</td><td>Enable file lock function. The value defines how many files/sub-directories can be opened simultaneously under the file lock control. Illigal operations to the open object will be rejected with <tt>FR_LOCKED</tt>.</td></tr>
|
||||
</table>
|
||||
|
||||
<h4 id="fs_reentrant">_FS_REENTRANT</h4>
|
||||
<p>Disable (0) or Enable (1). This option switches the re-entrancy (thread safe) of the FatFs module itself. Note that file/directory access to the different volume is always re-entrant and it can work simultaneously regardless of this option but volume control functions. <tt>f_mount</tt>, <tt>f_mkfs</tt> and <tt>f_fdisk</tt>, are always not re-entrant. Only file/directory access to the same volume, in other words, exclusive use of each file system object, is under control of this function. To enable this feature, also user provided synchronization handlers, <tt>ff_req_grant</tt>, <tt>ff_rel_grant</tt>, <tt>ff_del_syncobj</tt> and <tt>ff_cre_syncobj</tt>, need to be added to the project. Sample code is available in <tt>option/syscall.c</tt>.</p>
|
||||
|
||||
<h4 id="fs_timeout">_FS_TIMEOUT</h4>
|
||||
<p>Number of time ticks to abort the file function with <tt>FR_TIMEOUT</tt> when wait time is too long. This option has no effect when <tt>_FS_REENTRANT = 0</tt>.</p>
|
||||
|
||||
<h4 id="sync_t">_SYNC_t</h4>
|
||||
<p>This option defines O/S dependent sync object type. e.g. <tt>HANDLE</tt>, <tt>ID</tt>, <tt>OS_EVENT*</tt>, <tt>SemaphoreHandle_t</tt> and etc. A header file for O/S definitions needs to be included somewhere in the scope of <tt>ff.c</tt>. This option has no effect when <tt>_FS_REENTRANT = 0</tt>.</p>
|
||||
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
46
Libraries/FatFs/doc/en/dinit.html
Executable file
46
Libraries/FatFs/doc/en/dinit.html
Executable file
@ -0,0 +1,46 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/dinit.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - disk_initialize</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>disk_initialize</h2>
|
||||
<p>The disk_initialize function is called to initializes the storage device.</p>
|
||||
<pre>
|
||||
DSTATUS disk_initialize (
|
||||
BYTE <span class="arg">pdrv</span> <span class="c">/* [IN] Physical drive number */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameter</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Physical drive number to identify the target device. Always zero at single drive system.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>This function returns the current drive status flags as the result. For details of the drive status, refer to the <a href="dstat.html">disk_status</a> function.</p>
|
||||
</div>
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>This function initializes the storage device and put it ready to generic read/write. When the function succeeded, <tt>STA_NOINIT</tt> flag in the return value is cleared.</p>
|
||||
<p><em>Remarks: This function needs to be under control of FatFs module. Application program MUST NOT call this function, or FAT structure on the volume can be broken. To re-initialize the file system, use <tt>f_mount</tt> function instead.</em></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
100
Libraries/FatFs/doc/en/dioctl.html
Executable file
100
Libraries/FatFs/doc/en/dioctl.html
Executable file
@ -0,0 +1,100 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/dioctl.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - disk_ioctl</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>disk_ioctl</h2>
|
||||
<p>The disk_ioctl function is called to control device specific features and miscellaneous functions other than generic read/write.</p>
|
||||
<pre>
|
||||
DRESULT disk_ioctl (
|
||||
BYTE <span class="arg">pdrv</span>, <span class="c">/* [IN] Drive number */</span>
|
||||
BYTE <span class="arg">cmd</span>, <span class="c">/* [IN] Control command code */</span>
|
||||
void* <span class="arg">buff</span> <span class="c">/* [I/O] Parameter and data buffer */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Physical drive number to identify the target device.</dd>
|
||||
<dt>cmd</dt>
|
||||
<dd>Command code.</dd>
|
||||
<dt>buff</dt>
|
||||
<dd>Pointer to the parameter depends on the command code. Do not care if no parameter to be passed.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Value</h4>
|
||||
<dl class="ret">
|
||||
<dt>RES_OK (0)</dt>
|
||||
<dd>The function succeeded.</dd>
|
||||
<dt>RES_ERROR</dt>
|
||||
<dd>An error occured.</dd>
|
||||
<dt>RES_PARERR</dt>
|
||||
<dd>The command code or parameter is invalid.</dd>
|
||||
<dt>RES_NOTRDY</dt>
|
||||
<dd>The device has not been initialized.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The FatFs module requires only five device independent commands described below.</p>
|
||||
<table class="lst">
|
||||
<caption>Standard ioctl command used by FatFs</caption>
|
||||
<tr><th>Command</th><th>Description</th></tr>
|
||||
<tr><td>CTRL_SYNC</td><td>Make sure that the device has finished pending write process. If the disk I/O module has a write back cache, the dirty buffers must be written back to the media immediately. Nothing to do for this command if each write operation to the media is completed within the <tt>disk_write</tt> function.</td></tr>
|
||||
<tr><td>GET_SECTOR_COUNT</td><td>Returns number of available sectors on the drive into the <tt>DWORD</tt> variable pointed by <tt class="arg">buff</tt>. This command is used by only <tt>f_mkfs</tt> and <tt>f_fdisk</tt> function to determine the volume/partition size to be created. Required at <tt>_USE_MKFS == 1</tt> or <tt>_MULTI_PARTITION == 1</tt>.</td></tr>
|
||||
<tr><td>GET_SECTOR_SIZE</td><td>Returns sector size of the device into the <tt>WORD</tt> variable pointed by <tt class="arg">buff</tt>. Valid return values of this command are 512, 1024, 2048 and 4096. This command is required only at variable sector size configuration, <tt>_MAX_SS > _MIN_SS</tt>. At the fixed sector size configuration, <tt>_MAX_SS == _MIN_SS</tt>, this command is not used and the device must work at that sector size.</td></tr>
|
||||
<tr><td>GET_BLOCK_SIZE</td><td>Returns erase block size of the flash memory media in unit of sector into the <tt>DWORD</tt> variable pointed by <tt class="arg">buff</tt>. The allowable value is from 1 to 32768 in power of 2. Return 1 if the erase block size is unknown or non flash memory media. This command is used by only <tt>f_mkfs</tt> function and it attempts to align data area on the erase block boundary. Required at <tt>_USE_MKFS == 1</tt>.</td></tr>
|
||||
<tr><td>CTRL_TRIM</td><td>Informs the device the data on the block of sectors is no longer needed and it can be erased. The sector block is specified by <tt>DWORD</tt> array {<start sector>, <end sector>} pointed by <tt class="arg">buff</tt>. This is an identical command to Trim of ATA device. Nothing to do for this command if this funcion is not supported or not a flash memory device. The FatFs does not check the result code and the file function is not affected even if the sector block was not erased well. This command is called on remove a cluster chain and in the <tt>f_mkfs</tt> function. Required at <tt>_USE_TRIM == 1</tt>.</td></tr>
|
||||
</table>
|
||||
|
||||
<p>FatFs never uses any device dependent command nor user defined command. Following table shows an example of non-standard commands usable for some applications.</p>
|
||||
<table class="lst">
|
||||
<caption>Example of optional ioctl command</caption>
|
||||
<tr><th>Command</th><th>Description</th></tr>
|
||||
<tr><td>CTRL_FORMAT</td><td>Create a physical format on the media. If <tt class="arg">buff</tt> is not null, it is pointer to the call-back function for progress notification.</td></tr>
|
||||
<tr><td>CTRL_POWER_IDLE</td><td>Put the device idle state. <tt>STA_NOINIT</tt> in the current status flags may not be set if the device goes active state by generic read/write function.</td></tr>
|
||||
<tr><td>CTRL_POWER_OFF</td><td>Put the device off state. Shut-down the power to the device and deinitialize the device interface if needed. <tt>STA_NOINIT</tt> in the current status flags must be set. The device goes active state by <tt>disk_initialize</tt> function.</td></tr>
|
||||
<tr><td>CTRL_LOCK</td><td>Lock media eject mechanism.</td></tr>
|
||||
<tr><td>CTRL_UNLOCK</td><td>Unlock media eject mechanism.</td></tr>
|
||||
<tr><td>CTRL_EJECT</td><td>Eject media cartridge. <tt>STA_NOINIT</tt> and <tt>STA_NODISK</tt> in status flag are set after the function succeeded.</td></tr>
|
||||
<tr><td>MMC_GET_TYPE</td><td>Get card type. The type flags, bit0:MMCv3, bit1:SDv1, bit2:SDv2+ and bit3:LBA, is stored to a BYTE variable pointed by <tt class="arg">buff</tt>. (MMC/SDC specific command)</td></tr>
|
||||
<tr><td>MMC_GET_CSD</td><td>Get CSD register into a 16-byte buffer pointed by <tt class="arg">buff</tt>. (MMC/SDC specific command)</td></tr>
|
||||
<tr><td>MMC_GET_CID</td><td>Get CID register into a 16-byte buffer pointed by <tt class="arg">buff</tt>. (MMC/SDC specific command)</td></tr>
|
||||
<tr><td>MMC_GET_OCR</td><td>Get OCR register into a 4-byte buffer pointed by <tt class="arg">buff</tt>. (MMC/SDC specific command)</td></tr>
|
||||
<tr><td>MMC_GET_SDSTAT</td><td>Get SDSTATUS register into a 64-byte buffer pointed by <tt class="arg">buff</tt>. (SDC specific command)</td></tr>
|
||||
<tr><td>ATA_GET_REV</td><td>Get the revision string into a 16-byte buffer pointed by <tt class="arg">buff</tt>. (ATA/CFC specific command)</td></tr>
|
||||
<tr><td>ATA_GET_MODEL</td><td>Get the model string into a 40-byte buffer pointed by <tt class="arg">buff</tt>. (ATA/CFC specific command)</td></tr>
|
||||
<tr><td>ATA_GET_SN</td><td>Get the serial number string into a 20-byte buffer pointed by <tt class="arg">buff</tt>. (ATA/CFC specific command)</td></tr>
|
||||
<tr><td>ISDIO_READ</td><td>Read a block of iSDIO registers specified by command structure pointed by <tt class="arg">buff</tt>. (FlashAir specific command)</td></tr>
|
||||
<tr><td>ISDIO_WRITE</td><td>Write a block of data to iSDIO registers specified by command structure pointed by <tt class="arg">buff</tt>. (FlashAir specific command)</td></tr>
|
||||
<tr><td>ISDIO_MRITE</td><td>Change bits in an iSDIO register specified by command structure pointed by <tt class="arg">buff</tt>. (FlashAir specific command)</td></tr>
|
||||
</table>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>The disk_ioctl function is not needed when <tt>_FS_READONLY == 1</tt> and <tt>_MAX_SS == _MIN_SS</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
72
Libraries/FatFs/doc/en/dread.html
Executable file
72
Libraries/FatFs/doc/en/dread.html
Executable file
@ -0,0 +1,72 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/dread.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - disk_read</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>disk_read</h2>
|
||||
<p>The disk_read function is called to read data from the sector(s) of storage device.</p>
|
||||
<pre>
|
||||
DRESULT disk_read (
|
||||
BYTE <span class="arg">pdrv</span>, <span class="c">/* [IN] Physical drive number */</span>
|
||||
BYTE* <span class="arg">buff</span>, <span class="c">/* [OUT] Pointer to the read data buffer */</span>
|
||||
DWORD <span class="arg">sector</span>, <span class="c">/* [IN] Start sector number */</span>
|
||||
UINT <span class="arg">count</span> <span class="c">/* [IN] Number of sectros to read */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Physical drive number to identify the target device.</dd>
|
||||
<dt>buff</dt>
|
||||
<dd>Pointer to the first item of the <em>byte array</em> to store read data.</dd>
|
||||
<dt>sector</dt>
|
||||
<dd>Start sector number in 32-bit LBA.</dd>
|
||||
<dt>count</dt>
|
||||
<dd>Number of sectors to read.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Value</h4>
|
||||
<dl class="ret">
|
||||
<dt>RES_OK (0)</dt>
|
||||
<dd>The function succeeded.</dd>
|
||||
<dt>RES_ERROR</dt>
|
||||
<dd>A hard error occured during the read operation and could not recover it.</dd>
|
||||
<dt>RES_PARERR</dt>
|
||||
<dd>Invalid parameter.</dd>
|
||||
<dt>RES_NOTRDY</dt>
|
||||
<dd>The device has not been initialized.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The data read/write operation to the storage devices is done in unit of <em>sector</em>. FatFs supports the sector size in range of from 512 to 4096 bytes. When FatFs is configured to fixed sector size (<tt>_MIN_SS == MAX_SS</tt>, this will be the most case), the read/write function must work at that sector size. When FatFs is configured to variable sector size (<tt>_MIN_SS != MAX_SS</tt>), sector size is inquired with <tt>disk_ioctl</tt> function following <tt>disk_initialize</tt> function.</p>
|
||||
<p>The memory address specified by <tt class="arg">buff</tt> is not that always aligned to word boundary because the argument is defined as <tt>BYTE*</tt>. The unaligned read/write request can occure at <a href="appnote.html#fs1">direct transfer</a>. If the bus architecture, especially DMA controller, does not allow unaligned memory access, it should be solved in this function. There are some workarounds described below to avoid this issue.</p>
|
||||
<ul>
|
||||
<li>Convert word transfer to byte transfer in this function if needed. - Recommended.</li>
|
||||
<li>On the <tt>f_read()</tt> calls, avoid long read request that includes a whole of sector. - Any direct transfer never occures.</li>
|
||||
<li>On the <tt>f_read(fp, data, btw, bw)</tt> calls, make sure that <tt>(((UINT)data & 3) == (f_tell(fp) & 3))</tt> is true. - Word alignment of <tt class="arg">buff</tt> is guaranteed.</li>
|
||||
</ul>
|
||||
<p>Generally, a multiple sector transfer request must not be split into single sector transactions to the storage device, or you will not get good read throughput.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
48
Libraries/FatFs/doc/en/dstat.html
Executable file
48
Libraries/FatFs/doc/en/dstat.html
Executable file
@ -0,0 +1,48 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/dstat.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - disk_status</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>disk_status</h2>
|
||||
<p>The disk_status function is called to inquire the current drive status.</p>
|
||||
<pre>
|
||||
DSTATUS disk_status (
|
||||
BYTE <span class="arg">pdrv</span> <span class="c">/* [IN] Physical drive number */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameter</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Physical drive number to identify the target device. Always zero at single drive system.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>The current drive status is returned in combination of status flags described below. FatFs refers only <tt>STA_NOINIT</tt> and <tt>STA_PROTECT</tt>.</p>
|
||||
<dl class="ret">
|
||||
<dt>STA_NOINIT</dt>
|
||||
<dd>Indicates that the device is not initialized and not ready to work. This flag is set on system reset, media removal or failure of <tt>disk_initialize</tt> function. It is cleared on <tt>disk_initialize</tt> function succeeded. Any media change that occurs asynchronously must be captured and reflect it to the status flags, or auto-mount function will not work correctly. If the system does not support media change detection, application program needs to explicitly re-mount the volume with <tt>f_mount</tt> function after each media change.</dd>
|
||||
<dt>STA_NODISK</dt>
|
||||
<dd>Indicates that no medium in the drive. This is always cleared at fixed disk drive. Note that FatFs does not refer this flag.</dd>
|
||||
<dt>STA_PROTECT</dt>
|
||||
<dd>Indicates that the medium is write protected. This is always cleared at the drives without write protect function. Not valid if no medium in the drive.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
76
Libraries/FatFs/doc/en/dwrite.html
Executable file
76
Libraries/FatFs/doc/en/dwrite.html
Executable file
@ -0,0 +1,76 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/dwrite.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - disk_write</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>disk_write</h2>
|
||||
<p>The disk_write function is called to write data to the sector(s) of storage device.</p>
|
||||
<pre>
|
||||
DRESULT disk_write (
|
||||
BYTE <span class="arg">drv</span>, <span class="c">/* [IN] Physical drive number */</span>
|
||||
const BYTE* <span class="arg">buff</span>, <span class="c">/* [IN] Pointer to the data to be written */</span>
|
||||
DWORD <span class="arg">sector</span>, <span class="c">/* [IN] Sector number to write from */</span>
|
||||
UINT <span class="arg">count</span> <span class="c">/* [IN] Number of sectors to write */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Physical drive number to identify the target device.</dd>
|
||||
<dt>buff</dt>
|
||||
<dd>Pointer to the first item of the <em>byte array</em> to be written. The size of data to be written is sector size * <tt class="arg">count</tt> bytes.</dd>
|
||||
<dt>sector</dt>
|
||||
<dd>Start sector number in 32-bit LBA.</dd>
|
||||
<dt>count</dt>
|
||||
<dd>Number of sectors to write.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<dl class="ret">
|
||||
<dt>RES_OK (0)</dt>
|
||||
<dd>The function succeeded.</dd>
|
||||
<dt>RES_ERROR</dt>
|
||||
<dd>A hard error occured during the write operation and could not recover it.</dd>
|
||||
<dt>RES_WRPRT</dt>
|
||||
<dd>The medium is write protected.</dd>
|
||||
<dt>RES_PARERR</dt>
|
||||
<dd>Invalid parameter.</dd>
|
||||
<dt>RES_NOTRDY</dt>
|
||||
<dd>The device has not been initialized.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The specified memory address is not that always aligned to word boundary because the type of pointer is defined as <tt>BYTE*</tt>. For more information, refer to the description of <a href="dread.html"><tt>disk_read</tt></a> function.</p>
|
||||
<p>Generally, a multiple sector transfer request must not be split into single sector transactions to the storage device, or you will never get good write throughput.</p>
|
||||
<p>FatFs expects delayed write function of the disk control layer. The write operation to the media does not need to be completed when return from this function by what write operation is in progress or data is only stored into the write-back cache. But write data on the <tt class="arg">buff</tt> is invalid after return from this function. The write completion request is done by <tt>CTRL_SYNC</tt> command of <tt><a href="dioctl.html">disk_ioctl</a></tt> function. Therefore, if a delayed write function is implemented, the write throughput of the file system will be improved.</p>
|
||||
<p><em>Remarks: Application program MUST NOT call this function, or FAT structure on the volume can be collapsed.</em></p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This function is not needed when <tt>_FS_READONLY == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
62
Libraries/FatFs/doc/en/eof.html
Executable file
62
Libraries/FatFs/doc/en/eof.html
Executable file
@ -0,0 +1,62 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/eof.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_eof</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_eof</h2>
|
||||
<p>The f_eof function tests for end-of-file on a file.</p>
|
||||
<pre>
|
||||
int f_eof (
|
||||
FIL* <span class="arg">fp</span> <span class="c">/* [IN] File object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structure.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>The <tt>f_eof</tt> function returns a non-zero value if the read/write pointer has reached end of the file; otherwise it returns a zero.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>In this revision, this function is implemented as a macro. It does not have any validation and mutual exclusion.</p>
|
||||
<pre>
|
||||
<span class="k">#define</span> f_eof(fp) ((int)((fp)->fptr == (fp)->fsize))
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Always available.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="lseek.html">f_lseek</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
62
Libraries/FatFs/doc/en/error.html
Executable file
62
Libraries/FatFs/doc/en/error.html
Executable file
@ -0,0 +1,62 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/error.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_error</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_error</h2>
|
||||
<p>The f_error tests for an error on a file.</p>
|
||||
<pre>
|
||||
int f_error (
|
||||
FIL* <span class="arg">fp</span> <span class="c">/* [IN] File object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structure.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>Returns a non-zero value if a hard error has occured; otherwise it returns a zero.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>In this revision, this function is implemented as a macro. It does not have any validation and mutual exclusion.</p>
|
||||
<pre>
|
||||
<span class="k">#define</span> f_error(fp) ((fp)->err)
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Always available.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
117
Libraries/FatFs/doc/en/expand.html
Executable file
117
Libraries/FatFs/doc/en/expand.html
Executable file
@ -0,0 +1,117 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/lseek.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_expand</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_expand</h2>
|
||||
<p>The f_expand function prepares or allocates a contiguous data area to the file.</p>
|
||||
|
||||
<pre>
|
||||
FRESULT f_expand (
|
||||
FIL* <span class="arg">fp</span>, <span class="c">/* [IN] File object */</span>
|
||||
FSIZE_t <span class="arg">fsz</span>, <span class="c">/* [IN] File size expanded to */</span>
|
||||
BYTE <span class="arg">opt</span> <span class="c">/* [IN] Operation mode */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object.</dd>
|
||||
<dt>fsz</dt>
|
||||
<dd>Number of bytes in size to prepare or allocate for the file. The data type <tt>FSIZE_t</tt> is an alias of either <tt>DWORD</tt>(32-bit) or <tt>QWORD</tt>(64-bit) depends on the configuration option <tt>_FS_EXFAT</tt>.</dd>
|
||||
<dt>opt</dt>
|
||||
<dd>Operation mode. Prepare only (0) or Allocate now (1).</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#dn">FR_DENIED</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_expand</tt> function prepares or allocates a contiguous data area to the file. When <tt class="arg">opt</tt> is 1, the function allocates a contiguous data area to the file. Unlike expansion of file by <tt>f_lseek</tt> function, the file must be truncated prior to use this function and read/write pointer of the file stays at top of the file after the function. The file content allocated with this function is <em>undefined</em> because no data is written to the file in this process. The function can fail with <tt>FR_DENIED</tt> due to some reasons below.</p>
|
||||
<ul>
|
||||
<li>No free contiguous space was found.</li>
|
||||
<li>Size of the file was not zero.</li>
|
||||
<li>The file has been opened in read-only mode.</li>
|
||||
<li>Not allowable file size. (>= 4GiB on FAT volume)</li>
|
||||
</ul>
|
||||
<p>When <tt class="arg">opt</tt> is 0, the function finds a contiguous data area and set it as suggested point for next allocation instead of allocating it to the file. The next cluster allocation is started at top of the contiguous area found by this function. Thus the write file is guaranteed be contiguous and no allocation delay until the size reaches that size at least unless any other changes to the volume is performed.</p>
|
||||
<p>The contiguous file would have an advantage at time-critical read/write operations. It eliminates some overheads in the file system and the storage media caused by random access due to fragmented file data. Especially FAT access for the contiguous file on the exFAT volume is completely eliminated and storage media will be accessed sequentially.</p>
|
||||
<p>Also the contiguous file can be easily accessed directly via low-level disk functions. But this is not recommended in consideration for future compatibility.</p>
|
||||
</div>
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_USE_EXPAND == 1</tt> and <tt>_FS_READONLY == 0</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Creating a contiguous file */</span>
|
||||
|
||||
<span class="c">/* Create a new file */</span>
|
||||
res = f_open(fp = malloc(sizeof (FIL)), "file.dat", FA_WRITE|FA_CREATE_ALWAYS);
|
||||
if (res) { <span class="c">/* Check if the file has been opened */</span>
|
||||
free(fp);
|
||||
die("Failed to open the file.");
|
||||
}
|
||||
|
||||
<span class="c">/* Alloacte a 100 MiB of contiguous area to the file */</span>
|
||||
res = f_expand(fp, 104857600, 1);
|
||||
if (res) { <span class="c">/* Check if the file has been expanded */</span>
|
||||
f_close(fp);
|
||||
free(fp);
|
||||
die("Failed to allocate contiguous area.");
|
||||
}
|
||||
|
||||
<span class="c">/* Now you have a contiguous file accessible with fp */</span>
|
||||
|
||||
</pre>
|
||||
<pre>
|
||||
<span class="c">/* Accessing the contiguous file via low-level disk functions */</span>
|
||||
|
||||
<span class="c">/* Get physical location of the file data */</span>
|
||||
drv = fp->obj.fs->drv;
|
||||
lba = fp->obj.fs->database + fp->obj.fs->csize * (fp->obj.sclust - 2);
|
||||
|
||||
<span class="c">/* Write 2048 sectors from top of the file at a time */</span>
|
||||
res = disk_write(drv, buffer, lba, 2048);
|
||||
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="lseek.html">f_lseek</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
57
Libraries/FatFs/doc/en/fattime.html
Executable file
57
Libraries/FatFs/doc/en/fattime.html
Executable file
@ -0,0 +1,57 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/fattime.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - get_fattime</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>get_fattime</h2>
|
||||
<p>The get_fattime function is called to get the current time.</p>
|
||||
<pre>
|
||||
DWORD get_fattime (void);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Value</h4>
|
||||
<p>Currnet local time shall be returned as bit-fields packed into a <tt>DWORD</tt> value. The bit fields are as follows:</p>
|
||||
<dl class="ret">
|
||||
<dt>bit31:25</dt>
|
||||
<dd>Year origin from the 1980 (0..127)</dd>
|
||||
<dt>bit24:21</dt>
|
||||
<dd>Month (1..12)</dd>
|
||||
<dt>bit20:16</dt>
|
||||
<dd>Day of the month(1..31)</dd>
|
||||
<dt>bit15:11</dt>
|
||||
<dd>Hour (0..23)</dd>
|
||||
<dt>bit10:5</dt>
|
||||
<dd>Minute (0..59)</dd>
|
||||
<dt>bit4:0</dt>
|
||||
<dd>Second / 2 (0..29)</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>get_fattime</tt> function shall return any valid time even if the system does not support a real time clock. If a zero is returned, the file will not have a valid timestamp.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This function is not needed when <tt>_FS_READONLY == 1</tt> or <tt>_FS_NORTC == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
91
Libraries/FatFs/doc/en/fdisk.html
Executable file
91
Libraries/FatFs/doc/en/fdisk.html
Executable file
@ -0,0 +1,91 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/fdisk.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_fdisk</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_fdisk</h2>
|
||||
<p>The f_fdisk fucntion divides a physical drive.</p>
|
||||
<pre>
|
||||
FRESULT f_fdisk (
|
||||
BYTE <span class="arg">pdrv</span>, <span class="c">/* [IN] Physical drive number */</span>
|
||||
const DWORD* <span class="arg">szt</span>, <span class="c">/* [IN] Partition map table */</span>
|
||||
void* <span class="arg">work</span> <span class="c">/* [IN] Work area */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>pdrv</dt>
|
||||
<dd>Specifies the <em>physical drive</em> to be divided. This is not the logical drive number but the drive identifier passed to the low level disk functions.</dd>
|
||||
<dt>szt</dt>
|
||||
<dd>Pointer to the first item of the partition map table.</dd>
|
||||
<dt>work</dt>
|
||||
<dd>Pointer to the function work area. The size must be at least <tt>_MAX_SS</tt> bytes.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#wp">FR_WRITE_PROTECTED</a>,
|
||||
<a href="rc.html#ip">FR_INVALID_PARAMETER</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_fdisk</tt> function creates partitions on the physical drive. The partitioning format is in generic FDISK format, so that it can create upto four primary partitions. Logical volumes in the extended partition is not supported. The partition map table with four items specifies how to divide the physical drive. The first item specifies the size of first primary partition and fourth item specifies the fourth primary partition. If the value is less than or equal to 100, it specifies the partition size in percentage of the entire drive space. If it is larger than 100, it specifies the partition size in unit of sector. The partitions are located on the drive in order of from first item.</p>
|
||||
</div>
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_READOLNY == 0</tt>, <tt>_USE_MKFS == 1</tt> and <tt>_MULTI_PARTITION == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Volume management table defined by user (required when _MULTI_PARTITION == 1) */</span>
|
||||
|
||||
PARTITION VolToPart[] = {
|
||||
{0, 1}, <span class="c">/* "0:" ==> Physical drive 0, 1st partition */</span>
|
||||
{0, 2}, <span class="c">/* "1:" ==> Physical drive 0, 2nd partition */</span>
|
||||
{1, 0} <span class="c">/* "2:" ==> Physical drive 1, auto detection */</span>
|
||||
};
|
||||
</pre>
|
||||
<pre>
|
||||
<span class="c">/* Initialize a brand-new disk drive mapped to physical drive 0 */</span>
|
||||
|
||||
DWORD plist[] = {50, 50, 0, 0}; <span class="c">/* Divide drive into two partitions */</span>
|
||||
BYTE work[_MAX_SS];
|
||||
|
||||
f_fdisk(0, plist, work); <span class="c">/* Divide physical drive 0 */</span>
|
||||
|
||||
f_mkfs("0:", FM_ANY, work, sizeof work); <span class="c">/* Create FAT volume on the logical drive 0 */</span>
|
||||
f_mkfs("1:", FM_ANY, work, sizeof work); <span class="c">/* Create FAT volume on the logical drive 1 */</span>
|
||||
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><a href="filename.html#vol">Volume management</a>, <a href="mkfs.html"><tt>f_mkfs</tt></a></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
85
Libraries/FatFs/doc/en/filename.html
Executable file
85
Libraries/FatFs/doc/en/filename.html
Executable file
@ -0,0 +1,85 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/filename.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - Path Names</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<h1>Path Names on the FatFs</h1>
|
||||
|
||||
<div class="para doc" id="nam">
|
||||
<h3>Format of the path names</h3>
|
||||
<p>The format of path name on the FatFs module is similer to the filename specs of DOS/Windos as follows:</p>
|
||||
<pre>"[<em>drive</em>:][/]<em>directory</em>/<em>file</em>"</pre>
|
||||
<p>The FatFs module supports long file name (LFN) and 8.3 format file name (SFN). The LFN can be used when (<tt><a href="config.html#use_lfn">_USE_LFN</a> != 0</tt>). The sub directories are separated with a \ or / in the same way as DOS/Windows API. Duplicated separators are skipped and ignored. Only a difference is that the logical drive is specified in a numeral with a colon. When drive number is omitted, the drive number is assumed as <em>default drive</em> (drive 0 or current drive).</p>
|
||||
<p>Control characters (<tt>'\0'</tt> to <tt>'\x1F'</tt>) are recognized as end of the path name. Leading/embedded spaces in the path name are valid as a part of the name at LFN configuration but the space is recognized as end of the path name at non-LFN configuration. Trailing spaces and dots are ignored at both configurations.</p>
|
||||
<p>In default configuration (<tt><a href="config.html#fs_rpath">_FS_RPATH</a> == 0</tt>), it does not have a concept of current directory like OS oriented file system. All objects on the volume are always specified in full path name that follows from the root directory. Dot directory names (<tt>".", ".."</tt>) are not allowed. Heading separator is ignored and it can be exist or omitted. The default drive is fixed to drive 0.</p>
|
||||
<p>When relative path is enabled (<tt>_FS_RPATH >= 1</tt>), specified path is followed from the root directory if a heading separator is exist. If not, it is followed from the current directory of the drive set by <a href="chdir.html"><tt>f_chdir</tt></a> function. Dot names are also allowed for the path names. The default drive is the current drive set by <a href="chdrive.html"><tt>f_chdrive</tt></a> function.</p>
|
||||
<table class="lst2">
|
||||
<tr><td>Path name</td><td>_FS_RPATH == 0</td><td>_FS_RPATH >= 1</td></tr>
|
||||
<tr class="lst3"><td>file.txt</td><td>A file in the root directory of the drive 0</td><td>A file in the current directory of the current drive</td></tr>
|
||||
<tr><td>/file.txt</td><td>A file in the root directory of the drive 0</td><td>A file in the root directory of the current drive</td></tr>
|
||||
<tr><td></td><td>The root directory of the drive 0</td><td>The current directory of the current drive</td></tr>
|
||||
<tr><td>/</td><td>The root directory of the drive 0</td><td>The root directory of the current drive</td></tr>
|
||||
<tr><td>2:</td><td>The root directory of the drive 2</td><td>The current directory of the drive 2</td></tr>
|
||||
<tr><td>2:/</td><td>The root directory of the drive 2</td><td>The root directory of the drive 2</td></tr>
|
||||
<tr><td>2:file.txt</td><td>A file in the root directory of the drive 2</td><td>A file in the current directory of the drive 2</td></tr>
|
||||
<tr><td>../file.txt</td><td>Invalid name</td><td>A file in the parent directory</td></tr>
|
||||
<tr><td>.</td><td>Invalid name</td><td>This directory</td></tr>
|
||||
<tr><td>..</td><td>Invalid name</td><td>Parent directory of the current directory (*)</td></tr>
|
||||
<tr><td>dir1/..</td><td>Invalid name</td><td>The current directory</td></tr>
|
||||
<tr><td>/..</td><td>Invalid name</td><td>The root directory (sticks the top level)</td></tr>
|
||||
</table>
|
||||
<p>When option <tt><a href="config.html#str_volume_id">_STR_VOLUME_ID</a></tt> is specified, also pre-defined strings can be used as drive identifier in the path name instead of a numeral. e.g. <tt>"sd:file1.txt"</tt>, <tt>"ram:swapfile.dat"</tt> and DOS/Windows style drive letter, of course.</p>
|
||||
<p><em>Remark: In this revision, double dot name <tt>".."</tt> cannot follow the parent directory on the exFAT volume. It will work as <tt>"."</tt> and stay there.</em></p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="case">
|
||||
<h3>Legal Characters and Case Sensitivity</h3>
|
||||
<p>On the FAT file system, legal characters for object name (file/directory name) are, <tt>0-9 A-Z ! # $ % & ' ( ) - @ ^ _ ` { } ~</tt> and extended characters (<tt>\x80</tt>-<tt>\xFF</tt>). Under LFN supported system, also <tt>+ , ; = [ ]</tt> and space are legal for the object name and the white spaces and periods can be placed anywhere in the path name except for end of the object name.</p>
|
||||
<p>FAT file system is case-insensitive to the object names on the volume. All object names are compared in case-insensitive. For example, these three names, <tt>file.txt</tt>, <tt>File.Txt</tt> and <tt>FILE.TXT</tt>, are identical. This is applied to also extended charactres. When an object is created on the FAT volume, upper converted name is recorded to the SFN entry, and the raw name is recorded to the LFN entry.</p>
|
||||
<p>As for the DBCS language MS-DOS, it was case-sensitive to the extended characters. To follow this specification, FatFs works with case-sensitive to the extended characters at only non-LFN with DBCS configuration (DOS/DBCS specs). But at LFN configuration, FatFs works with case-insensitive to all characters (WindowsNT specs). This can cause a problem on compatibility with Windows system when an object with extended characters is created on the volume at non-LFN and DBCS configuration; therfore the object names with DBCS extended characters should not be used on the FAT volume shared by those systems.</p>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="uni">
|
||||
<h3>Unicode API</h3>
|
||||
<p>The path names are input/output in either ANSI/OEM code or Unicode depends on the configuration options. The type of arguments which specify the path names are defined as <tt>TCHAR</tt>. It is an alias of <tt>char</tt> by default. The code set used to the path name string is ANSI/OEM specifid by <tt><a href="config.html#code_page">_CODE_PAGE</a></tt>. When <tt><a href="config.html#lfn_unicode">_LFN_UNICODE</a></tt> is set to 1, the type of the <tt>TCHAR</tt> is switched to <tt>WCHAR</tt> to support Unicode (UTF-16 encoding). In this case, the full-featured LFN specification is supported and the Unicode specific characters, such as ✝☪✡☸☭, can also be used for the path name. It also affects data types and encoding of the string I/O functions. To define literal strings, <tt>_T(s)</tt> and <tt>_TEXT(s)</tt> macro are available to select either ANSI/OEM or Unicode automatically. The code shown below is an example to define the literal strings.</p>
|
||||
<pre>
|
||||
f_open(fp, "filename.txt", FA_READ); <span class="c">/* ANSI/OEM string */</span>
|
||||
f_open(fp, L"filename.txt", FA_READ); <span class="c">/* Unicode string */</span>
|
||||
f_open(fp, _T("filename.txt"), FA_READ); <span class="c">/* Changed by configuration */</span>
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para doc" id="vol">
|
||||
<h3>Volume Management</h3>
|
||||
<p>FatFs module needs dynamic work area, <em>file system object</em>, for each volume (logical drive). It is registered/unregistered to the FatFs module by <tt>f_mount</tt> function. By default, each logical drive is bound to the physical drive with the same drive number and an FAT volume on the drive is serched by the volume mount process. It reads boot sectors and checks it if it is an FAT boot sector in order of sector 0 as SFD format, 1st partition, 2nd partition, 3rd partition and 4th partition as FDISK format.</p>
|
||||
<p>When <tt><a href="config.html#multi_partition">_MULTI_PARTITION</a> == 1</tt> is specified by configuration option, each individual logical drive is bound to the partition on the physical drive specified by volume management table. The volume management table must be defined by user to resolve the relationship between logical drives and partitions. Following code is an example of a volume management table.</p>
|
||||
<pre>
|
||||
Example: Logical drive 0-2 are tied to three pri-partitions on the physical drive 0 (fixed drive)
|
||||
Logical drive 3 is tied to an FAT volume on the physical drive 1 (removable drive)
|
||||
|
||||
PARTITION VolToPart[] = {
|
||||
{0, 1}, <span class="c">/* "0:" ==> Physical drive 0, 1st partition */</span>
|
||||
{0, 2}, <span class="c">/* "1:" ==> Physical drive 0, 2nd partition */</span>
|
||||
{0, 3}, <span class="c">/* "2:" ==> Physical drive 0, 3rd partition */</span>
|
||||
{1, 0} <span class="c">/* "3:" ==> Physical drive 1, auto detection */</span>
|
||||
};
|
||||
</pre>
|
||||
<div><img src="../res/f7.png" width="828" height="288" alt="relationship between logical drive and physical drive"></div>
|
||||
<p>There are some considerations on using multi-partition configuration.</p>
|
||||
<ul>
|
||||
<li>The physical drive that has two or more mounted partitions must be non-removable. Media change while a system operation is prohibited.</li>
|
||||
<li>Only four primary partitions can be specified. Extended partition is not supported.</li>
|
||||
<li>Windows does not support multiple volumes on the removable storage. Only first parition will be recognized.</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
111
Libraries/FatFs/doc/en/findfirst.html
Executable file
111
Libraries/FatFs/doc/en/findfirst.html
Executable file
@ -0,0 +1,111 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/findfirst.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_findfirst</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_findfirst</h2>
|
||||
<p>The f_findfirst function searches a directroy for an item.</p>
|
||||
<pre>
|
||||
FRESULT f_findfirst (
|
||||
DIR* <span class="arg">dp</span>, <span class="c">/* [OUT] Poninter to the directory object */</span>
|
||||
FILINFO* <span class="arg">fno</span>, <span class="c">/* [OUT] Pointer to the file information structure */</span>
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Pointer to the directory name to be opened */</span>
|
||||
const TCHAR* <span class="arg">pattern</span> <span class="c">/* [IN] Pointer to the matching pattern string */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>dp</dt>
|
||||
<dd>Pointer to the blank directory object.</dd>
|
||||
<dt>fno</dt>
|
||||
<dd>Pointer to the file information structure to store the information about the found item.</dd>
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">directory name</a> to be opened.</dd>
|
||||
<dt>pattern</dt>
|
||||
<dd>Pointer to the nul-terminated string that specifies the name matching pattern to be searched for. It is referred by also subsequent <tt>f_findnext</tt> function, so that the string must be valid while the successive function calls.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>,
|
||||
<a href="rc.html#tf">FR_TOO_MANY_OPEN_FILES</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>After the directory specified by <tt class="arg">path</tt> could be opened, it starts to search the directory for items with the name specified by <tt class="arg">pattern</tt>. If the first item is found, the information about the object is stored into the file information structure. For more information about file information structure, refer to <a href="readdir.html"><tt>f_readdir</tt></a> function.</p>
|
||||
<p>The matching pattern can contain wildcard characters (<tt>?</tt> and <tt>*</tt>). A <tt>?</tt> matches an any character and an <tt>*</tt> matches an any string in length of zero or longer. When support of long file name is enabled, only <tt>fname[]</tt> is tested at <tt>_USE_FIND == 1</tt> and also <tt>altname[]</tt> is tested at <tt>_USE_FIND == 2</tt>. In this revision, there are some differences listed below between FatFs and standard systems in matching condition.</p>
|
||||
<ul>
|
||||
<li><tt>"*.*"</tt> never matches any name without extension while it matches any name with or without extension at the standard systems.</li>
|
||||
<li>Any pattern terminated with a period never matches any name while it matches any name without extensiton at the standard systems.</li>
|
||||
<li><a href="filename.html#case">DBCS extended characters</a> are compared in case-sensitive at LFN with non-Unicode configuration.</li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This is a wrapper function of <a href="opendir.html"><tt>f_opendir</tt></a> and <a href="readdir.html"><tt>f_readdir</tt></a> function. Available when <tt>_USE_FIND >= 1</tt> and <tt>_FS_MINIMIZE <= 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Examples</h4>
|
||||
<pre>
|
||||
<span class="c">/* Search a directory for objects and display it */</span>
|
||||
|
||||
void find_image_file (void)
|
||||
{
|
||||
FRESULT fr; <span class="c">/* Return value */</span>
|
||||
DIR dj; <span class="c">/* Directory search object */</span>
|
||||
FILINFO fno; <span class="c">/* File information */</span>
|
||||
|
||||
fr = f_findfirst(&dj, &fno, "", "dsc*.jpg"); <span class="c">/* Start to search for photo files */</span>
|
||||
|
||||
while (fr == FR_OK && fno.fname[0]) { <span class="c">/* Repeat while an item is found */</span>
|
||||
printf("%s\n", fno.fname); <span class="c">/* Display the object name */</span>
|
||||
fr = f_findnext(&dj, &fno); <span class="c">/* Search for next item */</span>
|
||||
}
|
||||
|
||||
f_closedir(&dj);
|
||||
}
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="findnext.html">f_findnext</a>, <a href="closedir.html">f_closedir</a>, <a href="sdir.html">DIR</a>, <a href="sfileinfo.html">FILINFO</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
69
Libraries/FatFs/doc/en/findnext.html
Executable file
69
Libraries/FatFs/doc/en/findnext.html
Executable file
@ -0,0 +1,69 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/findnext.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_findnext</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_findnext</h2>
|
||||
<p>The f_findnext function searches for a next matched object</p>
|
||||
<pre>
|
||||
FRESULT f_findnext (
|
||||
DIR* <span class="arg">dp</span>, <span class="c">/* [IN] Poninter to the directory object */</span>
|
||||
FILINFO* <span class="arg">fno</span> <span class="c">/* [OUT] Pointer to the file information structure */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>dp</dt>
|
||||
<dd>Pointer to the valid directory object created by <tt>f_findfirst</tt> function.</dd>
|
||||
<dt>fno</dt>
|
||||
<dd>Pointer to the file information structure to store the information about the found directory item.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>It continues the search from a previous call to the <tt>f_findfirst</tt> or <tt>f_findnext</tt> function. If found, the information about the object is stored into the file information structure. If no item to be read, a null string will be returned into <tt>fno->fname[]</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This is a wrapper function of <a href="readdir.html"><tt>f_readdir</tt></a> function. Available when <tt>_USE_FIND == 1</tt> and <tt>_FS_MINIMIZE <= 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="findfirst.html">f_findfirst</a>, <a href="closedir.html">f_closedir</a>, <a href="sdir.html">DIR</a>, <a href="sfileinfo.html">FILINFO</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
139
Libraries/FatFs/doc/en/forward.html
Executable file
139
Libraries/FatFs/doc/en/forward.html
Executable file
@ -0,0 +1,139 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/forward.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_forward</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_forward</h2>
|
||||
<p>The f_forward function reads the file data and forward it to the data streaming device.</p>
|
||||
<pre>
|
||||
FRESULT f_forward (
|
||||
FIL* <span class="arg">fp</span>, <span class="c">/* [IN] File object */</span>
|
||||
UINT (*<span class="arg">func</span>)(const BYTE*,UINT), <span class="c">/* [IN] Data streaming function */</span>
|
||||
UINT <span class="arg">btf</span>, <span class="c">/* [IN] Number of bytes to forward */</span>
|
||||
UINT* <span class="arg">bf</span> <span class="c">/* [OUT] Number of bytes forwarded */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object.</dd>
|
||||
<dt>func</dt>
|
||||
<dd>Pointer to the user-defined data streaming function. For details, refer to the sample code.</dd>
|
||||
<dt>btf</dt>
|
||||
<dd>Number of bytes to forward in range of <tt>UINT</tt>.</dd>
|
||||
<dt>bf</dt>
|
||||
<dd>Pointer to the <tt>UINT</tt> variable to return number of bytes forwarded.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#dn">FR_DENIED</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_forward</tt> function reads the data from the file and forward it to the outgoing stream without data buffer. This is suitable for small memory system because it does not require any data buffer at application module. The file pointer of the file object increases in number of bytes forwarded. In case of <tt class="arg">*bf</tt> is less than <tt class="arg">btf</tt> without error, it means the requested bytes could not be transferred due to end of file or stream goes busy during data transfer.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_USE_FORWARD == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example (Audio playback)</h4>
|
||||
<pre>
|
||||
<span class="c">/*------------------------------------------------------------------------*/</span>
|
||||
<span class="c">/* Sample code of data transfer function to be called back from f_forward */</span>
|
||||
<span class="c">/*------------------------------------------------------------------------*/</span>
|
||||
|
||||
UINT out_stream ( <span class="c">/* Returns number of bytes sent or stream status */</span>
|
||||
const BYTE *p, <span class="c">/* Pointer to the data block to be sent */</span>
|
||||
UINT btf <span class="c">/* >0: Transfer call (Number of bytes to be sent). 0: Sense call */</span>
|
||||
)
|
||||
{
|
||||
UINT cnt = 0;
|
||||
|
||||
|
||||
if (btf == 0) { <span class="c">/* Sense call */</span>
|
||||
<span class="c">/* Return stream status (0: Busy, 1: Ready) */</span>
|
||||
<span class="c">/* When once it returned ready to sense call, it must accept a byte at least */</span>
|
||||
<span class="c">/* at subsequent transfer call, or f_forward will fail with FR_INT_ERR. */</span>
|
||||
if (FIFO_READY) cnt = 1;
|
||||
}
|
||||
else { <span class="c">/* Transfer call */</span>
|
||||
do { <span class="c">/* Repeat while there is any data to be sent and the stream is ready */</span>
|
||||
FIFO_PORT = *p++;
|
||||
cnt++;
|
||||
} while (cnt < btf && FIFO_READY);
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
|
||||
<span class="c">/*------------------------------------------------------------------------*/</span>
|
||||
<span class="c">/* Sample code using f_forward function */</span>
|
||||
<span class="c">/*------------------------------------------------------------------------*/</span>
|
||||
|
||||
FRESULT play_file (
|
||||
char *fn <span class="c">/* Pointer to the audio file name to be played */</span>
|
||||
)
|
||||
{
|
||||
FRESULT rc;
|
||||
FIL fil;
|
||||
UINT dmy;
|
||||
|
||||
<span class="c">/* Open the audio file in read only mode */</span>
|
||||
rc = f_open(&fil, fn, FA_READ);
|
||||
if (rc) return rc;
|
||||
|
||||
<span class="c">/* Repeat until the file pointer reaches end of the file */</span>
|
||||
while (rc == FR_OK && !f_eof(&fil)) {
|
||||
|
||||
<span class="c">/* some processes... */</span>
|
||||
|
||||
<span class="c">/* Fill output stream periodicaly or on-demand */</span>
|
||||
rc = f_forward(&fil, out_stream, 1000, &dmy);
|
||||
}
|
||||
|
||||
<span class="c">/* Close the file and return */</span>
|
||||
f_close(&fil);
|
||||
return rc;
|
||||
}
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="gets.html">fgets</a>, <a href="write.html">f_write</a>, <a href="close.html">f_close</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
71
Libraries/FatFs/doc/en/getcwd.html
Executable file
71
Libraries/FatFs/doc/en/getcwd.html
Executable file
@ -0,0 +1,71 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/getcwd.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_getcwd</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_getcwd</h2>
|
||||
<p>The f_getcwd function retrieves the current directory and current drive.</p>
|
||||
<pre>
|
||||
FRESULT f_getcwd (
|
||||
TCHAR* <span class="arg">buff</span>, <span class="c">/* [OUT] Buffer to return path name */</span>
|
||||
UINT <span class="arg">len</span> <span class="c">/* [IN] The length of the buffer */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>buff</dt>
|
||||
<dd>Pointer to the buffer to receive the current directory string.</dd>
|
||||
<dt>len</dt>
|
||||
<dd>Size of the buffer in unit of <tt>TCHAR</tt>.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_getcwd</tt> function retrieves full path name of the current directory of the current drive. When <tt>_VOLUMES</tt> is larger than 1, a logical drive number is added to top of the path name.</p>
|
||||
<p><em>Note: In this revision, this function cannot retrieve the current directory path on the exFAT volume. It always returns the root directory path.</em></p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_RPATH == 2</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="chdrive.html">f_chdrive</a>, <a href="chdir.html">f_chdir</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
95
Libraries/FatFs/doc/en/getfree.html
Executable file
95
Libraries/FatFs/doc/en/getfree.html
Executable file
@ -0,0 +1,95 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/getfree.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_getfree</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_getfree</h2>
|
||||
<p>The f_getfree function gets number of the free clusters on the volume.</p>
|
||||
<pre>
|
||||
FRESULT f_getfree (
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Logical drive number */</span>
|
||||
DWORD* <span class="arg">nclst</span>, <span class="c">/* [OUT] Number of free clusters */</span>
|
||||
FATFS** <span class="arg">fatfs</span> <span class="c">/* [OUT] Corresponding file system object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">logical drive</a>. A null-string means the default drive.</dd>
|
||||
<dt>nclst</dt>
|
||||
<dd>Pointer to the <tt>DWORD</tt> variable to store number of free clusters.</dd>
|
||||
<dt>fatfs</dt>
|
||||
<dd>Pointer to pointer that to store a pointer to the corresponding file system object.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Descriptions</h4>
|
||||
<p>The <tt>f_getfree</tt> function gets number of free clusters on the volume. The member <tt>csize</tt> in the file system object indicates number of sectors per cluster, so that the free space in unit of sector can be calcurated with this information. When FSINFO structure on the FAT32 volume is not in sync, this function can return an incorrect free cluster count. To avoid this problem, FatFs can be forced full FAT scan by <tt><a href="config.html#fs_nofsinfo">_FS_NOFSINFO</a></tt> option.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_READONLY == 0</tt> and <tt>_FS_MINIMIZE == 0</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
FATFS *fs;
|
||||
DWORD fre_clust, fre_sect, tot_sect;
|
||||
|
||||
|
||||
<span class="c">/* Get volume information and free clusters of drive 1 */</span>
|
||||
res = f_getfree("1:", &fre_clust, &fs);
|
||||
if (res) die(res);
|
||||
|
||||
<span class="c">/* Get total sectors and free sectors */</span>
|
||||
tot_sect = (fs->n_fatent - 2) * fs->csize;
|
||||
fre_sect = fre_clust * fs->csize;
|
||||
|
||||
<span class="c">/* Print the free space (assuming 512 bytes/sector) */</span>
|
||||
printf("%10lu KiB total drive space.\n%10lu KiB available.\n",
|
||||
tot_sect / 2, fre_sect / 2);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="sfatfs.html">FATFS</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
82
Libraries/FatFs/doc/en/getlabel.html
Executable file
82
Libraries/FatFs/doc/en/getlabel.html
Executable file
@ -0,0 +1,82 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=ISO-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/getlabel.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_getlabel</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_getlabel</h2>
|
||||
<p>The f_getlabel function returns volume label and volume serial number of a drive.</p>
|
||||
<pre>
|
||||
FRESULT f_getlabel (
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Drive number */</span>
|
||||
TCHAR* <span class="arg">label</span>, <span class="c">/* [OUT] Volume label */</span>
|
||||
DWORD* <span class="arg">vsn</span> <span class="c">/* [OUT] Volume serial number */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">logical drive</a>. Null-string specifies the default drive.</dd>
|
||||
<dt>label</dt>
|
||||
<dd>Pointer to the buffer to store the volume label. The buffer size must be at least 24 items at <tt>_LFN_UNICODE == 0</tt> or 12 items at <tt>_LFN_UNICODE == 1</tt>. If the volume has no label, a null-string will be returned. Set null pointer if this information is not needed.</dd>
|
||||
<dt>vsn</dt>
|
||||
<dd>Pointer to the <tt>DWORD</tt> variable to store the volume serial number. Set null pointer if this information is not needed.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_USE_LABEL == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
char str[24];
|
||||
|
||||
<span class="c">/* Get volume label of the default drive */</span>
|
||||
f_getlabel("", str, 0);
|
||||
|
||||
<span class="c">/* Get volume label of the drive 2 */</span>
|
||||
f_getlabel("2:", str, 0);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<tt><a href="setlabel.html">f_setlabel</a></tt>
|
||||
</div>
|
||||
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
65
Libraries/FatFs/doc/en/gets.html
Executable file
65
Libraries/FatFs/doc/en/gets.html
Executable file
@ -0,0 +1,65 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/gets.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_gets</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_gets</h2>
|
||||
<p>The f_gets reads a string from the file.</p>
|
||||
<pre>
|
||||
TCHAR* f_gets (
|
||||
TCHAR* <span class="arg">buff</span>, <span class="c">/* [OUT] Read buffer */</span>
|
||||
int <span class="arg">len</span>, <span class="c">/* [IN] Size of the read buffer */</span>
|
||||
FIL* <span class="arg">fp</span> <span class="c">/* [IN] File object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>buff</dt>
|
||||
<dd>Pointer to read buffer to store the read string.</dd>
|
||||
<dt>len</dt>
|
||||
<dd>Size of the read buffer in unit of character.</dd>
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structure.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>When the function succeeded, <tt class="arg">buff</tt> will be returuned.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The read operation continues until a <tt>'\n'</tt> is stored, reached end of the file or the buffer is filled with <tt>len - 1</tt> characters. The read string is terminated with a <tt>'\0'</tt>. When no character to read or any error occured during read operation, it returns a null pointer. The status of EOF and error can be examined with <tt>f_eof</tt> and <tt>f_error</tt> function.</p>
|
||||
<p>When FatFs is configured to Unicode API (<tt>_LFN_UNICODE == 1</tt>), data types on the srting fuctions, <tt>f_putc</tt>, <tt>f_puts</tt>, <tt>f_printf</tt> and <tt>f_gets</tt>, is also switched to Unicode. The character encoding on the file to be read/written via those functions is selected by <tt>_STRF_ENCODE</tt> option.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This is a wrapper function of <a href="read.html"><tt>f_read</tt></a> function. Available when <tt>_USE_STRFUNC</tt> is 1 or 2. When it is set to 2, <tt>'\r'</tt>s contained in the file are stripped out.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="read.html">f_read</a>, <a href="putc.html">f_putc</a>, <a href="puts.html">f_puts</a>, <a href="printf.html">f_printf</a>, <a href="close.html">f_close</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
131
Libraries/FatFs/doc/en/lseek.html
Executable file
131
Libraries/FatFs/doc/en/lseek.html
Executable file
@ -0,0 +1,131 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/lseek.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_lseek</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_lseek</h2>
|
||||
<p>The f_lseek function moves the file read/write pointer of an open file object. It can also be used to expand the file size (cluster pre-allocation). </p>
|
||||
|
||||
<pre>
|
||||
FRESULT f_lseek (
|
||||
FIL* <span class="arg">fp</span>, <span class="c">/* [IN] File object */</span>
|
||||
FSIZE_t <span class="arg">ofs</span> <span class="c">/* [IN] File read/write pointer */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object.</dd>
|
||||
<dt>ofs</dt>
|
||||
<dd>Byte offset from top of the file to set read/write pointer. The data type <tt>FSIZE_t</tt> is an alias of either <tt>DWORD</tt>(32-bit) or <tt>QWORD</tt>(64-bit) depends on the configuration option <tt>_FS_EXFAT</tt>.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>File read/write ponter in the open file object points the data byte to be read/written at next read/write operation. It advances as the number of bytes read/written. The <tt>f_lseek</tt> function moves the file read/write pointer without any read/write operation to the file.</p>
|
||||
<p>When an offset beyond the file size is specified at write mode, the file size is expanded to the specified offset. The file data in the expanded area is <em>undefined</em> because no data is written to the file in this process. This is suitable to pre-allocate a data area to the file quickly for fast write operation. When a contiguous data area needs to be allocated to the file, use <tt>f_expand</tt> function instead. After the <tt>f_lseek</tt> function succeeded, the current read/write pointer should be checked in order to make sure the read/write pointer has been moved correctry. In case of the read/write pointer is not the expected value, either of followings has been occured.</p>
|
||||
<ul>
|
||||
<li>End of file. The specified <tt class="arg">ofs</tt> was clipped at end of the file because the file has been opened in read-only mode.</li>
|
||||
<li>Disk full. There is no free space on the volume to expand the file.</li>
|
||||
</ul>
|
||||
<p>The fast seek function enables fast backward/long seek operations without FAT access by using an on-memory CLMT (cluster link map table). It is applied to <tt>f_read</tt> and <tt>f_write</tt> function as well, however, the file size cannot be expanded by <tt>f_write</tt>, <tt>f_lseek</tt> function while the file is in fast seek mode.</p>
|
||||
<p>The fast seek function is enabled when the member <tt>cltbl</tt> in the file object is not NULL. The CLMT must be created into the <tt>DWORD</tt> array prior to use the fast seek function. To create the CLMT, set address of the <tt>DWORD</tt> array to the member <tt>cltbl</tt> in the open file object, set the size of array in unit of items to the first item and call the <tt>f_lseek</tt> function with <tt class="arg">ofs</tt><tt> = CREATE_LINKMAP</tt>. After the function succeeded and CLMT is created, no FAT access is occured in subsequent <tt>f_read</tt>, <tt>f_write</tt>, <tt>f_lseek</tt> function to the file. The number of items used or required is returned into the first item of the array. The number of items to be used is (number of the file fragments + 1) * 2. For example, when the file is fragmented in 5, 12 items in the array will be used. If the function failed with <tt>FR_NOT_ENOUGH_CORE</tt>, the given array size is insufficient for the file.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_MINIMIZE <= 2</tt>. To use fast seek function, <tt>_USE_FASTSEEK</tt> needs to be set 1.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Open file */</span>
|
||||
fp = malloc(sizeof (FIL));
|
||||
res = f_open(fp, "file.dat", FA_READ|FA_WRITE);
|
||||
if (res) ...
|
||||
|
||||
<span class="c">/* Move to offset of 5000 from top of the file */</span>
|
||||
res = f_lseek(fp, 5000);
|
||||
|
||||
<span class="c">/* Move to end of the file to append data */</span>
|
||||
res = f_lseek(fp, f_size(fp));
|
||||
|
||||
<span class="c">/* Forward 3000 bytes */</span>
|
||||
res = f_lseek(fp, f_tell(fp) + 3000);
|
||||
|
||||
<span class="c">/* Rewind 2000 bytes (take care on wraparound) */</span>
|
||||
res = f_lseek(fp, f_tell(fp) - 2000);
|
||||
</pre>
|
||||
<pre>
|
||||
<span class="c">/* Cluster pre-allocation (to prevent buffer overrun on streaming write) */</span>
|
||||
|
||||
res = f_open(fp, recfile, FA_CREATE_NEW | FA_WRITE); <span class="c">/* Create a file */</span>
|
||||
|
||||
res = f_lseek(fp, PRE_SIZE); <span class="c">/* Expand file size (cluster pre-allocation) */</span>
|
||||
if (res || f_tell(fp) != PRE_SIZE) ... <span class="c">/* Check if the file has been expanded */</span>
|
||||
|
||||
res = f_lseek(fp, DATA_START); <span class="c">/* Record data stream WITHOUT cluster allocation delay */</span>
|
||||
... <span class="c">/* Write operation should be aligned to sector boundary to optimize the write throughput */</span>
|
||||
|
||||
res = f_truncate(fp); <span class="c">/* Truncate unused area */</span>
|
||||
res = f_lseek(fp, 0); <span class="c">/* Put file header */</span>
|
||||
...
|
||||
|
||||
res = f_close(fp);
|
||||
</pre>
|
||||
<pre>
|
||||
<span class="c">/* Using fast seek function */</span>
|
||||
|
||||
DWORD clmt[SZ_TBL]; <span class="c">/* Cluster link map table buffer */</span>
|
||||
|
||||
res = f_open(fp, fname, FA_READ | FA_WRITE); <span class="c">/* Open a file */</span>
|
||||
|
||||
res = f_lseek(fp, ofs1); <span class="c">/* This is normal seek (cltbl is nulled on file open) */</span>
|
||||
|
||||
fp->cltbl = clmt; <span class="c">/* Enable fast seek function (cltbl != NULL) */</span>
|
||||
clmt[0] = SZ_TBL; <span class="c">/* Set table size */</span>
|
||||
res = f_lseek(fp, CREATE_LINKMAP); <span class="c">/* Create CLMT */</span>
|
||||
...
|
||||
|
||||
res = f_lseek(fp, ofs2); <span class="c">/* This is fast seek */</span>
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="truncate.html">f_truncate</a>, <a href="expand.html">f_expand</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
80
Libraries/FatFs/doc/en/mkdir.html
Executable file
80
Libraries/FatFs/doc/en/mkdir.html
Executable file
@ -0,0 +1,80 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/mkdir.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_mkdir</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_mkdir</h2>
|
||||
<p>The f_mkdir function creates a new directory.</p>
|
||||
<pre>
|
||||
FRESULT f_mkdir (
|
||||
const TCHAR* <span class="arg">path</span> <span class="c">/* [IN] Directory name */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameter</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">directory name</a> to create. </dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Value</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#dn">FR_DENIED</a>,
|
||||
<a href="rc.html#ex">FR_EXIST</a>,
|
||||
<a href="rc.html#wp">FR_WRITE_PROTECTED</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>This function creates a new directory. To remove a directory, use <a href="unlink.html"><tt>f_unlink</tt></a> function.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_READONLY == 0</tt> and <tt>_FS_MINIMIZE == 0</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
res = f_mkdir("sub1");
|
||||
if (res) die(res);
|
||||
res = f_mkdir("sub1/sub2");
|
||||
if (res) die(res);
|
||||
res = f_mkdir("sub1/sub2/sub3");
|
||||
if (res) die(res);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
116
Libraries/FatFs/doc/en/mkfs.html
Executable file
116
Libraries/FatFs/doc/en/mkfs.html
Executable file
@ -0,0 +1,116 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/mkfs.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_mkfs</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_mkfs</h2>
|
||||
<p>The f_mkfs fucntion creates an FAT/exFAT volume on the logical drive.</p>
|
||||
<pre>
|
||||
FRESULT f_mkfs (
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Logical drive number */</span>
|
||||
BYTE <span class="arg">opt</span>, <span class="c">/* [IN] Format options */</span>
|
||||
DWORD <span class="arg">au</span>, <span class="c">/* [IN] Size of the allocation unit */</span>
|
||||
void* <span class="arg">work</span>, <span class="c">/* [-] Working buffer */</span>
|
||||
UINT <span class="arg">len</span> <span class="c">/* [IN] Size of working buffer */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string specifies the <a href="filename.html">logical drive</a> to be formatted. If it has no drive number in it, it means the default drive. The logical drive may or may not be mounted for the format process.</dd>
|
||||
<dt>opt</dt>
|
||||
<dd>Specifies the format option in combination of <tt>FM_FAT</tt>, <tt>FM_FAT32</tt>, <tt>FM_EXFAT</tt> and bitwise-or of these three, <tt>FM_ANY</tt>. <tt>FM_EXFAT</tt> is ignored when exFAT is not enabled. These flags specify which FAT type to be created on the volume. If two or more types are specified, one out of them will be selected depends on the volume size. The flag <tt>FM_SFD</tt> specifies to place the volume on the drive in SFD format.</dd>
|
||||
<dt>au</dt>
|
||||
<dd>Specifies size of the allocation unit (cluter) in unit of byte. The valid value is <tt>n</tt> times the sector size. The <tt>n</tt> is power of 2 from 1 to 128 for FAT volume and upto 16MiB for exFAT volume. If zero is given, the default allocation unit size is selected depends on the volume size.</dd>
|
||||
<dt>work</dt>
|
||||
<dd>Pointer to the working buffer used for the format process.</dd>
|
||||
<dt>len</dt>
|
||||
<dd>Size of the working buffer in unit of byte. It needs to be the sector size at least. Plenty of working buffer reduces number of write transactions to the drive and the format process will be finished quickly.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#wp">FR_WRITE_PROTECTED</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ma">FR_MKFS_ABORTED</a>,
|
||||
<a href="rc.html#ip">FR_INVALID_PARAMETER</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The FAT sub-type, FAT12/FAT16/FAT32, of FAT volume except exFAT is determined by only number of clusters on the volume and nothing else, according to the FAT specification issued by Microsoft. Thus which FAT sub-type is selected, is depends on the volume size and the specified cluster size. In case of the combination of FAT type and cluter size specified by argument cannot be valid on the volume, the function will fail with <tt>FR_MKFS_ABORTED</tt>.</p>
|
||||
<p>The allocation unit, also called 'cluster', is a unit of disk space allocation for files. When the size of allocation unit is 32768 bytes, a file with 100 bytes in size occupies 32768 bytes of disk space. The space efficiency of disk usage gets worse as increasing size of allocation unit, but, on the other hand, the read/write performance increases as the size of allocation unit. Therefore the size of allocation unit is a trade-off between space efficiency and performance. For the large storages in GB order, 32768 bytes or larger cluster (this is automatically selected by default) is recommended for most case unless extremely many small files are created on a volume.</p>
|
||||
<p>There are two disk formats, FDISK and SFD. The FDISK format is usually used for harddisk, MMC, SDC, CFC and U Disk. It can divide a physical drive into one or more partitions with a partition table on the MBR (maser boot record, the first sector of the physical drive). The SFD (super-floppy disk) is non-partitioned disk format. The FAT volume starts at the first sector of the physical drive without any disk partitioning. It is usually used for floppy disk, Microdrive, optical disk and most type of super-floppy media. Some systems support only either one of two formats and other is not supported.</p>
|
||||
<p>When <tt>FM_SFD</tt> is not specified (the volume is bound to a physical drive), a primary partition occupies whole drive space is created and then the FAT volume is created in it. When <tt>FM_SFD</tt> is specified, the FAT volume occupies from the first sector of the drive is created.</p>
|
||||
<p>If the logical drive to be formatted is bound to the specific partition (1-4) by support of multiple partition, <tt><a href="config.html#multi_partition">_MULTI_PARTITION</a></tt>, the FAT volume is created into the partition and <tt>FM_SFD</tt> flag is ignored. The physical drive needs to be partitioned with <tt>f_fdisk</tt> function or any other partitioning tools prior to create the FAT volume with this function.</p>
|
||||
</div>
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_READOLNY == 0</tt> and <tt>_USE_MKFS == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Format default drive and create a file */</span>
|
||||
int main (void)
|
||||
{
|
||||
FATFS fs; <span class="c">/* File system object */</span>
|
||||
FIL fil; <span class="c">/* File object */</span>
|
||||
FRESULT res; <span class="c">/* API result code */</span>
|
||||
UINT bw; <span class="c">/* Bytes written */</span>
|
||||
BYTE work[_MAX_SS]; <span class="c">/* Work area (larger is better for processing time) */</span>
|
||||
|
||||
|
||||
<span class="c">/* Create FAT volume */</span>
|
||||
res = f_mkfs("", FM_ANY, 0, work, sizeof work);
|
||||
if (res) ...
|
||||
|
||||
<span class="c">/* Register work area */</span>
|
||||
f_mount(&fs, "", 0);
|
||||
|
||||
<span class="c">/* Create a file as new */</span>
|
||||
res = f_open(&fil, "hello.txt", FA_CREATE_NEW | FA_WRITE);
|
||||
if (res) ...
|
||||
|
||||
<span class="c">/* Write a message */</span>
|
||||
f_write(&fil, "Hello, World!\r\n", 15, &bw);
|
||||
if (bw != 15) ...
|
||||
|
||||
<span class="c">/* Close the file */</span>
|
||||
f_close(&fil);
|
||||
|
||||
<span class="c">/* Unregister work area */</span>
|
||||
f_mount(0, "", 0);
|
||||
|
||||
...
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><a href="../res/mkfs.xls">Example of volume size and format parameters</a>, <a href="filename.html#vol">Volume management</a>, <tt><a href="fdisk.html">f_fdisk</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
83
Libraries/FatFs/doc/en/mount.html
Executable file
83
Libraries/FatFs/doc/en/mount.html
Executable file
@ -0,0 +1,83 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/mount.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_mount</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_mount</h2>
|
||||
<p>The f_mount fucntion registers/unregisters file system object to the FatFs module.</p>
|
||||
<pre>
|
||||
FRESULT f_mount (
|
||||
FATFS* <span class="arg">fs</span>, <span class="c">/* [IN] File system object */</span>
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] Logical drive number */</span>
|
||||
BYTE <span class="arg">opt</span> <span class="c">/* [IN] Initialization option */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fs</dt>
|
||||
<dd>Pointer to the file system object to be registered and cleared. Null pointer unregisters the registered file system object.</dd>
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">logical drive</a>. The string without drive number means the default drive.</dd>
|
||||
<dt>opt</dt>
|
||||
<dd>Mounting option. 0: Do not mount now (to be mounted on the first access to the volume), 1: Force mounted the volume to check if it is ready to work.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_mount</tt> function registers/unregisters a file system object used for the volume (logical drive) to the FatFs module as follows:</p>
|
||||
<ol>
|
||||
<li>Determines the logical drive which specified by <tt class="arg">path</tt>.</li>
|
||||
<li>Clears and unregisters the regsitered work area of the drive if exist.</li>
|
||||
<li>Clears and registers the new work area to the drive if <tt class="arg">fs</tt> is not NULL.</li>
|
||||
<li>Performs volume mount process to the drive if forced mounting is specified.</li>
|
||||
</ol>
|
||||
<p>The file system object is the work area needed for each logical drive. It must be given to the logical drive with this function prior to use any API functions except for <tt>f_mkfs/f_fdisk</tt> function to the logical drive.</p>
|
||||
<p>If forced mounting is not specified (<tt>opt = 0</tt>), this function always succeeds regardless of the physical drive status. It only clears (de-initializes) the given work area and registers its address to the internal table and no activity of the physical drive in this function. To unregister the work area, specify a NULL to the <tt class="arg">fs</tt>, and then the work area can be discarded. The volume mount processes, initialize the corresponding physical drive, find the FAT volume in it and initialize the work area, is performed in the subsequent file access functions when either or both of following condition is true.</p>
|
||||
<ul>
|
||||
<li>File system object has not been initialized. It is de-initialized by <tt>f_mount</tt> function.</li>
|
||||
<li>Physical drive is not initialized. It is de-initialized by system reset or media removal.</li>
|
||||
</ul>
|
||||
<p>If the function with forced mounting (<tt>opt = 1</tt>) failed, it means that the file system object has been registered successfully but the volume is currently not ready to work. The volume mount process will be attempted at subsequent file access functions if the file system object is not initialized. (delayed mounting)</p>
|
||||
<p>If implementation of the disk I/O layer lacks media change detection, application program needs to perform a <tt>f_mount</tt> function after each media change to force cleared the file system object.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Always available.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a></tt>, <tt><a href="sfatfs.html">FATFS</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
173
Libraries/FatFs/doc/en/open.html
Executable file
173
Libraries/FatFs/doc/en/open.html
Executable file
@ -0,0 +1,173 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/open.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_open</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_open</h2>
|
||||
<p>The f_open function creates a <em>file object</em> to be used to access the file.</p>
|
||||
<pre>
|
||||
FRESULT f_open (
|
||||
FIL* <span class="arg">fp</span>, <span class="c">/* [OUT] Pointer to the file object structure */</span>
|
||||
const TCHAR* <span class="arg">path</span>, <span class="c">/* [IN] File name */</span>
|
||||
BYTE <span class="arg">mode</span> <span class="c">/* [IN] Mode flags */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the blank file object structure.</dd>
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">file name</a> to open or create.</dd>
|
||||
<dt>mode</dt>
|
||||
<dd>Mode flags that specifies the type of access and open method for the file. It is specified by a combination of following flags.<br>
|
||||
<table class="lst">
|
||||
<tr><th>Value</th><th>Meaning</th></tr>
|
||||
<tr><td>FA_READ</td><td>Specifies read access to the object. Data can be read from the file.</tr>
|
||||
<tr><td>FA_WRITE</td><td>Specifies write access to the object. Data can be written to the file. Combine with <tt>FA_READ</tt> for read-write access.</td></tr>
|
||||
<tr><td>FA_OPEN_EXISTING</td><td>Opens the file. The function fails if the file is not existing. (Default)</td></tr>
|
||||
<tr><td>FA_CREATE_NEW</td><td>Creates a new file. The function fails with <tt>FR_EXIST</tt> if the file is existing.</td></tr>
|
||||
<tr><td>FA_CREATE_ALWAYS</td><td>Creates a new file. If the file is existing, it will be truncated and overwritten.</td></tr>
|
||||
<tr><td>FA_OPEN_ALWAYS</td><td>Opens the file if it is existing. If not, a new file will be created.</td></tr>
|
||||
<tr><td>FA_OPEN_APPEND</td><td>Same as <tt>FA_OPEN_ALWAYS</tt> except the read/write pointer is set end of the file.</td></tr>
|
||||
</table>
|
||||
</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#ok">FR_NO_FILE</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#dn">FR_DENIED</a>,
|
||||
<a href="rc.html#ex">FR_EXIST</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#wp">FR_WRITE_PROTECTED</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#lo">FR_LOCKED</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>,
|
||||
<a href="rc.html#tf">FR_TOO_MANY_OPEN_FILES</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>Before using any file function, a work area (file system object) needs to be registered to the logical drive with <a href="mount.html"><tt>f_mount</tt></a> function. All API functions except for <tt>f_mkfs/f_fdisk</tt> function get ready to work after this procedure.</p>
|
||||
<p>After <tt>f_open</tt> function succeeded, the file object is valid. The file object is used for subsequent operations to the file to identify the file. Open file must be closed prior to power down, media removal or re-mount, or the file can be collapsed. To close an open file, use <a href="close.html"><tt>f_close</tt></a> function.</p>
|
||||
<p>If duplicated file open is needed, read <a href="appnote.html#dup">here</a> carefully. However duplicated open of a file with any write mode flag is always prohibited.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Always available. Only <tt>FA_READ</tt> and <tt>FA_OPEN_EXISTING</tt> are supported when <tt>_FS_READONLY == 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
<span class="c">/* Read a text file and display it */</span>
|
||||
|
||||
FATFS FatFs; <span class="c">/* Work area (file system object) for logical drive */</span>
|
||||
|
||||
int main (void)
|
||||
{
|
||||
FIL fil; <span class="c">/* File object */</span>
|
||||
char line[82]; <span class="c">/* Line buffer */</span>
|
||||
FRESULT fr; <span class="c">/* FatFs return code */</span>
|
||||
|
||||
|
||||
<span class="c">/* Register work area to the default drive */</span>
|
||||
f_mount(&FatFs, "", 0);
|
||||
|
||||
<span class="c">/* Open a text file */</span>
|
||||
fr = f_open(&fil, "message.txt", FA_READ);
|
||||
if (fr) return (int)fr;
|
||||
|
||||
<span class="c">/* Read all lines and display it */</span>
|
||||
while (f_gets(line, sizeof line, &fil))
|
||||
printf(line);
|
||||
|
||||
<span class="c">/* Close the file */</span>
|
||||
f_close(&fil);
|
||||
|
||||
return 0;
|
||||
}
|
||||
</pre>
|
||||
<pre>
|
||||
<span class="c">/* Copy a file "file.bin" on the drive 1 to drive 0 */</span>
|
||||
|
||||
int main (void)
|
||||
{
|
||||
FATFS fs[2]; <span class="c">/* Work area (file system object) for logical drives */</span>
|
||||
FIL fsrc, fdst; <span class="c">/* File objects */</span>
|
||||
BYTE buffer[4096]; <span class="c">/* File copy buffer */</span>
|
||||
FRESULT fr; <span class="c">/* FatFs function common result code */</span>
|
||||
UINT br, bw; <span class="c">/* File read/write count */</span>
|
||||
|
||||
|
||||
<span class="c">/* Register work area for each logical drive */</span>
|
||||
f_mount(&fs[0], "0:", 0);
|
||||
f_mount(&fs[1], "1:", 0);
|
||||
|
||||
<span class="c">/* Open source file on the drive 1 */</span>
|
||||
fr = f_open(&fsrc, "1:file.bin", FA_READ);
|
||||
if (fr) return (int)fr;
|
||||
|
||||
<span class="c">/* Create destination file on the drive 0 */</span>
|
||||
fr = f_open(&fdst, "0:file.bin", FA_WRITE | FA_CREATE_ALWAYS);
|
||||
if (fr) return (int)fr;
|
||||
|
||||
<span class="c">/* Copy source to destination */</span>
|
||||
for (;;) {
|
||||
fr = f_read(&fsrc, buffer, sizeof buffer, &br); <span class="c">/* Read a chunk of source file */</span>
|
||||
if (fr || br == 0) break; <span class="c">/* error or eof */</span>
|
||||
fr = f_write(&fdst, buffer, br, &bw); <span class="c">/* Write it to the destination file */</span>
|
||||
if (fr || bw < br) break; <span class="c">/* error or disk full */</span>
|
||||
}
|
||||
|
||||
<span class="c">/* Close open files */</span>
|
||||
f_close(&fsrc);
|
||||
f_close(&fdst);
|
||||
|
||||
<span class="c">/* Unregister work area prior to discard it */</span>
|
||||
f_mount(NULL, "0:", 0);
|
||||
f_mount(NULL, "1:", 0);
|
||||
|
||||
return (int)fr;
|
||||
}
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="read.html">f_read</a>, <a href="write.html">f_write</a>, <a href="close.html">f_close</a>, <a href="sfile.html">FIL</a>, <a href="sfatfs.html">FATFS</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
75
Libraries/FatFs/doc/en/opendir.html
Executable file
75
Libraries/FatFs/doc/en/opendir.html
Executable file
@ -0,0 +1,75 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/opendir.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_opendir</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_opendir</h2>
|
||||
<p>The f_opendir function opens a directory.</p>
|
||||
<pre>
|
||||
FRESULT f_opendir (
|
||||
DIR* <span class="arg">dp</span>, <span class="c">/* [OUT] Pointer to the directory object structure */</span>
|
||||
const TCHAR* <span class="arg">path</span> <span class="c">/* [IN] Directory name */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>dp</dt>
|
||||
<dd>Pointer to the blank directory object to create a new one.</dd>
|
||||
<dt>path</dt>
|
||||
<dd>Pointer to the null-terminated string that specifies the <a href="filename.html">directory name</a> to be opened.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>
|
||||
<a href="rc.html#ok">FR_OK</a>,
|
||||
<a href="rc.html#de">FR_DISK_ERR</a>,
|
||||
<a href="rc.html#ie">FR_INT_ERR</a>,
|
||||
<a href="rc.html#nr">FR_NOT_READY</a>,
|
||||
<a href="rc.html#np">FR_NO_PATH</a>,
|
||||
<a href="rc.html#in">FR_INVALID_NAME</a>,
|
||||
<a href="rc.html#io">FR_INVALID_OBJECT</a>,
|
||||
<a href="rc.html#id">FR_INVALID_DRIVE</a>,
|
||||
<a href="rc.html#ne">FR_NOT_ENABLED</a>,
|
||||
<a href="rc.html#ns">FR_NO_FILESYSTEM</a>,
|
||||
<a href="rc.html#tm">FR_TIMEOUT</a>,
|
||||
<a href="rc.html#nc">FR_NOT_ENOUGH_CORE</a>,
|
||||
<a href="rc.html#tf">FR_TOO_MANY_OPEN_FILES</a>
|
||||
</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The <tt>f_opendir</tt> function opens an exsisting directory and creates a directory object for subsequent <tt>f_readdir</tt> function.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>Available when <tt>_FS_MINIMIZE <= 1</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="readdir.html">f_readdir</a>, <a href="closedir.html">f_closedir</a>, <a href="sdir.html">DIR</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
93
Libraries/FatFs/doc/en/printf.html
Executable file
93
Libraries/FatFs/doc/en/printf.html
Executable file
@ -0,0 +1,93 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/printf.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_printf</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_printf</h2>
|
||||
<p>The f_printf function writes formatted string to the file.</p>
|
||||
<pre>
|
||||
int f_printf (
|
||||
FIL* <span class="arg">fp</span>, <span class="c">/* [IN] File object */</span>
|
||||
const TCHAR* <span class="arg">fmt</span>, <span class="c">/* [IN] Format stirng */</span>
|
||||
...
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structure.</dd>
|
||||
<dt>fmt</dt>
|
||||
<dd>Pointer to the null terminated format string. The terminator charactor will not be written.</dd>
|
||||
<dt>...</dt>
|
||||
<dd>Optional arguments...</dd>
|
||||
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>When the function succeeded, it returns number of characters written. If the function could not write the generated string to the file due to disk full or an error, <tt>EOF (-1)</tt> will be returned.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para desc">
|
||||
<h4>Description</h4>
|
||||
<p>The format control directive is a sub-set of standard library shown as follos:</p>
|
||||
<ul>
|
||||
<li>Type: <tt>c C s S d D u U x X b B</tt></li>
|
||||
<li>Size: <tt>l L</tt></li>
|
||||
<li>Flag: <tt>0 -</tt></li>
|
||||
</ul>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This is a wrapper function of <a href="write.html"><tt>f_write</tt></a> function. Available when <tt>_FS_READONLY == 0</tt> and <tt>_USE_STRFUNC</tt> is 1 or 2. When it is set to 2, <tt>'\n'</tt>s contained in the output are converted to <tt>'\r'+'\n'</tt>.</p>
|
||||
<p>When FatFs is configured to Unicode API (<tt>_LFN_UNICODE == 1</tt>), data types on the srting fuctions, <tt>f_putc</tt>, <tt>f_puts</tt>, <tt>f_printf</tt> and <tt>f_gets</tt> function, is also switched to Unicode. The character encoding on the file to be read/written via those functions is selected by <tt>_STRF_ENCODE</tt> option.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para use">
|
||||
<h4>Example</h4>
|
||||
<pre>
|
||||
f_printf(&fil, "%d", 1234); <span class="c">/* "1234" */</span>
|
||||
f_printf(&fil, "%6d,%3d%%", -200, 5); <span class="c">/* " -200, 5%" */</span>
|
||||
f_printf(&fil, "%ld", 12345L); <span class="c">/* "12345" */</span>
|
||||
f_printf(&fil, "%06d", 25); <span class="c">/* "000025" */</span>
|
||||
f_printf(&fil, "%06d", -25); <span class="c">/* "000-25" */</span>
|
||||
f_printf(&fil, "%-6d", 25); <span class="c">/* "25 " */</span>
|
||||
f_printf(&fil, "%u", -1); <span class="c">/* "65535" or "4294967295" */</span>
|
||||
f_printf(&fil, "%04x", 0xAB3); <span class="c">/* "0ab3" */</span>
|
||||
f_printf(&fil, "%08LX", 0x123ABCL); <span class="c">/* "00123ABC" */</span>
|
||||
f_printf(&fil, "%016b", 0x550F); <span class="c">/* "0101010100001111" */</span>
|
||||
f_printf(&fil, "%s", "String"); <span class="c">/* "String" */</span>
|
||||
f_printf(&fil, "%8s", "abc"); <span class="c">/* " abc" */</span>
|
||||
f_printf(&fil, "%-8s", "abc"); <span class="c">/* "abc " */</span>
|
||||
f_printf(&fil, "%c", 'a'); <span class="c">/* "a" */</span>
|
||||
f_printf(&fil, "%f", 10.0); <span class="c">/* f_printf lacks floating point support */</span>
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="putc.html">f_putc</a>, <a href="puts.html">f_puts</a>, <a href="gets.html">f_gets</a>, <a href="close.html">f_close</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
56
Libraries/FatFs/doc/en/putc.html
Executable file
56
Libraries/FatFs/doc/en/putc.html
Executable file
@ -0,0 +1,56 @@
|
||||
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
|
||||
<html lang="en">
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta http-equiv="Content-Style-Type" content="text/css">
|
||||
<link rel="up" title="FatFs" href="../00index_e.html">
|
||||
<link rel="alternate" hreflang="ja" title="Japanese" href="../ja/putc.html">
|
||||
<link rel="stylesheet" href="../css_e.css" type="text/css" media="screen" title="ELM Default">
|
||||
<title>FatFs - f_putc</title>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
|
||||
<div class="para func">
|
||||
<h2>f_putc</h2>
|
||||
<p>The f_putc funciton puts a character to the file.</p>
|
||||
<pre>
|
||||
int f_putc (
|
||||
TCHAR <span class="arg">chr</span>, <span class="c">/* [IN] A character to put */</span>
|
||||
FIL* <span class="arg">fp</span> <span class="c">/* [IN] File object */</span>
|
||||
);
|
||||
</pre>
|
||||
</div>
|
||||
|
||||
<div class="para arg">
|
||||
<h4>Parameters</h4>
|
||||
<dl class="par">
|
||||
<dt>chr</dt>
|
||||
<dd>A character to be put.</dd>
|
||||
<dt>fp</dt>
|
||||
<dd>Pointer to the open file object structuer.</dd>
|
||||
</dl>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ret">
|
||||
<h4>Return Values</h4>
|
||||
<p>When the character was written successfuly, it returns number of characters written. When the function failed due to disk full or any error, an <tt>EOF (-1)</tt> will be returned.</p>
|
||||
<p>When FatFs is configured to Unicode API (<tt>_LFN_UNICODE == 1</tt>), character encoding on the string fuctions, <tt>f_putc</tt>, <tt>f_puts</tt>, <tt>f_printf</tt> and <tt>f_gets</tt> function, is also switched to Unicode. The character encoding on the file to be read/written via those functions is selected by <tt>_STRF_ENCODE</tt> option.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para comp">
|
||||
<h4>QuickInfo</h4>
|
||||
<p>This is a wrapper function of <a href="write.html"><tt>f_write</tt></a> function. Available when <tt>_FS_READONLY == 0</tt> and <tt>_USE_STRFUNC</tt> is 1 or 2. When it is set to 2, a <tt>'\n'</tt> is converted to <tt>'\r'+'\n'</tt>.</p>
|
||||
</div>
|
||||
|
||||
|
||||
<div class="para ref">
|
||||
<h4>See Also</h4>
|
||||
<p><tt><a href="open.html">f_open</a>, <a href="puts.html">f_puts</a>, <a href="printf.html">f_printf</a>, <a href="gets.html">f_gets</a>, <a href="close.html">f_close</a>, <a href="sfile.html">FIL</a></tt></p>
|
||||
</div>
|
||||
|
||||
<p class="foot"><a href="../00index_e.html">Return</a></p>
|
||||
</body>
|
||||
</html>
|
||||
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Reference in New Issue
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