mirror of
https://github.com/elua/elua.git
synced 2025-01-25 01:02:54 +08:00
Fix minor indentation conflict.
Merge branch 'master' of https://github.com/elua/elua Conflicts: src/platform/lm3s/platform.c
This commit is contained in:
commit
1a85900ac6
@ -214,7 +214,8 @@ local menu =
|
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{
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{ "lm3s", "modules_lm3s.html", "refman_ps_lm3s" },
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{ "str9", "modules_str9.html", "refman_ps_str9" },
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{ "mbed", "modules_mbed.html", "refman_ps_mbed" }
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{ "mbed", "modules_mbed.html", "refman_ps_mbed" },
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{ "mizar32", "modules_mizar32.html", "refman_ps_mizar32" },
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}
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}
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}
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|
@ -9,7 +9,7 @@ local sf = string.format
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-- Data structure declarations
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-- List here all the sections for which we're generating the documentation
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local doc_sections = { "arch_platform", "refman_gen", "refman_ps_lm3s", "refman_ps_str9", "refman_ps_mbed" }
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local doc_sections = { "arch_platform", "refman_gen", "refman_ps_lm3s", "refman_ps_str9", "refman_ps_mbed", "refman_ps_mizar32" }
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-- List here all the components of each section
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local components =
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@ -18,7 +18,8 @@ local components =
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refman_gen = { "bit", "pd", "cpu", "pack", "adc", "term", "pio", "uart", "spi", "tmr", "pwm", "net", "can", "rpc", "elua", "i2c" },
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refman_ps_lm3s = { "disp" },
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refman_ps_str9 = { "pio", "rtc" },
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refman_ps_mbed = { "pio" }
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refman_ps_mbed = { "pio" },
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refman_ps_mizar32 = { "disp" },
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}
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-------------------------------------------------------------------------------
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@ -10,14 +10,14 @@ data_en =
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-- Overview
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overview = [[This part of the platform interface groups functions related to the timers of the MCU. It also makes provisions for using $virtual timers$ on any platform, see @#virtual@this section@
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for details. Keep in mind that in the following paragraphs a $timer id$ can reffer to both a hardware timer or a virtual timer.]],
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for details. Keep in mind that in the following paragraphs a $timer id$ can refer to both a hardware timer or a virtual timer.]],
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-- Data structures, constants and types
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structures =
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{
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{ text = "typedef u32 timer_data_type;",
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name = "Timer data type",
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desc = "This defines the data type used to specify delays and time intervals (which are always specifide in $microseconds$)."
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desc = "This defines the data type used to specify delays and time intervals (which are always specified in $microseconds$)."
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},
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{ text = [[// Timer operations
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@ -130,7 +130,7 @@ enum
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},
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{ sig = "u32 #platform_timer_get_diff_us#( unsigned id, timer_data_type end, timer_data_type start );",
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desc = [[Return the time difference (in us) betweeen two timer values. This function is generic for all platforms, thus it is implemented in %src/common.c%.]],
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desc = [[Return the time difference (in us) between two timer values. This function is generic for all platforms, thus it is implemented in %src/common.c%.]],
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args =
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{
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"$id$ - the timer ID",
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@ -141,7 +141,7 @@ enum
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},
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{ sig = "int #platform_timer_set_match_int#( unsigned id, u32 period_us, int type );",
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desc = "Setup the timer match interrupt. Only available if interrupt support is enabed, check @inthandlers.html@here@ for details.",
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desc = "Setup the timer match interrupt. Only available if interrupt support is enabled, check @inthandlers.html@here@ for details.",
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args =
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{
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"$id$ - the timer ID",
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@ -81,7 +81,7 @@ data_en =
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ret = "$status$ - 1 if no samples are being acquired, 0 if samples are pending acquisition."
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},
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{ sig = "#adc.setblocking#( id, mode )",
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desc = "Set whether or not functions that request converted samples should wait for requested samples or return immediately with what is available.",
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desc = "Set whether or not functions that request converted samples should wait for requested samples or return immediately with what is available. If this function is not called, each channel starts in blocking mode.",
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args =
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{
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"$id$ - ADC channel ID.",
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@ -21,7 +21,7 @@ data_en =
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args =
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{
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"$id$ - the ID of the I2C interface.",
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"$speed$ - the speed of the I2C interface. It can be either $i2c.FAST$ (400KHz) or $i2c.SLOW$ (100KHz).",
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"$speed$ - the clock frequency of the I2C interface. It can be $i2c.FAST$ (400KHz), $i2c.SLOW$ (100KHz) or a number giving the required I2C bus clock speed in Hz.",
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},
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ret = "the actual speed of the I2C interface."
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},
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@ -52,7 +52,7 @@ data_en =
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args =
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{
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"$id$ - the ID of the I2C interface.",
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"$data1$ - the data to send. It can be either a number between 0 and 255, a string or a table (array).",
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"$data1$ - the data to send. It can be either a number between 0 and 255, a string or a table (array) of numbers.",
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"$data2 (optional)$ - the second data to send.",
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"$datan (optional)$ - the %n%-th data to send."
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},
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41
doc/eluadoc/refman_ps_mizar32_disp.lua
Normal file
41
doc/eluadoc/refman_ps_mizar32_disp.lua
Normal file
@ -0,0 +1,41 @@
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-- eLua reference manual - platform data
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data_en =
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{
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-- Title
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title = "eLua reference manual - Mizar32 disp module",
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-- Menu name
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menu_name = "disp",
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-- Overview
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overview = [[This module contains functions to drive the 16x2 character LED panel for the Mizar32.]],
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-- Functions
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funcs =
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{
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{ sig = "#mizar32.disp.clear#()",
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desc = "Clear the display and move the cursor to the top left (position 1,1)."
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},
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{ sig = "#mizar32.disp.goto#( row, column )",
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desc = "Move the cursor to the specified row and column.",
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args =
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{
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"$row$ - A number (1 or 2) giving the row you want to move to.",
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"$column$ - A number (1 to 16) giving the character position within that row."
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}
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},
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{ sig = "#mizar32.disp.print#( message )",
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desc = "Display characters at the current cursor position, moving the cursor right after each character",
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args =
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{
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"$message$ - A string of ASCII text to be written on the display."
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}
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},
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},
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}
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data_pt = data_en
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@ -49,7 +49,7 @@ Here's an alphabetically ordered non-exhaustive list of contributors:
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- Renaud Cerrato - Initial EVK1101 AVR32 port
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- Robert G. Jakabosky - for porting his excellent link:elua_egc.html[emergency garbage collector] patch to eLua
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- Roberto Ierusalimschy, Luiz Henrique Figueiredo, Waldemar Celles - for http://www.lua.org[Lua] :)
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- Sergio Sorrenti and Martin Guy - AVR32 support, http://www.simplemachines.it/index.php?option=com_content&view=article&id=13&Itemid=24[Mizar32] port, testing
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- http://simplemachines.it[SimpleMachines] - AVR32 support, http://www.simplemachines.it/index.php?option=com_content&view=article&id=13&Itemid=24[Mizar32] port, testing
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- Téo Benjamin, Ives Cunha, Rafael Barmak - Pong, TetrIves, SpaceShip games and http://wiki.eluaproject.net/Manfredo[Manfredo], a GPS guided robot, powered by eLua.
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- Vagner Nascimento and Carlos Eduardo Deodoro - eLua Web Builder
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- The eLua users community on our https://lists.berlios.de/mailman/listinfo/elua-dev[discussion list] and http://wiki.eluaproject.net[eLua Wiki]
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|
5
doc/en/modules_mizar32.txt
Normal file
5
doc/en/modules_mizar32.txt
Normal file
@ -0,0 +1,5 @@
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$$HEADER$$
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<h3>Reference manual - Mizar32 platform dependent modules</h3>
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<p>This paragraph presents all the modules specific to the <a href="status.html">Mizar32</a> platform.</p>
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$$FOOTER$$
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@ -59,7 +59,7 @@ install it, then open the com0com serial port manager to create your virtual
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serial port pairs. Then give it a little spin to get used to how it works. Supposing
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that you created COM10 and COM11 as a virtual serial port pair, try this:
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- start your terminal emulator program. My preffered terminal emulator program in
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- start your terminal emulator program. My preferred terminal emulator program in
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Windows is http://www.ayera.com/teraterm/[TeraTerm], but you can use any emulator
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you want. Open COM10 at baud 115200.
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- start another instance of the terminal emulator, but this time open COM11 at baud 115200.
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@ -67,7 +67,7 @@ enum exception_type { done, nonfatal, fatal };
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struct exception {
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enum exception_type type;
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int errnum;
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int errnum;
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};
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define_exception_type(struct exception);
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@ -113,7 +113,7 @@ typedef struct _ServerHandle ServerHandle;
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struct _ServerHandle {
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Transport ltpt; // listening transport, always valid if no error
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Transport atpt; // accepting transport, valid if connection established
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int link_errs;
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int link_errs;
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};
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@ -125,12 +125,12 @@ struct _ServerHandle {
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#endif
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#define TRANSPORT_VERIFY_OPEN \
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if (tpt->fd == INVALID_TRANSPORT) \
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{ \
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e.errnum = ERR_CLOSED; \
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e.type = fatal; \
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Throw( e ); \
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}
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if (tpt->fd == INVALID_TRANSPORT) \
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{ \
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e.errnum = ERR_CLOSED; \
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e.type = fatal; \
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Throw( e ); \
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}
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// Arg & Error Checking Provided to Transport Mechanisms
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int check_num_args (lua_State *L, int desired_n);
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@ -156,11 +156,11 @@ void transport_read_buffer (Transport *tpt, u8 *buffer, int length);
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void transport_write_buffer (Transport *tpt, const u8 *buffer, int length);
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// Check if data is available on connection without reading:
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// - 1 = data available, 0 = no data available
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// - 1 = data available, 0 = no data available
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int transport_readable (Transport *tpt);
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// Check if transport is open:
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// - 1 = connection open, 0 = connection closed
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// - 1 = connection open, 0 = connection closed
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int transport_is_open (Transport *tpt);
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// Shut down connection
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|
58
inc/swi.h
58
inc/swi.h
@ -27,42 +27,42 @@
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/* Now the SWI numbers and reason codes for RDI (Angel) monitors. */
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#define AngelSWI_ARM 0x123456
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#define AngelSWI_ARM 0x123456
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#ifdef __thumb__
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#define AngelSWI 0xAB
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#define AngelSWI 0xAB
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#else
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#define AngelSWI AngelSWI_ARM
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#define AngelSWI AngelSWI_ARM
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#endif
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/* For Thumb-2 code use the BKPT instruction instead of SWI. */
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#ifdef __thumb2__
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#define AngelSWIInsn "bkpt"
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#define AngelSWIAsm bkpt
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#define AngelSWIInsn "bkpt"
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#define AngelSWIAsm bkpt
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#else
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#define AngelSWIInsn "swi"
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#define AngelSWIAsm swi
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#define AngelSWIInsn "swi"
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#define AngelSWIAsm swi
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#endif
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/* The reason codes: */
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#define AngelSWI_Reason_Open 0x01
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#define AngelSWI_Reason_Close 0x02
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#define AngelSWI_Reason_WriteC 0x03
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#define AngelSWI_Reason_Write0 0x04
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#define AngelSWI_Reason_Write 0x05
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#define AngelSWI_Reason_Read 0x06
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#define AngelSWI_Reason_ReadC 0x07
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#define AngelSWI_Reason_IsTTY 0x09
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#define AngelSWI_Reason_Seek 0x0A
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#define AngelSWI_Reason_FLen 0x0C
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#define AngelSWI_Reason_TmpNam 0x0D
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#define AngelSWI_Reason_Remove 0x0E
|
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#define AngelSWI_Reason_Rename 0x0F
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#define AngelSWI_Reason_Clock 0x10
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#define AngelSWI_Reason_Time 0x11
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#define AngelSWI_Reason_System 0x12
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#define AngelSWI_Reason_Errno 0x13
|
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#define AngelSWI_Reason_GetCmdLine 0x15
|
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#define AngelSWI_Reason_HeapInfo 0x16
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#define AngelSWI_Reason_EnterSVC 0x17
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#define AngelSWI_Reason_Open 0x01
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#define AngelSWI_Reason_Close 0x02
|
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#define AngelSWI_Reason_WriteC 0x03
|
||||
#define AngelSWI_Reason_Write0 0x04
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#define AngelSWI_Reason_Write 0x05
|
||||
#define AngelSWI_Reason_Read 0x06
|
||||
#define AngelSWI_Reason_ReadC 0x07
|
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#define AngelSWI_Reason_IsTTY 0x09
|
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#define AngelSWI_Reason_Seek 0x0A
|
||||
#define AngelSWI_Reason_FLen 0x0C
|
||||
#define AngelSWI_Reason_TmpNam 0x0D
|
||||
#define AngelSWI_Reason_Remove 0x0E
|
||||
#define AngelSWI_Reason_Rename 0x0F
|
||||
#define AngelSWI_Reason_Clock 0x10
|
||||
#define AngelSWI_Reason_Time 0x11
|
||||
#define AngelSWI_Reason_System 0x12
|
||||
#define AngelSWI_Reason_Errno 0x13
|
||||
#define AngelSWI_Reason_GetCmdLine 0x15
|
||||
#define AngelSWI_Reason_HeapInfo 0x16
|
||||
#define AngelSWI_Reason_EnterSVC 0x17
|
||||
#define AngelSWI_Reason_ReportException 0x18
|
||||
#define ADP_Stopped_ApplicationExit ((2 << 16) + 38)
|
||||
#define ADP_Stopped_RunTimeError ((2 << 16) + 35)
|
||||
#define ADP_Stopped_ApplicationExit ((2 << 16) + 38)
|
||||
#define ADP_Stopped_RunTimeError ((2 << 16) + 35)
|
||||
|
@ -74,6 +74,16 @@
|
||||
#endif
|
||||
#endif
|
||||
|
||||
// MMCFS uses the virtual timer to implement its timeouts
|
||||
#if defined( BUILD_MMCFS ) && (!defined( VTMR_NUM_TIMERS ) || VTMR_NUM_TIMERS == 0)
|
||||
#error "BUILD_MMCFS needs virtual timer support. Define VTMR_NUM_TIMERS > 0"
|
||||
#endif
|
||||
|
||||
// MMCFS tick runs off VTMR timer so these values must be the same
|
||||
#if defined( BUILD_MMCFS ) && MMCFS_TICK_HZ != VTMR_FREQ_HZ
|
||||
#error "MMCFS_TICK_HZ must be equal to VTMR_FREQ_HZ"
|
||||
#endif
|
||||
|
||||
// CON_BUF_SIZE needs BUF_ENABLE_UART and CON_UART_ID
|
||||
#if defined( CON_BUF_SIZE )
|
||||
#if !defined( BUF_ENABLE_UART )
|
||||
|
@ -224,7 +224,7 @@ u32 platform_timer_op( unsigned id, int op, u32 data )
|
||||
u32 platform_timer_get_diff_us( unsigned id, timer_data_type end, timer_data_type start )
|
||||
{
|
||||
timer_data_type temp;
|
||||
u32 freq;
|
||||
u32 freq, res;
|
||||
|
||||
freq = platform_timer_op( id, PLATFORM_TIMER_OP_GET_CLOCK, 0 );
|
||||
if( start < end )
|
||||
@ -233,7 +233,17 @@ u32 platform_timer_get_diff_us( unsigned id, timer_data_type end, timer_data_typ
|
||||
end = start;
|
||||
start = temp;
|
||||
}
|
||||
return ( ( u64 )( start - end ) * 1000000 ) / freq;
|
||||
|
||||
res = ( ( u64 )( start - end ) * 1000000 ) / freq;
|
||||
|
||||
// The result always ends up being given to lua_pushinteger() which turns
|
||||
// 0x80000000-0xFFFFFFFF into negative numbers, so max out at 2^31-1 to
|
||||
// avoid getting negative results from tmr.getmaxdelay(tmr.VIRT0) and
|
||||
// tmr.gettimediff(N, small, large).
|
||||
#define MAX_U32 ( ~(u32)0 >> 1 )
|
||||
if ( res > MAX_U32 ) res = MAX_U32;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
#ifdef BUILD_INT_HANDLERS
|
||||
|
@ -67,6 +67,25 @@ BYTE CardType; /* b0:MMC, b1:SDC, b2:Block addressing */
|
||||
static
|
||||
BYTE PowerFlag = 0; /* indicates if "power" is on */
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Find the value to set in Timer1 or Timer2 to obtain a timeout of at */
|
||||
/* least N milliseconds. */
|
||||
/* */
|
||||
/* Timer1 and Timer2 are decremented by the virtual timer interrupt, */
|
||||
/* which is free-running and will sometimes decrement TimerN immediately */
|
||||
/* so to wait for N ms to pass, you need to wait for N+1 ticks to occur. */
|
||||
/* */
|
||||
/* Usage example: */
|
||||
/* Timer1 = set_Timer_ms(N); */
|
||||
/* do { whatever } while (Timer1); */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
static UINT set_Timer_ms(UINT ms)
|
||||
{
|
||||
UINT ticks = ms / MMCFS_TICK_MS;
|
||||
return (ticks > 0 ? ticks : 1) + 1;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Transmit a byte to MMC via SPI (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
@ -109,7 +128,7 @@ BYTE wait_ready (void)
|
||||
{
|
||||
BYTE res;
|
||||
|
||||
Timer2 = 500/MMCFS_TICK_MS; /* Wait for ready in timeout of 500ms */
|
||||
Timer2 = set_Timer_ms(500); /* Wait for ready in timeout of 500ms. */
|
||||
rcvr_spi();
|
||||
do
|
||||
res = rcvr_spi();
|
||||
@ -205,8 +224,7 @@ BOOL rcvr_datablock (
|
||||
{
|
||||
BYTE token;
|
||||
|
||||
|
||||
Timer1 = 100/MMCFS_TICK_MS ? 100/MMCFS_TICK_MS : 1;
|
||||
Timer1 = set_Timer_ms(100);
|
||||
do { /* Wait for data packet in timeout of 100ms */
|
||||
token = rcvr_spi();
|
||||
} while ((token == 0xFF) && Timer1);
|
||||
@ -326,29 +344,29 @@ DSTATUS disk_initialize (
|
||||
SELECT(); /* CS = L */
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
|
||||
Timer1 = 1000/MMCFS_TICK_MS; /* Initialization timeout of 1000 msec */
|
||||
Timer1 = set_Timer_ms(1000); /* Initialization timeout of 1000 msec */
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDC Ver2+ */
|
||||
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
do {
|
||||
if (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 1UL << 30) == 0) break; /* ACMD41 with HCS bit */
|
||||
} while (Timer1);
|
||||
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit */
|
||||
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
|
||||
ty = (ocr[0] & 0x40) ? 6 : 2;
|
||||
}
|
||||
}
|
||||
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
do {
|
||||
if (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 1UL << 30) == 0) break; /* ACMD41 with HCS bit */
|
||||
} while (Timer1);
|
||||
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit */
|
||||
for (n = 0; n < 4; n++) ocr[n] = rcvr_spi();
|
||||
ty = (ocr[0] & 0x40) ? 6 : 2;
|
||||
}
|
||||
}
|
||||
} else { /* SDC Ver1 or MMC */
|
||||
ty = (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 0) <= 1) ? 2 : 1; /* SDC : MMC */
|
||||
do {
|
||||
if (ty == 2) {
|
||||
if (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 0) == 0) break; /* ACMD41 */
|
||||
} else {
|
||||
if (send_cmd(CMD1, 0) == 0) break; /* CMD1 */
|
||||
}
|
||||
} while (Timer1);
|
||||
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Select R/W block length */
|
||||
ty = 0;
|
||||
ty = (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 0) <= 1) ? 2 : 1; /* SDC : MMC */
|
||||
do {
|
||||
if (ty == 2) {
|
||||
if (send_cmd(CMD55, 0) <= 1 && send_cmd(CMD41, 0) == 0) break; /* ACMD41 */
|
||||
} else {
|
||||
if (send_cmd(CMD1, 0) == 0) break; /* CMD1 */
|
||||
}
|
||||
} while (Timer1);
|
||||
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Select R/W block length */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
@ -356,13 +374,13 @@ DSTATUS disk_initialize (
|
||||
rcvr_spi(); /* Idle (Release DO) */
|
||||
|
||||
if (TriesLeft)
|
||||
TriesLeft--;
|
||||
TriesLeft--;
|
||||
|
||||
if (ty) { /* Initialization succeded */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
set_max_speed();
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
set_max_speed();
|
||||
} else { /* Initialization failed */
|
||||
power_off();
|
||||
power_off();
|
||||
}
|
||||
|
||||
} while( TriesLeft > 0 && ty == 0 );
|
||||
@ -583,6 +601,7 @@ DRESULT disk_ioctl (
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Device Timer Interrupt Procedure (Platform dependent) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/* This function must be called in period of 10ms */
|
||||
|
||||
void disk_timerproc( void )
|
||||
|
@ -414,9 +414,9 @@ int linenoise_savehistory( int id, const char *filename )
|
||||
int linenoise_getline( int id, char* buffer, int maxinput, const char* prompt )
|
||||
{
|
||||
( void )id;
|
||||
fputs( prompt, stdout );
|
||||
fputs( prompt, stdout );
|
||||
fflush( stdout );
|
||||
return fgets( buffer, maxinput, stdin ) == NULL ? -1 : 0;
|
||||
return fgets( buffer, maxinput, stdin ) == NULL ? -1 : 0;
|
||||
}
|
||||
|
||||
int linenoise_addhistory( int id, const char *line )
|
||||
|
@ -10,15 +10,15 @@
|
||||
// Setup Transport
|
||||
void transport_init (Transport *tpt)
|
||||
{
|
||||
tpt->fd = INVALID_TRANSPORT;
|
||||
tpt->fd = INVALID_TRANSPORT;
|
||||
tpt->tmr_id = 0;
|
||||
}
|
||||
|
||||
// Open Listener / Server
|
||||
void transport_open_listener(lua_State *L, ServerHandle *handle)
|
||||
{
|
||||
// Get args & Set up connection
|
||||
unsigned uart_id, tmr_id;
|
||||
// Get args & Set up connection
|
||||
unsigned uart_id, tmr_id;
|
||||
|
||||
check_num_args( L,3 ); // 1st arg is uart num, 2nd arg is tmr_id, 3nd is handle
|
||||
if ( !lua_isnumber( L, 1 ) )
|
||||
@ -36,15 +36,15 @@ void transport_open_listener(lua_State *L, ServerHandle *handle)
|
||||
if( !platform_timer_exists( tmr_id ) )
|
||||
luaL_error( L, "invalid timer id" );
|
||||
|
||||
handle->ltpt.fd = ( int )uart_id;
|
||||
handle->ltpt.tmr_id = tmr_id;
|
||||
handle->ltpt.fd = ( int )uart_id;
|
||||
handle->ltpt.tmr_id = tmr_id;
|
||||
}
|
||||
|
||||
// Open Connection / Client
|
||||
int transport_open_connection(lua_State *L, Handle *handle)
|
||||
{
|
||||
// Get args & Set up connection
|
||||
unsigned uart_id, tmr_id;
|
||||
// Get args & Set up connection
|
||||
unsigned uart_id, tmr_id;
|
||||
|
||||
check_num_args( L,3 ); // 1st arg is uart num, 2nd arg is tmr_id, 3nd is handle
|
||||
if ( !lua_isnumber( L, 1 ) )
|
||||
@ -59,80 +59,80 @@ int transport_open_connection(lua_State *L, Handle *handle)
|
||||
tmr_id = lua_tonumber( L, 1 );
|
||||
MOD_CHECK_ID( timer, tmr_id );
|
||||
|
||||
handle->tpt.fd = ( int )uart_id;
|
||||
handle->tpt.tmr_id = tmr_id;
|
||||
return 1;
|
||||
handle->tpt.fd = ( int )uart_id;
|
||||
handle->tpt.tmr_id = tmr_id;
|
||||
return 1;
|
||||
}
|
||||
|
||||
// Accept Connection
|
||||
void transport_accept (Transport *tpt, Transport *atpt)
|
||||
{
|
||||
struct exception e;
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
atpt->fd = tpt->fd;
|
||||
struct exception e;
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
atpt->fd = tpt->fd;
|
||||
}
|
||||
|
||||
|
||||
|
||||
void transport_read_buffer (Transport *tpt, u8 *buffer, int length)
|
||||
{
|
||||
int n = 0;
|
||||
int c;
|
||||
struct exception e;
|
||||
int uart_timeout = PLATFORM_UART_INFINITE_TIMEOUT; // not sure whether we should always follow this
|
||||
|
||||
while( n < length )
|
||||
{
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
c = platform_uart_recv( tpt->fd, tpt->tmr_id, uart_timeout );
|
||||
|
||||
int n = 0;
|
||||
int c;
|
||||
struct exception e;
|
||||
int uart_timeout = PLATFORM_UART_INFINITE_TIMEOUT; // not sure whether we should always follow this
|
||||
|
||||
while( n < length )
|
||||
{
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
c = platform_uart_recv( tpt->fd, tpt->tmr_id, uart_timeout );
|
||||
|
||||
if( c < 0 )
|
||||
{
|
||||
// uart_timeout = 1000000; // Reset and use timeout of 1s
|
||||
e.errnum = ERR_NODATA;
|
||||
e.type = nonfatal;
|
||||
Throw( e );
|
||||
}
|
||||
else
|
||||
{
|
||||
buffer[ n ] = ( u8 )c;
|
||||
n++;
|
||||
}
|
||||
// After getting one char of a read remainder
|
||||
// should follow within a timeout of 0.1 sec
|
||||
uart_timeout = 100000;
|
||||
{
|
||||
// uart_timeout = 1000000; // Reset and use timeout of 1s
|
||||
e.errnum = ERR_NODATA;
|
||||
e.type = nonfatal;
|
||||
Throw( e );
|
||||
}
|
||||
else
|
||||
{
|
||||
buffer[ n ] = ( u8 )c;
|
||||
n++;
|
||||
}
|
||||
// After getting one char of a read remainder
|
||||
// should follow within a timeout of 0.1 sec
|
||||
uart_timeout = 100000;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
void transport_write_buffer( Transport *tpt, const u8 *buffer, int length )
|
||||
{
|
||||
int i;
|
||||
struct exception e;
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
|
||||
for( i = 0; i < length; i ++ )
|
||||
int i;
|
||||
struct exception e;
|
||||
TRANSPORT_VERIFY_OPEN;
|
||||
|
||||
for( i = 0; i < length; i ++ )
|
||||
platform_uart_send( CON_UART_ID, buffer[ i ] );
|
||||
}
|
||||
|
||||
// Check if data is available on connection without reading:
|
||||
// - 1 = data available, 0 = no data available
|
||||
// - 1 = data available, 0 = no data available
|
||||
int transport_readable (Transport *tpt)
|
||||
{
|
||||
return 1; // no really easy way to check this unless platform support is added
|
||||
return 1; // no really easy way to check this unless platform support is added
|
||||
}
|
||||
|
||||
// Check if transport is open:
|
||||
// - 1 = connection open, 0 = connection closed
|
||||
// - 1 = connection open, 0 = connection closed
|
||||
int transport_is_open (Transport *tpt)
|
||||
{
|
||||
return ( tpt->fd != INVALID_TRANSPORT );
|
||||
return ( tpt->fd != INVALID_TRANSPORT );
|
||||
}
|
||||
|
||||
// Shut down connection
|
||||
void transport_close (Transport *tpt)
|
||||
{
|
||||
tpt->fd = INVALID_TRANSPORT;
|
||||
tpt->fd = INVALID_TRANSPORT;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -201,22 +201,22 @@ static int adc_insertsamples( lua_State* L )
|
||||
luaL_checktype(L, 2, LUA_TTABLE);
|
||||
|
||||
startidx = luaL_checkinteger( L, 3 );
|
||||
if ( startidx <= 0 )
|
||||
if ( startidx <= 0 )
|
||||
return luaL_error( L, "idx must be > 0" );
|
||||
|
||||
count = luaL_checkinteger(L, 4 );
|
||||
if ( count == 0 )
|
||||
if ( count == 0 )
|
||||
return luaL_error( L, "count must be > 0" );
|
||||
|
||||
bcnt = adc_wait_samples( id, count );
|
||||
|
||||
for( i = startidx; i < ( count + startidx ); i ++ )
|
||||
{
|
||||
if ( i < bcnt + startidx )
|
||||
lua_pushinteger( L, adc_get_processed_sample( id ) );
|
||||
else
|
||||
lua_pushnil( L ); // nil-out values where we don't have enough samples
|
||||
|
||||
if ( i < bcnt + startidx )
|
||||
lua_pushinteger( L, adc_get_processed_sample( id ) );
|
||||
else
|
||||
lua_pushnil( L ); // nil-out values where we don't have enough samples
|
||||
|
||||
lua_rawseti( L, 2, i );
|
||||
}
|
||||
|
||||
|
@ -10,25 +10,25 @@
|
||||
* Modified by BogdanM for eLua
|
||||
*/
|
||||
|
||||
#define OP_ZSTRING 'z' /* zero-terminated string */
|
||||
#define OP_BSTRING 'p' /* string preceded by length byte */
|
||||
#define OP_WSTRING 'P' /* string preceded by length word */
|
||||
#define OP_SSTRING 'a' /* string preceded by length size_t */
|
||||
#define OP_STRING 'A' /* string */
|
||||
#define OP_FLOAT 'f' /* float */
|
||||
#define OP_DOUBLE 'd' /* double */
|
||||
#define OP_NUMBER 'n' /* Lua number */
|
||||
#define OP_CHAR 'c' /* char */
|
||||
#define OP_BYTE 'b' /* byte = unsigned char */
|
||||
#define OP_SHORT 'h' /* short */
|
||||
#define OP_USHORT 'H' /* unsigned short */
|
||||
#define OP_INT 'i' /* int */
|
||||
#define OP_UINT 'I' /* unsigned int */
|
||||
#define OP_LONG 'l' /* long */
|
||||
#define OP_ULONG 'L' /* unsigned long */
|
||||
#define OP_LITTLEENDIAN '<' /* little endian */
|
||||
#define OP_BIGENDIAN '>' /* big endian */
|
||||
#define OP_NATIVE '=' /* native endian */
|
||||
#define OP_ZSTRING 'z' /* zero-terminated string */
|
||||
#define OP_BSTRING 'p' /* string preceded by length byte */
|
||||
#define OP_WSTRING 'P' /* string preceded by length word */
|
||||
#define OP_SSTRING 'a' /* string preceded by length size_t */
|
||||
#define OP_STRING 'A' /* string */
|
||||
#define OP_FLOAT 'f' /* float */
|
||||
#define OP_DOUBLE 'd' /* double */
|
||||
#define OP_NUMBER 'n' /* Lua number */
|
||||
#define OP_CHAR 'c' /* char */
|
||||
#define OP_BYTE 'b' /* byte = unsigned char */
|
||||
#define OP_SHORT 'h' /* short */
|
||||
#define OP_USHORT 'H' /* unsigned short */
|
||||
#define OP_INT 'i' /* int */
|
||||
#define OP_UINT 'I' /* unsigned int */
|
||||
#define OP_LONG 'l' /* long */
|
||||
#define OP_ULONG 'L' /* unsigned long */
|
||||
#define OP_LITTLEENDIAN '<' /* little endian */
|
||||
#define OP_BIGENDIAN '>' /* big endian */
|
||||
#define OP_NATIVE '=' /* native endian */
|
||||
|
||||
#include <ctype.h>
|
||||
#include <string.h>
|
||||
@ -69,37 +69,37 @@ static void doswap(int swap, void *p, size_t n)
|
||||
}
|
||||
}
|
||||
|
||||
#define UNPACKNUMBER(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T a; \
|
||||
int m=sizeof(a); \
|
||||
if (((unsigned long)i+m)>len) goto done; \
|
||||
memcpy(&a,s+i,m); \
|
||||
i+=m; \
|
||||
doswap(swap,&a,m); \
|
||||
lua_pushnumber(L,(lua_Number)a); \
|
||||
++n; \
|
||||
break; \
|
||||
#define UNPACKNUMBER(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T a; \
|
||||
int m=sizeof(a); \
|
||||
if (((unsigned long)i+m)>len) goto done; \
|
||||
memcpy(&a,s+i,m); \
|
||||
i+=m; \
|
||||
doswap(swap,&a,m); \
|
||||
lua_pushnumber(L,(lua_Number)a); \
|
||||
++n; \
|
||||
break; \
|
||||
}
|
||||
|
||||
#define UNPACKSTRING(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T l; \
|
||||
int m=sizeof(l); \
|
||||
if (((unsigned long)i+m)>len) goto done; \
|
||||
memcpy(&l,s+i,m); \
|
||||
doswap(swap,&l,m); \
|
||||
if (((unsigned long)i+m+l)>len) goto done; \
|
||||
i+=m; \
|
||||
lua_pushlstring(L,s+i,l); \
|
||||
i+=l; \
|
||||
++n; \
|
||||
break; \
|
||||
#define UNPACKSTRING(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T l; \
|
||||
int m=sizeof(l); \
|
||||
if (((unsigned long)i+m)>len) goto done; \
|
||||
memcpy(&l,s+i,m); \
|
||||
doswap(swap,&l,m); \
|
||||
if (((unsigned long)i+m+l)>len) goto done; \
|
||||
i+=m; \
|
||||
lua_pushlstring(L,s+i,l); \
|
||||
i+=l; \
|
||||
++n; \
|
||||
break; \
|
||||
}
|
||||
|
||||
static int l_unpack(lua_State *L) /** unpack(s,f,[init]) */
|
||||
static int l_unpack(lua_State *L) /** unpack(s,f,[init]) */
|
||||
{
|
||||
size_t len;
|
||||
const char *s=luaL_checklstring(L,1,&len);
|
||||
@ -112,7 +112,7 @@ static int l_unpack(lua_State *L) /** unpack(s,f,[init]) */
|
||||
{
|
||||
int c=*f++;
|
||||
int N=1;
|
||||
if (isdigit(*f))
|
||||
if (isdigit(*f))
|
||||
{
|
||||
N=0;
|
||||
while (isdigit(*f)) N=10*N+(*f++)-'0';
|
||||
@ -152,10 +152,10 @@ static int l_unpack(lua_State *L) /** unpack(s,f,[init]) */
|
||||
UNPACKSTRING(OP_WSTRING, unsigned short)
|
||||
UNPACKSTRING(OP_SSTRING, size_t)
|
||||
UNPACKNUMBER(OP_NUMBER, lua_Number)
|
||||
#ifndef LUA_NUMBER_INTEGRAL
|
||||
#ifndef LUA_NUMBER_INTEGRAL
|
||||
UNPACKNUMBER(OP_DOUBLE, double)
|
||||
UNPACKNUMBER(OP_FLOAT, float)
|
||||
#endif
|
||||
#endif
|
||||
UNPACKNUMBER(OP_CHAR, char)
|
||||
UNPACKNUMBER(OP_BYTE, unsigned char)
|
||||
UNPACKNUMBER(OP_SHORT, short)
|
||||
@ -177,28 +177,28 @@ done:
|
||||
return n+1;
|
||||
}
|
||||
|
||||
#define PACKNUMBER(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T a=(T)luaL_checknumber(L,i++); \
|
||||
doswap(swap,&a,sizeof(a)); \
|
||||
luaL_addlstring(&b,(void*)&a,sizeof(a)); \
|
||||
break; \
|
||||
#define PACKNUMBER(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
T a=(T)luaL_checknumber(L,i++); \
|
||||
doswap(swap,&a,sizeof(a)); \
|
||||
luaL_addlstring(&b,(void*)&a,sizeof(a)); \
|
||||
break; \
|
||||
}
|
||||
|
||||
#define PACKSTRING(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
size_t l; \
|
||||
const char *a=luaL_checklstring(L,i++,&l); \
|
||||
T ll=(T)l; \
|
||||
doswap(swap,&ll,sizeof(ll)); \
|
||||
luaL_addlstring(&b,(void*)&ll,sizeof(ll)); \
|
||||
luaL_addlstring(&b,a,l); \
|
||||
break; \
|
||||
#define PACKSTRING(OP,T) \
|
||||
case OP: \
|
||||
{ \
|
||||
size_t l; \
|
||||
const char *a=luaL_checklstring(L,i++,&l); \
|
||||
T ll=(T)l; \
|
||||
doswap(swap,&ll,sizeof(ll)); \
|
||||
luaL_addlstring(&b,(void*)&ll,sizeof(ll)); \
|
||||
luaL_addlstring(&b,a,l); \
|
||||
break; \
|
||||
}
|
||||
|
||||
static int l_pack(lua_State *L) /** pack(f,...) */
|
||||
static int l_pack(lua_State *L) /** pack(f,...) */
|
||||
{
|
||||
int i=2;
|
||||
const char *f=luaL_checkstring(L,1);
|
||||
@ -209,7 +209,7 @@ static int l_pack(lua_State *L) /** pack(f,...) */
|
||||
{
|
||||
int c=*f++;
|
||||
int N=1;
|
||||
if (isdigit(*f))
|
||||
if (isdigit(*f))
|
||||
{
|
||||
N=0;
|
||||
while (isdigit(*f)) N=10*N+(*f++)-'0';
|
||||
@ -236,7 +236,7 @@ static int l_pack(lua_State *L) /** pack(f,...) */
|
||||
PACKSTRING(OP_WSTRING, unsigned short)
|
||||
PACKSTRING(OP_SSTRING, size_t)
|
||||
PACKNUMBER(OP_NUMBER, lua_Number)
|
||||
#ifndef LUA_NUMBER_INTEGRAL
|
||||
#ifndef LUA_NUMBER_INTEGRAL
|
||||
PACKNUMBER(OP_DOUBLE, double)
|
||||
PACKNUMBER(OP_FLOAT, float)
|
||||
#endif
|
||||
@ -263,9 +263,9 @@ static int l_pack(lua_State *L) /** pack(f,...) */
|
||||
#include "lrodefs.h"
|
||||
const LUA_REG_TYPE pack_map[] =
|
||||
{
|
||||
{ LSTRKEY( "pack" ), LFUNCVAL( l_pack ) },
|
||||
{ LSTRKEY( "unpack" ), LFUNCVAL( l_unpack ) },
|
||||
{ LNILKEY, LNILVAL }
|
||||
{ LSTRKEY( "pack" ), LFUNCVAL( l_pack ) },
|
||||
{ LSTRKEY( "unpack" ), LFUNCVAL( l_unpack ) },
|
||||
{ LNILKEY, LNILVAL }
|
||||
};
|
||||
|
||||
int luaopen_pack( lua_State *L )
|
||||
|
@ -838,8 +838,8 @@ static void helper_remote_index( Helper *helper )
|
||||
hstack[ i - 1 ] = hstack[ i ]->parent;
|
||||
len += strlen( hstack[ i ]->funcname ) + 1;
|
||||
}
|
||||
|
||||
transport_write_u32( tpt, len );
|
||||
|
||||
transport_write_u32( tpt, len );
|
||||
|
||||
// replay helper key names
|
||||
for( i = 0 ; i < helper->nparents ; i ++ )
|
||||
@ -849,7 +849,7 @@ static void helper_remote_index( Helper *helper )
|
||||
}
|
||||
}
|
||||
else // If helper has no parents, just use length of global
|
||||
transport_write_u32( tpt, len );
|
||||
transport_write_u32( tpt, len );
|
||||
|
||||
transport_write_string( tpt, helper->funcname, ( int )strlen( helper->funcname ) );
|
||||
}
|
||||
|
@ -274,10 +274,10 @@ static int pio_mt_index( lua_State* L )
|
||||
#ifdef ELUA_PLATFORM_AVR32
|
||||
/* AVR32UC3A0 has a bizarre "port" called "PX" with 40 pins which map to
|
||||
* random areas of hardware ports 2 and 3:
|
||||
* PX00-PX10 = GPIO100-GPIO90 //Port 3 pins 04-00; port 2 pins 31-26
|
||||
* PX11-PX14 = GPIO109-GPIO106 //Port 3 pins 13-10
|
||||
* PX15-PX34 = GPIO89-GPIO70 //Port 2 pins 25-06
|
||||
* PX35-PX39 = GPIO105-GPIO101 //Port 3 pins 09-05
|
||||
* PX00-PX10 = GPIO100-GPIO90 //Port 3 pins 04-00; port 2 pins 31-26
|
||||
* PX11-PX14 = GPIO109-GPIO106 //Port 3 pins 13-10
|
||||
* PX15-PX34 = GPIO89-GPIO70 //Port 2 pins 25-06
|
||||
* PX35-PX39 = GPIO105-GPIO101 //Port 3 pins 09-05
|
||||
* Then port = trunc(GPIO/32) and pin = GPIO % 32
|
||||
*
|
||||
* This "Port X" exists in EVK1100 and MIZAR32 but not on EVK1101, which
|
||||
@ -287,32 +287,32 @@ static int pio_mt_index( lua_State* L )
|
||||
|
||||
// Disallow "PC_06-PC_31" as aliases for PX pins
|
||||
if (key[1] == 'C' && pin > 5)
|
||||
return 0;
|
||||
return 0;
|
||||
|
||||
// Disallow "PD_nn" as aliases for PX pins
|
||||
if (key[1] == 'D')
|
||||
return 0;
|
||||
return 0;
|
||||
|
||||
// Map PX pins 00-39 to their ports/pins in the hardware register layout.
|
||||
if (key[1] == 'X')
|
||||
{
|
||||
unsigned gpio;
|
||||
unsigned gpio;
|
||||
|
||||
// You cannot perform port operations on port X because it
|
||||
// doesn't exist in hardware.
|
||||
if (pin == 0xFFFF)
|
||||
return 0;
|
||||
// You cannot perform port operations on port X because it
|
||||
// doesn't exist in hardware.
|
||||
if (pin == 0xFFFF)
|
||||
return 0;
|
||||
|
||||
// Map PX pin numbers to GPIO pin numbers
|
||||
if( pin < 0 ) return 0;
|
||||
if( pin <= 10 ) gpio = 100 - pin;
|
||||
else if( pin <= 14 ) gpio = 109 - (pin - 11);
|
||||
else if( pin <= 34 ) gpio = 89 - (pin - 15);
|
||||
else if( pin <= 39 ) gpio = 105 - (pin - 35);
|
||||
else return 0;
|
||||
// Map PX pin numbers to GPIO pin numbers
|
||||
if( pin < 0 ) return 0;
|
||||
if( pin <= 10 ) gpio = 100 - pin;
|
||||
else if( pin <= 14 ) gpio = 109 - (pin - 11);
|
||||
else if( pin <= 34 ) gpio = 89 - (pin - 15);
|
||||
else if( pin <= 39 ) gpio = 105 - (pin - 35);
|
||||
else return 0;
|
||||
|
||||
port = gpio >> 5;
|
||||
pin = gpio & 0x1F;
|
||||
port = gpio >> 5;
|
||||
pin = gpio & 0x1F;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@ -392,10 +392,10 @@ static const LUA_REG_TYPE pio_port_map[] =
|
||||
|
||||
const LUA_REG_TYPE pio_map[] =
|
||||
{
|
||||
{ LSTRKEY( "decode" ), LFUNCVAL( pio_decode ) },
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
{ LSTRKEY( "pin" ), LROVAL( pio_pin_map ) },
|
||||
{ LSTRKEY( "port" ), LROVAL( pio_port_map ) },
|
||||
{ LSTRKEY( "decode" ), LFUNCVAL( pio_decode ) },
|
||||
{ LSTRKEY( "INPUT" ), LNUMVAL( PIO_DIR_INPUT ) },
|
||||
{ LSTRKEY( "OUTPUT" ), LNUMVAL( PIO_DIR_OUTPUT ) },
|
||||
{ LSTRKEY( "PULLUP" ), LNUMVAL( PLATFORM_IO_PIN_PULLUP ) },
|
||||
|
@ -87,6 +87,7 @@
|
||||
_ROM( AUXLIB_UART, luaopen_uart, uart_map )\
|
||||
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
|
||||
_ROM( AUXLIB_PWM, luaopen_pwm, pwm_map )\
|
||||
_ROM( AUXLIB_I2C, luaopen_i2c, i2c_map )\
|
||||
_ROM( AUXLIB_SPI, luaopen_spi, spi_map )\
|
||||
_ROM( AUXLIB_TMR, luaopen_tmr, tmr_map )\
|
||||
_ROM( AUXLIB_TERM, luaopen_term, term_map )\
|
||||
@ -104,7 +105,7 @@
|
||||
|
||||
// Virtual timers (0 if not used)
|
||||
#define VTMR_NUM_TIMERS 4
|
||||
#define VTMR_FREQ_HZ 4
|
||||
#define VTMR_FREQ_HZ 10
|
||||
|
||||
// Number of resources (0 if not available/not implemented)
|
||||
#define NUM_PIO 4
|
||||
@ -116,6 +117,7 @@
|
||||
#define NUM_TIMER 3
|
||||
#endif
|
||||
#define NUM_PWM 7
|
||||
#define NUM_I2C 1
|
||||
#define NUM_ADC 8
|
||||
#define NUM_CAN 0
|
||||
|
||||
|
@ -67,7 +67,7 @@
|
||||
|
||||
// Virtual timers (0 if not used)
|
||||
#define VTMR_NUM_TIMERS 4
|
||||
#define VTMR_FREQ_HZ 4
|
||||
#define VTMR_FREQ_HZ 10
|
||||
|
||||
// Number of resources (0 if not available/not implemented)
|
||||
#define NUM_PIO 2
|
||||
|
@ -25,19 +25,30 @@
|
||||
//#define BUILD_RFS
|
||||
//#define BUILD_SERMUX
|
||||
|
||||
#if ELUA_CPU == AT32UC3A0128
|
||||
#if defined( ELUA_CPU_AT32UC3A0128 )
|
||||
// Build options for 120KB image
|
||||
# define RAM_SIZE 0x8000
|
||||
#else
|
||||
// Build options for 256KB and 512KB flash
|
||||
# define RAM_SIZE 0x10000
|
||||
# define BUILD_ADC
|
||||
# define BUILD_TERM
|
||||
# define BUILD_UIP
|
||||
# define ENABLE_DISP
|
||||
#endif
|
||||
|
||||
#ifdef BUILD_UIP
|
||||
//#define BUILD_DHCPC
|
||||
#define BUILD_DNS
|
||||
#define BUILD_CON_TCP
|
||||
//#define BUILD_CON_TCP
|
||||
#endif
|
||||
|
||||
// ****************************************************************************
|
||||
// Auxiliary libraries that will be compiled for this platform
|
||||
|
||||
// The name of the platform specific libs table
|
||||
#ifdef ENABLE_DISP
|
||||
#define PS_LIB_TABLE_NAME "mizar32"
|
||||
#endif
|
||||
|
||||
// *****************************************************************************
|
||||
@ -98,7 +109,13 @@
|
||||
#define RPCLINE
|
||||
#endif
|
||||
|
||||
#if ELUA_CPU == AT32UC3A0128
|
||||
#ifdef PS_LIB_TABLE_NAME
|
||||
#define PLATLINE _ROM( PS_LIB_TABLE_NAME, luaopen_platform, platform_map )
|
||||
#else
|
||||
#define PLATLINE
|
||||
#endif
|
||||
|
||||
#if defined( ELUA_CPU_AT32UC3A0128 )
|
||||
|
||||
// Minimal ROM modules, to fit in 120KB
|
||||
#define LUA_PLATFORM_LIBS_ROM\
|
||||
@ -113,6 +130,7 @@
|
||||
_ROM( AUXLIB_UART, luaopen_uart, uart_map )\
|
||||
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
|
||||
_ROM( AUXLIB_PWM, luaopen_pwm, pwm_map )\
|
||||
_ROM( AUXLIB_I2C, luaopen_i2c, i2c_map )\
|
||||
_ROM( AUXLIB_SPI, luaopen_spi, spi_map )\
|
||||
_ROM( AUXLIB_TMR, luaopen_tmr, tmr_map )\
|
||||
NETLINE\
|
||||
@ -123,7 +141,8 @@
|
||||
_ROM( AUXLIB_BIT, luaopen_bit, bit_map )\
|
||||
_ROM( AUXLIB_PACK, luaopen_pack, pack_map )\
|
||||
_ROM( AUXLIB_TERM, luaopen_term, term_map )\
|
||||
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )
|
||||
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )\
|
||||
PLATLINE\
|
||||
|
||||
#endif
|
||||
|
||||
@ -132,7 +151,7 @@
|
||||
|
||||
// Virtual timers (0 if not used)
|
||||
#define VTMR_NUM_TIMERS 4
|
||||
#define VTMR_FREQ_HZ 4
|
||||
#define VTMR_FREQ_HZ 10
|
||||
|
||||
// Number of resources (0 if not available/not implemented)
|
||||
#define NUM_PIO 4
|
||||
@ -144,6 +163,7 @@
|
||||
#define NUM_TIMER 3
|
||||
#endif
|
||||
#define NUM_PWM 7 // PWM7 is on GPIO50
|
||||
#define NUM_I2C 1
|
||||
#define NUM_ADC 8 // Though ADC3 pin is the Ethernet IRQ
|
||||
#define NUM_CAN 0
|
||||
|
||||
@ -194,7 +214,7 @@
|
||||
// Allocator data: define your free memory zones here in two arrays
|
||||
// (start address and end address)
|
||||
#define MEM_START_ADDRESS { ( void* )end, ( void* )( SDRAM + ELUA_FIRMWARE_SIZE ) }
|
||||
#define MEM_END_ADDRESS { ( void* )( 0x8000 - STACK_SIZE_TOTAL - 1 ), ( void* )( SDRAM + SDRAM_SIZE - 1 ) }
|
||||
#define MEM_END_ADDRESS { ( void* )( RAM_SIZE - STACK_SIZE_TOTAL - 1 ), ( void* )( SDRAM + SDRAM_SIZE - 1 ) }
|
||||
|
||||
// Interrupt queue size
|
||||
#define PLATFORM_INT_QUEUE_LOG_SIZE 5
|
||||
|
@ -1,6 +1,6 @@
|
||||
-- Configuration file for the AVR32 microcontrollers
|
||||
|
||||
specific_files = "crt0.s trampoline.s platform.c exception.s intc.c pm.c flashc.c pm_conf_clocks.c usart.c gpio.c tc.c spi.c platform_int.c adc.c pwm.c ethernet.c"
|
||||
specific_files = "crt0.s trampoline.s platform.c exception.s intc.c pm.c flashc.c pm_conf_clocks.c usart.c gpio.c tc.c spi.c platform_int.c adc.c pwm.c i2c.c ethernet.c disp.c"
|
||||
addm( "FORAVR32" )
|
||||
|
||||
-- See board.h for possible BOARD values.
|
||||
|
@ -1,6 +1,6 @@
|
||||
# Configuration file for the AVR32 microcontrollers
|
||||
|
||||
specific_files = "crt0.s trampoline.s platform.c exception.s intc.c pm.c flashc.c pm_conf_clocks.c usart.c gpio.c tc.c spi.c platform_int.c adc.c pwm.c ethernet.c"
|
||||
specific_files = "crt0.s trampoline.s platform.c exception.s intc.c pm.c flashc.c pm_conf_clocks.c usart.c gpio.c tc.c spi.c platform_int.c adc.c pwm.c i2c.c ethernet.c disp.c"
|
||||
comp.Append(CPPDEFINES = 'FORAVR32')
|
||||
|
||||
# See board.h for possible BOARD values.
|
||||
|
115
src/platform/avr32/disp.c
Normal file
115
src/platform/avr32/disp.c
Normal file
@ -0,0 +1,115 @@
|
||||
// eLua module for Mizar32 LCD character display
|
||||
|
||||
#include "lua.h"
|
||||
#include "lualib.h"
|
||||
#include "lauxlib.h"
|
||||
#include "platform.h"
|
||||
#include "lrotable.h"
|
||||
#include "platform_conf.h"
|
||||
|
||||
#include "disp.h"
|
||||
#include "i2c.h"
|
||||
|
||||
// Declaration to save/restore the I2C clock rate
|
||||
extern u32 i2c_delay;
|
||||
static u32 old_i2c_delay;
|
||||
|
||||
// Functions that bracket all I2C packets to the LCD module,
|
||||
// to save, change and restore the I2C clock rate.
|
||||
static void disp_start()
|
||||
{
|
||||
old_i2c_delay = i2c_delay;
|
||||
i2c_delay = REQ_CPU_FREQ / DISP_BUS_FREQ / 2;
|
||||
}
|
||||
|
||||
static void disp_stop()
|
||||
{
|
||||
i2c_delay = old_i2c_delay;
|
||||
}
|
||||
|
||||
// Utility function: pause for N * 5ms
|
||||
static void disp_delay(unsigned long n)
|
||||
{
|
||||
// Code stolen from sdramc.c::sdramc_ck_delay()
|
||||
|
||||
// Use the CPU cycle counter (CPU and HSB clocks are the same).
|
||||
u32 delay_start_cycle = Get_system_register(AVR32_COUNT);
|
||||
u32 delay_end_cycle = delay_start_cycle + n * DISP_DELAY_TICKS;
|
||||
|
||||
// To be safer, the end of wait is based on an inequality test, so CPU cycle
|
||||
// counter wrap around is checked.
|
||||
if (delay_start_cycle > delay_end_cycle)
|
||||
{
|
||||
while ((unsigned long)Get_system_register(AVR32_COUNT) > delay_end_cycle);
|
||||
}
|
||||
while ((unsigned long)Get_system_register(AVR32_COUNT) < delay_end_cycle);
|
||||
}
|
||||
|
||||
// Generic function to emit an LCD command byte, normally used in a tail call.
|
||||
static int disp_command(unsigned char command)
|
||||
{
|
||||
disp_start();
|
||||
i2c_start_cond();
|
||||
i2c_write_byte( DISP_CMD );
|
||||
i2c_write_byte( command );
|
||||
i2c_stop_cond();
|
||||
disp_stop();
|
||||
disp_delay(1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
//Lua: mizar32.disp.clear()
|
||||
static int disp_clear(lua_State *L) {
|
||||
return disp_command( DISP_CMD_CLEAR );
|
||||
}
|
||||
|
||||
//Lua: mizar32.disp.goto( row, col )
|
||||
static int disp_goto(lua_State *L) {
|
||||
unsigned row = luaL_checkinteger( L, 1 );
|
||||
unsigned col = luaL_checkinteger( L, 2 );
|
||||
unsigned address;
|
||||
|
||||
if ( row < 1 || row > 2 || col < 1 || col > 16 ) {
|
||||
return luaL_error( L, "row/column must be 1-2 and 1-16" );
|
||||
}
|
||||
|
||||
address = ( row - 1 ) * 0x40 + ( col - 1 ) ;
|
||||
|
||||
return disp_command( DISP_CMD_DDADDR + address );
|
||||
}
|
||||
|
||||
//Lua: mizar32.disp.print( string )
|
||||
static int disp_print(lua_State *L) {
|
||||
const char *str = luaL_checkstring( L, 1 );
|
||||
int nbytes = 0;
|
||||
|
||||
disp_start();
|
||||
i2c_start_cond();
|
||||
i2c_write_byte( DISP_DATA );
|
||||
// Mizar32 LCD module has a maximum of 32 bytes per packet
|
||||
while ( *str && nbytes < 32 ) {
|
||||
i2c_write_byte( *str++ );
|
||||
nbytes++;
|
||||
}
|
||||
i2c_stop_cond();
|
||||
disp_stop();
|
||||
disp_delay(nbytes);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
#define MIN_OPT_LEVEL 2
|
||||
#include "lrodefs.h"
|
||||
|
||||
// Module function map
|
||||
const LUA_REG_TYPE disp_map[] =
|
||||
{
|
||||
{ LSTRKEY( "clear" ), LFUNCVAL( disp_clear ) },
|
||||
{ LSTRKEY( "goto" ), LFUNCVAL( disp_goto ) },
|
||||
{ LSTRKEY( "print" ), LFUNCVAL( disp_print ) },
|
||||
};
|
||||
|
||||
LUALIB_API int luaopen_disp( lua_State *L )
|
||||
{
|
||||
LREGISTER( L, AUXLIB_DISP, disp_map );
|
||||
}
|
44
src/platform/avr32/disp.h
Normal file
44
src/platform/avr32/disp.h
Normal file
@ -0,0 +1,44 @@
|
||||
// Mizar32 LCD character display
|
||||
|
||||
#ifndef __DISP_H__
|
||||
#define __DISP_H__
|
||||
|
||||
// See the Ampire datasheet http://home.comet.bg/datasheets/LCD/AC-162B.pdf
|
||||
// and http://embeddedtutorial.com/2010/01/interfacing-lcd-with-8051/
|
||||
|
||||
// I2C bus frequency that the LCD display runs at: 20kHz max
|
||||
#define DISP_BUS_FREQ 20000
|
||||
|
||||
// Pause required after every command byte, and n*delay when sending N
|
||||
// characters of data (or of commands): 5 milliseconds
|
||||
// Expressed in CPU clock ticks.
|
||||
// 5 and 6ms seem not to work when doing
|
||||
// mizar32.disp.clear() mizar32.disp.print("Hello world")
|
||||
// or
|
||||
// for i = 1,16 do mizar32.disp.goto(2,i) mizar32.disp.print("X") end
|
||||
// but 7ms works for both.
|
||||
#define DISP_DELAY_TICKS (REQ_CPU_FREQ * 7 / 1000)
|
||||
|
||||
// I2C slave addresses for command bytes and data strings
|
||||
// Command address is followed by a dingle byte giving the command to perform
|
||||
// Data address is followed by multiple bytes of ASCII data to display
|
||||
// on the character display at the current cursor location.
|
||||
#define DISP_CMD 0xF6
|
||||
#define DISP_DATA 0xF2
|
||||
|
||||
// Command bytes
|
||||
|
||||
// "Clear display: Write "20H" to DDRAM and set DDRAM address to "00H" from AC"
|
||||
#define DISP_CMD_CLEAR 1
|
||||
|
||||
// "Return Home: Sets DDRAM address to "00H" from AC and return cursor to its
|
||||
// original position if shifted."
|
||||
#define DISP_CMD_HOME 2 // Bit 0: don't care
|
||||
|
||||
// "Sets DD RAM address in address counter"
|
||||
#define DISP_CMD_DDADDR 128
|
||||
// Bits 0-7 are the address:
|
||||
// 00-0F are the first line
|
||||
// 40-4F are the second line
|
||||
|
||||
#endif
|
342
src/platform/avr32/i2c.c
Normal file
342
src/platform/avr32/i2c.c
Normal file
@ -0,0 +1,342 @@
|
||||
// This file implements I2C protocol on AVR32 devices in eLua.
|
||||
//
|
||||
// For reasons outlined below, it does not use the Atmel TWI hardware
|
||||
// but implements it by bit-banging two GPIO lines.
|
||||
//
|
||||
// Martin Guy <martinwguy@gmail.com>, June 2011
|
||||
|
||||
// AVR32 has two families of "two wire" interfaces, both of them inadequate:
|
||||
//
|
||||
// AT32UC3A[01]* and AT32UC3B* have a single "TWI" "I2C-compatibile" interface
|
||||
// that can be switched between master and slave modes;
|
||||
// AT32UC3A[34]* and AT32UC3C* devices have separate "TWIM" and "TWIS"
|
||||
// interfaces, three of each in the C series.
|
||||
// Their registers and functionality are completely different,
|
||||
//
|
||||
// All currently supported eLua AVR32 targets
|
||||
// (EVK1100 Mizar32 == AT32UC3A0* and EVK1101 == AT32UC3B*)
|
||||
// have one "TWI" interface.
|
||||
//
|
||||
// 1) "TWI" hardware limitations
|
||||
//
|
||||
// The only repeated start sequence that TWI can generate as master is
|
||||
// START/ADDRESS(W)/WRITE 1, 2 or 3 bytes/START/ADDRESS(R)/READ n BYTES/STOP.
|
||||
//
|
||||
// It cannot emit START/ADDRESS(R/W)/STOP, which is necessary to probe
|
||||
// for the presence of a device on the bus. Their SDK writes a single 0 bytes
|
||||
// to do this, which has different effects on different hardware.
|
||||
// This makes I2C unimplementable using this variant of the hardware.
|
||||
//
|
||||
// Worse, you have to have all the data in hand before you start any transfer
|
||||
// because if you fail to rewrite the "Transmit Holding Register" with the next
|
||||
// byte while the current byte is being sent, the hardware automatically
|
||||
// generates a STOP without asking you.
|
||||
// This makes eLua's current Lua and C I2C interfaces unimplementable.
|
||||
//
|
||||
// 2) "TWIM" and "TWIS" hardware limitations
|
||||
//
|
||||
// This seems to be able to generate a wider range of repeated start signals
|
||||
// but the amount of data you can send or receive in one packet is limited to
|
||||
// 255 bytes.
|
||||
//
|
||||
// 3) Bit-banging them as GPIO pins
|
||||
//
|
||||
// Given the two sets of incompatible hardware and the fact that neither is
|
||||
// capable either of speaking I2C or of implementing the current eLua I2C
|
||||
// interface, we just bit-bang the IO pins.
|
||||
//
|
||||
// Some of the chips (e.g. AVR32UC3[01]*) have a GPIO open-collector mode,
|
||||
// which sounds promising, but others (AVR32UC3A[34], AVR32UC3[BC]) do not
|
||||
// so we obtain a pseudo-open-collector mode by switching the GPIO pins
|
||||
// between output (always low) and input (of high impedance).
|
||||
//
|
||||
// The disadvantage of bit-banging GPIO pins instead of using the TWI hardware
|
||||
// is that in TWI mode, the pins "are open-drain outputs with slew-rate
|
||||
// limitation and inputs with spike-filtering" (AT32UC3A Datasheet, para 8.3).
|
||||
// In GPIO mode, a "glitch filter" is available to reject pulses of 1 CPU cycle
|
||||
// but this only affects the interrupt function, not the value read from the
|
||||
// PVR register. (para 22.4.8)
|
||||
|
||||
// This first hack only support a single I2C channel and is only tested on the
|
||||
// currently supported hardware (AVR32UC3A0*), all of which has a single TWI
|
||||
// interface.
|
||||
// To extend it to have multiple I2C channels you need to turn the variables
|
||||
// started, delay, sda_regs, scl_regs
|
||||
// and the constants
|
||||
// {SDA,SCL}_{PIN,PORT,PINMASK}
|
||||
// into arrays[NUM_I2C] and index them with id.
|
||||
|
||||
#include "platform_conf.h"
|
||||
#include "compiler.h"
|
||||
#include "gpio.h"
|
||||
#include "i2c.h"
|
||||
|
||||
// Which port/pins are used for I2C?
|
||||
|
||||
#if defined(ELUA_CPU_AT32UC3A0128) || \
|
||||
defined(ELUA_CPU_AT32UC3A0256) || \
|
||||
defined(ELUA_CPU_AT32UC3A0512) || \
|
||||
defined(ELUA_CPU_AT32UC3A1128) || \
|
||||
defined(ELUA_CPU_AT32UC3A1256) || \
|
||||
defined(ELUA_CPU_AT32UC3A1512)
|
||||
|
||||
// One master-slave TWI interface
|
||||
# define SDA_PIN AVR32_PIN_PA29
|
||||
# define SCL_PIN AVR32_PIN_PA30
|
||||
|
||||
#elif defined(ELUA_CPU_AT32UC3A364) || defined(ELUA_CPU_AT32UC3A364S) || \
|
||||
defined(ELUA_CPU_AT32UC3A3128) || defined(ELUA_CPU_AT32UC3A3128S) || \
|
||||
defined(ELUA_CPU_AT32UC3A3256) || defined(ELUA_CPU_AT32UC3A3256S) || \
|
||||
defined(ELUA_CPU_AT32UC3A464) || defined(ELUA_CPU_AT32UC3A464S) || \
|
||||
defined(ELUA_CPU_AT32UC3A4128) || defined(ELUA_CPU_AT32UC3A4128S) || \
|
||||
defined(ELUA_CPU_AT32UC3A4256) || defined(ELUA_CPU_AT32UC3A4256S)
|
||||
|
||||
// The first of the two TWIM/TWIS interfaces, in pin configuration A
|
||||
# define SDA_PIN AVR32_PIN_PA25
|
||||
# define SCL_PIN AVR32_PIN_PA26
|
||||
|
||||
#elif defined(ELUA_CPU_AT32UC3B064) || \
|
||||
defined(ELUA_CPU_AT32UC3B0128) || \
|
||||
defined(ELUA_CPU_AT32UC3B0256) || \
|
||||
defined(ELUA_CPU_AT32UC3B0512) || \
|
||||
defined(ELUA_CPU_AT32UC3B164) || \
|
||||
defined(ELUA_CPU_AT32UC3B1128) || \
|
||||
defined(ELUA_CPU_AT32UC3B1256) || \
|
||||
defined(ELUA_CPU_AT32UC3B1512)
|
||||
|
||||
// One master-slave TWI interface
|
||||
# define SDA_PIN AVR32_PIN_PA10
|
||||
# define SCL_PIN AVR32_PIN_PA09
|
||||
|
||||
#elif defined(ELUA_CPU_AT32UC3C064C) || \
|
||||
defined(ELUA_CPU_AT32UC3C0128C) || \
|
||||
defined(ELUA_CPU_AT32UC3C0256C) || \
|
||||
defined(ELUA_CPU_AT32UC3C0512C) || \
|
||||
defined(ELUA_CPU_AT32UC3C164C) || \
|
||||
defined(ELUA_CPU_AT32UC3C1128C) || \
|
||||
defined(ELUA_CPU_AT32UC3C1256C) || \
|
||||
defined(ELUA_CPU_AT32UC3C1512C) || \
|
||||
defined(ELUA_CPU_AT32UC3C264C) || \
|
||||
defined(ELUA_CPU_AT32UC3C2128C) || \
|
||||
defined(ELUA_CPU_AT32UC3C2256C) || \
|
||||
defined(ELUA_CPU_AT32UC3C2512C)
|
||||
|
||||
// One master-slave TWI interface
|
||||
# define SDA_PIN AVR32_PIN_PC02
|
||||
# define SCL_PIN AVR32_PIN_PC03
|
||||
|
||||
#else
|
||||
# error "I2C pin assignment is unknown for this CPU"
|
||||
#endif
|
||||
|
||||
// Split these into port and pinmask
|
||||
#define SDA_PORT ( SDA_PIN >> 5 )
|
||||
#define SCL_PORT ( SCL_PIN >> 5 )
|
||||
#define SDA_PINMASK ( 1 << ( SDA_PIN & 31 ) )
|
||||
#define SCL_PINMASK ( 1 << ( SCL_PIN & 31 ) )
|
||||
|
||||
// The set of GPIO registers we will be using for each bus line.
|
||||
// In practice, these two will always have the same value. Ho hum.
|
||||
static volatile avr32_gpio_port_t *sda_regs =
|
||||
&AVR32_GPIO.port[ SDA_PORT ];
|
||||
static volatile avr32_gpio_port_t *scl_regs =
|
||||
&AVR32_GPIO.port[ SCL_PORT ];
|
||||
|
||||
// Half an I2C bus clock cycle, as a number of HSB(==CPU) clock cycles;
|
||||
// Be default, use the slow mode setting.
|
||||
// This is exported to the LCD display driver ("disp") so that it can
|
||||
// change the bus speed as required by the LCD, then restore it.
|
||||
u32 i2c_delay = REQ_CPU_FREQ / 100000 / 2;
|
||||
|
||||
// Local functions used by the bit-banger
|
||||
static void I2CDELAY(void); // Pause for half an I2C bus clock cycle
|
||||
static int READSCL(void); // Set SCL as input and return current level of line
|
||||
static int READSDA(void); // Set SDA as input and return current level of line
|
||||
static void CLRSCL(void); // Actively drive SCL signal low
|
||||
static void CLRSDA(void); // Actively drive SDA signal low
|
||||
static void ARBITRATION_LOST(void); // Bus control was lost
|
||||
|
||||
// ************************
|
||||
// The bitbanger itself, taken from http://en.wikipedia.org/wiki/I2C
|
||||
|
||||
// We don't use GPIO open-drain mode, which is not available on all hardware
|
||||
// models. Instead, we use two modes to simulate open-drain:
|
||||
// output of 0 and input.
|
||||
u32 i2c_setup( u32 speed )
|
||||
{
|
||||
// First, set both pins as high-impedance inputs to avoid startup glitches
|
||||
sda_regs->oderc = SDA_PINMASK;
|
||||
scl_regs->oderc = SCL_PINMASK;
|
||||
|
||||
// When they are outputs, they will always output 0.
|
||||
sda_regs->ovrc = SDA_PINMASK;
|
||||
scl_regs->ovrc = SCL_PINMASK;
|
||||
|
||||
// Let the GPIO hardware control these pins
|
||||
sda_regs->gpers = SDA_PINMASK;
|
||||
scl_regs->gpers = SCL_PINMASK;
|
||||
|
||||
// Figure out how many clock cycles correspond to half a clock waveform.
|
||||
i2c_delay = REQ_CPU_FREQ / speed / 2;
|
||||
|
||||
return speed;
|
||||
}
|
||||
|
||||
// Are we between a start bit and a stop bit?
|
||||
static int started = 0;
|
||||
|
||||
void i2c_start_cond(void)
|
||||
{
|
||||
if (started) {
|
||||
// if started, do a restart cond
|
||||
// set SDA to 1
|
||||
READSDA();
|
||||
I2CDELAY();
|
||||
// Clock stretching
|
||||
while (READSCL() == 0)
|
||||
; // You can add a timeout to this loop to
|
||||
// recover from SCL being stuck low.
|
||||
}
|
||||
if (READSDA() == 0)
|
||||
ARBITRATION_LOST();
|
||||
// SCL is high, set SDA from 1 to 0
|
||||
CLRSDA();
|
||||
I2CDELAY();
|
||||
CLRSCL();
|
||||
started = true;
|
||||
}
|
||||
|
||||
void i2c_stop_cond(void)
|
||||
{
|
||||
/* set SDA to 0 */
|
||||
CLRSDA();
|
||||
I2CDELAY();
|
||||
/* Clock stretching */
|
||||
while (READSCL() == 0)
|
||||
; /* You should add timeout to this loop */
|
||||
/* SCL is high, set SDA from 0 to 1 */
|
||||
if (READSDA() == 0)
|
||||
ARBITRATION_LOST();
|
||||
I2CDELAY();
|
||||
started = false;
|
||||
}
|
||||
|
||||
/* Write a bit to I2C bus */
|
||||
static void i2c_write_bit(int bit)
|
||||
{
|
||||
if (bit)
|
||||
READSDA();
|
||||
else
|
||||
CLRSDA();
|
||||
I2CDELAY();
|
||||
/* Clock stretching */
|
||||
while (READSCL() == 0)
|
||||
; /* You should add timeout to this loop */
|
||||
/* SCL is high, now data is valid */
|
||||
/* If SDA is high, check that nobody else is driving SDA */
|
||||
if (bit && READSDA() == 0)
|
||||
ARBITRATION_LOST();
|
||||
I2CDELAY();
|
||||
CLRSCL();
|
||||
}
|
||||
|
||||
/* Read a bit from I2C bus */
|
||||
static int i2c_read_bit(void)
|
||||
{
|
||||
int bit;
|
||||
|
||||
/* Let the slave drive data */
|
||||
READSDA();
|
||||
I2CDELAY();
|
||||
/* Clock stretching */
|
||||
while (READSCL() == 0)
|
||||
; /* You should add timeout to this loop */
|
||||
/* SCL is high, now data is valid */
|
||||
bit = READSDA();
|
||||
I2CDELAY();
|
||||
CLRSCL();
|
||||
return bit;
|
||||
}
|
||||
|
||||
/* Write a byte to I2C bus. Return 0 if ack by the slave */
|
||||
int i2c_write_byte(unsigned char byte)
|
||||
{
|
||||
unsigned bit;
|
||||
int nack;
|
||||
|
||||
for (bit = 0; bit < 8; bit++) {
|
||||
i2c_write_bit((byte & 0x80) != 0);
|
||||
byte <<= 1;
|
||||
}
|
||||
nack = i2c_read_bit();
|
||||
|
||||
return nack;
|
||||
}
|
||||
|
||||
/* Read a byte from I2C bus */
|
||||
unsigned char i2c_read_byte(int nack)
|
||||
{
|
||||
unsigned char byte = 0;
|
||||
unsigned bit;
|
||||
|
||||
for (bit = 0; bit < 8; bit++)
|
||||
byte = (byte << 1) | i2c_read_bit();
|
||||
i2c_write_bit(nack);
|
||||
|
||||
return byte;
|
||||
}
|
||||
|
||||
//*******************
|
||||
// Low-level functions used by the bit-banger
|
||||
|
||||
// Pause for half an I2C bus clock cycle
|
||||
static void I2CDELAY()
|
||||
{
|
||||
// Code stolen from sdramc.c::sdramc_ck_delay()
|
||||
|
||||
// Use the CPU cycle counter (CPU and HSB clocks are the same).
|
||||
u32 delay_start_cycle = Get_system_register(AVR32_COUNT);
|
||||
u32 delay_end_cycle = delay_start_cycle + i2c_delay;
|
||||
|
||||
// To be safer, the end of wait is based on an inequality test, so CPU cycle
|
||||
// counter wrap around is checked.
|
||||
if (delay_start_cycle > delay_end_cycle)
|
||||
{
|
||||
while ((unsigned long)Get_system_register(AVR32_COUNT) > delay_end_cycle);
|
||||
}
|
||||
while ((unsigned long)Get_system_register(AVR32_COUNT) < delay_end_cycle);
|
||||
}
|
||||
|
||||
// Set SCL as input and return current level of line
|
||||
static int READSCL()
|
||||
{
|
||||
scl_regs->oderc = SCL_PINMASK;
|
||||
return ( scl_regs->pvr & SCL_PINMASK ) ? 1 : 0;
|
||||
}
|
||||
|
||||
// Set SDA as input and return current level of line
|
||||
static int READSDA()
|
||||
{
|
||||
sda_regs->oderc = SDA_PINMASK;
|
||||
return ( sda_regs->pvr & SDA_PINMASK ) ? 1 : 0;
|
||||
}
|
||||
|
||||
// Actively drive SCL signal low
|
||||
static void CLRSCL(void)
|
||||
{
|
||||
scl_regs->oders = SCL_PINMASK;
|
||||
}
|
||||
|
||||
// Actively drive SDA signal low
|
||||
static void CLRSDA(void)
|
||||
{
|
||||
sda_regs->oders = SDA_PINMASK;
|
||||
}
|
||||
|
||||
// Bus control was lost.
|
||||
// Not currently used. With a higher-level I2C interface, this can do a
|
||||
// longjmp back to the eLua C interface routine which can retry the transfer
|
||||
// when the bus is free.
|
||||
static void ARBITRATION_LOST(void)
|
||||
{
|
||||
}
|
7
src/platform/avr32/i2c.h
Normal file
7
src/platform/avr32/i2c.h
Normal file
@ -0,0 +1,7 @@
|
||||
// Declarations for the low-level AVR32 I2C driver for eLua
|
||||
|
||||
u32 i2c_setup( u32 speed ); // speed is in Hz
|
||||
void i2c_start_cond( void );
|
||||
void i2c_stop_cond( void );
|
||||
int i2c_write_byte( unsigned char byte ); // returns 0 if acked by slave
|
||||
unsigned char i2c_read_byte( int nack );
|
@ -15,7 +15,6 @@
|
||||
#include "platform_conf.h"
|
||||
#include "common.h"
|
||||
#include "buf.h"
|
||||
#include "spi.h"
|
||||
#ifdef BUILD_MMCFS
|
||||
#include "diskio.h"
|
||||
#endif
|
||||
@ -40,6 +39,7 @@
|
||||
#include "spi.h"
|
||||
#include "adc.h"
|
||||
#include "pwm.h"
|
||||
#include "i2c.h"
|
||||
|
||||
// UIP sys tick data
|
||||
// NOTE: when using virtual timers, SYSTICKHZ and VTMR_FREQ_HZ should have the
|
||||
@ -145,10 +145,12 @@ int platform_init()
|
||||
// Setup clocks
|
||||
if( PM_FREQ_STATUS_FAIL == pm_configure_clocks( &pm_freq_param ) )
|
||||
return PLATFORM_ERR;
|
||||
#ifdef FOSC32
|
||||
// Select the 32-kHz oscillator crystal
|
||||
pm_enable_osc32_crystal (&AVR32_PM );
|
||||
// Enable the 32-kHz clock
|
||||
pm_enable_clk32_no_wait( &AVR32_PM, AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC );
|
||||
#endif
|
||||
|
||||
// Initialize external memory if any.
|
||||
#ifdef AVR32_SDRAMC
|
||||
@ -961,6 +963,49 @@ u32 platform_pwm_op( unsigned id, int op, u32 data)
|
||||
return 0;
|
||||
}
|
||||
|
||||
// ****************************************************************************
|
||||
// I2C support
|
||||
|
||||
u32 platform_i2c_setup( unsigned id, u32 speed )
|
||||
{
|
||||
return i2c_setup(speed);
|
||||
}
|
||||
|
||||
void platform_i2c_send_start( unsigned id )
|
||||
{
|
||||
i2c_start_cond();
|
||||
}
|
||||
|
||||
void platform_i2c_send_stop( unsigned id )
|
||||
{
|
||||
i2c_stop_cond();
|
||||
}
|
||||
|
||||
int platform_i2c_send_address( unsigned id, u16 address, int direction )
|
||||
{
|
||||
// Convert enum codes to R/w bit value.
|
||||
// If TX == 0 and RX == 1, this test will be removed by the compiler
|
||||
if ( ! ( PLATFORM_I2C_DIRECTION_TRANSMITTER == 0 &&
|
||||
PLATFORM_I2C_DIRECTION_RECEIVER == 1 ) ) {
|
||||
direction = ( direction == PLATFORM_I2C_DIRECTION_TRANSMITTER ) ? 0 : 1;
|
||||
}
|
||||
|
||||
// Low-level returns nack (0=acked); we return ack (1=acked).
|
||||
return ! i2c_write_byte( (address << 1) | direction );
|
||||
}
|
||||
|
||||
int platform_i2c_send_byte( unsigned id, u8 data )
|
||||
{
|
||||
// Low-level returns nack (0=acked); we return ack (1=acked).
|
||||
return ! i2c_write_byte( data );
|
||||
}
|
||||
|
||||
int platform_i2c_recv_byte( unsigned id, int ack )
|
||||
{
|
||||
return i2c_read_byte( !ack );
|
||||
}
|
||||
|
||||
|
||||
// ****************************************************************************
|
||||
// Network support
|
||||
|
||||
@ -1045,3 +1090,42 @@ u32 platform_eth_get_elapsed_time()
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
// ****************************************************************************
|
||||
// Platform specific modules go here
|
||||
|
||||
#ifdef PS_LIB_TABLE_NAME
|
||||
|
||||
#define MIN_OPT_LEVEL 2
|
||||
#include "lua.h"
|
||||
#include "lauxlib.h"
|
||||
#include "lrotable.h"
|
||||
#include "lrodefs.h"
|
||||
|
||||
extern const LUA_REG_TYPE disp_map[];
|
||||
|
||||
const LUA_REG_TYPE platform_map[] =
|
||||
{
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
{ LSTRKEY( "disp" ), LROVAL( disp_map ) },
|
||||
#endif
|
||||
{ LNILKEY, LNILVAL }
|
||||
};
|
||||
|
||||
LUALIB_API int luaopen_platform( lua_State *L )
|
||||
{
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
return 0;
|
||||
#else // #if LUA_OPTIMIZE_MEMORY > 0
|
||||
luaL_register( L, PS_LIB_TABLE_NAME, platform_map );
|
||||
|
||||
// Setup the new tables inside platform table
|
||||
lua_newtable( L );
|
||||
luaL_register( L, NULL, disp_map );
|
||||
lua_setfield( L, -2, "disp" );
|
||||
|
||||
return 1;
|
||||
#endif // #if LUA_OPTIMIZE_MEMORY > 0
|
||||
}
|
||||
|
||||
#endif // #ifdef PS_LIB_TABLE_NAME
|
||||
|
@ -770,14 +770,14 @@ static void adcs_init()
|
||||
elua_adc_dev_state *d = adc_get_dev_state( 0 );
|
||||
|
||||
MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC);
|
||||
|
||||
// Try ramping up max sampling rate
|
||||
|
||||
// Try ramping up max sampling rate
|
||||
MAP_SysCtlADCSpeedSet(SYSCTL_ADCSPEED_500KSPS);
|
||||
MAP_SysCtlADCSpeedSet(SYSCTL_ADCSPEED_1MSPS);
|
||||
|
||||
for( id = 0; id < NUM_ADC; id ++ )
|
||||
adc_init_ch_state( id );
|
||||
|
||||
|
||||
// Perform sequencer setup
|
||||
platform_adc_setclock( 0, 0 );
|
||||
MAP_ADCIntEnable( ADC_BASE, d->seq_id );
|
||||
|
@ -43,13 +43,13 @@ int platform_init()
|
||||
// DeInit NVIC and SCBNVIC
|
||||
NVIC_DeInit();
|
||||
NVIC_SCBDeInit();
|
||||
|
||||
|
||||
// Configure the NVIC Preemption Priority Bits:
|
||||
// two (2) bits of preemption priority, six (6) bits of sub-priority.
|
||||
// Since the Number of Bits used for Priority Levels is five (5), so the
|
||||
// actual bit number of sub-priority is three (3)
|
||||
NVIC_SetPriorityGrouping(0x05);
|
||||
|
||||
|
||||
// Set Vector table offset value
|
||||
#if (__RAM_MODE__==1)
|
||||
NVIC_SetVTOR(0x10000000);
|
||||
@ -145,7 +145,7 @@ u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int st
|
||||
UART_FIFO_CFG_Type UARTFIFOConfigStruct;
|
||||
// Pin configuration for UART0
|
||||
PINSEL_CFG_Type PinCfg;
|
||||
|
||||
|
||||
// UART0 Pin Config
|
||||
PinCfg.Funcnum = 1;
|
||||
PinCfg.OpenDrain = 0;
|
||||
@ -155,7 +155,7 @@ u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int st
|
||||
PINSEL_ConfigPin(&PinCfg);
|
||||
PinCfg.Pinnum = 3;
|
||||
PINSEL_ConfigPin(&PinCfg);
|
||||
|
||||
|
||||
UARTConfigStruct.Baud_rate = ( uint32_t )baud;
|
||||
|
||||
switch( databits )
|
||||
@ -196,9 +196,9 @@ u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int st
|
||||
UARTConfigStruct.Parity = UART_PARITY_EVEN;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
UART_Init(uart[ id ], &UARTConfigStruct);
|
||||
|
||||
|
||||
// Get default FIFO config and initialize
|
||||
UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
|
||||
UART_FIFOConfig(uart[ id ], &UARTFIFOConfigStruct);
|
||||
@ -256,8 +256,8 @@ static u32 platform_timer_set_clock( unsigned id, u32 clock )
|
||||
|
||||
// Initialize timer 0, prescale count time of 1uS
|
||||
TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
|
||||
TIM_ConfigStruct.PrescaleValue = 1000000ULL / clock;
|
||||
|
||||
TIM_ConfigStruct.PrescaleValue = 1000000ULL / clock;
|
||||
|
||||
TIM_Init( tmr[ id ], TIM_TIMER_MODE, &TIM_ConfigStruct );
|
||||
TIM_Cmd( tmr[ id ], ENABLE );
|
||||
TIM_ResetCounter( tmr[ id ] );
|
||||
@ -448,7 +448,7 @@ u32 platform_adc_setclock( unsigned id, u32 frequency )
|
||||
|
||||
// Run timer at 1MHz
|
||||
TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
|
||||
TIM_ConfigStruct.PrescaleValue = 1;
|
||||
TIM_ConfigStruct.PrescaleValue = 1;
|
||||
|
||||
TIM_MatchConfigStruct.MatchChannel = 1;
|
||||
TIM_MatchConfigStruct.IntOnMatch = FALSE;
|
||||
@ -459,7 +459,7 @@ u32 platform_adc_setclock( unsigned id, u32 frequency )
|
||||
TIM_MatchConfigStruct.MatchValue = ( 1000000ULL / ( frequency * 2 ) ) - 1;
|
||||
|
||||
frequency = 1000000ULL / (TIM_MatchConfigStruct.MatchValue + 1);
|
||||
|
||||
|
||||
// Set configuration for Tim_config and Tim_MatchConfig
|
||||
TIM_Init( tmr[ d->timer_id ], TIM_TIMER_MODE, &TIM_ConfigStruct );
|
||||
TIM_ConfigMatch( tmr[ d->timer_id ], &TIM_MatchConfigStruct );
|
||||
@ -551,7 +551,7 @@ static u32 platform_pwm_set_clock( unsigned id, u32 clock )
|
||||
PWMCfgDat.PrescaleOption = PWM_TIMER_PRESCALE_USVAL;
|
||||
PWMCfgDat.PrescaleValue = 1000000ULL / clock;
|
||||
PWM_Init( LPC_PWM1, PWM_MODE_TIMER, &PWMCfgDat );
|
||||
|
||||
|
||||
return clock;
|
||||
}
|
||||
|
||||
|
@ -73,8 +73,8 @@ static void platform_setup_extmem()
|
||||
volatile unsigned int i;
|
||||
volatile DWORD wtemp;
|
||||
|
||||
EMC_CTRL = 0x00000001; /*Disable Address mirror*/
|
||||
PCONP |= 0x00000800; /* Turn On EMC PCLK */
|
||||
EMC_CTRL = 0x00000001; /*Disable Address mirror*/
|
||||
PCONP |= 0x00000800; /* Turn On EMC PCLK */
|
||||
PINSEL4 = 0x50000000;
|
||||
PINSEL5 = 0x05050555;
|
||||
PINSEL6 = 0x55555555;
|
||||
@ -590,7 +590,7 @@ static void adc_int_handler()
|
||||
if ( dreg_t & ( 1UL << 31 ) )
|
||||
{
|
||||
d->sample_buf[ d->seq_ctr ] = ( u16 )( ( dreg_t >> 6 ) & 0x3FF );
|
||||
AD0CR &= 0xF8FFFF00; // stop ADC, disable channels
|
||||
AD0CR &= 0xF8FFFF00; // stop ADC, disable channels
|
||||
s->value_fresh = 1;
|
||||
|
||||
if ( s->logsmoothlen > 0 && s->smooth_ready == 0)
|
||||
|
@ -154,7 +154,7 @@
|
||||
// *****************************************************************************
|
||||
// CPU constants that should be exposed to the eLua "cpu" module
|
||||
|
||||
#define PINSEL_BASE_ADDR 0xE002C000
|
||||
#define PINSEL_BASE_ADDR 0xE002C000
|
||||
#define IO_PINSEL0 ( PINSEL_BASE_ADDR + 0x00 )
|
||||
#define IO_PINSEL1 ( PINSEL_BASE_ADDR + 0x04 )
|
||||
#define IO_PINSEL2 ( PINSEL_BASE_ADDR + 0x08 )
|
||||
|
@ -90,18 +90,18 @@ void *memory_end_address = 0;
|
||||
|
||||
void platform_ll_init()
|
||||
{
|
||||
// Initialise heap memory region.
|
||||
memory_start_address = hostif_getmem( MEM_LENGTH );
|
||||
memory_end_address = memory_start_address + MEM_LENGTH;
|
||||
// Initialise heap memory region.
|
||||
memory_start_address = hostif_getmem( MEM_LENGTH );
|
||||
memory_end_address = memory_start_address + MEM_LENGTH;
|
||||
}
|
||||
|
||||
int platform_init()
|
||||
{
|
||||
if( memory_start_address == NULL )
|
||||
if( memory_start_address == NULL )
|
||||
{
|
||||
hostif_putstr( "platform_init(): mmap failed\n" );
|
||||
return PLATFORM_ERR;
|
||||
}
|
||||
return PLATFORM_ERR;
|
||||
}
|
||||
|
||||
// Set the std input/output functions
|
||||
// Set the send/recv functions
|
||||
|
@ -17,60 +17,60 @@
|
||||
|
||||
static int lcd_init(lua_State * L)
|
||||
{
|
||||
STM3210E_LCD_Init();
|
||||
STM3210E_LCD_Init();
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_setforecolor(lua_State * L)
|
||||
{
|
||||
u16 color = luaL_checkint(L, 1);
|
||||
u16 color = luaL_checkint(L, 1);
|
||||
|
||||
LCD_SetTextColor(color);
|
||||
LCD_SetTextColor(color);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_setbackcolor(lua_State * L)
|
||||
{
|
||||
u16 color = luaL_checkint(L, 1);
|
||||
u16 color = luaL_checkint(L, 1);
|
||||
|
||||
LCD_SetBackColor(color);
|
||||
LCD_SetBackColor(color);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_clear(lua_State * L)
|
||||
{
|
||||
u16 color;
|
||||
u16 color;
|
||||
|
||||
if (lua_gettop(L) == 0)
|
||||
color = 0x0000;
|
||||
else
|
||||
color = luaL_checkint(L, 1);
|
||||
if (lua_gettop(L) == 0)
|
||||
color = 0x0000;
|
||||
else
|
||||
color = luaL_checkint(L, 1);
|
||||
|
||||
LCD_Clear(color);
|
||||
LCD_Clear(color);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_clearline(lua_State * L)
|
||||
{
|
||||
u8 line = luaL_checkint(L, 1);
|
||||
u8 line = luaL_checkint(L, 1);
|
||||
|
||||
LCD_ClearLine(line);
|
||||
LCD_ClearLine(line);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_print(lua_State * L)
|
||||
{
|
||||
u8 line = luaL_checkint(L, 1);
|
||||
u8 * text = (u8 *)luaL_checkstring(L, 2);
|
||||
u8 line = luaL_checkint(L, 1);
|
||||
u8 * text = (u8 *)luaL_checkstring(L, 2);
|
||||
|
||||
LCD_DisplayStringLine(line, text);
|
||||
LCD_DisplayStringLine(line, text);
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int lcd_mt_index( lua_State *L )
|
||||
@ -88,17 +88,17 @@ static int lcd_mt_index( lua_State *L )
|
||||
#include "lrodefs.h"
|
||||
const LUA_REG_TYPE lcd_map[] =
|
||||
{
|
||||
{ LSTRKEY( "init" ), LFUNCVAL( lcd_init ) },
|
||||
{ LSTRKEY( "setforecolor" ), LFUNCVAL( lcd_setforecolor ) },
|
||||
{ LSTRKEY( "setbackcolor" ), LFUNCVAL( lcd_setbackcolor ) },
|
||||
{ LSTRKEY( "clear" ), LFUNCVAL( lcd_clear ) },
|
||||
{ LSTRKEY( "clearline" ), LFUNCVAL( lcd_clearline ) },
|
||||
{ LSTRKEY( "print" ), LFUNCVAL( lcd_print ) },
|
||||
{ LSTRKEY( "init" ), LFUNCVAL( lcd_init ) },
|
||||
{ LSTRKEY( "setforecolor" ), LFUNCVAL( lcd_setforecolor ) },
|
||||
{ LSTRKEY( "setbackcolor" ), LFUNCVAL( lcd_setbackcolor ) },
|
||||
{ LSTRKEY( "clear" ), LFUNCVAL( lcd_clear ) },
|
||||
{ LSTRKEY( "clearline" ), LFUNCVAL( lcd_clearline ) },
|
||||
{ LSTRKEY( "print" ), LFUNCVAL( lcd_print ) },
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
{ LSTRKEY( "__metatable" ), LROVAL( lcd_map ) },
|
||||
#endif
|
||||
{ LSTRKEY( "__index" ), LFUNCVAL( lcd_mt_index ) },
|
||||
{ LNILKEY, LNILVAL }
|
||||
{ LNILKEY, LNILVAL }
|
||||
};
|
||||
|
||||
LUALIB_API int luaopen_lcd(lua_State * L)
|
||||
|
@ -1098,7 +1098,7 @@ static void adcs_init()
|
||||
|
||||
for( id = 0; id < NUM_ADC; id ++ )
|
||||
adc_init_ch_state( id );
|
||||
|
||||
|
||||
RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC1, ENABLE );
|
||||
RCC_ADCCLKConfig( RCC_PCLK2_Div8 );
|
||||
|
||||
|
@ -71,7 +71,7 @@ static void all_exti_irqhandler( int line )
|
||||
{
|
||||
u16 v, port, pin;
|
||||
|
||||
v = exti_line_to_gpio( line );
|
||||
v = exti_line_to_gpio( line );
|
||||
port = PLATFORM_IO_GET_PORT( v );
|
||||
pin = PLATFORM_IO_GET_PIN( v );
|
||||
|
||||
@ -154,7 +154,7 @@ static int gpioh_set_int_status( elua_int_id id, elua_int_resnum resnum, int sta
|
||||
exti_init_struct.EXTI_Line = exti_line[ exint_gpio_to_src( resnum ) ];
|
||||
exti_init_struct.EXTI_Mode = EXTI_Mode_Interrupt;
|
||||
if( ( ( ( EXTI->RTSR & mask ) != 0 ) && ( id == INT_GPIO_NEGEDGE ) ) ||
|
||||
( ( ( EXTI->FTSR & mask ) != 0 ) && ( id == INT_GPIO_POSEDGE ) ) )
|
||||
( ( ( EXTI->FTSR & mask ) != 0 ) && ( id == INT_GPIO_POSEDGE ) ) )
|
||||
exti_init_struct.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
|
||||
else
|
||||
exti_init_struct.EXTI_Trigger = id == INT_GPIO_POSEDGE ? EXTI_Trigger_Rising : EXTI_Trigger_Falling;
|
||||
|
@ -470,18 +470,18 @@ void ADC_IRQHandler( void )
|
||||
|
||||
// Fill in smoothing buffer until warmed up
|
||||
if ( s->logsmoothlen > 0 && s->smooth_ready == 0)
|
||||
adc_smooth_data( s->id );
|
||||
adc_smooth_data( s->id );
|
||||
#if defined( BUF_ENABLE_ADC )
|
||||
else if ( s->reqsamples > 1 )
|
||||
{
|
||||
buf_write( BUF_ID_ADC, s->id, ( t_buf_data* )s->value_ptr );
|
||||
s->value_fresh = 0;
|
||||
buf_write( BUF_ID_ADC, s->id, ( t_buf_data* )s->value_ptr );
|
||||
s->value_fresh = 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
// If we have the number of requested samples, stop sampling
|
||||
if ( adc_samples_available( s->id ) >= s->reqsamples && s->freerunning == 0 )
|
||||
platform_adc_stop( s->id );
|
||||
platform_adc_stop( s->id );
|
||||
|
||||
d->seq_ctr++;
|
||||
}
|
||||
|
@ -39,7 +39,7 @@ __semihost(int reason, void * arg)
|
||||
: "=r" (value) /* Outputs */
|
||||
: "r" (reason), "r" (arg), "i" (AngelSWI) /* Inputs */
|
||||
: "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"
|
||||
/* Clobbers r0 and r1, and lr if in supervisor mode */);
|
||||
/* Clobbers r0 and r1, and lr if in supervisor mode */);
|
||||
/* Accordingly to page 13-77 of ARM DUI 0040D other registers
|
||||
can also be clobbered. Some memory positions may also be
|
||||
changed by a system call, so they should not be kept in
|
||||
@ -168,7 +168,7 @@ static off_t semifs_lseek_r( struct _reent *r, int fd, off_t off, int whence )
|
||||
case SEEK_CUR:
|
||||
// seek from current position
|
||||
if (fd == SEMIFS_MAX_FDS)
|
||||
return -1;
|
||||
return -1;
|
||||
off += semifs_fd_table[ fd ].pos;
|
||||
whence = SEEK_SET;
|
||||
break;
|
||||
|
@ -129,7 +129,7 @@ u32 ser_write( ser_handler id, const u8 *src, u32 size )
|
||||
{
|
||||
HANDLE hComm = ( HANDLE )id;
|
||||
DWORD written;
|
||||
|
||||
|
||||
if( !WriteFile( hComm, src, size, &written, NULL ) )
|
||||
return 0;
|
||||
return written;
|
||||
|
Loading…
x
Reference in New Issue
Block a user