mirror of
https://github.com/elua/elua.git
synced 2025-01-25 01:02:54 +08:00
LPC2888 port mostly functional, still working on it
This commit is contained in:
parent
5efc3cb2ac
commit
3406a06f4d
@ -6,6 +6,6 @@
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//#define BUILD_XMODEM
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#define BUILD_SHELL
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#define BUILD_ROMFS
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//#define BUILD_TERM
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#define BUILD_TERM
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#endif
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@ -2,7 +2,7 @@
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cpumode = ARGUMENTS.get( 'cpumode', 'arm' ).lower()
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specific_files = "lpc28xx.s platform.c target.c"
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specific_files = "lpc28xx.s platform.c target.c uart.c"
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# Check CPU
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if cputype == 'lpc2888':
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@ -12,17 +12,19 @@
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#include <stdio.h>
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#include "lpc288x.h"
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#include "target.h"
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#include "uart.h"
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// *****************************************************************************
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// std functions
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static void uart_send( int fd, char c )
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{
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uart_write( c );
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}
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static int uart_recv()
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{
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return 0;
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return uart_read();
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}
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// ****************************************************************************
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@ -33,35 +35,95 @@ int platform_init()
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// Initialize CPU
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lpc288x_init();
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// Initialize UART
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// Initialize UART
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uart_init( 115200, 8, PLATFORM_UART_PARITY_NONE, PLATFORM_UART_STOPBITS_1 );
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// Set the send/recv functions
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std_set_send_func( uart_send );
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std_set_get_func( uart_recv );
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return PLATFORM_OK;
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}
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// ****************************************************************************
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// PIO functions
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// Array with register addresses
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typedef volatile unsigned int* vu_ptr;
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static const vu_ptr pio_m0s_regs[] = { &MODE0S_0, &MODE0S_1, &MODE0S_2, &MODE0S_3, &MODE0S_4, &MODE0S_5, &MODE0S_6, &MODE0S_7 };
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static const vu_ptr pio_m0c_regs[] = { &MODE0C_0, &MODE0C_1, &MODE0C_2, &MODE0C_3, &MODE0C_4, &MODE0C_5, &MODE0C_6, &MODE0C_7 };
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static const vu_ptr pio_m1s_regs[] = { &MODE1S_0, &MODE1S_1, &MODE1S_2, &MODE1S_3, &MODE1S_4, &MODE1S_5, &MODE1S_6, &MODE1S_7 };
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static const vu_ptr pio_m1c_regs[] = { &MODE1C_0, &MODE1C_1, &MODE1C_2, &MODE1C_3, &MODE1C_4, &MODE1C_5, &MODE1C_6, &MODE1C_7 };
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static const vu_ptr pio_m0_regs[] = { &MODE0_0, &MODE0_1, &MODE0_2, &MODE0_3, &MODE0_4, &MODE0_5, &MODE0_6, &MODE0_7 };
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static const vu_ptr pio_m1_regs[] = { &MODE1_0, &MODE1_1, &MODE1_2, &MODE1_3, &MODE1_4, &MODE1_5, &MODE1_6, &MODE1_7 };
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static const vu_ptr pio_pin_regs[] = { &PINS_0, &PINS_1, &PINS_2, &PINS_3, &PINS_4, &PINS_5, &PINS_6, &PINS_7 };
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int platform_pio_has_port( unsigned port )
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{
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return 0;
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return port < 8;
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}
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const char* platform_pio_get_prefix( unsigned port )
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{
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return NULL;
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static char c[ 3 ];
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sprintf( c, "P%d", port );
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return c;
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}
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// Maximum number of pins per port
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static const unsigned pins_per_port[] = { 32, 20, 4, 6, 12, 6, 4, 1 };
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int platform_pio_has_pin( unsigned port, unsigned pin )
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{
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return 0;
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return port < 8 && pins_per_port[ port ] < pin;
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}
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pio_type platform_pio_op( unsigned port, pio_type pinmask, int op )
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{
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return 0;
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pio_type retval = 0;
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switch( op )
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{
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case PLATFORM_IO_PORT_SET_VALUE:
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*pio_m0_regs[ port ] = pinmask;
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break;
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case PLATFORM_IO_PIN_SET:
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*pio_m0s_regs[ port ] = pinmask;
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break;
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case PLATFORM_IO_PIN_CLEAR:
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*pio_m0c_regs[ port ] = pinmask;
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break;
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case PLATFORM_IO_PORT_DIR_OUTPUT:
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*pio_m1_regs[ port ] = 0xFFFFFFFF;
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break;
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case PLATFORM_IO_PIN_DIR_OUTPUT:
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*pio_m1s_regs[ port ] = pinmask;
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break;
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case PLATFORM_IO_PORT_DIR_INPUT:
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*pio_m1_regs[ port ] = 0;
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*pio_m0_regs[ port ] = 0;
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break;
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case PLATFORM_IO_PIN_DIR_INPUT:
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*pio_m1c_regs[ port ] = pinmask;
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*pio_m0c_regs[ port ] = pinmask;
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break;
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case PLATFORM_IO_PORT_GET_VALUE:
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retval = *pio_pin_regs[ port ];
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break;
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case PLATFORM_IO_PIN_GET:
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retval = *pio_pin_regs[ port ] & pinmask ? 1 : 0;
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break;
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}
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return retval;
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}
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// ****************************************************************************
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@ -69,21 +131,48 @@ pio_type platform_pio_op( unsigned port, pio_type pinmask, int op )
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int platform_uart_exists( unsigned id )
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{
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return 0;
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return id < 1;
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}
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u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int stopbits )
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{
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return 0;
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return uart_init( baud, databits, parity, stopbits );
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}
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void platform_uart_send( unsigned id, u8 data )
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{
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uart_write( data );
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}
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int platform_uart_recv( unsigned id, unsigned timer_id, int timeout )
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{
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return -1;
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timer_data_type tmr_start, tmr_crt;
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int res;
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if( timeout == 0 )
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{
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// Return data only if already available
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return uart_read_nb();
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}
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else if( timeout == PLATFORM_UART_INFINITE_TIMEOUT )
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{
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// Wait for data
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return uart_read();
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}
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else
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{
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// Receive char with the specified timeout
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tmr_start = platform_timer_op( timer_id, PLATFORM_TIMER_OP_START,0 );
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while( 1 )
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{
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if( ( res = uart_read_nb() ) > 0 )
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break;
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tmr_crt = platform_timer_op( timer_id, PLATFORM_TIMER_OP_READ, 0 );
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if( platform_timer_get_diff_us( timer_id, tmr_crt, tmr_start ) >= timeout )
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break;
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}
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return res;
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}
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}
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// ****************************************************************************
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@ -94,18 +183,6 @@ int platform_timer_exists( unsigned id )
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return 0;
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}
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// Helper: get timer clock
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static u32 platform_timer_get_clock( unsigned id )
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{
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return 0;
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}
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// Helper: set timer clock
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static u32 platform_timer_set_clock( unsigned id, u32 clock )
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{
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return 0;
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}
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void platform_timer_delay( unsigned id, u32 delay_us )
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{
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}
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@ -135,7 +212,7 @@ const char* platform_pd_get_cpu_name()
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u32 platform_pd_get_cpu_frequency()
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{
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return 0;
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return Fcclk;
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}
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// ****************************************************************************
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@ -3,4 +3,12 @@
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#ifndef __PLATFORM_LIBS_H__
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#define __PLATFORM_LIBS_H__
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#include "auxmods.h"
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#define LUA_PLATFORM_LIBS\
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{ AUXLIB_PIO, luaopen_pio},\
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{ AUXLIB_PD, luaopen_pd },\
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{ AUXLIB_UART, luaopen_uart },\
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{ AUXLIB_TERM, luaopen_term }
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#endif
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@ -15,17 +15,6 @@ typedef enum _SectionInClockSelect_t
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HighPLL = 7, MainPLL,
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} SectionInClockSelect_t;
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static void Dly_us(u32 Dly)
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{
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INT_REQ5 = 0x04010000; // enable interrupt
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T0CTRL = 0; // stop counting
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T0LOAD = 12 * Dly; // load period
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T0CLR = 0; // clear timer pendig interrupt
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T0CTRL |= ( 1 << 7 ); // enable counting
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while( !( INT_PENDING & ( 1 << 5 ) ) );
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T0CTRL &= ~( 1 << 7 );
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}
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static void LPC288x_SectionClockSelect(volatile unsigned int * pReg, u32 Mode)
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{
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#define ST_OFFSET ((unsigned long *)&SYSSSR - (unsigned long *)&SYSSCR)
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@ -84,7 +73,7 @@ static void InitSDRAMCtrl(void)
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// DELAY to allow power and clocks to stabilize ~100 us
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// NOP
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EMC_DYN_CTRL = 0x4183;
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Dly_us(200);
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for( i = 0; i < 1000; i ++ );
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// PALL
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EMC_DYN_CTRL = ( EMC_DYN_CTRL & ~0x180 ) | ( 2 << 7 );
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@ -1,274 +1,100 @@
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/*****************************************************************************
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* uart.c: UART API file for NXP LPC288x Family Microprocessors
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*
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* Copyright(C) 2006, NXP Semiconductor
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* All rights reserved.
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*
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* History
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* 2006.07.12 ver 1.00 Prelimnary version, first Release
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*
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******************************************************************************/
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#include "LPC288x.h" /* LPC288x definitions */
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// UART driver for LPC2888
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#include "lpc288x.h" /* LPC288x definitions */
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#include "type.h"
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#include "target.h"
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#include "irq.h"
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#include "uart.h"
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#include <reent.h>
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#include <errno.h>
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#include <string.h>
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static char uart_rx_buf[ UART_BUFSIZE ];
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volatile static int uart_rx_in, uart_rx_out;
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int uart_tx_count;
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#define LABS( x ) ( ( x ) < 0 ? -( x ) : ( x ) )
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// Structure with UART baud/parameters
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// Computed used Philip's "baud rate calculator" XLS file
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// Pre-computed values for different baud rates, using Philip's 'baud rate calculator' XLS file
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typedef struct
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{
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int udlm, udll, divaddval, mulval;
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} BAUDDATA;
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unsigned baud;
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unsigned udlm, udll, divaddval, mulval;
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} UART_BAUDDATA;
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static const BAUDDATA baudinfo[] =
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static const UART_BAUDDATA uart_baudinfo[] =
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{
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{ 12, 53, 0, 2 },
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{ 4, 226, 1, 4 },
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{ 2, 113, 1, 4 },
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{ 0, 217, 4, 5 },
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{ 0, 217, 1, 5 },
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{ 0, 71, 3, 8 },
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{ 0, 47, 5, 13 },
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{ 0, 24, 5, 14 },
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};
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// Local state information
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static struct uart_data uartdata;
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static void uart_isr(void)
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{
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u8 IIRValue, LSRValue;
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u8 dummy;
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IIRValue = UART_IIR;
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IIRValue >>= 1; /* skip pending bit in IIR */
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IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
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if ( IIRValue == IIR_RLS ) /* Receive Line Status */
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{
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LSRValue = UART_LSR;
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/* Receive Line Status */
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if ( LSRValue & (LSR_OE|LSR_PE|LSR_FE|LSR_RXFE|LSR_BI) )
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{
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/* There are errors or break interrupt */
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/* Read LSR will clear the interrupt */
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dummy = UART_RBR;
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return;
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}
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if( LSRValue & LSR_RDR ) /* Receive Data Ready */
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{
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dummy = UART_RBR;
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if( dummy != '\r' )
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{
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uart_rx_buf[ uart_rx_in ] = dummy;
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UART_INC_OP( uart_rx_in );
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}
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}
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}
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else if ( IIRValue == IIR_RDA ) /* Receive Data Available */
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{
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dummy = UART_RBR;
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if( dummy != '\r' )
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{
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uart_rx_buf[ uart_rx_in ] = dummy;
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UART_INC_OP( uart_rx_in );
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}
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}
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else if ( IIRValue == IIR_CTI ) /* Character timeout indicator */
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{
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dummy = UART_RBR;
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}
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}
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// Utility function: write a char to the UART
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static void uart_putchar( char c )
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{
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if( uart_tx_count == TXBUFSIZE )
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{
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while( ( UART_LSR & LSR_THRE ) == 0 );
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uart_tx_count = 0;
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}
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UART_THR = c;
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uart_tx_count ++;
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}
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// Utility function: return the number of bytes in the UART RX buffer
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static int uart_bytes_received()
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{
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return ( uart_rx_in + UART_BUFSIZE - uart_rx_out ) & UART_BUF_MASK;
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}
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// Utility function: read a char from the UART. This is a BLOCKING function.
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static char uart_getchar()
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{
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char c;
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while( uart_bytes_received() == 0 );
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c = uart_rx_buf[ uart_rx_out ];
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UART_INC_OP( uart_rx_out );
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return c;
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}
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// 'read' function for UART
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static long uart_read( struct _reent *r, int fd, char *ptr, int len )
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{
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int i, c;
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// Check file number
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if( ( fd < DM_STDIN_NUM ) || ( fd > DM_STDERR_NUM ) )
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{
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r->_errno = EBADF;
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return -1;
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}
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if( fd != DM_STDIN_NUM )
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{
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r->_errno = EINVAL;
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return -1;
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}
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for( i = 0; i < len; i ++ )
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{
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c = uart_getchar();
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ptr[ i ] = c;
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if( c == '\n' )
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return i + 1;
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}
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return len;
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}
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// 'write' function for UART
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static long uart_write( struct _reent *r, int fd, const char *ptr, int len )
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{
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int i;
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// Check file number
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if( ( fd < DM_STDIN_NUM ) || ( fd > DM_STDERR_NUM ) )
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{
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r->_errno = EBADF;
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return -1;
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}
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if( ( fd != DM_STDOUT_NUM ) && ( fd != DM_STDERR_NUM ) )
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{
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r->_errno = EINVAL;
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return -1;
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}
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for( i = 0; i < len; i ++ )
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uart_putchar( ptr[ i ] );
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return len;
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}
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// 'ioctl' function for UART
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static int uart_ioctl( struct _reent *r, int file, unsigned long request, void *ptr )
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{
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struct uart_data *pdata;
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int temp, oldint;
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const BAUDDATA* pbaud;
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// Check file number
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if( ( file < DM_STDIN_NUM ) || ( file > DM_STDERR_NUM ) )
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{
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r->_errno = EBADF;
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return -1;
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}
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// Check request
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if( ( request < IOCTL_UART_FIRST ) || ( request > IOCTL_UART_LAST ) )
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{
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r->_errno = EINVAL;
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return -1;
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}
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// Serve request
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switch( request )
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{
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case IOCTL_UART_SET:
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// Set UART data
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pdata = ( struct uart_data* )ptr;
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if( pdata->baud < 0 || pdata->baud > UART_BAUD_115200 )
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{
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r->_errno = EINVAL;
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return -1;
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}
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memcpy( &uartdata, pdata, sizeof( struct uart_data ) );
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// Disable all interrupts and initialize FIFOs
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temp = UART_IIR;
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oldint = UART_IER;
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UART_IER = 0;
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UART_FCR = 0x0F;
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// Setup format and enable access to divisor latches
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temp = pdata->databits == UART_8_DATABITS ? 3 : 2;
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temp |= ( pdata->parity == UART_ODD_PARITY ) ? 0x08 : ( ( pdata->parity == UART_EVEN_PARITY ) ? 0x18 : 0 );
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UART_LCR = temp | 0x80;
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// Write divisor latches and fractional data
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||||
pbaud = baudinfo + pdata->baud;
|
||||
UART_DLM = pbaud->udlm;
|
||||
UART_DLL = pbaud->udll;
|
||||
UART_FDR = ( pbaud->mulval << 4 ) + pbaud->divaddval;
|
||||
|
||||
// Re-enable UART and its interrupts
|
||||
UART_LCR = temp;
|
||||
UART_IER = oldint;
|
||||
break;
|
||||
|
||||
case IOCTL_UART_GET:
|
||||
memcpy( ptr, &uartdata, sizeof( struct uart_data ) );
|
||||
break;
|
||||
|
||||
case IOCTL_UART_FLUSH_IN:
|
||||
while( uart_rx_in != uart_rx_out )
|
||||
uart_getchar();
|
||||
break;
|
||||
|
||||
case IOCTL_UART_FLUSH_OUT:
|
||||
while( ( UART_LSR & LSR_THRE ) == 0 );
|
||||
uart_tx_count = 0;
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Our UART device descriptor structure
|
||||
static DM_DEVICE uart_device =
|
||||
{
|
||||
UART_DEV_NAME,
|
||||
NULL, // we don't have 'open' on UART
|
||||
NULL, // we don't hace 'close' on UART
|
||||
uart_write,
|
||||
uart_read,
|
||||
uart_ioctl
|
||||
{ 1200, 12, 53, 0, 2 },
|
||||
{ 2400, 4, 226, 1, 4 },
|
||||
{ 4800, 2, 113, 1, 4 },
|
||||
{ 9600, 0, 217, 4, 5 },
|
||||
{ 14400, 0, 217, 1, 5 },
|
||||
{ 38400, 0, 71, 3, 8 },
|
||||
{ 57600, 0, 47, 5, 13 },
|
||||
{ 115200, 0, 24, 5, 14 }
|
||||
};
|
||||
|
||||
// Initialize the UART device with the data found in the 'pdata' structure
|
||||
// Returns a pointer to the UART's 'device' structure if OK, NULL for error
|
||||
DM_DEVICE* uart_init( struct uart_data* pdata )
|
||||
{
|
||||
// Call the IOCTL function directly to set UART parameters
|
||||
if( uart_ioctl( _REENT, DM_STDIN_NUM, IOCTL_UART_SET, pdata ) != 0 )
|
||||
return NULL;
|
||||
|
||||
// Install UART interrupt handler
|
||||
if ( install_IRQ( 12, 1, uart_isr ) == FALSE )
|
||||
return NULL;
|
||||
INT_REQ12 = ( 1<<28 ) | ( 1<<27 ) | ( 1<<26 ) | ( 1<<16 ) | 0x1;
|
||||
UART_IER = IER_RBR | IER_RLS;
|
||||
return &uart_device;
|
||||
// Write a character to the UART
|
||||
void uart_write( u8 data )
|
||||
{
|
||||
while( ( UART_LSR & LSR_THRE ) == 0 );
|
||||
UART_THR = data;
|
||||
}
|
||||
|
||||
// Return UART's descriptor
|
||||
DM_DEVICE* platform_get_uart_desc()
|
||||
// Read a character from the UART (blocking)
|
||||
u8 uart_read()
|
||||
{
|
||||
return &uart_device;
|
||||
while( ( UART_LSR & LSR_RDR ) == 0 );
|
||||
return UART_RBR & 0xFF;
|
||||
}
|
||||
|
||||
// Read a character from the UART (non-blocking)
|
||||
int uart_read_nb()
|
||||
{
|
||||
if( ( UART_LSR & LSR_RDR ) == 0 )
|
||||
return -1;
|
||||
else
|
||||
return UART_RBR & 0xFF;
|
||||
}
|
||||
|
||||
// Initialize UART
|
||||
u32 uart_init( u32 baud, int databits, int parity, int stopbits )
|
||||
{
|
||||
unsigned i, minpos;
|
||||
const UART_BAUDDATA* pdata;
|
||||
u32 temp;
|
||||
|
||||
// Setup I/O ports
|
||||
// RXD is P6.0, TXD is P6.1
|
||||
MODE0S_6 = 3;
|
||||
MODE1C_6 = 3;
|
||||
|
||||
// Find correct baud
|
||||
for( i = minpos = 0; i < sizeof( uart_baudinfo ) / sizeof( UART_BAUDDATA ); i ++ )
|
||||
if( LABS( baud - uart_baudinfo[ i ].baud ) < LABS( baud - uart_baudinfo[ minpos ].baud ) )
|
||||
minpos = i;
|
||||
pdata = uart_baudinfo + minpos;
|
||||
|
||||
// Disable all interrupts and initialize FIFOs
|
||||
UART_IER = 0;
|
||||
UART_FCR = 0x0F;
|
||||
|
||||
// Setup format and enable access to divisor latches
|
||||
temp = databits - 5;
|
||||
if( stopbits == PLATFORM_UART_STOPBITS_2 || stopbits == PLATFORM_UART_STOPBITS_1_5 )
|
||||
temp |= 1 << 2;
|
||||
if( parity != PLATFORM_UART_PARITY_NONE )
|
||||
{
|
||||
temp |= 1 << 3;
|
||||
if( parity == PLATFORM_UART_PARITY_EVEN )
|
||||
temp |= 1 << 4;
|
||||
}
|
||||
UART_LCR = temp | 0x80;
|
||||
|
||||
// Write divisor latches and fractional data
|
||||
UART_DLM = pdata->udlm;
|
||||
UART_DLL = pdata->udll;
|
||||
UART_FDR = ( pdata->mulval << 4 ) + pdata->divaddval;
|
||||
|
||||
// Re-enable UART and its interrupts
|
||||
UART_LCR = temp;
|
||||
|
||||
return pdata->baud;
|
||||
}
|
||||
|
14
src/platform/lpc288x/uart.h
Normal file
14
src/platform/lpc288x/uart.h
Normal file
@ -0,0 +1,14 @@
|
||||
// UART driver for LPC2888
|
||||
|
||||
#ifndef __UART_H__
|
||||
#define __UART_H__
|
||||
|
||||
#include "platform.h"
|
||||
#include "type.h"
|
||||
|
||||
u32 uart_init( u32 baud, int databits, int parity, int stopbits );
|
||||
void uart_write( u8 data );
|
||||
u8 uart_read();
|
||||
int uart_read_nb();
|
||||
|
||||
#endif
|
Loading…
x
Reference in New Issue
Block a user