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fix to correctly use multiple input channels
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150005cad9
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569a9f69e7
@ -80,7 +80,7 @@ int platform_init()
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pwms_init();
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// Setup ADCs
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adcs_init();
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adcs_init();
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// Setup ethernet (TCP/IP)
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eth_init();
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@ -481,7 +481,8 @@ void platform_cpu_disable_interrupts()
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// *****************************************************************************
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// ADC specific functions
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/*int platform_adc_exists( unsigned id ); generic, it will be part of src/common.c */
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const static u32 adc_ctls[] = { ADC_CTL_CH0, ADC_CTL_CH1, ADC_CTL_CH2, ADC_CTL_CH3 };
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static void adcs_init(unsigned id)
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{
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@ -520,6 +521,7 @@ int platform_adc_is_done( unsigned id ) /* returns 1 if the conversion on the sp
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return !ADCIntStatus(ADC_BASE, id, false);
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}
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void platform_adc_set_mode( unsigned id, int mode ) /* sets the mode on the specified ADC channel to either "single shot" or "continuous" */
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{
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/* currently mode is ignored... acquisition is currently just single-shot */
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@ -527,11 +529,12 @@ void platform_adc_set_mode( unsigned id, int mode ) /* sets the mode on the spec
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/* Stop sequencer we're going to adjust */
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ADCSequenceDisable(ADC_BASE, id);
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/* Set sequence id to be triggered by processor, with priority 0 */
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/* Not sure what happens if priority is nonzero, just make priority tied to id number */
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/* Set sequence id to be triggered by processor, with priority id */
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ADCSequenceConfigure(ADC_BASE, id, ADC_TRIGGER_PROCESSOR, id);
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ADCSequenceStepConfigure(ADC_BASE, id, 0, ADC_CTL_IE | ADC_CTL_END | ADC_CTL_CH0);
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/* ADC_CTL_IE causes an interrupt to be fired when this step is complete */
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/* ADC_CTL_END causes this to be the last step to be taken */
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ADCSequenceStepConfigure(ADC_BASE, id, 0, ADC_CTL_IE | ADC_CTL_END | adc_ctls[id]);
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}
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void platform_adc_burst( unsigned id, u16* buf, unsigned count, u32 frequency ) /* burst conversion: read "count" samples from the ADC channel "id", storing the results in "buf". The samples are read at periodic intervals, the period is given by "frequency". */
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