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Now clears FIFO empty interrupt mask in DCD_WriteEmptyTxFifo() when transfer completes.
This fixes a problem whereby outputting to the USB UART when the host is connected but the USB UART is not open would cause the interrupt handler to be called continuously so it would consume 100% of the CPU.
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@ -674,7 +674,12 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
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ep->xfer_buff += len;
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ep->xfer_count += len;
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if(ep->xfer_count >= ep->xfer_len)
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{
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uint32_t fifoemptymsk = 1 << ep->num;
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USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
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}
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txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
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}
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@ -674,7 +674,12 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
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ep->xfer_buff += len;
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ep->xfer_count += len;
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if(ep->xfer_count >= ep->xfer_len)
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{
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uint32_t fifoemptymsk = 1 << ep->num;
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USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
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}
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txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
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}
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