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Now clears FIFO empty interrupt mask in DCD_WriteEmptyTxFifo() when transfer completes.

This fixes a problem whereby outputting to the USB UART when the host is
connected but the USB UART is not open would cause the interrupt
handler to be called continuously so it would consume 100% of the CPU.
This commit is contained in:
Mark Burton 2014-02-01 19:15:47 +00:00
parent b95eea268b
commit 5e81e42152
2 changed files with 12 additions and 2 deletions

View File

@ -674,7 +674,12 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
ep->xfer_buff += len;
ep->xfer_count += len;
if(ep->xfer_count >= ep->xfer_len)
{
uint32_t fifoemptymsk = 1 << ep->num;
USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
}
txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
}

View File

@ -674,7 +674,12 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
ep->xfer_buff += len;
ep->xfer_count += len;
if(ep->xfer_count >= ep->xfer_len)
{
uint32_t fifoemptymsk = 1 << ep->num;
USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
}
txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
}