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Initial SPI support for STM32.
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5531e13570
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@ -51,6 +51,7 @@ static void NVIC_Configuration(void);
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static void timers_init();
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static void uarts_init();
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static void spis_init();
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static void pios_init();
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static void adcs_init();
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static void cans_init();
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@ -72,6 +73,9 @@ int platform_init()
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// Setup UARTs
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uarts_init();
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// Setup SPIs
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spis_init();
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// Setup timers
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timers_init();
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@ -465,6 +469,72 @@ void platform_can_receive_message( unsigned id, u32 *canid, u8 *idtype, u8 *len,
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DUFF_DEVICE_8( RxMessage.DLC, *d++ = *s++ );
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}
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// ****************************************************************************
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// SPI
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// NOTE: Only configuring 2 SPI peripherals, since the third one shares pins with JTAG
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static SPI_TypeDef *const spi[] = { SPI1, SPI2 };
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static const u16 spi_prescaler[] = { SPI_BaudRatePrescaler_2, SPI_BaudRatePrescaler_4, SPI_BaudRatePrescaler_8,
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SPI_BaudRatePrescaler_16, SPI_BaudRatePrescaler_32, SPI_BaudRatePrescaler_64,
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SPI_BaudRatePrescaler_128, SPI_BaudRatePrescaler_256 };
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static const u16 spi_gpio_pins[] = { GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7,
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GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15 };
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// SCK MISO MOSI
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static GPIO_TypeDef *const spi_gpio_port[] = { GPIOA, GPIOB };
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static void spis_init()
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{
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// Enable Clocks
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
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}
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#define SPI_GET_BASE_CLK( id ) ( ( id ) == 2 ? ( HCLK / PCLK2_DIV ) : ( HCLK / PCLK1_DIV ) )
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u32 platform_spi_setup( unsigned id, int mode, u32 clock, unsigned cpol, unsigned cpha, unsigned databits )
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{
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SPI_InitTypeDef SPI_InitStructure;
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GPIO_InitTypeDef GPIO_InitStructure;
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u8 prescaler_idx = intlog2( ( unsigned ) ( SPI_GET_BASE_CLK( id ) / clock ) ) - 1;
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/* Configure SPI pins */
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GPIO_InitStructure.GPIO_Pin = spi_gpio_pins[ id ];
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(spi_gpio_port[ id ], &GPIO_InitStructure);
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/* Take down, then reconfigure SPI peripheral */
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SPI_Cmd( spi[ id ], DISABLE );
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SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
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SPI_InitStructure.SPI_Mode = mode ? SPI_Mode_Master : SPI_Mode_Slave;
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SPI_InitStructure.SPI_DataSize = ( databits == 16 ) ? SPI_DataSize_16b : SPI_DataSize_8b; // not ideal, but defaults to sane 8-bits
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SPI_InitStructure.SPI_CPOL = cpol ? SPI_CPOL_High : SPI_CPOL_Low;
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SPI_InitStructure.SPI_CPHA = cpha ? SPI_CPHA_1Edge : SPI_CPHA_2Edge;
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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SPI_InitStructure.SPI_BaudRatePrescaler = spi_prescaler[ prescaler_idx ];
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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SPI_Init( spi[ id ], &SPI_InitStructure );
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SPI_Cmd( spi[ id ], ENABLE );
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return ( SPI_GET_BASE_CLK( id ) / ( ( u16 )2 << ( prescaler_idx ) ) );
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}
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spi_data_type platform_spi_send_recv( unsigned id, spi_data_type data )
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{
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SPI_I2S_SendData( spi[ id ], data );
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return SPI_I2S_ReceiveData( spi[ id ] );
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}
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void platform_spi_select( unsigned id, int is_select )
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{
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// This platform doesn't have a hardware SS pin, so there's nothing to do here
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id = id;
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is_select = is_select;
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}
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// ****************************************************************************
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// UART
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// TODO: Support timeouts.
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@ -45,6 +45,7 @@ LUALIB_API int ( luaopen_lcd )( lua_State* L );
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#define LUA_PLATFORM_LIBS_ROM\
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_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
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_ROM( AUXLIB_SPI, luaopen_spi, spi_map )\
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_ROM( AUXLIB_PD, luaopen_pd, pd_map )\
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_ROM( AUXLIB_UART, luaopen_uart, uart_map )\
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_ROM( AUXLIB_TERM, luaopen_term, term_map )\
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@ -90,7 +91,7 @@ LUALIB_API int ( luaopen_lcd )( lua_State* L );
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// Number of resources (0 if not available/not implemented)
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#define NUM_PIO 7
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#define NUM_SPI 0
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#define NUM_SPI 2
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#define NUM_UART 5
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#define NUM_TIMER 6
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#define NUM_PWM 0
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