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Fix Mizar32 speed regression introduced by systimer commit
Commit d4f03efb96973d73056d87b4173c394ca673bebf halves the running speed of the interpreter on Mizar32 because the vitrual timer tick happens 128906 ties a second when there is no FOSC32 crystal. This commit restores VTMR granularity by calling the 10Hz routines once every 12890 ticks.
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66975786cf
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8b60c5f44b
@ -78,13 +78,22 @@ static void tmr_match_common_handler( int id )
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volatile avr32_tc_t *tc = &AVR32_TC;
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tc_read_sr( tc, id ); // clear interrupt
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// When VTMR_CH == 2, which is the usual case,
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// its interrupt is handled separately below.
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#if VTMR_CH != 2
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if( id == VTMR_CH )
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{
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cmn_virtual_timer_cb();
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platform_eth_timer_handler();
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}
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else
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#endif
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cmn_int_handler( INT_TMR_MATCH, id );
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// VTMR is set as CYCLIC, so the VTMR-specific interrupt routine below
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// will not need to do the following.
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if( avr32_timer_int_periodic_flag[ id ] != PLATFORM_TIMER_INT_CYCLIC )
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{
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tc->channel[ id ].IDR.cpcs = 1;
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@ -102,10 +111,43 @@ __attribute__((__interrupt__)) static void tmr1_int_handler()
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tmr_match_common_handler( 1 );
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}
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// The Virtual timer interrupt os usually 2 on AVR32, so if it is,
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// we handle it separately in its on routine. If not, call the
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// generic timer handler routine for timer 2.
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__attribute__((__interrupt__)) static void tmr2_int_handler()
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{
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#if VTMR_CH != 2
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// Timer 2 is not the virtual timer, so handle it normally
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tmr_match_common_handler( 2 );
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#else
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// Virtual timer/systick interrupt on timer 2
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volatile avr32_tc_t *tc = &AVR32_TC;
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# ifdef FOSC32
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// With FOSC32, the virtual timer interrupts VTMR_FREQ_HZ times a second
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// so call the once-per-tick routines
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cmn_virtual_timer_cb();
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platform_eth_timer_handler();
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# else
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// With no FOSC32, the VTMR timer runs at REQ_PBA_FREQ/128 = 128906.25hz.
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// We divide this down and only call the routines every 1/VTMR_FREQ_HZ
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// of a second
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# define DIVIDER (REQ_PBA_FREQ / 128 / VTMR_FREQ_HZ)
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static unsigned stride = DIVIDER; // Divider counter
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if (--stride == 0 )
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{
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cmn_virtual_timer_cb();
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platform_eth_timer_handler();
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stride = DIVIDER;
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}
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# undef DIVIDER
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#endif
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tc_read_sr( tc, VTMR_CH ); // clear interrupt
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}
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#endif
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// ----------------------------------------------------------------------------
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// GPIO interrupts and helpers
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