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Merge pull request #45 from ecdr/MiscUpdates

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Misc updates
This commit is contained in:
Bogdan Marinescu 2014-03-25 20:20:35 +00:00
commit 943189bb26
7 changed files with 47 additions and 34 deletions
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2
doc/eluadoc/arch_platform_can.lua
View File

@ -38,7 +38,7 @@ enum
ret = "1 if the CAN interface exists, 0 otherwise"
},
{ sig = "u32 #platform_can_setup#( unsigned id, u23 clock );",
{ sig = "u32 #platform_can_setup#( unsigned id, u32 clock );",
desc = [[This function is used to initialize the CAN hardware and set the bus clock.]],
args =
{

4
inc/platform.h
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@ -162,6 +162,7 @@ int platform_can_recv( unsigned id, u32 *canid, u8 *idtype, u8 *len, u8 *data );
// There are 4 "virtual" SPI ports (SPI0...SPI3).
#define PLATFORM_SPI_TOTAL 4
// TODO: PLATFORM_SPI_TOTAL is not used - figure out purpose, or remove?
// SPI mode
#define PLATFORM_SPI_MASTER 1
@ -187,6 +188,8 @@ void platform_spi_select( unsigned id, int is_select );
// There are 4 "virtual" UART ports (UART0...UART3).
#define PLATFORM_UART_TOTAL 4
// TODO: PLATFORM_UART_TOTAL is not used - figure out purpose, or remove?
// Note: Some CPUs (e.g. LM4F/TM4C) have more than 4 hardware UARTs
// Pseudo ID of UART over CDC
#define CDC_UART_ID 0xB0
@ -230,6 +233,7 @@ int platform_s_uart_set_flow_control( unsigned id, int type );
// There are 16 "virtual" PWM channels (PWM0...PWM15)
#define PLATFORM_PWM_TOTAL 16
// TODO: PLATFORM_PWM_TOTAL is not used - figure out purpose, or remove?
// The platform PWM functions
int platform_pwm_exists( unsigned id );

2
src/modules/can.c
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@ -7,7 +7,7 @@
#include "auxmods.h"
#include "lrotable.h"
// Lua: setup( id, clock )
// Lua: result = setup( id, clock )
static int can_setup( lua_State* L )
{
unsigned id;

4
src/modules/i2c.c
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@ -42,7 +42,7 @@ static int i2c_stop( lua_State *L )
return 0;
}
// Lua: i2c.address( id, address, direction )
// Lua: status = i2c.address( id, address, direction )
static int i2c_address( lua_State *L )
{
unsigned id = luaL_checkinteger( L, 1 );
@ -163,7 +163,7 @@ LUALIB_API int luaopen_i2c( lua_State *L )
#else // #if LUA_OPTIMIZE_MEMORY > 0
luaL_register( L, AUXLIB_I2C, i2c_map );
// Add the stop bits and parity constants (for uart.setup)
// Add the stop bits and parity constants (for i2c.setup)
MOD_REG_NUMBER( L, "FAST", PLATFORM_I2C_SPEED_FAST );
MOD_REG_NUMBER( L, "SLOW", PLATFORM_I2C_SPEED_SLOW );
MOD_REG_NUMBER( L, "TRANSMITTER", PLATFORM_I2C_DIRECTION_TRANSMITTER );

43
src/platform/lm3s/platform.c
View File

@ -37,7 +37,6 @@
#include "driverlib/ethernet.h"
#include "driverlib/systick.h"
#include "driverlib/flash.h"
#include "driverlib/interrupt.h"
#include "elua_net.h"
#include "dhcpc.h"
#include "buf.h"
@ -296,24 +295,24 @@ void CANIntHandler(void)
if(status == CAN_INT_INTID_STATUS)
{
status = CANStatusGet(CAN0_BASE, CAN_STS_CONTROL);
status = MAP_CANStatusGet(CAN0_BASE, CAN_STS_CONTROL);
can_err_flag = 1;
can_tx_flag = 0;
}
else if( status == CAN_MSG_OBJ_RX ) // Message receive
{
CANIntClear(CAN0_BASE, CAN_MSG_OBJ_RX);
MAP_CANIntClear(CAN0_BASE, CAN_MSG_OBJ_RX);
can_rx_flag = 1;
can_err_flag = 0;
}
else if( status == CAN_MSG_OBJ_TX ) // Message send
{
CANIntClear(CAN0_BASE, CAN_MSG_OBJ_TX);
MAP_CANIntClear(CAN0_BASE, CAN_MSG_OBJ_TX);
can_tx_flag = 0;
can_err_flag = 0;
}
else
CANIntClear(CAN0_BASE, status);
MAP_CANIntClear(CAN0_BASE, status);
}
@ -321,7 +320,7 @@ void cans_init( void )
{
MAP_SysCtlPeripheralEnable( SYSCTL_PERIPH_CAN0 );
MAP_CANInit( CAN0_BASE );
CANBitRateSet(CAN0_BASE, LM3S_CAN_CLOCK, CAN_INIT_SPEED);
MAP_CANBitRateSet(CAN0_BASE, LM3S_CAN_CLOCK, CAN_INIT_SPEED);
MAP_CANIntEnable( CAN0_BASE, CAN_INT_MASTER | CAN_INT_ERROR | CAN_INT_STATUS );
MAP_IntEnable(INT_CAN0);
MAP_CANEnable(CAN0_BASE);
@ -337,12 +336,12 @@ void cans_init( void )
u32 platform_can_setup( unsigned id, u32 clock )
{
GPIOPinConfigure(GPIO_PD0_CAN0RX);
GPIOPinConfigure(GPIO_PD1_CAN0TX);
MAP_GPIOPinConfigure(GPIO_PD0_CAN0RX);
MAP_GPIOPinConfigure(GPIO_PD1_CAN0TX);
MAP_GPIOPinTypeCAN(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1);
MAP_CANDisable(CAN0_BASE);
CANBitRateSet(CAN0_BASE, LM3S_CAN_CLOCK, clock );
MAP_CANBitRateSet(CAN0_BASE, LM3S_CAN_CLOCK, clock );
MAP_CANEnable(CAN0_BASE);
return clock;
}
@ -370,7 +369,7 @@ int platform_can_send( unsigned id, u32 canid, u8 idtype, u8 len, const u8 *data
DUFF_DEVICE_8( len, *d++ = *s++ );
can_tx_flag = 1;
CANMessageSet(CAN0_BASE, CAN_MSG_OBJ_TX, &msg_tx, MSG_OBJ_TYPE_TX);
MAP_CANMessageSet(CAN0_BASE, CAN_MSG_OBJ_TX, &msg_tx, MSG_OBJ_TYPE_TX);
return PLATFORM_OK;
}
@ -381,7 +380,7 @@ int platform_can_recv( unsigned id, u32 *canid, u8 *idtype, u8 *len, u8 *data )
if( can_rx_flag != 0 )
{
can_msg_rx.pucMsgData = data;
CANMessageGet(CAN0_BASE, CAN_MSG_OBJ_RX, &can_msg_rx, 0);
MAP_CANMessageGet(CAN0_BASE, CAN_MSG_OBJ_RX, &can_msg_rx, 0);
can_rx_flag = 0;
*canid = ( u32 )can_msg_rx.ulMsgID;
@ -431,9 +430,9 @@ static void spis_init()
unsigned i;
#if defined( ELUA_BOARD_SOLDERCORE )
GPIOPinConfigure( GPIO_PH4_SSI1CLK );
GPIOPinConfigure( GPIO_PF4_SSI1RX );
GPIOPinConfigure( GPIO_PF5_SSI1TX );
MAP_GPIOPinConfigure( GPIO_PH4_SSI1CLK );
MAP_GPIOPinConfigure( GPIO_PF4_SSI1RX );
MAP_GPIOPinConfigure( GPIO_PF5_SSI1TX );
#endif
for( i = 0; i < NUM_SPI; i ++ )
@ -455,8 +454,8 @@ u32 platform_spi_setup( unsigned id, int mode, u32 clock, unsigned cpol, unsigne
MAP_GPIOPinTypeSSI( spi_gpio_clk_base[ id ], spi_gpio_clk_pin[ id ] );
// FIXME: not sure this is always "right"
GPIOPadConfigSet( spi_gpio_base[ id ], spi_gpio_pins[ id ], GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU );
GPIOPadConfigSet( spi_gpio_clk_base[ id ], spi_gpio_clk_pin[ id ], GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU );
MAP_GPIOPadConfigSet( spi_gpio_base[ id ], spi_gpio_pins[ id ], GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU );
MAP_GPIOPadConfigSet( spi_gpio_clk_base[ id ], spi_gpio_clk_pin[ id ], GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU );
MAP_SSIConfigSetExpClk( spi_base[ id ], MAP_SysCtlClockGet(), protocol, mode, clock, databits );
MAP_SSIEnable( spi_base[ id ] );
@ -783,7 +782,7 @@ u32 platform_pwm_setup( unsigned id, u32 frequency, unsigned duty )
u32 period;
#if defined( FORLM3S9B92 ) || defined(FORLM3S9D92)
GPIOPinConfigure( pwm_configs[ id ] );
MAP_GPIOPinConfigure( pwm_configs[ id ] );
#endif
// Set pin as PWM
@ -1083,8 +1082,8 @@ static void eth_init()
MAP_SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );
#if defined( FORLM3S9B92 ) || defined(FORLM3S9D92)
GPIOPinConfigure(GPIO_PF2_LED1);
GPIOPinConfigure(GPIO_PF3_LED0);
MAP_GPIOPinConfigure(GPIO_PF2_LED1);
MAP_GPIOPinConfigure(GPIO_PF3_LED0);
#endif
// Enable Ethernet LEDs
@ -1207,8 +1206,8 @@ void EthernetIntHandler()
u32 temp;
// Read and Clear the interrupt.
temp = EthernetIntStatus( ETH_BASE, false );
EthernetIntClear( ETH_BASE, temp );
temp = MAP_EthernetIntStatus( ETH_BASE, false );
MAP_EthernetIntClear( ETH_BASE, temp );
// Call the UIP main loop
elua_uip_mainloop();
@ -1407,7 +1406,7 @@ u32 platform_s_flash_write( const void *from, u32 toaddr, u32 size )
int platform_flash_erase_sector( u32 sector_id )
{
return FlashErase( sector_id * INTERNAL_FLASH_SECTOR_SIZE ) == 0 ? PLATFORM_OK : PLATFORM_ERR;
return MAP_FlashErase( sector_id * INTERNAL_FLASH_SECTOR_SIZE ) == 0 ? PLATFORM_OK : PLATFORM_ERR;
}
#endif // #ifdef BUILD_WOFS

2
src/platform/lm3s/platform_int.c
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@ -87,7 +87,7 @@ static void gpio_common_handler( int port )
u32 iev = HWREG( base + GPIO_O_IEV );
// Check each pin in turn
for( pin = 0, pinmask = 1; pin < 8; pin ++, pinmask <<= 1 )
for( pin = 0, pinmask = 1; pin < platform_pio_get_num_pins( port ); pin ++, pinmask <<= 1 )
if( HWREG( base + GPIO_O_MIS ) & pinmask ) // interrupt on pin
{
if( MAP_GPIOPinRead( base, pinmask ) && ( ( ibe & pinmask ) || ( iev & pinmask ) ) ) // high level and posedge interrupt enabled

24
src/platform/lm3s/startup_gcc.c
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@ -70,6 +70,8 @@ extern void tmr3_handler();
extern void USB0DeviceIntHandler(void);
#endif
// From platform.c
extern const u32 uart_base[];
//*****************************************************************************
//
@ -261,6 +263,8 @@ ResetISR(void)
#include "sysctl.h"
#include "uart.h"
// FIXME: Assumes console is UART, will not be right for USB_CDC
//*****************************************************************************
//
// This is the code that gets called when the processor receives a NMI. This
@ -271,12 +275,15 @@ ResetISR(void)
static void
NmiSR(void)
{
MAP_UARTCharPut( uart_base[CON_UART_ID], 'N' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'M' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'I' );
//
// Enter an infinite loop.
//
while(1)
{
UARTCharPut( UART0_BASE, '!' );
MAP_UARTCharPut( uart_base[CON_UART_ID], '!' );
}
}
@ -293,11 +300,11 @@ FaultISR(void)
//
// Enter an infinite loop.
//
UARTCharPut( UART0_BASE, '#' );
UARTCharPut( UART0_BASE, '#' );
UARTCharPut( UART0_BASE, '#' );
UARTCharPut( UART0_BASE, '#' );
UARTCharPut( UART0_BASE, '#' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'F' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'a' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'u' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'l' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 't' );
while(1)
{
}
@ -313,11 +320,14 @@ FaultISR(void)
static void
IntDefaultHandler(void)
{
MAP_UARTCharPut( uart_base[CON_UART_ID], 'I' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 'n' );
MAP_UARTCharPut( uart_base[CON_UART_ID], 't' );
//
// Go into an infinite loop.
//
while(1)
{
UARTCharPut( UART0_BASE, '*' );
MAP_UARTCharPut( uart_base[CON_UART_ID], '*' );
}
}