mirror of
https://github.com/elua/elua.git
synced 2025-01-08 20:56:17 +08:00
Merge branch 'master' of https://github.com/elua/elua
This commit is contained in:
James Snyder
commit
a637578dc6
@ -17,7 +17,7 @@ data_en =
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be available by using $tmr.VIRT0$ to $tmr.VIRT3$ as timer IDs.</p>
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<p>All "time units" (delays, differences in time) in this module, as well as in other parts of eLua (timeouts) are expressed in microseconds. However,
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please keep in mind that the actual timer resolution depends on many factors. For example, it's very likely that the @#tmr.delay@tmr.delay@ function won't
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be able to delay for the exact amount you specify (in us), as the real delay depends ona number of variables, most notably the base clock of the timer
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be able to delay for the exact amount you specify (in us), as the real delay depends on a number of variables, most notably the base clock of the timer
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and the size of the timer counter register (32 bits on some platforms, 16 bits on most platforms, other values are less common). To ensure that the delay
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you're requesting is achievable, use @#tmr.getmindelay@tmr.getmindelay@ and @#tmr.getmaxdelay@tmr.getmaxdelay@ to obtain the maximum and the minimum
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achievable wait times on your timer, respectively. Even if your delay is within these limits, the $precision$ of this function still varies a lot,
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@ -59,13 +59,13 @@ data_en =
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},
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{ sig = "mindelay = #tmr.getmindelay#( id )",
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desc = "Get the minimum achieavable delay on the specified timer.",
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desc = "Get the minimum achievable delay on the specified timer.",
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args = "$id$ - the timer ID.",
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ret = "The minimum achievable delay on the specified timer (in us)."
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},
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{ sig = "maxdelay = #tmr.getmaxdelay#( id )",
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desc = "Get the maximum achieavable delay on the specified timer.",
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desc = "Get the maximum achievable delay on the specified timer.",
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args = "$id$ - the timer ID.",
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ret = "The maximum achievable delay on the specified timer (in us)."
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},
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@ -3,9 +3,9 @@ $$HEADER$$
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<p>The EGC (Emergency Garbage Collector) patch was originally written for Lua by Robert Jakabosky, who was kind enough to port it to <b>eLua</b>. You can find the author's detailed
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description of the patch <a href="http://lua-users.org/wiki/EmergencyGarbageCollector">here</a>. In short, what it does is that it lets you run a garbage collection cycle in Lua in a low memory
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situation, from inside Lua's memory allocation function (something that the current version of Lua can't do out of the box). By forcing a garbage collection cycle, Lua can reclaim memory that's
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not in use anymore, thus making more memory available for your program. The downside is reduced execution speed, as a direct result of running the gargabe collector when needed. For some
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not in use any more, thus making more memory available for your program. The downside is reduced execution speed, as a direct result of running the garbage collector when needed. For some
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applications, reducing the execution speed to fit the application in memory might be acceptable, and for other applications it might not. As usual, it all depends on your application. As a generic
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guideline, if your application isn't concerned with realtime processing, you should be fine with sacrifing execution speed to get more memory in many real life scenarios.</p>
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guideline, if your application isn't concerned with realtime processing, you should be fine with sacrificing execution speed to get more memory in many real life scenarios.</p>
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<p>In <b>eLua</b>, the EGC patch can be configured to run in 4 different modes:</p>
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<ol>
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<li><b>disabled</b>: EGC inactive, no collection cycle will be forced in low memory situations.</li>
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@ -80,7 +80,7 @@ static _ssize_t std_read( struct _reent *r, int fd, void* vptr, size_t len )
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}
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ptr[ i ++ ] = c;
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}
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return len;
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return i;
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}
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// 'write'
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@ -18,7 +18,7 @@
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#define BUILD_CON_GENERIC
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//#define BUILD_RPC
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#define BUILD_C_INT_HANDLERS
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#define BUILA_LUA_INT_HANDLERS
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#define BUILD_LUA_INT_HANDLERS
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//#define BUILD_RFS
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//#define BUILD_SERMUX
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#define BUILD_ADC
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@ -161,6 +161,9 @@
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//#define SERMUX_NUM_VUART 2
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//#define SERMUX_BUFFER_SIZES { RFS_BUFFER_SIZE, CON_BUF_SIZE }
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// Interrupt queue size
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#define PLATFORM_INT_QUEUE_LOG_SIZE 5
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// Interrupt list
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#define INT_UART_RX ELUA_INT_FIRST_ID
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#define INT_ELUA_LAST INT_UART_RX
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@ -114,6 +114,9 @@
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#define MEM_START_ADDRESS { ( void* )end }
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#define MEM_END_ADDRESS { ( void* )( AVR32_SRAM_SIZE - STACK_SIZE_TOTAL - 1 ) }
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// Interrupt queue size
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#define PLATFORM_INT_QUEUE_LOG_SIZE 5
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// Interrupt list
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#define INT_UART_RX ELUA_INT_FIRST_ID
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#define INT_ELUA_LAST INT_UART_RX
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@ -22,6 +22,7 @@
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//#define BUILD_RPC
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#define BUF_ENABLE_UART
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#define BUILD_C_INT_HANDLERS
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//#define BUILD_ADC
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// *****************************************************************************
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// UART/Timer IDs configuration data (used in main.c)
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@ -59,6 +60,12 @@
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#define BUILD_RPC
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#endif
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#ifdef BUILD_ADC
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#define ADCLINE _ROM( AUXLIB_ADC, luaopen_adc, adc_map )
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#else
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#define ADCLINE
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#endif
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#if defined( BUILD_RPC )
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#define RPCLINE _ROM( AUXLIB_RPC, luaopen_rpc, rpc_map )
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#else
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@ -74,6 +81,7 @@
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_ROM( AUXLIB_TERM, luaopen_term, term_map )\
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_ROM( AUXLIB_CPU, luaopen_cpu, cpu_map )\
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_ROM( AUXLIB_ELUA, luaopen_elua, elua_map )\
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ADCLINE\
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RPCLINE\
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_ROM( AUXLIB_BIT, luaopen_bit, bit_map )\
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_ROM( AUXLIB_PACK, luaopen_pack, pack_map )\
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@ -102,7 +110,7 @@
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#define NUM_TIMER 3
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#endif
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#define NUM_PWM 7 // PWM7 is on GPIO50
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#define NUM_ADC 0
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#define NUM_ADC 8 // Though ADC3 pin is the Ethernet IRQ
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#define NUM_CAN 0
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// As flow control seems not to work, we use a large buffer so that people
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@ -116,6 +124,15 @@
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#define RPC_TIMER_ID CON_TIMER_ID
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#define RPC_UART_SPEED CON_UART_SPEED
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// ADC Configuration Params
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#define ADC_BIT_RESOLUTION 10
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#define BUF_ENABLE_ADC
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#define ADC_BUF_SIZE BUF_SIZE_2
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// These should be adjusted to support multiple ADC devices
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#define ADC_TIMER_FIRST_ID 0
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#define ADC_NUM_TIMERS 0
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// SD/MMC Filesystem Setup
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#define MMCFS_TICK_HZ 10
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#define MMCFS_TICK_MS ( 1000 / MMCFS_TICK_HZ )
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@ -145,6 +162,9 @@
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#define MEM_START_ADDRESS { ( void* )end, ( void* )( SDRAM + ELUA_FIRMWARE_SIZE ) }
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#define MEM_END_ADDRESS { ( void* )( 0x8000 - STACK_SIZE_TOTAL - 1 ), ( void* )( SDRAM + SDRAM_SIZE - 1 ) }
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// Interrupt queue size
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#define PLATFORM_INT_QUEUE_LOG_SIZE 5
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// Interrupt list
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#define INT_UART_RX ELUA_INT_FIRST_ID
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#define INT_ELUA_LAST INT_UART_RX
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@ -37,7 +37,7 @@ extern int pm_configure_clocks( pm_freq_param_t *param );
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static u32 platform_timer_set_clock( unsigned id, u32 clock );
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#if NUM_ADC > 0
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#ifdef BUILD_ADC
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__attribute__((__interrupt__)) static void adc_int_handler();
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#endif
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@ -176,7 +176,7 @@ int platform_init()
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#endif
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#if NUM_ADC > 0
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#ifdef BUILD_ADC
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(&AVR32_ADC)->ier = AVR32_ADC_DRDY_MASK;
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INTC_register_interrupt( &adc_int_handler, AVR32_ADC_IRQ, AVR32_INTC_INT0);
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@ -348,27 +348,42 @@ u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int st
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opts.baudrate = baud;
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// Set stopbits
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if( stopbits == PLATFORM_UART_STOPBITS_1 )
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switch (stopbits) {
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case PLATFORM_UART_STOPBITS_1:
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opts.stopbits = USART_1_STOPBIT;
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else if( stopbits == PLATFORM_UART_STOPBITS_1_5 )
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break;
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case PLATFORM_UART_STOPBITS_1_5:
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opts.stopbits = USART_1_5_STOPBITS;
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else
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break;
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case PLATFORM_UART_STOPBITS_2:
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opts.stopbits = USART_2_STOPBITS;
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break;
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default:
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return 0;
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}
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// Set parity
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if( parity == PLATFORM_UART_PARITY_EVEN )
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switch (parity) {
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case PLATFORM_UART_PARITY_EVEN:
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opts.paritytype = USART_EVEN_PARITY;
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else if( parity == PLATFORM_UART_PARITY_ODD )
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break;
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case PLATFORM_UART_PARITY_ODD:
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opts.paritytype = USART_ODD_PARITY;
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else
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break;
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case PLATFORM_UART_PARITY_NONE:
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opts.paritytype = USART_NO_PARITY;
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break;
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default:
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return 0;
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}
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// Set actual interface
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gpio_enable_module(uart_pins + id * 2, 2 );
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usart_init_rs232( pusart, &opts, REQ_PBA_FREQ );
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if ( usart_init_rs232( pusart, &opts, REQ_PBA_FREQ ) != USART_SUCCESS )
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return 0;
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// [TODO] Return actual baud here
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return baud;
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// Return actual baud here
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return usart_get_async_baudrate(pusart, REQ_PBA_FREQ);
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}
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void platform_s_uart_send( unsigned id, u8 data )
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@ -564,6 +579,11 @@ u32 platform_s_timer_op( unsigned id, int op, u32 data )
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return res;
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}
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int platform_s_timer_set_match_int( unsigned id, u32 period_us, int type )
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{
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return PLATFORM_TIMER_INT_INVALID_ID;
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}
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// ****************************************************************************
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// SPI functions
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@ -111,6 +111,60 @@ static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int
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}
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/*! \brief Return the actual baud rate set into the USART
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*
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* Baud rate calculation:
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* \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
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*
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* \param usart Base address of the USART instance.
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* \param pba_hz USART module input clock frequency (PBA clock, Hz).
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*
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* \retval baudrate The closest integer to the actual baud rate
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* \retval 0 UART clock is off or there was some error on our part
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*/
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unsigned int usart_get_async_baudrate(volatile avr32_usart_t *usart, unsigned long pba_hz)
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{
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unsigned int clock; // Master clock frequency
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unsigned int over; // divisor of 8 or 16
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unsigned int cd; // clock divider (0-65535)
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unsigned int fp; // fractional part of clock divider (0-7)
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unsigned int divisor; // What the master clock is divided by to get
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// the final baud rate
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// Find
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switch ((usart->mr & AVR32_USART_MR_USCLKS_MASK) >> AVR32_USART_MR_USCLKS_OFFSET)
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{
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case AVR32_USART_MR_USCLKS_MCK:
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clock = pba_hz;
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break;
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case AVR32_USART_MR_USCLKS_MCK_DIV:
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// I can't figure out where the divider is defined. The datasheet
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// section 26.7.1 says it is "product dependent, but generally set to 8".
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// Fortunately, the code above always selects MCK.
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case AVR32_USART_MR_USCLKS_SCK:
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// If we have an external clock, we don't know its frequency here.
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default:
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return 0;
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}
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over = usart->mr & AVR32_USART_MR_OVER_MASK;
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cd = (usart->brgr & AVR32_USART_BRGR_CD_MASK) >> AVR32_USART_BRGR_CD_OFFSET;
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fp = (usart->brgr & AVR32_USART_BRGR_FP_MASK) >> AVR32_USART_BRGR_FP_OFFSET;
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// if CD==0, no baud rate is generated.
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// if CD==1, the clock divider and fractional part are bypassed.
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if (cd == 0) return 0;
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if (cd == 1) fp = 0;
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// Rewriting "divisor = 8 * (2 - over) * (cd + fp/8)" for integer math:
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divisor = (2 - over) * (8 * cd + fp);
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// Round to the integer that is closest to the actual result
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return (clock + divisor/2) / divisor;
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}
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/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
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* modes to generate a baud rate as close as possible to the baud rate
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* set point.
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@ -288,7 +342,11 @@ void usart_reset(volatile avr32_usart_t *usart)
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int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
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{
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// Reset the USART and shutdown TX and RX.
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// This is too brutal for eLua, for which the power-on reset state is OK.
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// Otherwise a buffered serial port stops receiving when you change baud rate.
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#ifndef ELUA_PLATFORM
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usart_reset(usart);
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#endif
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// Check input values.
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if (!opt || // Null pointer.
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@ -844,7 +902,12 @@ int usart_read_char(volatile avr32_usart_t *usart, int *c)
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if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
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AVR32_USART_CSR_FRAME_MASK |
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AVR32_USART_CSR_PARE_MASK))
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{
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// Clear the error flag
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usart->cr = AVR32_USART_CR_RSTSTA_MASK;
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// Signal failure
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return USART_RX_ERROR;
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}
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// No error; if we really did receive a char, read it and return SUCCESS.
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if (usart_test_hit(usart))
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@ -230,6 +230,16 @@ extern void usart_reset(volatile avr32_usart_t *usart);
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*/
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extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
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/*! \brief Returns the actual baud rate set into the USART in async mode
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*
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* \param usart Base address of the USART instance.
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* \param pba_hz USART module input clock frequency (PBA clock, Hz).
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*
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* \retval baudrate The nearest integer to the actual baud rate
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* \retval 0 No baudrate is being generated or some error
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*/
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extern unsigned int usart_get_async_baudrate(volatile avr32_usart_t *usart, unsigned long pba_hz);
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/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
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*
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* Compared to \ref usart_init_rs232, this function allows very high baud rates
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