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Initial CAN support for LM3S.

This commit is contained in:
James Snyder 2010-12-02 02:07:32 +00:00
parent ce2810d428
commit ac3694547d
4 changed files with 113 additions and 3 deletions

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@ -1,5 +1,5 @@
# Configuration file for the LM3S microcontroller # Configuration file for the LM3S microcontroller
specific_files = "startup_gcc.c platform.c uart.c sysctl.c gpio.c ssi.c timer.c pwm.c ethernet.c systick.c flash.c interrupt.c cpu.c adc.c" specific_files = "startup_gcc.c platform.c uart.c sysctl.c gpio.c ssi.c timer.c pwm.c ethernet.c systick.c flash.c interrupt.c cpu.c adc.c can.c"
if comp[ 'board' ] == 'EK-LM3S1968' or comp[ 'board' ] == 'EK-LM3S6965' or comp[ 'board' ] == 'EK-LM3S8962': if comp[ 'board' ] == 'EK-LM3S1968' or comp[ 'board' ] == 'EK-LM3S6965' or comp[ 'board' ] == 'EK-LM3S8962':
specific_files = specific_files + " rit128x96x4.c disp.c" specific_files = specific_files + " rit128x96x4.c disp.c"

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@ -28,9 +28,11 @@
#include "hw_types.h" #include "hw_types.h"
#include "hw_pwm.h" #include "hw_pwm.h"
#include "hw_nvic.h" #include "hw_nvic.h"
#include "hw_can.h"
#include "hw_ethernet.h" #include "hw_ethernet.h"
#include "debug.h" #include "debug.h"
#include "gpio.h" #include "gpio.h"
#include "can.h"
#include "interrupt.h" #include "interrupt.h"
#include "sysctl.h" #include "sysctl.h"
#include "uart.h" #include "uart.h"
@ -82,6 +84,7 @@ static void pios_init();
static void pwms_init(); static void pwms_init();
static void eth_init(); static void eth_init();
static void adcs_init(); static void adcs_init();
static void cans_init();
int platform_init() int platform_init()
{ {
@ -112,6 +115,11 @@ int platform_init()
adcs_init(); adcs_init();
#endif #endif
#ifdef BUILD_CAN
// Setup CANs
cans_init();
#endif
// Setup ethernet (TCP/IP) // Setup ethernet (TCP/IP)
eth_init(); eth_init();
@ -214,6 +222,97 @@ pio_type platform_pio_op( unsigned port, pio_type pinmask, int op )
return retval; return retval;
} }
// ****************************************************************************
// CAN
volatile u32 can_rx_flag = 0;
volatile u32 can_err_flag = 0;
char can_tx_buf[8];
tCANMsgObject can_msg_rx;
void CANIntHandler(void)
{
u32 status = CANIntStatus(CAN0_BASE, CAN_INT_STS_CAUSE);
if(status == CAN_INT_INTID_STATUS)
{
status = CANStatusGet(CAN0_BASE, CAN_STS_CONTROL);
can_err_flag = 1;
}
else if( status == 1 )
{
CANIntClear(CAN0_BASE, 1);
can_rx_flag = 1;
can_err_flag = 0;
}
}
void cans_init( void )
{
GPIOPinConfigure(GPIO_PD0_CAN0RX);
GPIOPinConfigure(GPIO_PD1_CAN0TX);
MAP_GPIOPinTypeCAN(GPIO_PORTD_BASE, GPIO_PIN_0 | GPIO_PIN_1);
MAP_SysCtlPeripheralEnable( SYSCTL_PERIPH_CAN0 );
MAP_CANInit( CAN0_BASE );
CANBitRateSet(CAN0_BASE, SysCtlClockGet(), 500000);
MAP_CANIntEnable( CAN0_BASE, CAN_INT_MASTER | CAN_INT_ERROR | CAN_INT_STATUS );
MAP_IntEnable(INT_CAN0);
MAP_CANEnable(CAN0_BASE);
// Configure default catch-all message object
can_msg_rx.ulMsgID = 0;
can_msg_rx.ulMsgIDMask = 0;
can_msg_rx.ulFlags = MSG_OBJ_RX_INT_ENABLE | MSG_OBJ_USE_ID_FILTER;
can_msg_rx.ulMsgLen = 8;
MAP_CANMessageSet(CAN0_BASE, 1, &can_msg_rx, MSG_OBJ_TYPE_RX);
}
u32 platform_can_setup( unsigned id, u32 clock )
{
MAP_CANDisable(CAN0_BASE);
CANBitRateSet(CAN0_BASE, SysCtlClockGet(), clock );
MAP_CANEnable(CAN0_BASE);
}
void platform_can_send( unsigned id, u32 canid, u8 idtype, u8 len, const u8 *data )
{
tCANMsgObject msg_tx;
const char *s = ( char * )data;
char *d;
if( idtype )
msg_tx.ulFlags |= MSG_OBJ_EXTENDED_ID;
msg_tx.ulMsgIDMask = 0;
msg_tx.ulMsgID = canid;
msg_tx.ulMsgLen = len;
msg_tx.pucMsgData = d;
d = can_tx_buf;
DUFF_DEVICE_8( len, *d++ = *s++ );
CANMessageSet(CAN0_BASE, 2, &msg_tx, MSG_OBJ_TYPE_TX);
}
void platform_can_recv( unsigned id, u32 *canid, u8 *idtype, u8 *len, u8 *data )
{
// wait for a message
while( can_rx_flag == 0 );
can_msg_rx.pucMsgData = data;
CANMessageGet(CAN0_BASE, 1, &can_msg_rx, 0);
can_rx_flag = 0;
*canid = ( u32 )can_msg_rx.ulMsgID;
*idtype = (can_msg_rx.ulFlags & MSG_OBJ_EXTENDED_ID)? 1 : 0;
*len = can_msg_rx.ulMsgLen;
}
// **************************************************************************** // ****************************************************************************
// SPI // SPI
// Same configuration on LM3S8962, LM3S6965, LM3S6918 and LM3S9B92 (2 SPI ports) // Same configuration on LM3S8962, LM3S6965, LM3S6918 and LM3S9B92 (2 SPI ports)

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@ -45,6 +45,13 @@
#define PS_LIB_TABLE_NAME "lm3s" #define PS_LIB_TABLE_NAME "lm3s"
#endif #endif
#if defined( FORLM3S8962 ) || defined( FORLM3S9B92 )
#define CANLINE _ROM( AUXLIB_CAN, luaopen_can, can_map )
#define BUILD_CAN
#else
#define CANLINE
#endif
#ifdef FORLM3S6918 #ifdef FORLM3S6918
#define PWMLINE #define PWMLINE
#else #else
@ -78,6 +85,8 @@
#define PLATLINE #define PLATLINE
#endif #endif
#define LUA_PLATFORM_LIBS_ROM\ #define LUA_PLATFORM_LIBS_ROM\
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\ _ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
_ROM( AUXLIB_SPI, luaopen_spi, spi_map )\ _ROM( AUXLIB_SPI, luaopen_spi, spi_map )\
@ -93,6 +102,7 @@
_ROM( AUXLIB_CPU, luaopen_cpu, cpu_map )\ _ROM( AUXLIB_CPU, luaopen_cpu, cpu_map )\
_ROM( AUXLIB_ELUA, luaopen_elua, elua_map )\ _ROM( AUXLIB_ELUA, luaopen_elua, elua_map )\
ADCLINE\ ADCLINE\
CANLINE\
RPCLINE\ RPCLINE\
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )\ _ROM( LUA_MATHLIBNAME, luaopen_math, math_map )\
PLATLINE PLATLINE
@ -151,7 +161,7 @@
#define NUM_PWM 0 #define NUM_PWM 0
#endif #endif
#define NUM_ADC 4 #define NUM_ADC 4
#define NUM_CAN 0 #define NUM_CAN 1
// Enable RX buffering on UART // Enable RX buffering on UART
//#define BUF_ENABLE_UART //#define BUF_ENABLE_UART

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@ -41,6 +41,7 @@ extern void EthernetIntHandler();
extern void SysTickIntHandler(); extern void SysTickIntHandler();
extern void ADCIntHandler(); extern void ADCIntHandler();
extern void UARTIntHandler(); extern void UARTIntHandler();
extern void CANIntHandler();
#include "hw_memmap.h" #include "hw_memmap.h"
#include "platform_conf.h" #include "platform_conf.h"
@ -128,7 +129,7 @@ void (* const g_pfnVectors[])(void) =
IntDefaultHandler, // Timer 3 subtimer B IntDefaultHandler, // Timer 3 subtimer B
IntDefaultHandler, // I2C1 Master and Slave IntDefaultHandler, // I2C1 Master and Slave
IntDefaultHandler, // Quadrature Encoder 1 IntDefaultHandler, // Quadrature Encoder 1
IntDefaultHandler, // CAN0 CANIntHandler, // CAN0
IntDefaultHandler, // CAN1 IntDefaultHandler, // CAN1
IntDefaultHandler, // CAN2 IntDefaultHandler, // CAN2
EthernetIntHandler, // Ethernet EthernetIntHandler, // Ethernet