mirror of
https://github.com/elua/elua.git
synced 2025-01-08 20:56:17 +08:00
- added support for the STR-E912 board from Olimex
- PWM module for STR9 - STR9 port fixes - STR9 platform-specific module: str9.pio (the STR9 GPIO subsystem is quite uncommon). - small LM3S fixes
This commit is contained in:
Bogdan Marinescu
parent
c404753efa
commit
cf48728115
11
SConstruct
11
SConstruct
@ -7,6 +7,12 @@ toolchain = ARGUMENTS.get( 'toolchain', '')
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optram = int( ARGUMENTS.get( 'optram', '1' ) )
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boot = ARGUMENTS.get( 'boot', '').lower()
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# Helper: "normalize" a name to make it a suitable C macro name
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def cnorm( name ):
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name = name.replace( '-', '' )
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name = name.replace( ' ', '' )
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return name.upper()
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# List of toolchains
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toolchain_list = {
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'arm-gcc' : {
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@ -34,6 +40,7 @@ toolchain_list = {
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'compile' : 'avr32-gcc',
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'link' : 'avr32-ld',
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'asm' : 'avr32-as',
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'bin' : 'avr32-objcopy',
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'size' : 'avr32-size'
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},
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@ -71,6 +78,7 @@ board_list = { 'SAM7-EX256' : [ 'AT91SAM7X256', 'AT91SAM7X512' ],
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'EK-LM3S6965' : [ 'LM3S6965' ],
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'EK-LM3S9B92' : [ 'LM3S9B92' ],
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'STR9-COMSTICK' : [ 'STR912FAW44' ],
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'STR-E912' : [ 'STR912FAW44' ],
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'PC' : [ 'I386' ],
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'SIM' : [ 'LINUX' ],
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'LPC-H2888' : [ 'LPC2888' ],
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@ -111,6 +119,7 @@ file_list = { 'SAM7-EX256' : [ 'bisect', 'hangman' , 'led', 'piano', 'hello', 'i
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'EK-LM3S6965' : [ 'bisect', 'hangman', 'lhttpd', 'pong', 'led', 'piano', 'pwmled', 'tvbgone', 'hello', 'info', 'morse', 'adcscope', 'adcpoll', 'logo', 'spaceship', 'tetrives' ],
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'EK-LM3S9B92' : [ 'bisect', 'hangman', 'lhttpd', 'led', 'pwmled', 'hello', 'info', 'adcscope','adcpoll', 'life' ],
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'STR9-COMSTICK' : [ 'bisect', 'hangman', 'led', 'hello', 'info' ],
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'STR-E912' : [ 'bisect', 'hangman', 'led', 'hello', 'info', 'piano' ],
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'PC' : [ 'bisect', 'hello', 'info', 'life', 'hangman' ],
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'SIM' : [ 'bisect', 'hello', 'info', 'life', 'hangman' ],
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'LPC-H2888' : [ 'bisect', 'hangman', 'led', 'hello', 'info' ],
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@ -216,6 +225,8 @@ if not GetOption( 'clean' ):
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output = 'elua_' + target + '_' + cputype.lower()
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cdefs = '-DELUA_CPU=%s -DELUA_BOARD=%s -DELUA_PLATFORM=%s -D__BUFSIZ__=128' % ( cputype, boardname, platform.upper() )
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# Also make the above into direct defines (to use in conditional C code)
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cdefs = cdefs + " -DELUA_CPU_%s -DELUA_BOARD_%s -DELUA_PLATFORM_%s" % ( cnorm( cputype ), cnorm( boardname ), cnorm( platform ) )
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if allocator == 'multiple':
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cdefs = cdefs + " -DUSE_MULTIPLE_ALLOCATOR"
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elif allocator == 'simple':
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@ -12,6 +12,10 @@ if pd.board() == "EK-LM3S8962" or pd.board() == "EK-LM3S6965" then
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elseif pd.board() == "SAM7-EX256" then
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pwmid, tmrid = 0, 1
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tmr.setclock( 1, 1000000 )
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elseif pd.board() == "STR-E912" then
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local g = str9.pio
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g.setpin( pio.P4_6, g.OUTPUT, g.OUTPUT_PUSHPULL, false, g.ALT_OUTPUT2 )
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pwmid, tmrid = 3, 1
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else
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print( pd.board() .. " not supported with this example" )
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return
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@ -966,9 +966,9 @@ LUALIB_API int luaopen_platform( lua_State *L )
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#if LUA_OPTIMIZE_MEMORY > 0
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return 0;
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#else // #if LUA_OPTIMIZE_MEMORY > 0
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luaL_register( L, PS_LIB_TABLE_NAME, luaopen_platform );
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luaL_register( L, PS_LIB_TABLE_NAME, platform_map );
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// Setup the new tables (pin and port) inside pio
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// Setup the new tables inside platform table
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lua_newtable( L );
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luaL_register( L, NULL, disp_map );
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lua_setfield( L, -2, "disp" );
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@ -2,7 +2,7 @@
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cpumode = ARGUMENTS.get( 'cpumode', 'arm' ).lower()
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specific_files = "startup912.s startup_generic.s platform.c 91x_scu.c 91x_fmi.c 91x_gpio.c 91x_uart.c 91x_tim.c 91x_vic.c interrupt.c"
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specific_files = "startup912.s startup_generic.s platform.c 91x_scu.c 91x_fmi.c 91x_gpio.c 91x_uart.c 91x_tim.c 91x_vic.c interrupt.c str9_pio.c"
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# Check CPU
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if cputype == 'STR912FAW44':
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@ -24,11 +24,16 @@ else:
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specific_files = " ".join( [ "src/platform/%s/%s" % ( platform, f ) for f in specific_files.split() ] )
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ldscript = "src/platform/%s/%s" % ( platform, ldscript )
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# toolchain 'arm-gcc' requires '-mfpu=fpa' for some reason
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auxm = ''
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if toolchain == 'arm-gcc':
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auxm = '-mfpu=fpa'
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# Toolset data
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tools[ 'str9' ] = {}
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tools[ 'str9' ][ 'cccom' ] = "%s -mcpu=arm966e-s -mfpu=fpa %s $_CPPINCFLAGS %s -ffunction-sections -fdata-sections %s -Wall -c $SOURCE -o $TARGET" % ( toolset[ 'compile'], opt, modeflag, cdefs )
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tools[ 'str9' ][ 'linkcom' ] = "%s -mcpu=arm966e-s -mfpu=fpa -nostartfiles -nostdlib %s -T %s -Wl,--gc-sections -Wl,-e,_startup -Wl,--allow-multiple-definition -o $TARGET $SOURCES %s -lc -lgcc -lm" % ( toolset[ 'compile' ], modeflag, ldscript, local_libs )
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tools[ 'str9' ][ 'ascom' ] = "%s -x assembler-with-cpp $_CPPINCFLAGS -mcpu=arm966e-s -mfpu=fpa %s %s -Wall -c $SOURCE -o $TARGET" % ( toolset[ 'compile' ], modeflag, cdefs )
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tools[ 'str9' ][ 'cccom' ] = "%s -mcpu=arm966e-s %s %s $_CPPINCFLAGS %s -ffunction-sections -fdata-sections %s -Wall -c $SOURCE -o $TARGET" % ( toolset[ 'compile'], auxm, opt, modeflag, cdefs )
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tools[ 'str9' ][ 'linkcom' ] = "%s -mcpu=arm966e-s %s -nostartfiles -nostdlib %s -T %s -Wl,--gc-sections -Wl,-e,_startup -Wl,--allow-multiple-definition -o $TARGET $SOURCES %s -lc -lgcc -lm" % ( toolset[ 'compile' ], auxm, modeflag, ldscript, local_libs )
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tools[ 'str9' ][ 'ascom' ] = "%s -x assembler-with-cpp $_CPPINCFLAGS %s -mfpu=fpa %s %s -Wall -c $SOURCE -o $TARGET" % ( toolset[ 'compile' ], auxm, modeflag, cdefs )
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# Programming function for LPC2888
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def progfunc_str9( target, source, env ):
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@ -18,13 +18,11 @@
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#include "common.h"
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#include "platform_conf.h"
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#include "91x_vic.h"
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// We define here the UART used by this porting layer
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#define STR9_UART UART1
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#include "lrotable.h"
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// ****************************************************************************
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// Platform initialization
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static const GPIO_TypeDef* port_data[] = { GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 };
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const GPIO_TypeDef* port_data[] = { GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 };
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static const TIM_TypeDef* timer_data[] = { TIM0, TIM1, TIM2, TIM3 };
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static void platform_config_scu()
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@ -42,8 +40,8 @@ static void platform_config_scu()
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/* Set the RCLK Clock divider to max speed*/
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SCU_RCLKDivisorConfig(SCU_RCLK_Div1);
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/* Set the PCLK Clock to MCLK/8 */
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SCU_PCLKDivisorConfig(SCU_PCLK_Div8);
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/* Set the PCLK Clock to MCLK/2 */
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SCU_PCLKDivisorConfig(SCU_PCLK_Div2);
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/* Set the HCLK Clock to MCLK */
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SCU_HCLKDivisorConfig(SCU_HCLK_Div1);
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@ -64,6 +62,37 @@ static void platform_config_scu()
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SCU_APBPeriphClockConfig(__GPIO_ALL, ENABLE);
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}
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// Port/pin definitions of the eLua UART connection for different boards
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#define UART_RX_IDX 0
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#define UART_TX_IDX 1
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#ifdef ELUA_BOARD_STRE912
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static const GPIO_TypeDef* uart_port_data[] = { GPIO5, GPIO5 };
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static const u8 uart_pin_data[] = { GPIO_Pin_1, GPIO_Pin_0 };
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#else // STR9-comStick
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static const GPIO_TypeDef* uart_port_data[] = { GPIO3, GPIO3 };
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static const u8 uart_pin_data[] = { GPIO_Pin_2, GPIO_Pin_3 };
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#endif
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// Plaform specific GPIO UART setup
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static void platform_gpio_uart_setup()
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_StructInit( &GPIO_InitStructure );
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// RX
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GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
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GPIO_InitStructure.GPIO_Pin = uart_pin_data[ UART_RX_IDX ];
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GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
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GPIO_Init( ( GPIO_TypeDef* )uart_port_data[ UART_RX_IDX ], &GPIO_InitStructure );
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// TX
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GPIO_InitStructure.GPIO_Pin = uart_pin_data[ UART_TX_IDX ];
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GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3 ;
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GPIO_Init( ( GPIO_TypeDef* )uart_port_data[ UART_TX_IDX ], &GPIO_InitStructure );
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}
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int platform_init()
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{
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unsigned i;
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@ -80,7 +109,8 @@ int platform_init()
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// Initialize VIC
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VIC_DeInit();
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// UART setup (only STR9_UART is used in this example)
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// UART setup
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platform_gpio_uart_setup();
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platform_uart_setup( CON_UART_ID, CON_UART_SPEED, 8, PLATFORM_UART_PARITY_NONE, PLATFORM_UART_STOPBITS_1 );
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// Initialize timers
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@ -159,25 +189,12 @@ pio_type platform_pio_op( unsigned port, pio_type pinmask, int op )
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// ****************************************************************************
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// UART
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static const UART_TypeDef* uarts[] = { UART0, UART1, UART2 };
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u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int stopbits )
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{
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UART_InitTypeDef UART_InitStructure;
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GPIO_InitTypeDef GPIO_InitStructure;
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id = id;
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// First configure GPIO
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// RX: GPIO3.2
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GPIO_InitStructure.GPIO_Direction = GPIO_PinInput;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
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GPIO_InitStructure.GPIO_IPConnected = GPIO_IPConnected_Enable;
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GPIO_InitStructure.GPIO_Alternate = GPIO_InputAlt1 ;
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GPIO_Init (GPIO3, &GPIO_InitStructure);
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// TX: GPIO3.3
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
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GPIO_Init (GPIO3, &GPIO_InitStructure);
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UART_TypeDef* p_uart = ( UART_TypeDef* )uarts[ id ];
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// Then configure UART parameters
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switch( databits )
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@ -212,33 +229,36 @@ u32 platform_uart_setup( unsigned id, u32 baud, int databits, int parity, int st
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UART_InitStructure.UART_TxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */
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UART_InitStructure.UART_RxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */
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UART_DeInit(STR9_UART);
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UART_Init(STR9_UART, &UART_InitStructure);
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UART_Cmd(STR9_UART, ENABLE);
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UART_DeInit( p_uart );
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UART_Init( p_uart , &UART_InitStructure );
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UART_Cmd( p_uart, ENABLE );
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return baud;
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}
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void platform_uart_send( unsigned id, u8 data )
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{
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id = id;
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UART_TypeDef* p_uart = ( UART_TypeDef* )uarts[ id ];
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// while( UART_GetFlagStatus( STR9_UART, UART_FLAG_TxFIFOFull ) == SET );
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UART_SendData( STR9_UART, data );
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while( UART_GetFlagStatus( STR9_UART, UART_FLAG_TxFIFOFull ) != RESET );
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UART_SendData( p_uart, data );
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while( UART_GetFlagStatus( p_uart, UART_FLAG_TxFIFOFull ) != RESET );
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}
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int platform_s_uart_recv( unsigned id, s32 timeout )
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{
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UART_TypeDef* p_uart = ( UART_TypeDef* )uarts[ id ];
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if( timeout == 0 )
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{
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// Return data only if already available
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if( UART_GetFlagStatus( STR9_UART, UART_FLAG_RxFIFOEmpty ) != SET )
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return UART_ReceiveData( STR9_UART );
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if( UART_GetFlagStatus( p_uart, UART_FLAG_RxFIFOEmpty ) != SET )
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return UART_ReceiveData( p_uart );
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else
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return -1;
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}
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while( UART_GetFlagStatus( STR9_UART, UART_FLAG_RxFIFOEmpty ) == SET );
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return UART_ReceiveData( STR9_UART );
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while( UART_GetFlagStatus( p_uart, UART_FLAG_RxFIFOEmpty ) == SET );
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return UART_ReceiveData( p_uart );
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}
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// ****************************************************************************
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@ -325,6 +345,66 @@ u32 platform_s_timer_op( unsigned id, int op, u32 data )
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return res;
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}
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// ****************************************************************************
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// PWM functions
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u32 platform_pwm_setup( unsigned id, u32 frequency, unsigned duty )
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{
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TIM_TypeDef* p_timer = ( TIM_TypeDef* )timer_data[ id ];
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u32 base = SCU_GetPCLKFreqValue() * 1000;
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u32 div = ( base / 256 ) / frequency;
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TIM_InitTypeDef tim;
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TIM_DeInit( p_timer );
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tim.TIM_Mode = TIM_PWM;
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tim.TIM_Clock_Source = TIM_CLK_APB;
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tim.TIM_Prescaler = 0xFF;
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tim.TIM_Pulse_Level_1 = TIM_HIGH;
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tim.TIM_Period_Level = TIM_LOW;
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tim.TIM_Full_Period = div;
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tim.TIM_Pulse_Length_1 = ( div * duty ) / 100;
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TIM_Init( p_timer, &tim );
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return base / div;
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}
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static u32 platform_pwm_set_clock( unsigned id, u32 clock )
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{
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TIM_TypeDef* p_timer = ( TIM_TypeDef* )timer_data[ id ];
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u32 base = ( SCU_GetPCLKFreqValue() * 1000 );
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u32 div = base / clock;
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TIM_PrescalerConfig( p_timer, ( u8 )div - 1 );
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return base / div;
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}
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u32 platform_pwm_op( unsigned id, int op, u32 data )
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{
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u32 res = 0;
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TIM_TypeDef* p_timer = ( TIM_TypeDef* )timer_data[ id ];
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switch( op )
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{
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case PLATFORM_PWM_OP_START:
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TIM_CounterCmd( p_timer, TIM_START );
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break;
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case PLATFORM_PWM_OP_STOP:
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TIM_CounterCmd( p_timer, TIM_STOP );
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break;
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case PLATFORM_PWM_OP_SET_CLOCK:
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res = platform_pwm_set_clock( id, data );
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break;
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case PLATFORM_PWM_OP_GET_CLOCK:
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res = ( SCU_GetPCLKFreqValue() * 1000 ) / ( TIM_GetPrescalerValue( p_timer ) + 1 );
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break;
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}
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return res;
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}
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// ****************************************************************************
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// CPU functions
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@ -340,3 +420,35 @@ void platform_cpu_disable_interrupts()
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{
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disable_ints();
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}
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// ****************************************************************************
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// Platform specific modules go here
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#define MIN_OPT_LEVEL 2
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#include "lrodefs.h"
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extern const LUA_REG_TYPE str9_pio_map[];
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const LUA_REG_TYPE platform_map[] =
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{
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#if LUA_OPTIMIZE_MEMORY > 0
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{ LSTRKEY( "pio" ), LROVAL( str9_pio_map ) },
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#endif
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{ LNILKEY, LNILVAL }
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};
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LUALIB_API int luaopen_platform( lua_State *L )
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{
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#if LUA_OPTIMIZE_MEMORY > 0
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return 0;
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#else // #if LUA_OPTIMIZE_MEMORY > 0
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luaL_register( L, PS_LIB_TABLE_NAME, platform_map );
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// Setup the new tables inside platform table
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lua_newtable( L );
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luaL_register( L, NULL, str9_pio_map );
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lua_setfield( L, -2, "pio" );
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return 1;
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#endif // #if LUA_OPTIMIZE_MEMORY > 0
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}
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@ -19,7 +19,12 @@
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// *****************************************************************************
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// UART/Timer IDs configuration data (used in main.c)
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#ifdef ELUA_BOARD_STRE912
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#define CON_UART_ID 0
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#else // STR9-comStick
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#define CON_UART_ID 1
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#endif
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#define CON_UART_SPEED 115200
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#define CON_TIMER_ID 0
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#define TERM_LINES 25
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@ -35,9 +40,9 @@
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// Number of resources (0 if not available/not implemented)
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#define NUM_PIO 10
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#define NUM_SPI 0
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#define NUM_UART 1
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#define NUM_UART 3
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#define NUM_TIMER 4
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#define NUM_PWM 0
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#define NUM_PWM 4
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#define NUM_ADC 0
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#define NUM_CAN 0
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@ -63,6 +68,9 @@ u32 SCU_GetMCLKFreqValue();
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||||
// *****************************************************************************
|
||||
// Auxiliary libraries that will be compiled for this platform
|
||||
|
||||
// The name of the platform specific libs table
|
||||
#define PS_LIB_TABLE_NAME "str9"
|
||||
|
||||
#define LUA_PLATFORM_LIBS_ROM\
|
||||
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
|
||||
_ROM( AUXLIB_TMR, luaopen_tmr, tmr_map )\
|
||||
@ -72,6 +80,8 @@ u32 SCU_GetMCLKFreqValue();
|
||||
_ROM( AUXLIB_PACK, luaopen_pack, pack_map )\
|
||||
_ROM( AUXLIB_BIT, luaopen_bit, bit_map )\
|
||||
_ROM( AUXLIB_CPU, luaopen_cpu, cpu_map)\
|
||||
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )
|
||||
_ROM( AUXLIB_PWM, luaopen_pwm, pwm_map)\
|
||||
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )\
|
||||
_ROM( PS_LIB_TABLE_NAME, luaopen_platform, platform_map )
|
||||
|
||||
#endif // #ifndef __PLATFORM_CONF_H__
|
||||
|
||||
92
src/platform/str9/str9_pio.c
Normal file
92
src/platform/str9/str9_pio.c
Normal file
@ -0,0 +1,92 @@
|
||||
// STR9 specific PIO support
|
||||
|
||||
#include "lua.h"
|
||||
#include "lualib.h"
|
||||
#include "lauxlib.h"
|
||||
#include "platform.h"
|
||||
#include "lrotable.h"
|
||||
#include "platform_conf.h"
|
||||
#include "91x_gpio.h"
|
||||
#include "auxmods.h"
|
||||
|
||||
#define GPIO_DIR_INPUT GPIO_PinInput
|
||||
#define GPIO_DIR_OUTPUT GPIO_PinOutput
|
||||
#define GPIO_ALT_INPUT GPIO_InputAlt1
|
||||
#define GPIO_ALT_OUTPUT1 GPIO_OutputAlt1
|
||||
#define GPIO_ALT_OUTPUT2 GPIO_OutputAlt2
|
||||
#define GPIO_ALT_OUTPUT3 GPIO_OutputAlt3
|
||||
#define GPIO_OUTPUT_PP GPIO_Type_PushPull
|
||||
#define GPIO_OUTPUT_OC GPIO_Type_OpenCollector
|
||||
|
||||
// Puin mappings (for GPIO lib)
|
||||
static const unsigned str9_pins[] = { GPIO_Pin_0, GPIO_Pin_1, GPIO_Pin_2, GPIO_Pin_3, GPIO_Pin_4, GPIO_Pin_5, GPIO_Pin_6, GPIO_Pin_7 };
|
||||
extern const GPIO_TypeDef* port_data[];
|
||||
|
||||
// Lua: str9.pio.set_input( pin, direction, type, ipconnected, alternate )
|
||||
// direction: INPUT, OUTPUT
|
||||
// type: OUTPUT_PUSHPULL, OUTPUT_OC
|
||||
// ipconnected: true or false
|
||||
// alternate: ALT_INPUT, ALT_OUTPUT1, ALT_OUTPUT2, ALT_OUTPUT3
|
||||
static int setpin( lua_State *L )
|
||||
{
|
||||
pio_type v = ( pio_type )luaL_checkinteger( L, 1 );
|
||||
int direction = luaL_checkinteger( L, 2 );
|
||||
int type = luaL_checkinteger( L, 3 );
|
||||
int ipconnected = lua_toboolean( L, 4 );
|
||||
int alternate = luaL_checkinteger( L, 5 );
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
int port, pin;
|
||||
|
||||
port = PLATFORM_IO_GET_PORT( v );
|
||||
pin = PLATFORM_IO_GET_PIN( v );
|
||||
if( PLATFORM_IO_IS_PORT( v ) || !platform_pio_has_port( port ) || !platform_pio_has_pin( port, pin ) )
|
||||
return luaL_error( L, "invalid pin" );
|
||||
|
||||
GPIO_StructInit( &GPIO_InitStructure );
|
||||
GPIO_InitStructure.GPIO_Pin = str9_pins[ pin ];
|
||||
GPIO_InitStructure.GPIO_Direction = direction;
|
||||
GPIO_InitStructure.GPIO_Type = type;
|
||||
GPIO_InitStructure.GPIO_IPConnected = ipconnected ? GPIO_IPConnected_Enable : GPIO_IPConnected_Disable;
|
||||
GPIO_InitStructure.GPIO_Alternate = alternate;
|
||||
GPIO_Init( ( GPIO_TypeDef* )port_data[ port ], &GPIO_InitStructure );
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Module function map
|
||||
#define MIN_OPT_LEVEL 2
|
||||
#include "lrodefs.h"
|
||||
const LUA_REG_TYPE str9_pio_map[] =
|
||||
{
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
{ LSTRKEY( "INPUT" ), LNUMVAL( GPIO_DIR_INPUT ) },
|
||||
{ LSTRKEY( "OUTPUT" ), LNUMVAL( GPIO_DIR_OUTPUT ) },
|
||||
{ LSTRKEY( "ALT_INPUT" ), LNUMVAL( GPIO_ALT_INPUT ) },
|
||||
{ LSTRKEY( "ALT_OUTPUT1" ), LNUMVAL( GPIO_ALT_OUTPUT1 ) },
|
||||
{ LSTRKEY( "ALT_OUTPUT2" ), LNUMVAL( GPIO_ALT_OUTPUT2 ) },
|
||||
{ LSTRKEY( "ALT_OUTPUT3" ), LNUMVAL( GPIO_ALT_OUTPUT3 ) },
|
||||
{ LSTRKEY( "OUTPUT_PUSHPULL" ), LNUMVAL( GPIO_OUTPUT_PP ) },
|
||||
{ LSTRKEY( "OUTPUT_OC" ), LNUMVAL( GPIO_OUTPUT_OC ) },
|
||||
#endif
|
||||
{ LSTRKEY( "setpin" ), LFUNCVAL( setpin) },
|
||||
{ LNILKEY, LNILVAL }
|
||||
};
|
||||
|
||||
LUALIB_API int luaopen_disp( lua_State *L )
|
||||
{
|
||||
#if LUA_OPTIMIZE_MEMORY > 0
|
||||
return 0;
|
||||
#else
|
||||
luaL_register( L, PS_LIB_TABLE_NAME, str9_pio_map );
|
||||
MOD_REG_NUMBER( L, "INPUT", GPIO_DIR_INPUT );
|
||||
MOD_REG_NUMBER( L, "OUTPUT", GPIO_DIR_OUTPUT );
|
||||
MOD_REG_NUMBER( L, "ALT_INPUT", GPIO_ALT_INPUT );
|
||||
MOD_REG_NUMBER( L, "ALT_OUTPUT1", GPIO_ALT_OUTPUT1 );
|
||||
MOD_REG_NUMBER( L, "ALT_OUTPUT2", GPIO_ALT_OUTPUT2 );
|
||||
MOD_REG_NUMBER( L, "ALT_OUTPUT3", GPIO_ALT_OUTPUT3 );
|
||||
MOD_REG_NUMBER( L, "OUTPUT_PUSHPULL", GPIO_OUTPUT_PP );
|
||||
MOD_REG_NUMBER( L, "OUTPUT_OC", GPIO_OUTPUT_OC );
|
||||
return 1;
|
||||
#endif
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user