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added AVR32 without FOSC32 patch and MIZAR32 board support patch (Martin Guy)

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This commit is contained in:
Bogdan Marinescu 2010-10-01 12:11:37 +00:00
parent c757205f89
commit e0e1c2c4fe
10 changed files with 364 additions and 8 deletions
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8
SConstruct
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@ -76,7 +76,7 @@ platform_list = {
'lpc288x' : { 'cpus' : [ 'LPC2888' ], 'toolchains' : [ 'arm-gcc', 'codesourcery', 'devkitarm', 'arm-eabi-gcc' ] },
'str7' : { 'cpus' : [ 'STR711FR2' ], 'toolchains' : [ 'arm-gcc', 'codesourcery', 'devkitarm', 'arm-eabi-gcc' ] },
'stm32' : { 'cpus' : [ 'STM32F103ZE', 'STM32F103RE' ], 'toolchains' : [ 'arm-gcc', 'codesourcery', 'devkitarm', 'arm-eabi-gcc' ] },
'avr32' : { 'cpus' : [ 'AT32UC3A0512', 'AT32UC3B0256' ], 'toolchains' : [ 'avr32-gcc' ] },
'avr32' : { 'cpus' : [ 'AT32UC3A0512', 'AT32UC3A0128', 'AT32UC3B0256' ], 'toolchains' : [ 'avr32-gcc' ] },
'lpc24xx' : { 'cpus' : [ 'LPC2468' ], 'toolchains' : [ 'arm-gcc', 'codesourcery', 'devkitarm', 'arm-eabi-gcc' ] },
'lpc17xx' : { 'cpus' : [ 'LPC1768' ], 'toolchains' : [ 'arm-gcc', 'codesourcery', 'devkitarm', 'arm-eabi-gcc' ] }
}
@ -99,7 +99,8 @@ board_list = { 'SAM7-EX256' : [ 'AT91SAM7X256', 'AT91SAM7X512' ],
'ET-STM32' : [ 'STM32F103RE' ],
'EAGLE-100' : [ 'LM3S6918' ],
'ELUA-PUC' : ['LPC2468' ],
'MBED' : ['LPC1768']
'MBED' : ['LPC1768'],
'MIZAR32' : [ 'AT32UC3A0128' ],
}
cpu_list = sum([board_list[i] for i in board_list],[])
@ -152,6 +153,7 @@ file_list = { 'SAM7-EX256' : [ 'bisect', 'hangman' , 'led', 'piano', 'hello', 'i
'EAGLE-100' : [ 'bisect', 'hangman', 'lhttpd', 'led', 'hello', 'info' ],
'ELUA-PUC' : [ 'bisect', 'hangman', 'led', 'hello', 'info', 'pwmled', 'adcscope', 'adcpoll', 'inttest' ],
'MBED' : [ 'bisect', 'hangman', 'hello', 'info', 'led', 'pwmled', 'dualpwm', 'life', 'adcscope', 'adcpoll' ],
'MIZAR32' : [ ],
}
comp = Environment( tools = [],
@ -301,7 +303,7 @@ if not GetOption( 'help' ):
# CPU/allocator mapping (if allocator not specified)
if comp['allocator'] == 'auto':
if comp['board'] in ['LPC-H2888', 'ATEVK1100', 'MBED']:
if comp['board'] in ['LPC-H2888', 'ATEVK1100', 'MBED', 'MIZAR32']:
comp['allocator'] = 'multiple'
else:
comp['allocator'] = 'newlib'

3
romfs/led.lua
View File

@ -23,6 +23,9 @@ elseif pd.board() == "ATEVK1101" then
ledpin = pio.PA_8
invert = true
uartid = 1
elseif pd.board() == "MIZAR32" then
ledpin = pio.PB_29
invert = true
elseif pd.board() == "STR-E912" then
ledpin = pio.P6_4
elseif pd.board() == "ELUA-PUC" then

116
src/platform/avr32/MIZAR32/mizar32.h Normal file
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@ -0,0 +1,116 @@
/* This header file was part of the ATMEL AVR-UC3-SoftwareFramework-1.6.1 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A MIZAR32 board header file.
*
* This file contains definitions and services related to the features of the
* EVK1100 board rev. B and C.
*
* To use this board, define BOARD=EVK1100.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Modified for MIZAR32 by Nuccio Raciti 2010
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _MIZAR32_H_
#define _MIZAR32_H_
#include "compiler.h"
/*! \name Oscillator Definitions
*/
//! @{
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods.
//! @}
/*! \name SDRAM Definitions
*/
//! @{
//! Part header file of used SDRAM(s).
#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h"
//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on
//! UC3).
#define SDRAM_DBW 16
//! @}
//! Number of LEDs.
#define LED_COUNT 1
/*! \name GPIO Connections of LEDs
*/
//! @{
#define LED0_GPIO AVR32_PIN_PB29
//! @}
/*! \name GPIO Connections of Push Buttons
*/
//! @{
#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PX16
#define GPIO_PUSH_BUTTON_0_PRESSED 0
//! @}
/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
#define SD_MMC_SPI (&AVR32_SPI1)
#define SD_MMC_SPI_NPCS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_0_PIN
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_0_FUNCTION
//! @}
#endif // _MIZAR32_H_

145
src/platform/avr32/MIZAR32/mizar32_conf.h Normal file
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@ -0,0 +1,145 @@
// eLua platform configuration
// Simplemachines.it Mizar32 board has 128Kbytes of flash with 8kb of bootloader
// To fit in 120K, build using:
// scons board=mizar32 target=lualong optram=0 allocator=newlib
#ifndef __MIZAR32_CONF_H__
#define __MIZAR32_CONF_H__
#include "sdramc.h"
// *****************************************************************************
// Define here what components you want for this platform
//#define BUILD_MMCFS
//#define BUILD_XMODEM
//#define BUILD_SHELL
//#define BUILD_ROMFS
//#define BUILD_TERM
#define BUILD_CON_GENERIC
//#define BUILD_RPC
// *****************************************************************************
// UART/Timer IDs configuration data (used in main.c)
#define CON_UART_ID 0
#define CON_UART_SPEED 115200
#define CON_TIMER_ID 0
#define TERM_LINES 25
#define TERM_COLS 80
// *****************************************************************************
// SPI pins configuration data
#define BOARD_SPI0_SCK_PIN AVR32_PIN_PA13
#define BOARD_SPI0_SCK_PIN_FUNCTION 0
#define BOARD_SPI0_MISO_PIN AVR32_PIN_PA11
#define BOARD_SPI0_MISO_PIN_FUNCTION 0
#define BOARD_SPI0_MOSI_PIN AVR32_PIN_PA12
#define BOARD_SPI0_MOSI_PIN_FUNCTION 0
#define BOARD_SPI1_SCK_PIN AVR32_PIN_PA15
#define BOARD_SPI1_SCK_PIN_FUNCTION 1
#define BOARD_SPI1_MISO_PIN AVR32_PIN_PA17
#define BOARD_SPI1_MISO_PIN_FUNCTION 1
#define BOARD_SPI1_MOSI_PIN AVR32_PIN_PA16
#define BOARD_SPI1_MOSI_PIN_FUNCTION 1
// Auxiliary libraries that will be compiled for this platform
#if defined( BUILD_RPC ) || defined( ELUA_BOOT_RPC )
#define RPCLINE _ROM( AUXLIB_RPC, luaopen_rpc, rpc_map )
#else
#define RPCLINE
#if !defined( BUILD_RPC )
#define BUILD_RPC
#endif
#endif
#define LUA_PLATFORM_LIBS_ROM\
_ROM( AUXLIB_PD, luaopen_pd, pd_map )\
_ROM( AUXLIB_UART, luaopen_uart, uart_map )\
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
_ROM( AUXLIB_TMR, luaopen_tmr, tmr_map )\
_ROM( AUXLIB_TERM, luaopen_term, term_map )\
_ROM( AUXLIB_CPU, luaopen_cpu, cpu_map )\
_ROM( AUXLIB_ELUA, luaopen_elua, elua_map )\
RPCLINE\
_ROM( AUXLIB_BIT, luaopen_bit, bit_map )\
_ROM( AUXLIB_PACK, luaopen_pack, pack_map )\
_ROM( LUA_MATHLIBNAME, luaopen_math, math_map )
/* Minimal ROM modules, to fit in 120KB */
#undef LUA_PLATFORM_LIBS_ROM
#define LUA_PLATFORM_LIBS_ROM\
_ROM( AUXLIB_PIO, luaopen_pio, pio_map )\
_ROM( AUXLIB_TMR, luaopen_tmr, tmr_map )\
// *****************************************************************************
// Configuration data
// Virtual timers (0 if not used)
#define VTMR_NUM_TIMERS 4
#define VTMR_FREQ_HZ 4
// Number of resources (0 if not available/not implemented)
#define NUM_PIO 5
#define NUM_SPI 8
#define NUM_UART 2
#if VTMR_NUM_TIMERS > 0
#define NUM_TIMER 2
#else
#define NUM_TIMER 3
#endif
#define NUM_PWM 0
#define NUM_ADC 0
#define NUM_CAN 0
// RPC boot options
#define RPC_UART_ID CON_UART_ID
#define RPC_TIMER_ID CON_TIMER_ID
#define RPC_UART_SPEED CON_UART_SPEED
// On Mizar32, enabling RX buffering on UART requires the presence of a serial
// board or a 1k resistor between pins 3 and 13 of P5; otherwise the open RX
// input oscillates with the ambient EMI causing many spurious interrupts
// and crashes the interpreter. Therefore by default we disable the buffering
// so that serial interrupts are not enabled.
//#define BUF_ENABLE_UART
//#define CON_BUF_SIZE BUF_SIZE_128
// REMEMBER to change next line if buffering is enabled and CON_UART_ID is not 0!
//#define CON_UART_IRQ AVR32_USART0_IRQ
// MMCFS Support (FatFs on SD/MMC)
// For MIZAR - PA5 = CLK, PA6 = MISO, PA7 = MOSI, PA8 = CS
#define MMCFS_TICK_HZ 10
#define MMCFS_TICK_MS ( 1000 / MMCFS_TICK_HZ )
#define MMCFS_CS_PORT 0
#define MMCFS_CS_PIN SD_MMC_SPI_NPCS_PIN
#define MMCFS_SPI_NUM 1
// CPU frequency (needed by the CPU module, 0 if not used)
#define CPU_FREQUENCY REQ_CPU_FREQ
// PIO prefix ('0' for P0, P1, ... or 'A' for PA, PB, ...)
#define PIO_PREFIX 'A'
// Pins per port configuration:
// #define PIO_PINS_PER_PORT (n) if each port has the same number of pins, or
// #define PIO_PIN_ARRAY { n1, n2, ... } to define pins per port in an array
// Use #define PIO_PINS_PER_PORT 0 if this isn't needed
#define PIO_PIN_ARRAY { 31, 32, 6, 32, 8 }
// Allocator data: define your free memory zones here in two arrays
// (start address and end address)
// On Mizar32, we just use the 32MB SDRAM without trying to use the 8K that is
// free in the onboard 32KB RAM, thereby simplifying the memory management.
//#define MEM_START_ADDRESS { ( void* )end, ( void* )SDRAM }
//#define MEM_END_ADDRESS { ( void* )( 0x8000 - STACK_SIZE_TOTAL - 1 ), ( void* )( SDRAM + SDRAM_SIZE - 1 ) }
#define MEM_START_ADDRESS { ( void* )SDRAM }
#define MEM_END_ADDRESS { ( void* )( SDRAM + SDRAM_SIZE - 1 ) }
// *****************************************************************************
// CPU constants that should be exposed to the eLua "cpu" module
#endif // #ifndef __MIZAR32_CONF_H__

50
src/platform/avr32/at32uc3a0128.ld Normal file
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@ -0,0 +1,50 @@
MEMORY
{
sram (W!RX) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
flash (RX) : ORIGIN = 0x80002000, LENGTH = 0x00020000 - 0x2000
}
SECTIONS
{
.text :
{
. = ALIGN(4);
_stext = .;
PROVIDE(stext = .);
KEEP(*(.start))
*(.text .text.*)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.exception .exception.*)
. = ALIGN(4);
_etext = .;
PROVIDE(etext = .);
} >flash
.data : AT (_etext)
{
. = ALIGN(4);
_data = .;
*(.ramfunc .ramfunc.* .fastrun .fastrun.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(4);
_edata = .;
} >sram
.bss (NOLOAD) : {
_bss = .;
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} >sram
end = .;
_sstack = 0x00008000;
}

3
src/platform/avr32/board.h
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@ -65,6 +65,7 @@
#define NGW100 7 //!< AT32AP7000 NGW100 board.
#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board.
#define UC3L_EK 9 //!< AT32UC3L-EK board.
#define MIZAR32 98 //!< Simplemachines.it MIZAR32 board.
#define USER_BOARD 99 //!< User-reserved board (if any).
//! @}
@ -94,6 +95,8 @@
#include "STK600/RCUC3L0/stk600_rcuc3l0.h"
#elif BOARD == UC3L_EK
#include "UC3L_EK/uc3l_ek.h"
#elif BOARD == MIZAR32
#include "MIZAR32/mizar32.h"
#elif BOARD == USER_BOARD
// User-reserved area: #include the header file of your board here (if any).
#include "user_board.h"

3
src/platform/avr32/conf.py
View File

@ -9,6 +9,9 @@ if comp[ 'board' ] == "ATEVK1100":
comp.Append(CPPDEFINES = {'BOARD' : 1})
elif comp[ 'board' ] == "ATEVK1101":
comp.Append(CPPDEFINES = {'BOARD' : 2})
elif comp[ 'board' ] == "MIZAR32":
specific_files += " sdramc.c"
comp.Append(CPPDEFINES = {'BOARD' : 98})
else:
print "Invalid board for %s platform (%s)" %( platform, comp[ 'board' ] )
sys.exit( -1 )

39
src/platform/avr32/platform.c
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@ -32,6 +32,8 @@
extern int pm_configure_clocks( pm_freq_param_t *param );
static u32 platform_timer_set_clock( unsigned id, u32 clock );
// Virtual timers support
#if VTMR_NUM_TIMERS > 0
#define VTMR_CH (2)
@ -140,6 +142,11 @@ int platform_init()
{
tmropt.channel = i;
tc_init_waveform( tc, &tmropt );
#ifndef FOSC32
// At reset, timers run from the 32768Hz crystal. If there is no such clock
// then run them all at the lowest frequency available (PBA_FREQ / 128)
platform_timer_set_clock( i, REQ_PBA_FREQ / 128 );
#endif
}
// Setup timer interrupt for the virtual timers if needed
@ -159,7 +166,16 @@ int platform_init()
0, // Load overrun interrupt.
0 // Counter overflow interrupt.
};
tc_write_rc( tc, VTMR_CH, 32768 / VTMR_FREQ_HZ );
# ifdef FOSC32
tc_write_rc( tc, VTMR_CH, FOSC32 / VTMR_FREQ_HZ );
# else
// Run VTMR from the slowest available PBA clock divisor
{ u32 vt_clock_freq = platform_timer_set_clock( VTMR_CH, REQ_PBA_FREQ / 128 );
u32 div = vt_clock_freq / VTMR_FREQ_HZ;
if (div > 0xffff) div = 0xffff;
tc_write_rc( tc, VTMR_CH, div );
}
# endif
tc_configure_interrupts( tc, VTMR_CH, &tmrint );
Enable_global_interrupt();
tc_start( tc, VTMR_CH );
@ -457,7 +473,11 @@ static u32 platform_timer_get_clock( unsigned id )
volatile avr32_tc_t *tc = &AVR32_TC;
unsigned int clksel = tc->channel[ id ].CMR.waveform.tcclks;
return clksel == 0 ? 32768 : REQ_PBA_FREQ / clkdivs[ clksel ];
#ifdef FOSC32
return clksel == 0 ? FOSC32 : REQ_PBA_FREQ / clkdivs[ clksel ];
#else
return REQ_PBA_FREQ / clkdivs[ clksel ];
#endif
}
// Helper: set timer clock
@ -467,11 +487,22 @@ static u32 platform_timer_set_clock( unsigned id, u32 clock )
volatile avr32_tc_t *tc = &AVR32_TC;
volatile unsigned long *pclksel = &tc->channel[ id ].cmr;
#ifdef FOSC32
for( i = mini = 0; i < 5; i ++ )
if( ABSDIFF( clock, i == 0 ? 32768 : REQ_PBA_FREQ / clkdivs[ i ] ) < ABSDIFF( clock, mini == 0 ? 32768 : REQ_PBA_FREQ / clkdivs[ mini ] ) )
if( ABSDIFF( clock, i == 0 ? FOSC32 : REQ_PBA_FREQ / clkdivs[ i ] ) <
ABSDIFF( clock, mini == 0 ? FOSC32 : REQ_PBA_FREQ / clkdivs[ mini ] ) )
mini = i;
*pclksel = ( *pclksel & ~0x07 ) | mini;
return mini == 0 ? 32768 : REQ_PBA_FREQ / clkdivs[ mini ];
return mini == 0 ? FOSC32 : REQ_PBA_FREQ / clkdivs[ mini ];
#else
// There is no 32768Hz clock so choose from the divisors of PBA.
for( i = mini = 1; i < 5; i ++ )
if( ABSDIFF( clock, REQ_PBA_FREQ / clkdivs[ i ] ) <
ABSDIFF( clock, REQ_PBA_FREQ / clkdivs[ mini ] ) )
mini = i;
*pclksel = ( *pclksel & ~0x07 ) | mini;
return REQ_PBA_FREQ / clkdivs[ mini ];
#endif
}
void platform_s_timer_delay( unsigned id, u32 delay_us )

2
src/platform/avr32/platform_conf.h
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@ -11,6 +11,8 @@
#include "EVK1100/evk1100_conf.h"
#elif BOARD == EVK1101
#include "EVK1101/evk1101_conf.h"
#elif BOARD == MIZAR32
#include "MIZAR32/mizar32_conf.h"
#else
#error No known AVR32 board defined
#endif

3
src/platform/avr32/sdramc.c
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@ -90,7 +90,8 @@ static void sdramc_ck_delay(unsigned long ck)
/*! \brief Puts the multiplexed MCU pins used for the SDRAM under control of the
* SDRAMC.
*/
#if BOARD == EVK1100 || BOARD == EVK1104 || BOARD == EVK1105
#if BOARD == EVK1100 || BOARD == EVK1104 || BOARD == EVK1105 \
|| BOARD == MIZAR32
static void sdramc_enable_muxed_pins(void)
{
static const gpio_map_t SDRAMC_EBI_GPIO_MAP =