mirror of
https://github.com/MaJerle/lwmem.git
synced 2025-01-13 21:42:53 +08:00
85 lines
5.0 KiB
C
85 lines
5.0 KiB
C
Manager is ready!
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 1 | 120 | 112 |Free block |
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| 2 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Allocating 4 pointers and freeing first and third..
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 1 | 16 | 8 |Free block |
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| 2 | 0034A518 | 0 | 12 | 0 |Allocated block |
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| 3 | 0034A524 | 1 | 12 | 4 |Free block |
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| 4 | 0034A530 | 0 | 24 | 0 |Allocated block |
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| 5 | 0034A548 | 1 | 56 | 48 |Free block |
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| 6 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Debug above is effectively state 3
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-- > Current state saved!
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------------------------------------------------------------------------
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-- > State restored to last saved!
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State 3a
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 1 | 16 | 8 |Free block |
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| 2 | 0034A518 | 0 | 16 | 0 |Allocated block |
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| 3 | 0034A528 | 1 | 8 | 0 |Free block |
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| 4 | 0034A530 | 0 | 24 | 0 |Allocated block |
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| 5 | 0034A548 | 1 | 56 | 48 |Free block |
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| 6 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Assert passed with condition (rptr1 == ptr2)
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------------------------------------------------------------------------
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-- > State restored to last saved!
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State 3b
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 0 | 28 | 0 |Allocated block |
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| 2 | 0034A524 | 1 | 12 | 4 |Free block |
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| 3 | 0034A530 | 0 | 24 | 0 |Allocated block |
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| 4 | 0034A548 | 1 | 56 | 48 |Free block |
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| 5 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Assert passed with condition (rptr2 == ptr1)
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------------------------------------------------------------------------
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-- > State restored to last saved!
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State 3c
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 0 | 32 | 0 |Allocated block |
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| 2 | 0034A528 | 1 | 8 | 0 |Free block |
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| 3 | 0034A530 | 0 | 24 | 0 |Allocated block |
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| 4 | 0034A548 | 1 | 56 | 48 |Free block |
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| 5 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Assert passed with condition (rptr3 == ptr1)
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------------------------------------------------------------------------
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-- > State restored to last saved!
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State 3d
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|-------|----------|--------|------|------------------|----------------|
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| Block | Address | IsFree | Size | MaxUserAllocSize | Meta |
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|-------|----------|--------|------|------------------|----------------|
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| 0 | 00179154 | 0 | 0 | 0 |Start block |
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| 1 | 0034A508 | 1 | 40 | 32 |Free block |
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| 2 | 0034A530 | 0 | 24 | 0 |Allocated block |
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| 3 | 0034A548 | 0 | 44 | 0 |Allocated block |
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| 4 | 0034A574 | 1 | 12 | 4 |Free block |
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| 5 | 0034A580 | 0 | 0 | 0 |End of region |
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|-------|----------|--------|------|------------------|----------------|
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Assert passed with condition (rptr4 != ptr1 && rptr4 != ptr2 && rptr4 != ptr3 && rptr4 != ptr4) |