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support all cortex-m processors (including M0/M0+)

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This commit is contained in:
Gabriel Wang 2021-01-09 21:08:09 +00:00
parent 30337b59f9
commit 4fb5635605
6 changed files with 24 additions and 20 deletions
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1
.gitignore vendored
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@ -11,3 +11,4 @@ example/Out/perf_counter.build_log.htm
*.lnp
example/Out/example.htm
example/Out/perf_counter.lib
*.scvd

2
example/RTE/_library/RTE_Components.h
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@ -14,7 +14,7 @@
/*
* Define the Device Header File:
*/
#define CMSIS_device_header "ARMCM3.h"
#define CMSIS_device_header "ARMCM0.h"

4
example/example.uvoptx
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@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
<IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -287,7 +287,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>

25
example/example.uvprojx
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@ -533,16 +533,16 @@
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM3</Device>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
<PackID>ARM.CMSIS.5.7.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M3") CLOCK(12000000) ESEL ELITTLE</Cpu>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h</RegisterFile>
<RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
@ -629,13 +629,13 @@
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments> -MPU</SimDllArguments>
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<SimDllArguments> </SimDllArguments>
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM0</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments> -MPU</TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
<TargetDllArguments> </TargetDllArguments>
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
@ -693,7 +693,7 @@
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<AdsCpuType>"Cortex-M0"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
@ -1116,7 +1116,7 @@
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<IncludeInBuild>0</IncludeInBuild>
<AlwaysBuild>2</AlwaysBuild>
<GenerateAssemblyFile>2</GenerateAssemblyFile>
<AssembleAssemblyFile>2</AssembleAssemblyFile>
@ -1197,7 +1197,6 @@
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="example"/>
<targetInfo name="library"/>
</targetInfos>
</component>
<component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="User" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M" isTargetSpecific="1">
@ -1226,7 +1225,6 @@
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="example"/>
<targetInfo name="library"/>
</targetInfos>
</file>
<file attr="config" category="sourceC" name="Device\ARM\ARMCM3\Source\system_ARMCM3.c" version="1.0.1">
@ -1235,7 +1233,6 @@
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/>
<targetInfos>
<targetInfo name="example"/>
<targetInfo name="library"/>
</targetInfos>
</file>
<file attr="config" category="header" name="CMSIS\Config\RTE_Device.h" version="1.0.0">

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lib/perf_counter.lib
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12
systick_wrapper_ual.s
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@ -24,12 +24,18 @@
EXPORT |$Sub$$SysTick_Handler|
IMPORT user_code_insert_to_systick_handler
IMPORT |$Super$$SysTick_Handler|
push {r4, r5}
push {r4, lr}
bl user_code_insert_to_systick_handler
pop {r4, lr}
b |$Super$$SysTick_Handler|
LDR R0, =user_code_insert_to_systick_handler
BLX R0
pop {r4, r5}
mov lr, r5
pop {r4, r5}
LDR R0, =|$Super$$SysTick_Handler|
BX R0
ENDP
ALIGN
AREA |.text|, CODE, READONLY
__ensure_systick_wrapper PROC