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Merge branch 'CMSIS-Pack'

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This commit is contained in:
Gabriel Wang 2023-03-19 23:14:03 +00:00
commit ba4e7bd95c
16 changed files with 136 additions and 23 deletions
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3
.gitignore vendored
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@ -18,4 +18,5 @@ documents/Doxygen
*@*
RTE_Components.h
*uvgui.*
*uvguix.*
*uvguix.*
example/ArInp.bat

3
GorgonMeducer.perf_counter.pdsc
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@ -16,8 +16,9 @@
<repository type="git">https://github.com/GorgonMeducer/perf_counter.git</repository>
<releases>
<release date="2023-03-06" version="2.1.0-dev2" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.2.1.0-dev2.pack">
<release date="2023-03-06" version="2.1.0" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.2.1.0.pack">
- Update stop_cycle_counter prototype to solve return-value-overflow issue
- Provide timer service for EventRecorder automatically
</release>
<release date="2023-03-02" version="2.0.0" url="https://github.com/GorgonMeducer/perf_counter/raw/0c6b79b20308bb9b7d15a7c65f0fe91174c78061/cmsis-pack/GorgonMeducer.perf_counter.2.0.0.pack">
- Add Coremark

24
README.md
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@ -1,23 +1,21 @@
# perf_counter (v2.1.0-dev)
# perf_counter (v2.1.0)
A dedicated performance counter for Cortex-M Systick. It shares the SysTick with users' original SysTick function(s) without interfering with it. This library will bring new functionalities, such as performance counter,` delay_us` and `clock()` service defined in `time.h`.
### Features:
- **Measure CPU cycles for specified code segment**
- **[NEW] Add Coremark 1.0**
- **Add Coremark 1.0**
- **[New] Provide Timer Service for EventRecorder automatically.**
- **Enhanced measurement services for RTOS**
- Measures **RAW / True** cycles used for specified code segment inside a thread, **i.e. scheduling cost are removed**.
- Measure **RAW/True** cycles used for a data-process-path across multiple threads.
- **Easy to use**
- Helper macros: `__cycleof__()` , `__super_loop_monitor__()` etc.
- Helper functions: `start_cycle_counter()`, `stop_cycle_counter()` etc.
- **Support ALL Cortex-M processors**
- Including **Cortex-M85** and Star-MC1
- **Provide Free Services**
- Do **NOT** interfering with existing SysTick based applications
- **Support ALL arm compilers**
- Arm Compiler 5 (armcc), Arm Compiler 6 (armclang)
- arm gcc
@ -170,6 +168,22 @@ This example shows how to use the delta value of `get_system_ticks()` to measure
### 1.3 Work with EventRecorder in MDK
If you are using EventRecorder in MDK, once you deployed the `perf_counter`, it will provide the timer service for EventRecorder by implenting the following functions: `EventRecorderTimerSetup()`, `EventRecorderTimerGetFreq()` and `EventRecorderTimerGetCount()`.
If you have not modify anything in `EventRecorderConf.h`, **you don't have to anything** and please keep the default configuration. If you see warnings like this:
```
Invalid Time Stamp Source selected in EventRecorderConf.h!
```
Please ignore it, or you can set the macro `EVENT_TIMESTAMP_SOURCE` to `3` to suppress it.
**By using perf_counter as the reference clock, EventRecorder can have the highest clock resolution on the target system without worring about the presence of DWT or any conflicting usage of SysTick.**
## 2. How To Deploy

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cmsis-pack/GorgonMeducer.perf_counter.2.1.0-dev2.pack → cmsis-pack/GorgonMeducer.perf_counter.2.1.0.pack
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cmsis-pack/GorgonMeducer.perf_counter.pdsc
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@ -16,8 +16,9 @@
<repository type="git">https://github.com/GorgonMeducer/perf_counter.git</repository>
<releases>
<release date="2023-03-06" version="2.1.0-dev2" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.2.1.0-dev2.pack">
<release date="2023-03-06" version="2.1.0" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.2.1.0.pack">
- Update stop_cycle_counter prototype to solve return-value-overflow issue
- Provide timer service for EventRecorder automatically
</release>
<release date="2023-03-02" version="2.0.0" url="https://github.com/GorgonMeducer/perf_counter/raw/0c6b79b20308bb9b7d15a7c65f0fe91174c78061/cmsis-pack/GorgonMeducer.perf_counter.2.0.0.pack">
- Add Coremark

4
cmsis-pack/GorgonMeducer.pidx
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@ -2,8 +2,8 @@
<index schemaVersion="1.0.0" xs:noNamespaceSchemaLocation="PackIndex.xsd" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance">
<vendor>GorgonMeducer</vendor>
<url>https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/</url>
<timestamp>2023-03-03T00:24:00</timestamp>
<timestamp>2023-03-19T22:50:00</timestamp>
<pindex>
<pdsc url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/" vendor="GorgonMeducer" name="perf_counter" version="2.0.0"/>
<pdsc url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/" vendor="GorgonMeducer" name="perf_counter" version="2.1.0"/>
</pindex>
</index>

34
example/RTE/Compiler/EventRecorderConf.h Normal file
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@ -0,0 +1,34 @@
/*------------------------------------------------------------------------------
* MDK - Component ::Event Recorder
* Copyright (c) 2016-2018 ARM Germany GmbH. All rights reserved.
*------------------------------------------------------------------------------
* Name: EventRecorderConf.h
* Purpose: Event Recorder Configuration
* Rev.: V1.1.0
*----------------------------------------------------------------------------*/
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
// <h>Event Recorder
// <o>Number of Records
// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
// <65536=>65536
// <i>Configures size of Event Record Buffer (each record is 16 bytes)
// <i>Must be 2^n (min=8, max=65536)
#define EVENT_RECORD_COUNT 64U
// <o>Time Stamp Source
// <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer
// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
// <i>Selects source for 32-bit time stamp
#define EVENT_TIMESTAMP_SOURCE 0
// <o>Time Stamp Clock Frequency [Hz] <0-1000000000>
// <i>Defines initial time stamp clock frequency (0 when not used)
#define EVENT_TIMESTAMP_FREQ 0U
// </h>
//------------- <<< end of configuration section >>> ---------------------------

6
example/example.sct
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@ -11,7 +11,7 @@
#define STACK_SIZE 0x1000
#define HEAP_ALIGN 8
#define HEAP_SIZE (RAM1_LIMIT - AlignExpr(ImageLimit(RW_IRAM1), HEAP_ALIGN))
#define HEAP_SIZE (RAM1_LIMIT - AlignExpr(ImageLimit(ZI_RAM_UNINIT), HEAP_ALIGN))
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
@ -27,6 +27,10 @@ LR_IROM1 0x00000000 0x00040000 { ; load region size_region
RW_IRAM1 +0 { ; RW data
.ANY (+RW +ZI)
}
ZI_RAM_UNINIT +0 UNINIT {
.ANY (.bss.noinit)
}
ARM_LIB_HEAP +0 ALIGN HEAP_ALIGN EMPTY HEAP_SIZE {}

15
example/example.uvoptx
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@ -75,7 +75,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>0</IsCurrentTarget>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -193,13 +193,18 @@
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow4>
<ScvdPack>
<Filename>C:\Users\gabriel\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.7.2\EventRecorder.scvd</Filename>
<Type>Keil.ARM_Compiler.1.7.2</Type>
<SubType>1</SubType>
</ScvdPack>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>1</periodic>
<aLwin>1</aLwin>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
@ -216,7 +221,7 @@
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<aSer4>1</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
@ -292,7 +297,7 @@
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
<IsCurrentTarget>0</IsCurrentTarget>
</OPTFL>
<CpuCode>7</CpuCode>
<DebugOpt>
@ -784,7 +789,7 @@
<Group>
<GroupName>::Compiler</GroupName>
<tvExp>0</tvExp>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>

27
example/example.uvprojx
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@ -314,7 +314,7 @@
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>6</Optim>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>1</OneElfS>
@ -329,11 +329,11 @@
<uC99>1</uC99>
<uGnu>1</uGnu>
<useXO>0</useXO>
<v6Lang>4</v6Lang>
<v6Lang>6</v6Lang>
<v6LangP>3</v6LangP>
<vShortEn>1</vShortEn>
<vShortWch>1</vShortWch>
<v6Lto>1</v6Lto>
<v6Lto>0</v6Lto>
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
@ -1724,15 +1724,34 @@
<targetInfo name="library"/>
</targetInfos>
</component>
<component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.5.1" condition="Cortex-M Device">
<package name="ARM_Compiler" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="Keil" version="1.7.2"/>
<targetInfos>
<targetInfo name="example_arm_compiler_6"/>
</targetInfos>
</component>
<component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="EVR" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M with EVR" isTargetSpecific="1">
<package name="ARM_Compiler" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="Keil" version="1.7.2"/>
<targetInfos>
<targetInfo name="example_arm_compiler_6"/>
</targetInfos>
</component>
<component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="I/O" Csub="STDOUT" Cvariant="User" Cvendor="Keil" Cversion="1.2.0" condition="ARMCC Cortex-M" isTargetSpecific="1">
<package name="ARM_Compiler" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="Keil" version="1.7.2"/>
<targetInfos>
<targetInfo name="example_arm compiler_5"/>
<targetInfo name="example_arm_compiler_6"/>
</targetInfos>
</component>
</components>
<files>
<file attr="config" category="header" name="Config\EventRecorderConf.h" version="1.1.0">
<instance index="0">RTE\Compiler\EventRecorderConf.h</instance>
<component Cbundle="ARM Compiler" Cclass="Compiler" Cgroup="Event Recorder" Cvariant="DAP" Cvendor="Keil" Cversion="1.5.1" condition="Cortex-M Device"/>
<package name="ARM_Compiler" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="Keil" version="1.7.2"/>
<targetInfos>
<targetInfo name="example_arm_compiler_6"/>
</targetInfos>
</file>
<file attr="config" category="sourceAsm" condition="ARMCC" name="Device\ARM\ARMCM0\Source\ARM\startup_ARMCM0.s" version="1.0.1">
<instance index="0">RTE\Device\ARMCM0\startup_ARMCM0.s</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM0 CMSIS"/>

11
example/platform.c
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@ -21,6 +21,10 @@
#include "perf_counter.h"
#include "ARMCM0.h" // Keil::Board Support:V2M-MPS2:Common
#include <assert.h>
#include <RTE_Components.h>
#if defined(RTE_Compiler_EventRecorder)
# include <EventRecorder.h>
#endif
extern
void uart_config(uint32_t wUARTFrequency);
@ -53,11 +57,16 @@ __attribute__((constructor(101)))
void platform_init(void)
{
SystemCoreClockUpdate();
#if defined(RTE_Compiler_IO_STDOUT) && defined(RTE_Compiler_IO_STDOUT_User)
uart_config(25000000ul);
#endif
/* Generate interrupt each 1 ms */
SysTick_Config(SystemCoreClock / 1000);
#if defined(RTE_Compiler_EventRecorder) && defined(RTE_Compiler_IO_STDOUT_EVR)
EventRecorderInitialize(0,1);
#endif
}

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lib/libperf_counter_gcc.a
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lib/perf_counter.h
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@ -37,7 +37,7 @@ extern "C" {
#define __PERF_COUNTER_VER_MINOR__ 1
#define __PERF_COUNTER_VER_REVISE__ 0
#define __PERF_COUNTER_VER_STR__ "dev"
#define __PERF_COUNTER_VER_STR__ ""
#define __PER_COUNTER_VER__ (__PERF_COUNTER_VER_MAJOR__ * 10000ul \
+__PERF_COUNTER_VER_MINOR__ * 100ul \

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lib/perf_counter.lib
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perf_counter.c
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@ -406,6 +406,31 @@ int32_t get_system_us(void)
return nTemp;
}
/// Setup timer hardware.
/// \return status (1=Success, 0=Failure)
uint32_t EventRecorderTimerSetup (void)
{
/* doing nothing at all */
return 1;
}
/// Get timer frequency.
/// \return timer frequency in Hz
uint32_t EventRecorderTimerGetFreq (void)
{
return SystemCoreClock;
}
/// Get timer count.
/// \return timer count (32-bit)
uint32_t EventRecorderTimerGetCount (void)
{
return get_system_ticks();
}
__WEAK
task_cycle_info_t * get_rtos_task_cycle_info(void)
{

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perf_counter.h
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@ -37,7 +37,7 @@ extern "C" {
#define __PERF_COUNTER_VER_MINOR__ 1
#define __PERF_COUNTER_VER_REVISE__ 0
#define __PERF_COUNTER_VER_STR__ "dev"
#define __PERF_COUNTER_VER_STR__ ""
#define __PER_COUNTER_VER__ (__PERF_COUNTER_VER_MAJOR__ * 10000ul \
+__PERF_COUNTER_VER_MINOR__ * 100ul \