mirror of
https://gitee.com/Lyon1998/pikapython.git
synced 2025-01-22 17:12:55 +08:00
652 lines
23 KiB
C
652 lines
23 KiB
C
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/******************************************************************************************************************************************
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* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: SWM320_pwm.c
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: SWM320<EFBFBD><EFBFBD>Ƭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><EFBFBD>: http://www.synwit.com.cn/e/tool/gbook/?bid=1
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
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* <EFBFBD>汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD>: V1.1.0 2017<EFBFBD><EFBFBD>10<EFBFBD><EFBFBD>25<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼:
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*
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*
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*******************************************************************************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
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* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
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* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
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* -ECTION WITH THEIR PRODUCTS.
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*
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* COPYRIGHT 2012 Synwit Technology
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*******************************************************************************************************************************************/
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#include "SWM320.h"
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#include "SWM320_pwm.h"
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_Init()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: PWM<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* PWM_InitStructure * initStruct <EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>趨ֵ<EFBFBD>Ľṹ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void PWM_Init(PWM_TypeDef * PWMx, PWM_InitStructure * initStruct)
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{
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uint32_t bit_offset = 0;
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SYS->CLKEN |= (0x01 << SYS_CLKEN_PWM_Pos);
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SYS->CLKDIV &= ~SYS_CLKDIV_PWM_Msk;
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SYS->CLKDIV |= (initStruct->clk_div << SYS_CLKDIV_PWM_Pos);
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PWM_Stop(PWMx, 1, 1); //һЩ<D2BB>ؼ<EFBFBD><D8BC>Ĵ<EFBFBD><C4B4><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>PWMֹͣʱ<D6B9><CAB1><EFBFBD><EFBFBD>
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PWMx->MODE = initStruct->mode;
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PWMx->PERA = initStruct->cycleA;
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PWMx->HIGHA = initStruct->hdutyA;
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PWMx->DZA = initStruct->deadzoneA;
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PWMx->PERB = initStruct->cycleB;
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PWMx->HIGHB = initStruct->hdutyB;
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PWMx->DZB = initStruct->deadzoneB;
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PWMx->INIOUT &= ~(PWM_INIOUT_PWMA_Msk | PWM_INIOUT_PWMB_Msk);
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PWMx->INIOUT |= (initStruct->initLevelA << PWM_INIOUT_PWMA_Pos) |
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(initStruct->initLevelB << PWM_INIOUT_PWMB_Pos);
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PWMG->IM = 0x00000000;
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switch((uint32_t)PWMx)
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{
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case((uint32_t)PWM0):
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bit_offset = 0;
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break;
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case((uint32_t)PWM1):
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bit_offset = 2;
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break;
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case((uint32_t)PWM2):
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bit_offset = 4;
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break;
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case((uint32_t)PWM3):
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bit_offset = 6;
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break;
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case((uint32_t)PWM4):
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bit_offset = 8;
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break;
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case((uint32_t)PWM5):
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bit_offset = 10;
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break;
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}
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PWMG->IRS = ((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13))); //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
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PWMG->IE &= ~((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13)));
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PWMG->IE |= (initStruct->NCycleAIEn << bit_offset) | (initStruct->NCycleBIEn << (bit_offset+1)) |
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(initStruct->HEndAIEn << (bit_offset+12)) | (initStruct->HEndBIEn << (bit_offset+13));
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if(initStruct->NCycleAIEn | initStruct->NCycleBIEn | initStruct->HEndAIEn | initStruct->HEndBIEn)
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{
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NVIC_EnableIRQ(PWM_IRQn);
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}
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else if((PWMG->IE & (~((0x01 << bit_offset) | (0x01 << (bit_offset+1)) | (0x01 << (bit_offset+12)) | (0x01 << (bit_offset+13))))) == 0)
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{
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NVIC_DisableIRQ(PWM_IRQn);
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_Start()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼPWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* uint32_t chA 0 ͨ<EFBFBD><EFBFBD>A<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 ͨ<EFBFBD><EFBFBD>A<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* uint32_t chB 0 ͨ<EFBFBD><EFBFBD>B<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 ͨ<EFBFBD><EFBFBD>B<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void PWM_Start(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB)
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{
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switch((uint32_t)PWMx)
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{
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case((uint32_t)PWM0):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM0A_Pos) | (chB << PWMG_CHEN_PWM0B_Pos);
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break;
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case((uint32_t)PWM1):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM1A_Pos) | (chB << PWMG_CHEN_PWM1B_Pos);
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break;
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case((uint32_t)PWM2):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM2A_Pos) | (chB << PWMG_CHEN_PWM2B_Pos);
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break;
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case((uint32_t)PWM3):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM3A_Pos) | (chB << PWMG_CHEN_PWM3B_Pos);
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break;
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case((uint32_t)PWM4):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM4A_Pos) | (chB << PWMG_CHEN_PWM4B_Pos);
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break;
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case((uint32_t)PWM5):
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PWMG->CHEN |= (chA << PWMG_CHEN_PWM5A_Pos) | (chB << PWMG_CHEN_PWM5B_Pos);
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break;
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_Stop()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ر<EFBFBD>PWM<EFBFBD><EFBFBD>ֹͣPWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* uint32_t chA 0 ͨ<EFBFBD><EFBFBD>A<EFBFBD><EFBFBD><EFBFBD>ر<EFBFBD> 1 ͨ<EFBFBD><EFBFBD>A<EFBFBD>ر<EFBFBD>
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* uint32_t chB 0 ͨ<EFBFBD><EFBFBD>B<EFBFBD><EFBFBD><EFBFBD>ر<EFBFBD> 1 ͨ<EFBFBD><EFBFBD>B<EFBFBD>ر<EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void PWM_Stop(PWM_TypeDef * PWMx, uint32_t chA, uint32_t chB)
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{
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switch((uint32_t)PWMx)
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{
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case((uint32_t)PWM0):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM0A_Pos) | (chB << PWMG_CHEN_PWM0B_Pos));
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break;
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case((uint32_t)PWM1):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM1A_Pos) | (chB << PWMG_CHEN_PWM1B_Pos));
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break;
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case((uint32_t)PWM2):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM2A_Pos) | (chB << PWMG_CHEN_PWM2B_Pos));
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break;
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case((uint32_t)PWM3):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM3A_Pos) | (chB << PWMG_CHEN_PWM3B_Pos));
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break;
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case((uint32_t)PWM4):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM4A_Pos) | (chB << PWMG_CHEN_PWM4B_Pos));
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break;
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case((uint32_t)PWM5):
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PWMG->CHEN &= ~((chA << PWMG_CHEN_PWM5A_Pos) | (chB << PWMG_CHEN_PWM5B_Pos));
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break;
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}
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_SetCycle()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
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* uint16_t cycle Ҫ<EFBFBD>趨<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void PWM_SetCycle(PWM_TypeDef * PWMx, uint32_t chn, uint16_t cycle)
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{
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if(chn == PWM_CH_A)
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PWMx->PERA = cycle;
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else if(chn == PWM_CH_B)
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PWMx->PERB = cycle;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_GetCycle()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>ѯ<EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint16_t <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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uint16_t PWM_GetCycle(PWM_TypeDef * PWMx, uint32_t chn)
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{
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uint16_t cycle = 0;
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if(chn == PWM_CH_A)
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cycle = PWMx->PERA;
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else if(chn == PWM_CH_B)
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cycle = PWMx->PERB;
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return cycle;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_SetHDuty()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD>øߵ<EFBFBD>ƽʱ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
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* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
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* uint16_t hduty Ҫ<EFBFBD>趨<EFBFBD>ĸߵ<EFBFBD>ƽʱ<EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
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******************************************************************************************************************************************/
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void PWM_SetHDuty(PWM_TypeDef * PWMx, uint32_t chn, uint16_t hduty)
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{
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if(chn == PWM_CH_A)
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PWMx->HIGHA = hduty;
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else if(chn == PWM_CH_B)
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PWMx->HIGHB = hduty;
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}
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/******************************************************************************************************************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_GetHDuty()
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD>ߵ<EFBFBD>ƽʱ<EFBFBD><EFBFBD>
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|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>ѯ<EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint16_t <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ĸߵ<EFBFBD>ƽʱ<EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint16_t PWM_GetHDuty(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
uint16_t hduty = 0;
|
|||
|
|
|||
|
if(chn == PWM_CH_A)
|
|||
|
hduty = PWMx->HIGHA;
|
|||
|
else if(chn == PWM_CH_B)
|
|||
|
hduty = PWMx->HIGHB;
|
|||
|
|
|||
|
return hduty;
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_SetDeadzone()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* uint8_t deadzone Ҫ<EFBFBD>趨<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_SetDeadzone(PWM_TypeDef * PWMx, uint32_t chn, uint8_t deadzone)
|
|||
|
{
|
|||
|
if(chn == PWM_CH_A)
|
|||
|
PWMx->DZA = deadzone;
|
|||
|
else if(chn == PWM_CH_B)
|
|||
|
PWMx->DZB = deadzone;
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_GetDeadzone()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>ѯ<EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint8_t <EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint8_t PWM_GetDeadzone(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
uint8_t deadzone = 0;
|
|||
|
|
|||
|
if(chn == PWM_CH_A)
|
|||
|
deadzone = PWMx->DZA;
|
|||
|
else if(chn == PWM_CH_B)
|
|||
|
deadzone = PWMx->DZB;
|
|||
|
|
|||
|
return deadzone;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntNCycleEn()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntNCycleEn(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP0A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP1A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP2A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP3A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP4A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_NEWP5A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_NEWP5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntNCycleDis()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>жϽ<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntNCycleDis(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP0A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP1A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP2A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP3A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP4A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_NEWP5A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_NEWP5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntNCycleClr()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>жϱ<EFBFBD>־<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntNCycleClr(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP0A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP1A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP2A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP3A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP4A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_NEWP5A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_NEWP5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntNCycleStat()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>ж<EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 1 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>ж<EFBFBD><EFBFBD>ѷ<EFBFBD><EFBFBD><EFBFBD> 0 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD>ʼ<EFBFBD>ж<EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint32_t PWM_IntNCycleStat(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
uint32_t int_stat = 0;
|
|||
|
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP0A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP0B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP1A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP1B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP2A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP2B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP3A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP3B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP4A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP4B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_NEWP5A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_NEWP5B_Msk);
|
|||
|
break;
|
|||
|
}
|
|||
|
|
|||
|
return int_stat;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntHEndEn()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntHEndEn(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND0A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND1A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND2A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND3A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND4A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE |= (0x01 << PWMG_IE_HEND5A_Pos);
|
|||
|
else PWMG->IE |= (0x01 << PWMG_IE_HEND5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntHEndDis()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϽ<EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntHEndDis(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND0A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND1A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND2A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND3A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND4A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IE &= ~(0x01 << PWMG_IE_HEND5A_Pos);
|
|||
|
else PWMG->IE &= ~(0x01 << PWMG_IE_HEND5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntHEndClr()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϱ<EFBFBD>־<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
void PWM_IntHEndClr(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND0A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND0B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND1A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND1B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND2A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND2B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND3A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND3B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND4A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND4B_Pos);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) PWMG->IRS = (0x01 << PWMG_IRS_HEND5A_Pos);
|
|||
|
else PWMG->IRS = (0x01 << PWMG_IRS_HEND5B_Pos);
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
/******************************************************************************************************************************************
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: PWM_IntHEndStat()
|
|||
|
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD>: <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: PWM_TypeDef * PWMx ָ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>PWM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>PWM0<EFBFBD><EFBFBD>PWM1<EFBFBD><EFBFBD>PWM2<EFBFBD><EFBFBD>PWM3<EFBFBD><EFBFBD>PWM4<EFBFBD><EFBFBD>PWM5
|
|||
|
* uint32_t chn ѡ<EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чֵ<EFBFBD><EFBFBD>PWM_CH_A<EFBFBD><EFBFBD>PWM_CH_B
|
|||
|
* <EFBFBD><EFBFBD> <EFBFBD><EFBFBD>: uint32_t 1 <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD>ѷ<EFBFBD><EFBFBD><EFBFBD> 0 <EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <EFBFBD><EFBFBD>
|
|||
|
******************************************************************************************************************************************/
|
|||
|
uint32_t PWM_IntHEndStat(PWM_TypeDef * PWMx, uint32_t chn)
|
|||
|
{
|
|||
|
uint32_t int_stat = 0;
|
|||
|
|
|||
|
switch((uint32_t)PWMx)
|
|||
|
{
|
|||
|
case((uint32_t)PWM0):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND0A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND0B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM1):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND1A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND1B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM2):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND2A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND2B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM3):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND3A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND3B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM4):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND4A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND4B_Msk);
|
|||
|
break;
|
|||
|
|
|||
|
case((uint32_t)PWM5):
|
|||
|
if(chn == PWM_CH_A) int_stat = (PWMG->IF & PWMG_IF_HEND5A_Msk);
|
|||
|
else int_stat = (PWMG->IF & PWMG_IF_HEND5B_Msk);
|
|||
|
break;
|
|||
|
}
|
|||
|
|
|||
|
return int_stat;
|
|||
|
}
|