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add pico

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pikastech 2021-12-14 11:03:33 +08:00
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commit 40ddb76a4c
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SET PATH=C:\Keil_v5\ARM\ARMCLANG\Bin;C:\Keil_v5\ARM\AC6.17\Bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Windows\System32\OpenSSH\;C:\Program Files\Git\cmd;C:\Program Files (x86)\GNU Arm Embedded Toolchain\10 2021.10\bin;C:\Users\liang\AppData\Local\Programs\Python\Python310\Scripts\;C:\Users\liang\AppData\Local\Programs\Python\Python310\;C:\Users\liang\AppData\Local\Microsoft\WindowsApps;C:\Users\liang\AppData\Local\Programs\Microsoft VS Code\bin
SET CPU_TYPE=ARMCM0P_MPU
SET CPU_VENDOR=ARM
SET UV2_TARGET=AC6-flash
SET CPU_CLOCK=0x00B71B00
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\startup_rp2040.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\system_rp2040.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\clocks.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\watchdog.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\pll.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\platform.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\xosc.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\irq.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\irq_handler_chain._ac"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\gpio.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\multicore.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\sync.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\critical_section.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\lock_core.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\mutex.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\sem.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\time.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\timeout_helper.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\timer.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\claim.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\queue.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\pheap.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\datetime.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\stdlib.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\uart.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\compile_time_choice._ac"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\runtime.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\i2c.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\spi.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\adc.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\bootrom.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\stdio.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\stdio_uart.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\env_wrapper.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\main.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmClang.exe" @".\objects\retarget_io.__i"
"C:\Keil_v5\ARM\ARMCLANG\Bin\ArmLink" --Via ".\Objects\template.lnp"
.\axf2uf2.bat

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"..\..\tool\elf2uf2.exe" .\Objects\template.axf .\template.uf2

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*.axf
*.dep
*.d
*.o
*.Scr
*.gabwan01
*.map
example/Out/example.build_log.htm
example/Out/perf_counter.build_log.htm
*.lnp
example/Out/example.htm
example/Out/perf_counter.lib
*.scvd
*.iex
*.crf
*.lst
example/example.uvguix.gabriel
example/GCC_Out/gcc_example.elf
example/GCC_Out/gcc_example.build_log.htm
example/GCC_Out/perf_counter_gcc.build_log.htm
example/GCC_Out/libperf_counter_gcc.a

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<?xml version="1.0" encoding="utf-8"?>
<package schemaVersion="1.4" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
<vendor>GorgonMeducer</vendor>
<name>perf_counter</name>
<description>A dedicated performance counter for Cortex-M systick. It shares the SysTick with users' original SysTick function without interfere it. This library will bring new functionalities, such as performance counter, delay_us and clock() service defined in time.h</description>
<url>https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/</url>
<supportContact>https://github.com/GorgonMeducer/perf_counter/issues</supportContact>
<license>lib/LICENSE</license>
<!-- optional license file -->
<!--
<license>
</license>
-->
<repository type="git">https://github.com/GorgonMeducer/perf_counter.git</repository>
<releases>
<release date="2021-12-05" version="1.6.5" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.5.pack">
- Include stddef.h in perf_counter.h to solve missing NULL definition issue.
</release>
<release date="2021-11-13" version="1.6.4" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.4.pack">
- Improve support for IAR
- Fix issues found in foreach
- Other minor update
</release>
<release date="2021-11-05" version="1.6.3" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.3.pack">
- Add CMSIS Dependency Check
</release>
<release date="2021-11-05" version="1.6.2" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.2.pack">
- Add options for selecting between source code and library.
</release>
<release date="2021-11-04" version="1.6.1" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.1.pack">
- Add GCC support to CMSIS-Pack
</release>
</releases>
<keywords>
<!-- keywords for indexing -->
<keyword>Cortex-M</keyword>
<keyword>SysTick</keyword>
<keyword>Performance Analaysis</keyword>
</keywords>
<conditions>
<condition id="Arm Compiler">
<description>Arm Compiler 5 (armcc) or Arm Compiler 6 (armclang).</description>
<accept Tcompiler="ARMCC" Toptions="AC6"/>
<accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
<accept Tcompiler="ARMCC" Toptions="AC5"/>
</condition>
<condition id="Arm GCC">
<description>GNU Tools for Arm Embedded Processors.</description>
<accept Tcompiler="GCC"/>
</condition>
<condition id="Cortex-M Processors">
<description>Support All Cortex-M based processors</description>
<accept Dcore="Cortex-M0"/>
<accept Dcore="Cortex-M0+"/>
<accept Dcore="Cortex-M1"/>
<accept Dcore="Cortex-M3"/>
<accept Dcore="Cortex-M4"/>
<accept Dcore="Cortex-M7"/>
<accept Dcore="Cortex-M23"/>
<accept Dcore="Cortex-M33"/>
<accept Dcore="Cortex-M35P"/>
<accept Dcore="Cortex-M55"/>
<accept Dcore="SC000"/>
<accept Dcore="SC300"/>
<accept Dcore="ARMV8MBL"/>
<accept Dcore="ARMV8MML"/>
</condition>
<condition id="CMSIS-CORE">
<description>Require CMSIS-CORE Support</description>
<require Cclass="CMSIS" Cgroup="CORE"/>
</condition>
<condition id="Cortex-M Arm GCC">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm GCC"/>
<require condition="Cortex-M Processors"/>
</condition>
<condition id="Cortex-M Arm Compiler">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm Compiler"/>
<require condition="Cortex-M Processors"/>
</condition>
<condition id="Cortex-M Arm GCC CMSIS-CORE">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm GCC"/>
<require condition="Cortex-M Processors"/>
<require condition="CMSIS-CORE"/>
</condition>
<condition id="Cortex-M Arm Compiler CMSIS-CORE">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm Compiler"/>
<require condition="Cortex-M Processors"/>
<require condition="CMSIS-CORE"/>
</condition>
</conditions>
<!-- apis section (optional - for Application Programming Interface descriptions) -->
<!--
<apis>
</apis>
-->
<!-- boards section (mandatory for Board Support Packs) -->
<!--
<boards>
</boards>
-->
<!-- devices section (mandatory for Device Family Packs) -->
<!--
<devices>
</devices>
-->
<!-- examples section (optional for all Software Packs)-->
<!--
<examples>
</examples>
-->
<!-- conditions section (optional for all Software Packs)-->
<!--
<conditions>
</conditions>
-->
<components>
<component Cclass="Utilities" Cgroup="Performance" Csub="perf_counter" Cvariant="Library" Cversion="1.6.5" isDefaultVariant="true">
<description>A dedicated performance counter for Cortex-M systick.</description>
<files>
<file category="header" name="lib/perf_counter.h"/>
<file category="library" name="lib/perf_counter.lib" condition="Cortex-M Arm Compiler"/>
<file category="library" name="lib/libperf_counter_gcc.a" condition="Cortex-M Arm GCC"/>
</files>
</component>
<component Cclass="Utilities" Cgroup="Performance" Csub="perf_counter" Cvariant="Source" Cversion="1.6.5" condition="CMSIS-CORE">
<description>A dedicated performance counter for Cortex-M systick.</description>
<files>
<file category="header" name="lib/perf_counter.h"/>
<file category="source" name="perf_counter.c" />
<file category="source" name="systick_wrapper_ual.s" condition="Cortex-M Arm Compiler CMSIS-CORE"/>
<file category="source" name="systick_wrapper_gcc.s" condition="Cortex-M Arm GCC CMSIS-CORE"/>
</files>
</component>
</components>
<!-- optional taxonomy section for defining new component Class and Group names -->
<!--
<taxonomy>
</taxonomy>
-->
</package>

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# perf_counter
A dedicated performance counter for Cortex-M systick. It shares the SysTick with users' original SysTick function without interfere it. This library will bring new functionalities, such as performance counter, delay_us and clock() service defined in time.h

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<?xml version="1.0" encoding="utf-8"?>
<package schemaVersion="1.4" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
<vendor>GorgonMeducer</vendor>
<name>perf_counter</name>
<description>A dedicated performance counter for Cortex-M systick. It shares the SysTick with users' original SysTick function without interfere it. This library will bring new functionalities, such as performance counter, delay_us and clock() service defined in time.h</description>
<url>https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/</url>
<supportContact>https://github.com/GorgonMeducer/perf_counter/issues</supportContact>
<license>lib/LICENSE</license>
<!-- optional license file -->
<!--
<license>
</license>
-->
<repository type="git">https://github.com/GorgonMeducer/perf_counter.git</repository>
<releases>
<release date="2021-12-05" version="1.6.5" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.5.pack">
- Include stddef.h in perf_counter.h to solve missing NULL definition issue.
</release>
<release date="2021-11-13" version="1.6.4" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.4.pack">
- Improve support for IAR
- Fix issues found in foreach
- Other minor update
</release>
<release date="2021-11-05" version="1.6.3" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.3.pack">
- Add CMSIS Dependency Check
</release>
<release date="2021-11-05" version="1.6.2" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.2.pack">
- Add options for selecting between source code and library.
</release>
<release date="2021-11-04" version="1.6.1" url="https://raw.githubusercontent.com/GorgonMeducer/perf_counter/CMSIS-Pack/cmsis-pack/GorgonMeducer.perf_counter.1.6.1.pack">
- Add GCC support to CMSIS-Pack
</release>
</releases>
<keywords>
<!-- keywords for indexing -->
<keyword>Cortex-M</keyword>
<keyword>SysTick</keyword>
<keyword>Performance Analaysis</keyword>
</keywords>
<conditions>
<condition id="Arm Compiler">
<description>Arm Compiler 5 (armcc) or Arm Compiler 6 (armclang).</description>
<accept Tcompiler="ARMCC" Toptions="AC6"/>
<accept Tcompiler="ARMCC" Toptions="AC6LTO"/>
<accept Tcompiler="ARMCC" Toptions="AC5"/>
</condition>
<condition id="Arm GCC">
<description>GNU Tools for Arm Embedded Processors.</description>
<accept Tcompiler="GCC"/>
</condition>
<condition id="Cortex-M Processors">
<description>Support All Cortex-M based processors</description>
<accept Dcore="Cortex-M0"/>
<accept Dcore="Cortex-M0+"/>
<accept Dcore="Cortex-M1"/>
<accept Dcore="Cortex-M3"/>
<accept Dcore="Cortex-M4"/>
<accept Dcore="Cortex-M7"/>
<accept Dcore="Cortex-M23"/>
<accept Dcore="Cortex-M33"/>
<accept Dcore="Cortex-M35P"/>
<accept Dcore="Cortex-M55"/>
<accept Dcore="SC000"/>
<accept Dcore="SC300"/>
<accept Dcore="ARMV8MBL"/>
<accept Dcore="ARMV8MML"/>
</condition>
<condition id="CMSIS-CORE">
<description>Require CMSIS-CORE Support</description>
<require Cclass="CMSIS" Cgroup="CORE"/>
</condition>
<condition id="Cortex-M Arm GCC">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm GCC"/>
<require condition="Cortex-M Processors"/>
</condition>
<condition id="Cortex-M Arm Compiler">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm Compiler"/>
<require condition="Cortex-M Processors"/>
</condition>
<condition id="Cortex-M Arm GCC CMSIS-CORE">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm GCC"/>
<require condition="Cortex-M Processors"/>
<require condition="CMSIS-CORE"/>
</condition>
<condition id="Cortex-M Arm Compiler CMSIS-CORE">
<description>Compile Cortex-M Processors with GNU Tools for Arm Embedded Processors.</description>
<require condition="Arm Compiler"/>
<require condition="Cortex-M Processors"/>
<require condition="CMSIS-CORE"/>
</condition>
</conditions>
<!-- apis section (optional - for Application Programming Interface descriptions) -->
<!--
<apis>
</apis>
-->
<!-- boards section (mandatory for Board Support Packs) -->
<!--
<boards>
</boards>
-->
<!-- devices section (mandatory for Device Family Packs) -->
<!--
<devices>
</devices>
-->
<!-- examples section (optional for all Software Packs)-->
<!--
<examples>
</examples>
-->
<!-- conditions section (optional for all Software Packs)-->
<!--
<conditions>
</conditions>
-->
<components>
<component Cclass="Utilities" Cgroup="Performance" Csub="perf_counter" Cvariant="Library" Cversion="1.6.5" isDefaultVariant="true">
<description>A dedicated performance counter for Cortex-M systick.</description>
<files>
<file category="header" name="lib/perf_counter.h"/>
<file category="library" name="lib/perf_counter.lib" condition="Cortex-M Arm Compiler"/>
<file category="library" name="lib/libperf_counter_gcc.a" condition="Cortex-M Arm GCC"/>
</files>
</component>
<component Cclass="Utilities" Cgroup="Performance" Csub="perf_counter" Cvariant="Source" Cversion="1.6.5" condition="CMSIS-CORE">
<description>A dedicated performance counter for Cortex-M systick.</description>
<files>
<file category="header" name="lib/perf_counter.h"/>
<file category="source" name="perf_counter.c" />
<file category="source" name="systick_wrapper_ual.s" condition="Cortex-M Arm Compiler CMSIS-CORE"/>
<file category="source" name="systick_wrapper_gcc.s" condition="Cortex-M Arm GCC CMSIS-CORE"/>
</files>
</component>
</components>
<!-- optional taxonomy section for defining new component Class and Group names -->
<!--
<taxonomy>
</taxonomy>
-->
</package>

1
bsp/pico/MDK/mdk/perf_counter/example/ArInp.bat Normal file
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"C:\Program Files (x86)\GNU Arm Embedded Toolchain\10 2020-q4-major\bin\arm-none-eabi-ar" -M <ArInp.Scr

296
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/******************************************************************************
* @file gcc_arm.ld
* @brief GNU Linker Script for Cortex-M based device
* @version V2.1.0
* @date 04. August 2020
******************************************************************************/
/*
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
*/
/*---------------------- Flash Configuration ----------------------------------
<h> Flash Configuration
<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__ROM_BASE = 0x00000000;
__ROM_SIZE = 0x00040000;
/*--------------------- Embedded RAM Configuration ----------------------------
<h> RAM Configuration
<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__RAM_BASE = 0x20000000;
__RAM_SIZE = 0x00020000;
/*--------------------- Stack / Heap Configuration ----------------------------
<h> Stack / Heap Configuration
<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__STACK_SIZE = 0x00000400;
__HEAP_SIZE = 0x00000C00;
/*
*-------------------- <<< end of configuration section >>> -------------------
*/
MEMORY
{
FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
/*
* SG veneers:
* All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
* must be set, either with the command line option <20>--section-start<72> or in a linker script,
* to indicate where to place these veneers in memory.
*/
/*
.gnu.sgstubs :
{
. = ALIGN(32);
} > FLASH
*/
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
LONG ((__data_end__ - __data_start__) / 4)
/* Add each additional data section here */
/*
LONG (__etext2)
LONG (__data2_start__)
LONG ((__data2_end__ - __data2_start__) / 4)
*/
__copy_table_end__ = .;
} > FLASH
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
/* Add each additional bss section here */
/*
LONG (__bss2_start__)
LONG ((__bss2_end__ - __bss2_start__) / 4)
*/
__zero_table_end__ = .;
} > FLASH
/**
* Location counter can end up 2byte aligned with narrow Thumb code but
* __etext is assumed by startup code to be the LMA of a section in RAM
* which must be 4byte aligned
*/
__etext = ALIGN (4);
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data)
*(.data.*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
/*
* Secondary data section, optional
*
* Remember to add each additional data section
* to the .copy.table above to asure proper
* initialization during startup.
*/
/*
__etext2 = ALIGN (4);
.data2 : AT (__etext2)
{
. = ALIGN(4);
__data2_start__ = .;
*(.data2)
*(.data2.*)
. = ALIGN(4);
__data2_end__ = .;
} > RAM2
*/
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM AT > RAM
/*
* Secondary bss section, optional
*
* Remember to add each additional bss section
* to the .zero.table above to asure proper
* initialization during startup.
*/
/*
.bss2 :
{
. = ALIGN(4);
__bss2_start__ = .;
*(.bss2)
*(.bss2.*)
. = ALIGN(4);
__bss2_end__ = .;
} > RAM2 AT > RAM2
*/
.heap (COPY) :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
. = . + __HEAP_SIZE;
. = ALIGN(8);
__HeapLimit = .;
} > RAM
.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
{
. = ALIGN(8);
__StackLimit = .;
. = . + __STACK_SIZE;
. = ALIGN(8);
__StackTop = .;
} > RAM
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

168
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/ARMCM0/startup_ARMCM0.s Normal file
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;/**************************************************************************//**
; * @file startup_ARMCM0.s
; * @brief CMSIS Core Device Startup File for
; * ARMCM0 Device
; * @version V1.0.1
; * @date 23. July 2019
; ******************************************************************************/
;/*
; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; */
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;<h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
__stack_limit
Stack_Mem SPACE Stack_Size
__initial_sp
;<h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
Heap_Size EQU 0x00000C00
IF Heap_Size != 0 ; Heap is provided
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
ENDIF
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; -14 NMI Handler
DCD HardFault_Handler ; -13 Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; -5 SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; -2 PendSV Handler
DCD SysTick_Handler ; -1 SysTick Handler
; Interrupts
DCD Interrupt0_Handler ; 0 Interrupt 0
DCD Interrupt1_Handler ; 1 Interrupt 1
DCD Interrupt2_Handler ; 2 Interrupt 2
DCD Interrupt3_Handler ; 3 Interrupt 3
DCD Interrupt4_Handler ; 4 Interrupt 4
DCD Interrupt5_Handler ; 5 Interrupt 5
DCD Interrupt6_Handler ; 6 Interrupt 6
DCD Interrupt7_Handler ; 7 Interrupt 7
DCD Interrupt8_Handler ; 8 Interrupt 8
DCD Interrupt9_Handler ; 9 Interrupt 9
SPACE ( 22 * 4) ; Interrupts 10 .. 31 are left out
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; The default macro is not used for HardFault_Handler
; because this results in a poor debug illusion.
HardFault_Handler PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
; Macro to define default exception/interrupt handlers.
; Default handler are weak symbols with an endless loop.
; They can be overwritten by real handlers.
MACRO
Set_Default_Handler $Handler_Name
$Handler_Name PROC
EXPORT $Handler_Name [WEAK]
B .
ENDP
MEND
; Default exception/interrupt handler
Set_Default_Handler NMI_Handler
Set_Default_Handler SVC_Handler
Set_Default_Handler PendSV_Handler
Set_Default_Handler SysTick_Handler
Set_Default_Handler Interrupt0_Handler
Set_Default_Handler Interrupt1_Handler
Set_Default_Handler Interrupt2_Handler
Set_Default_Handler Interrupt3_Handler
Set_Default_Handler Interrupt4_Handler
Set_Default_Handler Interrupt5_Handler
Set_Default_Handler Interrupt6_Handler
Set_Default_Handler Interrupt7_Handler
Set_Default_Handler Interrupt8_Handler
Set_Default_Handler Interrupt9_Handler
ALIGN
; User setup Stack & Heap
IF :LNOT::DEF:__MICROLIB
IMPORT __use_two_region_memory
ENDIF
EXPORT __stack_limit
EXPORT __initial_sp
IF Heap_Size != 0 ; Heap is provided
EXPORT __heap_base
EXPORT __heap_limit
ENDIF
END

56
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/ARMCM0/system_ARMCM0.c Normal file
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/**************************************************************************//**
* @file system_ARMCM0.c
* @brief CMSIS Device System Source File for
* ARMCM0 Device
* @version V1.0.0
* @date 09. July 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "ARMCM0.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2U)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
/*----------------------------------------------------------------------------
System Core Clock update function
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
/*----------------------------------------------------------------------------
System initialization function
*----------------------------------------------------------------------------*/
void SystemInit (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}

172
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/ARMCM3/startup_ARMCM3.s Normal file
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;/**************************************************************************//**
; * @file startup_ARMCM3.s
; * @brief CMSIS Core Device Startup File for
; * ARMCM3 Device
; * @version V1.0.1
; * @date 23. July 2019
; ******************************************************************************/
;/*
; * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
; *
; * SPDX-License-Identifier: Apache-2.0
; *
; * Licensed under the Apache License, Version 2.0 (the License); you may
; * not use this file except in compliance with the License.
; * You may obtain a copy of the License at
; *
; * www.apache.org/licenses/LICENSE-2.0
; *
; * Unless required by applicable law or agreed to in writing, software
; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
; * See the License for the specific language governing permissions and
; * limitations under the License.
; */
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;<h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
__stack_limit
Stack_Mem SPACE Stack_Size
__initial_sp
;<h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;</h>
Heap_Size EQU 0x00000C00
IF Heap_Size != 0 ; Heap is provided
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
ENDIF
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; -14 NMI Handler
DCD HardFault_Handler ; -13 Hard Fault Handler
DCD MemManage_Handler ; -12 MPU Fault Handler
DCD BusFault_Handler ; -11 Bus Fault Handler
DCD UsageFault_Handler ; -10 Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; -5 SVCall Handler
DCD DebugMon_Handler ; -4 Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; -2 PendSV Handler
DCD SysTick_Handler ; -1 SysTick Handler
; Interrupts
DCD Interrupt0_Handler ; 0 Interrupt 0
DCD Interrupt1_Handler ; 1 Interrupt 1
DCD Interrupt2_Handler ; 2 Interrupt 2
DCD Interrupt3_Handler ; 3 Interrupt 3
DCD Interrupt4_Handler ; 4 Interrupt 4
DCD Interrupt5_Handler ; 5 Interrupt 5
DCD Interrupt6_Handler ; 6 Interrupt 6
DCD Interrupt7_Handler ; 7 Interrupt 7
DCD Interrupt8_Handler ; 8 Interrupt 8
DCD Interrupt9_Handler ; 9 Interrupt 9
SPACE (214 * 4) ; Interrupts 10 .. 224 are left out
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; The default macro is not used for HardFault_Handler
; because this results in a poor debug illusion.
HardFault_Handler PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
; Macro to define default exception/interrupt handlers.
; Default handler are weak symbols with an endless loop.
; They can be overwritten by real handlers.
MACRO
Set_Default_Handler $Handler_Name
$Handler_Name PROC
EXPORT $Handler_Name [WEAK]
B .
ENDP
MEND
; Default exception/interrupt handler
Set_Default_Handler NMI_Handler
Set_Default_Handler MemManage_Handler
Set_Default_Handler BusFault_Handler
Set_Default_Handler UsageFault_Handler
Set_Default_Handler SVC_Handler
Set_Default_Handler DebugMon_Handler
Set_Default_Handler PendSV_Handler
Set_Default_Handler SysTick_Handler
Set_Default_Handler Interrupt0_Handler
Set_Default_Handler Interrupt1_Handler
Set_Default_Handler Interrupt2_Handler
Set_Default_Handler Interrupt3_Handler
Set_Default_Handler Interrupt4_Handler
Set_Default_Handler Interrupt5_Handler
Set_Default_Handler Interrupt6_Handler
Set_Default_Handler Interrupt7_Handler
Set_Default_Handler Interrupt8_Handler
Set_Default_Handler Interrupt9_Handler
ALIGN
; User setup Stack & Heap
IF :LNOT::DEF:__MICROLIB
IMPORT __use_two_region_memory
ENDIF
EXPORT __stack_limit
EXPORT __initial_sp
IF Heap_Size != 0 ; Heap is provided
EXPORT __heap_base
EXPORT __heap_limit
ENDIF
END

60
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/**************************************************************************//**
* @file system_ARMCM3.c
* @brief CMSIS Device System Source File for
* ARMCM3 Device
* @version V1.0.1
* @date 15. November 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "ARMCM3.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2U)
/*----------------------------------------------------------------------------
Exception / Interrupt Vector table
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
/*----------------------------------------------------------------------------
System Core Clock update function
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
/*----------------------------------------------------------------------------
System initialization function
*----------------------------------------------------------------------------*/
void SystemInit (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}

50
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/CMSDK_CM0/RTE_Device.h Normal file
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/* -----------------------------------------------------------------------------
* Copyright (c) 2016 ARM Ltd.
*
* This software is provided 'as-is', without any express or implied warranty.
* In no event will the authors be held liable for any damages arising from
* the use of this software. Permission is granted to anyone to use this
* software for any purpose, including commercial applications, and to alter
* it and redistribute it freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software in
* a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
*
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
*
* 3. This notice may not be removed or altered from any source distribution.
*
* $Date: 25. April 2016
* $Revision: V1.0.0
*
* Project: RTE Device Configuration for ARM CMSDK_CM device
* -------------------------------------------------------------------------- */
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
// <q> USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0]
// <i> Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART
#define RTE_USART0 1
// <q> USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1]
// <i> Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART
#define RTE_USART1 0
// <q> USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2]
// <i> Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART
#define RTE_UART2 0
// <q> USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3]
// <i> Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART
#define RTE_UART3 0
#endif /* __RTE_DEVICE_H */

267
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;/**************************************************************************//**
; * @file startup_CMSDK_CM0.s
; * @brief CMSIS Core Device Startup File for
; * CMSDK_CM0 Device
; * @version V3.05
; * @date 09. November 2016
; ******************************************************************************/
;/* Copyright (c) 2011 - 2016 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000C00
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD UART0RX_Handler ; 0 UART 0 receive interrupt
DCD UART0TX_Handler ; 1 UART 0 transmit interrupt
DCD UART1RX_Handler ; 2 UART 1 receive interrupt
DCD UART1TX_Handler ; 3 UART 1 transmit interrupt
DCD UART2RX_Handler ; 4 UART 2 receive interrupt
DCD UART2TX_Handler ; 5 UART 2 transmit interrupt
DCD GPIO0ALL_Handler ; 6 GPIO 0 combined interrupt
DCD GPIO1ALL_Handler ; 7 GPIO 1 combined interrupt
DCD TIMER0_Handler ; 8 Timer 0 interrupt
DCD TIMER1_Handler ; 9 Timer 1 interrupt
DCD DUALTIMER_Handler ; 10 Dual Timer interrupt
DCD SPI_0_1_Handler ; 11 SPI #0, #1 interrupt
DCD UART_0_1_2_OVF_Handler ; 12 UART overflow (0, 1 & 2) interrupt
DCD ETHERNET_Handler ; 13 Ethernet interrupt
DCD I2S_Handler ; 14 Audio I2S interrupt
DCD TOUCHSCREEN_Handler ; 15 Touch Screen interrupt
DCD GPIO2_Handler ; 16 GPIO 2 combined interrupt
DCD GPIO3_Handler ; 17 GPIO 3 combined interrupt
DCD UART3RX_Handler ; 18 UART 3 receive interrupt
DCD UART3TX_Handler ; 19 UART 3 transmit interrupt
DCD UART4RX_Handler ; 20 UART 4 receive interrupt
DCD UART4TX_Handler ; 21 UART 4 transmit interrupt
DCD SPI_2_Handler ; 22 SPI #2 interrupt
DCD SPI_3_4_Handler ; 23 SPI #3, SPI #4 interrupt
DCD GPIO0_0_Handler ; 24 GPIO 0 individual interrupt ( 0)
DCD GPIO0_1_Handler ; 25 GPIO 0 individual interrupt ( 1)
DCD GPIO0_2_Handler ; 26 GPIO 0 individual interrupt ( 2)
DCD GPIO0_3_Handler ; 27 GPIO 0 individual interrupt ( 3)
DCD GPIO0_4_Handler ; 28 GPIO 0 individual interrupt ( 4)
DCD GPIO0_5_Handler ; 29 GPIO 0 individual interrupt ( 5)
DCD GPIO0_6_Handler ; 30 GPIO 0 individual interrupt ( 6)
DCD GPIO0_7_Handler ; 31 GPIO 0 individual interrupt ( 7)
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT UART0RX_Handler [WEAK]
EXPORT UART0TX_Handler [WEAK]
EXPORT UART1RX_Handler [WEAK]
EXPORT UART1TX_Handler [WEAK]
EXPORT UART2RX_Handler [WEAK]
EXPORT UART2TX_Handler [WEAK]
EXPORT GPIO0ALL_Handler [WEAK]
EXPORT GPIO1ALL_Handler [WEAK]
EXPORT TIMER0_Handler [WEAK]
EXPORT TIMER1_Handler [WEAK]
EXPORT DUALTIMER_Handler [WEAK]
EXPORT SPI_0_1_Handler [WEAK]
EXPORT UART_0_1_2_OVF_Handler [WEAK]
EXPORT ETHERNET_Handler [WEAK]
EXPORT I2S_Handler [WEAK]
EXPORT TOUCHSCREEN_Handler [WEAK]
EXPORT GPIO2_Handler [WEAK]
EXPORT GPIO3_Handler [WEAK]
EXPORT UART3RX_Handler [WEAK]
EXPORT UART3TX_Handler [WEAK]
EXPORT UART4RX_Handler [WEAK]
EXPORT UART4TX_Handler [WEAK]
EXPORT SPI_2_Handler [WEAK]
EXPORT SPI_3_4_Handler [WEAK]
EXPORT GPIO0_0_Handler [WEAK]
EXPORT GPIO0_1_Handler [WEAK]
EXPORT GPIO0_2_Handler [WEAK]
EXPORT GPIO0_3_Handler [WEAK]
EXPORT GPIO0_4_Handler [WEAK]
EXPORT GPIO0_5_Handler [WEAK]
EXPORT GPIO0_6_Handler [WEAK]
EXPORT GPIO0_7_Handler [WEAK]
UART0RX_Handler
UART0TX_Handler
UART1RX_Handler
UART1TX_Handler
UART2RX_Handler
UART2TX_Handler
GPIO0ALL_Handler
GPIO1ALL_Handler
TIMER0_Handler
TIMER1_Handler
DUALTIMER_Handler
SPI_0_1_Handler
UART_0_1_2_OVF_Handler
ETHERNET_Handler
I2S_Handler
TOUCHSCREEN_Handler
GPIO2_Handler
GPIO3_Handler
UART3RX_Handler
UART3TX_Handler
UART4RX_Handler
UART4TX_Handler
SPI_2_Handler
SPI_3_4_Handler
GPIO0_0_Handler
GPIO0_1_Handler
GPIO0_2_Handler
GPIO0_3_Handler
GPIO0_4_Handler
GPIO0_5_Handler
GPIO0_6_Handler
GPIO0_7_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

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/**************************************************************************//**
* @file system_CMSDK_CM0.c
* @brief CMSIS Device System Source File for
* CMSDK_M0 Device
* @version V4.00
* @date 02. November 2015
******************************************************************************/
/* Copyright (c) 2011 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "CMSDK_CM0.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
void SystemInit (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}

50
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/CMSDK_CM3/RTE_Device.h Normal file
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/* -----------------------------------------------------------------------------
* Copyright (c) 2016 ARM Ltd.
*
* This software is provided 'as-is', without any express or implied warranty.
* In no event will the authors be held liable for any damages arising from
* the use of this software. Permission is granted to anyone to use this
* software for any purpose, including commercial applications, and to alter
* it and redistribute it freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software in
* a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
*
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
*
* 3. This notice may not be removed or altered from any source distribution.
*
* $Date: 25. April 2016
* $Revision: V1.0.0
*
* Project: RTE Device Configuration for ARM CMSDK_CM device
* -------------------------------------------------------------------------- */
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
// <q> USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0]
// <i> Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART
#define RTE_USART0 1
// <q> USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1]
// <i> Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART
#define RTE_USART1 0
// <q> USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2]
// <i> Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART
#define RTE_UART2 0
// <q> USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3]
// <i> Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART
#define RTE_UART3 0
#endif /* __RTE_DEVICE_H */

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bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/CMSDK_CM3/startup_CMSDK_CM3.s Normal file
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;/**************************************************************************//**
; * @file startup_CMSDK_CM3.s
; * @brief CMSIS Core Device Startup File for
; * CMSDK_CM3 Device
; * @version V3.05
; * @date 09. November 2016
; ******************************************************************************/
;/* Copyright (c) 2011 - 2016 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000C00
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD UART0RX_Handler ; 0 UART 0 receive interrupt
DCD UART0TX_Handler ; 1 UART 0 transmit interrupt
DCD UART1RX_Handler ; 2 UART 1 receive interrupt
DCD UART1TX_Handler ; 3 UART 1 transmit interrupt
DCD UART2RX_Handler ; 4 UART 2 receive interrupt
DCD UART2TX_Handler ; 5 UART 2 transmit interrupt
DCD GPIO0ALL_Handler ; 6 GPIO 0 combined interrupt
DCD GPIO1ALL_Handler ; 7 GPIO 1 combined interrupt
DCD TIMER0_Handler ; 8 Timer 0 interrupt
DCD TIMER1_Handler ; 9 Timer 1 interrupt
DCD DUALTIMER_Handler ; 10 Dual Timer interrupt
DCD SPI_0_1_Handler ; 11 SPI #0, #1 interrupt
DCD UART_0_1_2_OVF_Handler ; 12 UART overflow (0, 1 & 2) interrupt
DCD ETHERNET_Handler ; 13 Ethernet interrupt
DCD I2S_Handler ; 14 Audio I2S interrupt
DCD TOUCHSCREEN_Handler ; 15 Touch Screen interrupt
DCD GPIO2_Handler ; 16 GPIO 2 combined interrupt
DCD GPIO3_Handler ; 17 GPIO 3 combined interrupt
DCD UART3RX_Handler ; 18 UART 3 receive interrupt
DCD UART3TX_Handler ; 19 UART 3 transmit interrupt
DCD UART4RX_Handler ; 20 UART 4 receive interrupt
DCD UART4TX_Handler ; 21 UART 4 transmit interrupt
DCD SPI_2_Handler ; 22 SPI #2 interrupt
DCD SPI_3_4_Handler ; 23 SPI #3, SPI #4 interrupt
DCD GPIO0_0_Handler ; 24 GPIO 0 individual interrupt ( 0)
DCD GPIO0_1_Handler ; 25 GPIO 0 individual interrupt ( 1)
DCD GPIO0_2_Handler ; 26 GPIO 0 individual interrupt ( 2)
DCD GPIO0_3_Handler ; 27 GPIO 0 individual interrupt ( 3)
DCD GPIO0_4_Handler ; 28 GPIO 0 individual interrupt ( 4)
DCD GPIO0_5_Handler ; 29 GPIO 0 individual interrupt ( 5)
DCD GPIO0_6_Handler ; 30 GPIO 0 individual interrupt ( 6)
DCD GPIO0_7_Handler ; 31 GPIO 0 individual interrupt ( 7)
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT UART0RX_Handler [WEAK]
EXPORT UART0TX_Handler [WEAK]
EXPORT UART1RX_Handler [WEAK]
EXPORT UART1TX_Handler [WEAK]
EXPORT UART2RX_Handler [WEAK]
EXPORT UART2TX_Handler [WEAK]
EXPORT GPIO0ALL_Handler [WEAK]
EXPORT GPIO1ALL_Handler [WEAK]
EXPORT TIMER0_Handler [WEAK]
EXPORT TIMER1_Handler [WEAK]
EXPORT DUALTIMER_Handler [WEAK]
EXPORT SPI_0_1_Handler [WEAK]
EXPORT UART_0_1_2_OVF_Handler [WEAK]
EXPORT ETHERNET_Handler [WEAK]
EXPORT I2S_Handler [WEAK]
EXPORT TOUCHSCREEN_Handler [WEAK]
EXPORT GPIO2_Handler [WEAK]
EXPORT GPIO3_Handler [WEAK]
EXPORT UART3RX_Handler [WEAK]
EXPORT UART3TX_Handler [WEAK]
EXPORT UART4RX_Handler [WEAK]
EXPORT UART4TX_Handler [WEAK]
EXPORT SPI_2_Handler [WEAK]
EXPORT SPI_3_4_Handler [WEAK]
EXPORT GPIO0_0_Handler [WEAK]
EXPORT GPIO0_1_Handler [WEAK]
EXPORT GPIO0_2_Handler [WEAK]
EXPORT GPIO0_3_Handler [WEAK]
EXPORT GPIO0_4_Handler [WEAK]
EXPORT GPIO0_5_Handler [WEAK]
EXPORT GPIO0_6_Handler [WEAK]
EXPORT GPIO0_7_Handler [WEAK]
UART0RX_Handler
UART0TX_Handler
UART1RX_Handler
UART1TX_Handler
UART2RX_Handler
UART2TX_Handler
GPIO0ALL_Handler
GPIO1ALL_Handler
TIMER0_Handler
TIMER1_Handler
DUALTIMER_Handler
SPI_0_1_Handler
UART_0_1_2_OVF_Handler
ETHERNET_Handler
I2S_Handler
TOUCHSCREEN_Handler
GPIO2_Handler
GPIO3_Handler
UART3RX_Handler
UART3TX_Handler
UART4RX_Handler
UART4TX_Handler
SPI_2_Handler
SPI_3_4_Handler
GPIO0_0_Handler
GPIO0_1_Handler
GPIO0_2_Handler
GPIO0_3_Handler
GPIO0_4_Handler
GPIO0_5_Handler
GPIO0_6_Handler
GPIO0_7_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

65
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/**************************************************************************//**
* @file system_CMSDK_CM3.c
* @brief CMSIS Device System Source File for
* CMSDK_M3 Device
* @version V4.00
* @date 02. November 2015
******************************************************************************/
/* Copyright (c) 2011 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#include "CMSDK_CM3.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
void SystemInit (void)
{
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
SystemCoreClock = SYSTEM_CLOCK;
}

50
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/CMSDK_CM7_SP/RTE_Device.h Normal file
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/* -----------------------------------------------------------------------------
* Copyright (c) 2016 ARM Ltd.
*
* This software is provided 'as-is', without any express or implied warranty.
* In no event will the authors be held liable for any damages arising from
* the use of this software. Permission is granted to anyone to use this
* software for any purpose, including commercial applications, and to alter
* it and redistribute it freely, subject to the following restrictions:
*
* 1. The origin of this software must not be misrepresented; you must not
* claim that you wrote the original software. If you use this software in
* a product, an acknowledgment in the product documentation would be
* appreciated but is not required.
*
* 2. Altered source versions must be plainly marked as such, and must not be
* misrepresented as being the original software.
*
* 3. This notice may not be removed or altered from any source distribution.
*
* $Date: 25. April 2016
* $Revision: V1.0.0
*
* Project: RTE Device Configuration for ARM CMSDK_CM device
* -------------------------------------------------------------------------- */
//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
// <q> USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0]
// <i> Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART
#define RTE_USART0 1
// <q> USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1]
// <i> Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART
#define RTE_USART1 0
// <q> USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2]
// <i> Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART
#define RTE_UART2 0
// <q> USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3]
// <i> Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART
#define RTE_UART3 0
#endif /* __RTE_DEVICE_H */

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;/**************************************************************************//**
; * @file startup_CMSDK_CM7.s
; * @brief CMSIS Core Device Startup File for
; * CMSDK_CM7 Device
; * @version V3.05
; * @date 09. November 2016
; ******************************************************************************/
;/* Copyright (c) 2011 - 2016 ARM LIMITED
;
; All rights reserved.
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
; - Redistributions of source code must retain the above copyright
; notice, this list of conditions and the following disclaimer.
; - Redistributions in binary form must reproduce the above copyright
; notice, this list of conditions and the following disclaimer in the
; documentation and/or other materials provided with the distribution.
; - Neither the name of ARM nor the names of its contributors may be used
; to endorse or promote products derived from this software without
; specific prior written permission.
; *
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
; POSSIBILITY OF SUCH DAMAGE.
; ---------------------------------------------------------------------------*/
;/*
;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
;*/
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000C00
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD UART0RX_Handler ; 0 UART 0 receive interrupt
DCD UART0TX_Handler ; 1 UART 0 transmit interrupt
DCD UART1RX_Handler ; 2 UART 1 receive interrupt
DCD UART1TX_Handler ; 3 UART 1 transmit interrupt
DCD UART2RX_Handler ; 4 UART 2 receive interrupt
DCD UART2TX_Handler ; 5 UART 2 transmit interrupt
DCD GPIO0ALL_Handler ; 6 GPIO 0 combined interrupt
DCD GPIO1ALL_Handler ; 7 GPIO 1 combined interrupt
DCD TIMER0_Handler ; 8 Timer 0 interrupt
DCD TIMER1_Handler ; 9 Timer 1 interrupt
DCD DUALTIMER_Handler ; 10 Dual Timer interrupt
DCD SPI_0_1_Handler ; 11 SPI #0, #1 interrupt
DCD UART_0_1_2_OVF_Handler ; 12 UART overflow (0, 1 & 2) interrupt
DCD ETHERNET_Handler ; 13 Ethernet interrupt
DCD I2S_Handler ; 14 Audio I2S interrupt
DCD TOUCHSCREEN_Handler ; 15 Touch Screen interrupt
DCD GPIO2_Handler ; 16 GPIO 2 combined interrupt
DCD GPIO3_Handler ; 17 GPIO 3 combined interrupt
DCD UART3RX_Handler ; 18 UART 3 receive interrupt
DCD UART3TX_Handler ; 19 UART 3 transmit interrupt
DCD UART4RX_Handler ; 20 UART 4 receive interrupt
DCD UART4TX_Handler ; 21 UART 4 transmit interrupt
DCD SPI_2_Handler ; 22 SPI #2 interrupt
DCD SPI_3_4_Handler ; 23 SPI #3, SPI #4 interrupt
DCD GPIO0_0_Handler ; 24 GPIO 0 individual interrupt ( 0)
DCD GPIO0_1_Handler ; 25 GPIO 0 individual interrupt ( 1)
DCD GPIO0_2_Handler ; 26 GPIO 0 individual interrupt ( 2)
DCD GPIO0_3_Handler ; 27 GPIO 0 individual interrupt ( 3)
DCD GPIO0_4_Handler ; 28 GPIO 0 individual interrupt ( 4)
DCD GPIO0_5_Handler ; 29 GPIO 0 individual interrupt ( 5)
DCD GPIO0_6_Handler ; 30 GPIO 0 individual interrupt ( 6)
DCD GPIO0_7_Handler ; 31 GPIO 0 individual interrupt ( 7)
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT UART0RX_Handler [WEAK]
EXPORT UART0TX_Handler [WEAK]
EXPORT UART1RX_Handler [WEAK]
EXPORT UART1TX_Handler [WEAK]
EXPORT UART2RX_Handler [WEAK]
EXPORT UART2TX_Handler [WEAK]
EXPORT GPIO0ALL_Handler [WEAK]
EXPORT GPIO1ALL_Handler [WEAK]
EXPORT TIMER0_Handler [WEAK]
EXPORT TIMER1_Handler [WEAK]
EXPORT DUALTIMER_Handler [WEAK]
EXPORT SPI_0_1_Handler [WEAK]
EXPORT UART_0_1_2_OVF_Handler [WEAK]
EXPORT ETHERNET_Handler [WEAK]
EXPORT I2S_Handler [WEAK]
EXPORT TOUCHSCREEN_Handler [WEAK]
EXPORT GPIO2_Handler [WEAK]
EXPORT GPIO3_Handler [WEAK]
EXPORT UART3RX_Handler [WEAK]
EXPORT UART3TX_Handler [WEAK]
EXPORT UART4RX_Handler [WEAK]
EXPORT UART4TX_Handler [WEAK]
EXPORT SPI_2_Handler [WEAK]
EXPORT SPI_3_4_Handler [WEAK]
EXPORT GPIO0_0_Handler [WEAK]
EXPORT GPIO0_1_Handler [WEAK]
EXPORT GPIO0_2_Handler [WEAK]
EXPORT GPIO0_3_Handler [WEAK]
EXPORT GPIO0_4_Handler [WEAK]
EXPORT GPIO0_5_Handler [WEAK]
EXPORT GPIO0_6_Handler [WEAK]
EXPORT GPIO0_7_Handler [WEAK]
UART0RX_Handler
UART0TX_Handler
UART1RX_Handler
UART1TX_Handler
UART2RX_Handler
UART2TX_Handler
GPIO0ALL_Handler
GPIO1ALL_Handler
TIMER0_Handler
TIMER1_Handler
DUALTIMER_Handler
SPI_0_1_Handler
UART_0_1_2_OVF_Handler
ETHERNET_Handler
I2S_Handler
TOUCHSCREEN_Handler
GPIO2_Handler
GPIO3_Handler
UART3RX_Handler
UART3TX_Handler
UART4RX_Handler
UART4TX_Handler
SPI_2_Handler
SPI_3_4_Handler
GPIO0_0_Handler
GPIO0_1_Handler
GPIO0_2_Handler
GPIO0_3_Handler
GPIO0_4_Handler
GPIO0_5_Handler
GPIO0_6_Handler
GPIO0_7_Handler
B .
ENDP
ALIGN
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

77
bsp/pico/MDK/mdk/perf_counter/example/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c Normal file
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/**************************************************************************//**
* @file system_CMSDK_CM7.c
* @brief CMSIS Device System Source File for
* CMSDK_CM7 Device
* @version V4.00
* @date 02. November 2015
******************************************************************************/
/* Copyright (c) 2011 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined (CMSDK_CM7)
#include "CMSDK_CM7.h"
#elif defined (CMSDK_CM7_SP)
#include "CMSDK_CM7_SP.h"
#elif defined (CMSDK_CM7_DP)
#include "CMSDK_CM7_DP.h"
#else
#error device not specified!
#endif
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
void SystemInit (void)
{
#if (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */
(3UL << 11*2) ); /* set CP11 Full Access */
#endif
#ifdef UNALIGNED_SUPPORT_DISABLE
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif
SystemCoreClock = SYSTEM_CLOCK;
}

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/*
* Copyright (c) 2006-2019, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2017-07-24 Tanek the first version
* 2018-11-12 Ernest Chen modify copyright
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#define _SCB_BASE (0xE000E010UL)
#define _SYSTICK_CTRL (*(rt_uint32_t *)(_SCB_BASE + 0x0))
#define _SYSTICK_LOAD (*(rt_uint32_t *)(_SCB_BASE + 0x4))
#define _SYSTICK_VAL (*(rt_uint32_t *)(_SCB_BASE + 0x8))
#define _SYSTICK_CALIB (*(rt_uint32_t *)(_SCB_BASE + 0xC))
#define _SYSTICK_PRI (*(rt_uint8_t *)(0xE000ED23UL))
// Updates the variable SystemCoreClock and must be called
// whenever the core clock is changed during program execution.
extern void SystemCoreClockUpdate(void);
// Holds the system core clock, which is the system clock
// frequency supplied to the SysTick timer and the processor
// core clock.
extern uint32_t SystemCoreClock;
static uint32_t _SysTick_Config(rt_uint32_t ticks)
{
if ((ticks - 1) > 0xFFFFFF)
{
return 1;
}
_SYSTICK_LOAD = ticks - 1;
_SYSTICK_PRI = 0xFF;
_SYSTICK_VAL = 0;
_SYSTICK_CTRL = 0x07;
return 0;
}
#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
#define RT_HEAP_SIZE 1024
static uint32_t rt_heap[RT_HEAP_SIZE]; // heap default size: 4K(1024 * 4)
RT_WEAK void *rt_heap_begin_get(void)
{
return rt_heap;
}
RT_WEAK void *rt_heap_end_get(void)
{
return rt_heap + RT_HEAP_SIZE;
}
#endif
/**
* This function will initial your board.
*/
void rt_hw_board_init()
{
/* System Clock Update */
SystemCoreClockUpdate();
/* System Tick Configuration */
_SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
/* Call components board initial (use INIT_BOARD_EXPORT()) */
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
rt_system_heap_init(rt_heap_begin_get(), rt_heap_end_get());
#endif
}
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}

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/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
#if defined(__CC_ARM) || defined(__CLANG_ARM)
#include "RTE_Components.h"
#if defined(RTE_USING_FINSH)
#define RT_USING_FINSH
#endif //RTE_USING_FINSH
#endif //(__CC_ARM) || (__CLANG_ARM)
// <<< Use Configuration Wizard in Context Menu >>>
// <h>Basic Configuration
// <o>Maximal level of thread priority <8-256>
// <i>Default: 32
#define RT_THREAD_PRIORITY_MAX 8
// <o>OS tick per second
// <i>Default: 1000 (1ms)
#define RT_TICK_PER_SECOND 1000
// <o>Alignment size for CPU architecture data access
// <i>Default: 4
#define RT_ALIGN_SIZE 4
// <o>the max length of object name<2-16>
// <i>Default: 8
#define RT_NAME_MAX 8
// <c1>Using RT-Thread components initialization
// <i>Using RT-Thread components initialization
#define RT_USING_COMPONENTS_INIT
// </c>
#define RT_USING_USER_MAIN
// <o>the stack size of main thread<1-4086>
// <i>Default: 512
#define RT_MAIN_THREAD_STACK_SIZE 256
// </h>
// <h>Debug Configuration
// <c1>enable kernel debug configuration
// <i>Default: enable kernel debug configuration
//#define RT_DEBUG
// </c>
// <o>enable components initialization debug configuration<0-1>
// <i>Default: 0
#define RT_DEBUG_INIT 0
// <c1>thread stack over flow detect
// <i> Diable Thread stack over flow detect
//#define RT_USING_OVERFLOW_CHECK
// </c>
// </h>
// <h>Hook Configuration
// <c1>using hook
// <i>using hook
//#define RT_USING_HOOK
// </c>
// <c1>using idle hook
// <i>using idle hook
//#define RT_USING_IDLE_HOOK
// </c>
// </h>
// <e>Software timers Configuration
// <i> Enables user timers
#define RT_USING_TIMER_SOFT 0
#if RT_USING_TIMER_SOFT == 0
#undef RT_USING_TIMER_SOFT
#endif
// <o>The priority level of timer thread <0-31>
// <i>Default: 4
#define RT_TIMER_THREAD_PRIO 4
// <o>The stack size of timer thread <0-8192>
// <i>Default: 512
#define RT_TIMER_THREAD_STACK_SIZE 512
// </e>
// <h>IPC(Inter-process communication) Configuration
// <c1>Using Semaphore
// <i>Using Semaphore
#define RT_USING_SEMAPHORE
// </c>
// <c1>Using Mutex
// <i>Using Mutex
//#define RT_USING_MUTEX
// </c>
// <c1>Using Event
// <i>Using Event
//#define RT_USING_EVENT
// </c>
// <c1>Using MailBox
// <i>Using MailBox
#define RT_USING_MAILBOX
// </c>
// <c1>Using Message Queue
// <i>Using Message Queue
//#define RT_USING_MESSAGEQUEUE
// </c>
// </h>
// <h>Memory Management Configuration
// <c1>Dynamic Heap Management
// <i>Dynamic Heap Management
//#define RT_USING_HEAP
// </c>
// <c1>using small memory
// <i>using small memory
#define RT_USING_SMALL_MEM
// </c>
// <c1>using tiny size of memory
// <i>using tiny size of memory
//#define RT_USING_TINY_SIZE
// </c>
// </h>
// <h>Console Configuration
// <c1>Using console
// <i>Using console
#define RT_USING_CONSOLE
// </c>
// <o>the buffer size of console <1-1024>
// <i>the buffer size of console
// <i>Default: 128 (128Byte)
#define RT_CONSOLEBUF_SIZE 128
// </h>
#if defined(RT_USING_FINSH)
#define FINSH_USING_MSH
#define FINSH_USING_MSH_ONLY
// <h>Finsh Configuration
// <o>the priority of finsh thread <1-7>
// <i>the priority of finsh thread
// <i>Default: 6
#define __FINSH_THREAD_PRIORITY 5
#define FINSH_THREAD_PRIORITY (RT_THREAD_PRIORITY_MAX / 8 * __FINSH_THREAD_PRIORITY + 1)
// <o>the stack of finsh thread <1-4096>
// <i>the stack of finsh thread
// <i>Default: 4096 (4096Byte)
#define FINSH_THREAD_STACK_SIZE 512
// <o>the history lines of finsh thread <1-32>
// <i>the history lines of finsh thread
// <i>Default: 5
#define FINSH_HISTORY_LINES 1
#define FINSH_USING_SYMTAB
// </h>
#endif
// <<< end of configuration section >>>
#endif

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bsp/pico/MDK/mdk/perf_counter/example/copy.bat Normal file
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@copy /B /Y .\Out\*.lib ..\lib\
@copy /B /Y .\GCC_Out\*.a ..\lib\
@copy /B /Y ..\perf_counter.h ..\lib\

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bsp/pico/MDK/mdk/perf_counter/example/example.uvmpw Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectWorkspace xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_mpw.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<WorkspaceName>WorkSpace</WorkspaceName>
<project>
<PathAndName>.\example.uvprojx</PathAndName>
<NodeIsActive>1</NodeIsActive>
<NodeIsExpanded>1</NodeIsExpanded>
</project>
<project>
<PathAndName>.\gcc_example.uvprojx</PathAndName>
</project>
</ProjectWorkspace>

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296
bsp/pico/MDK/mdk/perf_counter/example/gcc/gcc_arm.ld Normal file
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/******************************************************************************
* @file gcc_arm.ld
* @brief GNU Linker Script for Cortex-M based device
* @version V2.1.0
* @date 04. August 2020
******************************************************************************/
/*
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
*-------- <<< Use Configuration Wizard in Context Menu >>> -------------------
*/
/*---------------------- Flash Configuration ----------------------------------
<h> Flash Configuration
<o0> Flash Base Address <0x0-0xFFFFFFFF:8>
<o1> Flash Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__ROM_BASE = 0x00000000;
__ROM_SIZE = 0x00040000;
/*--------------------- Embedded RAM Configuration ----------------------------
<h> RAM Configuration
<o0> RAM Base Address <0x0-0xFFFFFFFF:8>
<o1> RAM Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__RAM_BASE = 0x20000000;
__RAM_SIZE = 0x00020000;
/*--------------------- Stack / Heap Configuration ----------------------------
<h> Stack / Heap Configuration
<o0> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
<o1> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
</h>
-----------------------------------------------------------------------------*/
__STACK_SIZE = 0x00000400;
__HEAP_SIZE = 0x00000C00;
/*
*-------------------- <<< end of configuration section >>> -------------------
*/
MEMORY
{
FLASH (rx) : ORIGIN = __ROM_BASE, LENGTH = __ROM_SIZE
RAM (rwx) : ORIGIN = __RAM_BASE, LENGTH = __RAM_SIZE
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
/*
* SG veneers:
* All SG veneers are placed in the special output section .gnu.sgstubs. Its start address
* must be set, either with the command line option <20>--section-start<72> or in a linker script,
* to indicate where to place these veneers in memory.
*/
/*
.gnu.sgstubs :
{
. = ALIGN(32);
} > FLASH
*/
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
LONG ((__data_end__ - __data_start__) / 4)
/* Add each additional data section here */
/*
LONG (__etext2)
LONG (__data2_start__)
LONG ((__data2_end__ - __data2_start__) / 4)
*/
__copy_table_end__ = .;
} > FLASH
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
/* Add each additional bss section here */
/*
LONG (__bss2_start__)
LONG ((__bss2_end__ - __bss2_start__) / 4)
*/
__zero_table_end__ = .;
} > FLASH
/**
* Location counter can end up 2byte aligned with narrow Thumb code but
* __etext is assumed by startup code to be the LMA of a section in RAM
* which must be 4byte aligned
*/
__etext = ALIGN (4);
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data)
*(.data.*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
/*
* Secondary data section, optional
*
* Remember to add each additional data section
* to the .copy.table above to asure proper
* initialization during startup.
*/
/*
__etext2 = ALIGN (4);
.data2 : AT (__etext2)
{
. = ALIGN(4);
__data2_start__ = .;
*(.data2)
*(.data2.*)
. = ALIGN(4);
__data2_end__ = .;
} > RAM2
*/
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM AT > RAM
/*
* Secondary bss section, optional
*
* Remember to add each additional bss section
* to the .zero.table above to asure proper
* initialization during startup.
*/
/*
.bss2 :
{
. = ALIGN(4);
__bss2_start__ = .;
*(.bss2)
*(.bss2.*)
. = ALIGN(4);
__bss2_end__ = .;
} > RAM2 AT > RAM2
*/
.heap (COPY) :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
. = . + __HEAP_SIZE;
. = ALIGN(8);
__HeapLimit = .;
} > RAM
.stack (ORIGIN(RAM) + LENGTH(RAM) - __STACK_SIZE) (COPY) :
{
. = ALIGN(8);
__StackLimit = .;
. = . + __STACK_SIZE;
. = ALIGN(8);
__StackTop = .;
} > RAM
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

145
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/******************************************************************************
* @file startup_ARMCM0.c
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0 Device
* @version V2.0.3
* @date 31. March 2020
******************************************************************************/
/*
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "ARMCM0.h"
/*----------------------------------------------------------------------------
External References
*----------------------------------------------------------------------------*/
extern uint32_t __INITIAL_SP;
extern __NO_RETURN void __PROGRAM_START(void);
/*----------------------------------------------------------------------------
Internal References
*----------------------------------------------------------------------------*/
__NO_RETURN void Reset_Handler (void);
void Default_Handler(void);
/*----------------------------------------------------------------------------
Exception / Interrupt Handler
*----------------------------------------------------------------------------*/
/* Exceptions */
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void HardFault_Handler (void) __attribute__ ((weak));
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SysTick_Handler (void) __attribute__ ((weak));
void Interrupt0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt4_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt5_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt6_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt7_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt8_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void Interrupt9_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
/*----------------------------------------------------------------------------
Exception / Interrupt Vector table
*----------------------------------------------------------------------------*/
#if defined ( __GNUC__ )
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpedantic"
#endif
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
Reset_Handler, /* Reset Handler */
NMI_Handler, /* -14 NMI Handler */
HardFault_Handler, /* -13 Hard Fault Handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* -5 SVCall Handler */
0, /* Reserved */
0, /* Reserved */
PendSV_Handler, /* -2 PendSV Handler */
SysTick_Handler, /* -1 SysTick Handler */
/* Interrupts */
Interrupt0_Handler, /* 0 Interrupt 0 */
Interrupt1_Handler, /* 1 Interrupt 1 */
Interrupt2_Handler, /* 2 Interrupt 2 */
Interrupt3_Handler, /* 3 Interrupt 3 */
Interrupt4_Handler, /* 4 Interrupt 4 */
Interrupt5_Handler, /* 5 Interrupt 5 */
Interrupt6_Handler, /* 6 Interrupt 6 */
Interrupt7_Handler, /* 7 Interrupt 7 */
Interrupt8_Handler, /* 8 Interrupt 8 */
Interrupt9_Handler /* 9 Interrupt 9 */
/* Interrupts 10..31 are left out */
};
#if defined ( __GNUC__ )
#pragma GCC diagnostic pop
#endif
/*----------------------------------------------------------------------------
Reset Handler called on controller reset
*----------------------------------------------------------------------------*/
__NO_RETURN void Reset_Handler(void)
{
SystemInit(); /* CMSIS System Initialization */
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
}
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wmissing-noreturn"
#endif
/*----------------------------------------------------------------------------
Hard Fault Handler
*----------------------------------------------------------------------------*/
void HardFault_Handler(void)
{
while(1);
}
/*----------------------------------------------------------------------------
Default Handler for Exceptions / Interrupts
*----------------------------------------------------------------------------*/
void Default_Handler(void)
{
while(1);
}
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#endif

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/* File: startup_ARMCM7.S
* Purpose: startup file for Cortex-M7 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V2.0
* Date: 01 August 2014
*
* Copyright (c) 2011 - 2014 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified
.arch armv7e-m
.section .stack
.align 3
.equ Stack_Size, 0x0800
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
.equ Heap_Size, 0x0400
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word FMC_IRQHandler /* FMC */
.word SDMMC1_IRQHandler /* SDMMC1 */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
.word TIM7_IRQHandler /* TIM7 */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
.word OTG_HS_IRQHandler /* USB OTG HS */
.word DCMI_IRQHandler /* DCMI */
.word 0 /* Reserved */
.word RNG_IRQHandler /* Rng */
.word FPU_IRQHandler /* FPU */
.word UART7_IRQHandler /* UART7 */
.word UART8_IRQHandler /* UART8 */
.word SPI4_IRQHandler /* SPI4 */
.word SPI5_IRQHandler /* SPI5 */
.word SPI6_IRQHandler /* SPI6 */
.word SAI1_IRQHandler /* SAI1 */
.word LTDC_IRQHandler /* LTDC */
.word LTDC_ER_IRQHandler /* LTDC error */
.word DMA2D_IRQHandler /* DMA2D */
.word SAI2_IRQHandler /* SAI2 */
.word QUADSPI_IRQHandler /* QUADSPI */
.word LPTIM1_IRQHandler /* LPTIM1 */
.word CEC_IRQHandler /* HDMI_CEC */
.word I2C4_EV_IRQHandler /* I2C4 Event */
.word I2C4_ER_IRQHandler /* I2C4 Error */
.word SPDIF_RX_IRQHandler /* SPDIF_RX */
.long Default_Handler
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Firstly it copies data from read only memory to RAM. There are two schemes
* to copy. One can copy more than one sections. Another can only copy
* one section. The former scheme needs more instructions and read-only
* data to implement than the latter.
* Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
/* Single section scheme.
*
* The ranges of copy from/to are specified by following symbols
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.L_loop1:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .L_loop1
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.L_loop3:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .L_loop3
bl SystemInit
bl main
.pool
.size Reset_Handler, . - Reset_Handler
.align 1
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_irq_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler MemManage_Handler
def_irq_handler BusFault_Handler
def_irq_handler UsageFault_Handler
def_irq_handler SVC_Handler
def_irq_handler DebugMon_Handler
def_irq_handler PendSV_Handler
def_irq_handler SysTick_Handler
def_irq_handler DEF_IRQHandler
def_irq_handler WWDG_IRQHandler /* Window WatchDog */
def_irq_handler PVD_IRQHandler /* PVD through EXTI Line detection */
def_irq_handler TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
def_irq_handler RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
def_irq_handler FLASH_IRQHandler /* FLASH */
def_irq_handler RCC_IRQHandler /* RCC */
def_irq_handler EXTI0_IRQHandler /* EXTI Line0 */
def_irq_handler EXTI1_IRQHandler /* EXTI Line1 */
def_irq_handler EXTI2_IRQHandler /* EXTI Line2 */
def_irq_handler EXTI3_IRQHandler /* EXTI Line3 */
def_irq_handler EXTI4_IRQHandler /* EXTI Line4 */
def_irq_handler DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
def_irq_handler DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
def_irq_handler DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
def_irq_handler DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
def_irq_handler DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
def_irq_handler DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
def_irq_handler DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
def_irq_handler ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
def_irq_handler CAN1_TX_IRQHandler /* CAN1 TX */
def_irq_handler CAN1_RX0_IRQHandler /* CAN1 RX0 */
def_irq_handler CAN1_RX1_IRQHandler /* CAN1 RX1 */
def_irq_handler CAN1_SCE_IRQHandler /* CAN1 SCE */
def_irq_handler EXTI9_5_IRQHandler /* External Line[9:5]s */
def_irq_handler TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
def_irq_handler TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
def_irq_handler TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
def_irq_handler TIM1_CC_IRQHandler /* TIM1 Capture Compare */
def_irq_handler TIM2_IRQHandler /* TIM2 */
def_irq_handler TIM3_IRQHandler /* TIM3 */
def_irq_handler TIM4_IRQHandler /* TIM4 */
def_irq_handler I2C1_EV_IRQHandler /* I2C1 Event */
def_irq_handler I2C1_ER_IRQHandler /* I2C1 Error */
def_irq_handler I2C2_EV_IRQHandler /* I2C2 Event */
def_irq_handler I2C2_ER_IRQHandler /* I2C2 Error */
def_irq_handler SPI1_IRQHandler /* SPI1 */
def_irq_handler SPI2_IRQHandler /* SPI2 */
def_irq_handler USART1_IRQHandler /* USART1 */
def_irq_handler USART2_IRQHandler /* USART2 */
def_irq_handler USART3_IRQHandler /* USART3 */
def_irq_handler EXTI15_10_IRQHandler /* External Line[15:10]s */
def_irq_handler RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
def_irq_handler OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
def_irq_handler TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
def_irq_handler TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
def_irq_handler TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
def_irq_handler TIM8_CC_IRQHandler /* TIM8 Capture Compare */
def_irq_handler DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
def_irq_handler FMC_IRQHandler /* FMC */
def_irq_handler SDMMC1_IRQHandler /* SDMMC1 */
def_irq_handler TIM5_IRQHandler /* TIM5 */
def_irq_handler SPI3_IRQHandler /* SPI3 */
def_irq_handler UART4_IRQHandler /* UART4 */
def_irq_handler UART5_IRQHandler /* UART5 */
def_irq_handler TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
def_irq_handler TIM7_IRQHandler /* TIM7 */
def_irq_handler DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
def_irq_handler DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
def_irq_handler DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
def_irq_handler DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
def_irq_handler DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
def_irq_handler ETH_IRQHandler /* Ethernet */
def_irq_handler ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
def_irq_handler CAN2_TX_IRQHandler /* CAN2 TX */
def_irq_handler CAN2_RX0_IRQHandler /* CAN2 RX0 */
def_irq_handler CAN2_RX1_IRQHandler /* CAN2 RX1 */
def_irq_handler CAN2_SCE_IRQHandler /* CAN2 SCE */
def_irq_handler OTG_FS_IRQHandler /* USB OTG FS */
def_irq_handler DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
def_irq_handler DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
def_irq_handler DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
def_irq_handler USART6_IRQHandler /* USART6 */
def_irq_handler I2C3_EV_IRQHandler /* I2C3 event */
def_irq_handler I2C3_ER_IRQHandler /* I2C3 error */
def_irq_handler OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
def_irq_handler OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
def_irq_handler OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
def_irq_handler OTG_HS_IRQHandler /* USB OTG HS */
def_irq_handler DCMI_IRQHandler /* DCMI */
def_irq_handler RNG_IRQHandler /* Rng */
def_irq_handler FPU_IRQHandler /* FPU */
def_irq_handler UART7_IRQHandler /* UART7 */
def_irq_handler UART8_IRQHandler /* UART8 */
def_irq_handler SPI4_IRQHandler /* SPI4 */
def_irq_handler SPI5_IRQHandler /* SPI5 */
def_irq_handler SPI6_IRQHandler /* SPI6 */
def_irq_handler SAI1_IRQHandler /* SAI1 */
def_irq_handler LTDC_IRQHandler /* LTDC */
def_irq_handler LTDC_ER_IRQHandler /* LTDC error */
def_irq_handler DMA2D_IRQHandler /* DMA2D */
def_irq_handler SAI2_IRQHandler /* SAI2 */
def_irq_handler QUADSPI_IRQHandler /* QUADSPI */
def_irq_handler LPTIM1_IRQHandler /* LPTIM1 */
def_irq_handler CEC_IRQHandler /* HDMI_CEC */
def_irq_handler I2C4_EV_IRQHandler /* I2C4 Event */
def_irq_handler I2C4_ER_IRQHandler /* I2C4 Error */
def_irq_handler SPDIF_RX_IRQHandler /* SPDIF_RX */
.end

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bsp/pico/MDK/mdk/perf_counter/example/gcc/system_ARMCM0.c Normal file
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/**************************************************************************//**
* @file system_ARMCM0.c
* @brief CMSIS Device System Source File for
* ARMCM0 Device
* @version V1.0.0
* @date 09. July 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "ARMCM0.h"
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (50000000UL) /* Oscillator frequency */
#define SYSTEM_CLOCK (XTAL / 2U)
/*----------------------------------------------------------------------------
System Core Clock Variable
*----------------------------------------------------------------------------*/
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
/*----------------------------------------------------------------------------
System Core Clock update function
*----------------------------------------------------------------------------*/
void SystemCoreClockUpdate (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}
/*----------------------------------------------------------------------------
System initialization function
*----------------------------------------------------------------------------*/
void SystemInit (void)
{
SystemCoreClock = SYSTEM_CLOCK;
}

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bsp/pico/MDK/mdk/perf_counter/example/gcc_example.uvprojx Normal file
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>example</TargetName>
<ToolsetNumber>0x3</ToolsetNumber>
<ToolsetName>ARM-GNU</ToolsetName>
<uAC6>1</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>ARMCM0</Device>
<Vendor>ARM</Vendor>
<PackID>ARM.CMSIS.5.8.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile></SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\GCC_Out\</OutputDirectory>
<OutputName>gcc_example</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<ListingPath>.\GCC_Out\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<File>
<FileName>stdout_USART.c</FileName>
<FileType>1</FileType>
<FilePath>.\stdout_USART.c</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>perf_counter</GroupName>
<Files>
<File>
<FileName>perf_counter.c</FileName>
<FileType>1</FileType>
<FilePath>..\perf_counter.c</FilePath>
</File>
<File>
<FileName>perf_counter.h</FileName>
<FileType>5</FileType>
<FilePath>..\perf_counter.h</FilePath>
</File>
<File>
<FileName>systick_wrapper_gcc.s</FileName>
<FileType>2</FileType>
<FilePath>..\systick_wrapper_gcc.s</FilePath>
</File>
</Files>
</Group>
<Group>
<GroupName>::CMSIS</GroupName>
</Group>
<Group>
<GroupName>::Utilities</GroupName>
</Group>
</Groups>
</Target>
</Targets>
<RTE>
<apis/>
<components>
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.5.0" condition="ARMv6_7_8-M Device">
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
<targetInfos>
<targetInfo name="example"/>
<targetInfo name="gcc_lib"/>
</targetInfos>
</component>
<component Cclass="Utilities" Cgroup="Performance" Csub="perf_counter" Cvendor="GorgonMeducer" Cversion="1.6.1">
<package name="perf_counter" schemaVersion="1.4" url="https://github.com/GorgonMeducer/perf_counter/blob/main/cmsis-pack/" vendor="GorgonMeducer" version="1.6.1"/>
<targetInfos>
<targetInfo name="example"/>
<targetInfo name="gcc_lib"/>
</targetInfos>
</component>
</components>
<files>
<file attr="config" category="linkerScript" condition="GCC" name="Device\ARM\ARMCM0\Source\GCC\gcc_arm.ld" version="2.1.0">
<instance index="0" removed="1">RTE\Device\ARMCM0\gcc_arm.ld</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM0 CMSIS"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
<targetInfos/>
</file>
<file attr="config" category="sourceAsm" condition="GCC" name="Device\ARM\ARMCM0\Source\GCC\startup_ARMCM0.S" version="0.0.0">
<instance index="0" removed="1">RTE\Device\ARMCM0\startup_ARMCM0.S</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM0 CMSIS"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
<targetInfos/>
</file>
<file attr="config" category="sourceC" name="Device\ARM\ARMCM0\Source\system_ARMCM0.c" version="0.0.0">
<instance index="0" removed="1">RTE\Device\ARMCM0\system_ARMCM0.c</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="ARM" Cversion="1.2.2" condition="ARMCM0 CMSIS"/>
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.8.0"/>
<targetInfos/>
</file>
<file attr="config" category="header" name="CMSIS\Config\RTE_Device.h" version="0.0.0">
<instance index="0" removed="1">RTE\Device\CMSDK_CM3\RTE_Device.h</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="CMSDK_CM3 CMSIS"/>
<package name="V2M-MPS2_CMx_BSP" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="Keil" version="1.7.0"/>
<targetInfos/>
</file>
<file attr="config" category="source" name="Device\CMSDK_CM3\Source\system_CMSDK_CM3.c" version="0.0.0">
<instance index="0" removed="1">RTE\Device\CMSDK_CM3\system_CMSDK_CM3.c</instance>
<component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="CMSDK_CM3 CMSIS"/>
<package name="V2M-MPS2_CMx_BSP" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="Keil" version="1.7.0"/>
<targetInfos/>
</file>
</files>
</RTE>
<LayerInfo>
<Layers>
<Layer>
<LayName>gcc_example</LayName>
<LayPrjMark>1</LayPrjMark>
</Layer>
</Layers>
</LayerInfo>
</Project>

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
#include <stdint.h>
#include <stdio.h>
#include <cmsis_compiler.h>
#include "perf_counter.h"
#if defined(__clang__)
# pragma clang diagnostic ignored "-Wcompound-token-split-by-macro"
#elif defined(__IS_COMPILER_GCC__)
# pragma GCC diagnostic ignored "-Wpedantic"
#endif
#ifndef __PERF_CNT_USE_LONG_CLOCK__
#include <time.h>
#else
typedef int64_t clock_t ;
#endif
void systimer_1ms_handler(void)
{
//printf("Running original Systick_Handler...\r\n");
}
typedef struct example_lv1_t {
uint32_t wLV1A;
uint16_t hwLV1B;
uint8_t chLV1C;
}example_lv1_t;
typedef struct example_lv0_t {
uint32_t wA;
uint16_t hwB;
uint8_t chC;
uint8_t chID;
example_lv1_t tLV1;
} example_lv0_t;
example_lv0_t s_tItem[8] = {
{.chID = 0},
{.chID = 1},
{.chID = 2},
{.chID = 3},
{.chID = 4},
{.chID = 5},
{.chID = 6},
{.chID = 7},
};
/*----------------------------------------------------------------------------
Main function
*----------------------------------------------------------------------------*/
int main (void)
{
/*! demo of using() block */
using(int a = 0,printf("========= On Enter =======\r\n"),
printf("========= On Leave =======\r\n")) {
printf("\t In Body a=%d \r\n", ++a);
}
__cycleof__("Calibration") {}
printf("\r\n\r\n\r\n\r\n");
/*! demo of __cycleof__() operation */
__cycleof__() {
foreach(example_lv0_t, s_tItem, ptItem) {
printf("Processing item with ID = %d\r\n", _->chID);
}
}
int32_t iCycleResult = 0;
/* measure cycles and store it in a dedicated variable without printf */
__cycleof__("delay_us(1000ul)",
/* insert code to __cycleof__ body, "{}" can be omitted */
{
iCycleResult = __cycle_count__; /*< "__cycle_count__" stores the result */
}) {
delay_us(1000ul);
}
printf("\r\n delay_us(1000ul) takes %d cycles\r\n", (int)iCycleResult);
/*! demo of with block */
with(example_lv0_t, &s_tItem[0], pitem) {
_->wA = 1;
_->hwB = 2;
_->chC = 3;
with(example_lv1_t, &pitem->tLV1) {
_->wLV1A = 4;
_->hwLV1B = 5;
_->chLV1C = 6;
}
}
//! demo of using clock() in timer.h
do {
int64_t tStart = get_system_ticks();
__IRQ_SAFE {
printf("no interrupt \r\n");
}
printf("used clock cycle: %d", (int32_t)(get_system_ticks() - tStart));
} while(0);
while (1) {
printf("\r\nhello world\r\n");
delay_us(1000000);
}
}

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#include "perf_counter.h"
#include "ARMCM0.h" // Keil::Board Support:V2M-MPS2:Common
#include <assert.h>
extern
void uart_config(uint32_t wUARTFrequency);
__attribute__((weak))
void systimer_1ms_handler(void)
{
//assert(false);
}
static volatile uint32_t s_wMSCounter = 0;
/*----------------------------------------------------------------------------
SysTick / Timer0 IRQ Handler
*----------------------------------------------------------------------------*/
void SysTick_Handler (void)
{
if (s_wMSCounter) {
s_wMSCounter--;
}
systimer_1ms_handler();
}
void delay_ms(uint32_t wMillisecond)
{
s_wMSCounter = wMillisecond;
while( s_wMSCounter > 0 );
}
/*! \brief initialise platform before main()
*/
__attribute__((constructor(101)))
void platform_init(void)
{
SystemCoreClockUpdate();
uart_config(25000000ul);
/* Generate interrupt each 1 ms */
SysTick_Config(SystemCoreClock / 1000);
}

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include "cmsis_compiler.h"
/* IO definitions (access restrictions to peripheral registers) */
/**
\defgroup CMSIS_glob_defs CMSIS Global Defines
<strong>IO Type Qualifiers</strong> are used
\li to specify the access to peripheral variables.
\li for automatic generation of peripheral register debug information.
*/
#ifdef __cplusplus
#define __I volatile /*!< Defines 'read only' permissions */
#else
#define __I volatile const /*!< Defines 'read only' permissions */
#endif
#define __O volatile /*!< Defines 'write only' permissions */
#define __IO volatile /*!< Defines 'read / write' permissions */
/* following defines should be used for structure members */
#define __IM volatile const /*! Defines 'read only' structure member permissions */
#define __OM volatile /*! Defines 'write only' structure member permissions */
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/
typedef struct
{
__IOM uint32_t DATA; /* Offset: 0x000 (R/W) Data Register */
__IOM uint32_t STATE; /* Offset: 0x004 (R/W) Status Register */
__IOM uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register */
union {
__IM uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */
__OM uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */
};
__IOM uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */
} CMSDK_UART_TypeDef;
/* CMSDK_UART DATA Register Definitions */
#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position */
#define CMSDK_UART_DATA_Msk (0xFFUL /*<< CMSDK_UART_DATA_Pos*/) /* CMSDK_UART DATA: DATA Mask */
/* CMSDK_UART STATE Register Definitions */
#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position */
#define CMSDK_UART_STATE_RXOR_Msk (0x1UL << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask */
#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position */
#define CMSDK_UART_STATE_TXOR_Msk (0x1UL << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask */
#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position */
#define CMSDK_UART_STATE_RXBF_Msk (0x1UL << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask */
#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position */
#define CMSDK_UART_STATE_TXBF_Msk (0x1UL /*<< CMSDK_UART_STATE_TXBF_Pos*/) /* CMSDK_UART STATE: TXBF Mask */
/* CMSDK_UART CTRL Register Definitions */
#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position */
#define CMSDK_UART_CTRL_HSTM_Msk (0x01UL << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask */
#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position */
#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask */
#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position */
#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask */
#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position */
#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask */
#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position */
#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01UL << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask */
#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position */
#define CMSDK_UART_CTRL_RXEN_Msk (0x01UL << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask */
#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position */
#define CMSDK_UART_CTRL_TXEN_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXEN_Pos*/) /* CMSDK_UART CTRL: TXEN Mask */
#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos 3 /* CMSDK_UART CTRL: RXORIRQ Position */
#define CMSDK_UART_CTRL_RXORIRQ_Msk (0x01UL << CMSDK_UART_INTSTATUS_RXORIRQ_Pos) /* CMSDK_UART CTRL: RXORIRQ Mask */
#define CMSDK_UART_CTRL_TXORIRQ_Pos 2 /* CMSDK_UART CTRL: TXORIRQ Position */
#define CMSDK_UART_CTRL_TXORIRQ_Msk (0x01UL << CMSDK_UART_CTRL_TXORIRQ_Pos) /* CMSDK_UART CTRL: TXORIRQ Mask */
#define CMSDK_UART_CTRL_RXIRQ_Pos 1 /* CMSDK_UART CTRL: RXIRQ Position */
#define CMSDK_UART_CTRL_RXIRQ_Msk (0x01UL << CMSDK_UART_CTRL_RXIRQ_Pos) /* CMSDK_UART CTRL: RXIRQ Mask */
#define CMSDK_UART_CTRL_TXIRQ_Pos 0 /* CMSDK_UART CTRL: TXIRQ Position */
#define CMSDK_UART_CTRL_TXIRQ_Msk (0x01UL /*<< CMSDK_UART_CTRL_TXIRQ_Pos*/) /* CMSDK_UART CTRL: TXIRQ Mask */
/* CMSDK_UART BAUDDIV Register Definitions */
#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position */
#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFUL /*<< CMSDK_UART_BAUDDIV_Pos*/) /* CMSDK_UART BAUDDIV: BAUDDIV Mask */
/* ================================================================================ */
/* ================ Peripheral declaration ================ */
/* ================================================================================ */
//#define CMSDK_UART0_BASE_ADDRESS (0x41303000ul)
#define CMSDK_UART0_BASE_ADDRESS (0x40004000ul)
#define CMSDK_UART0 ((CMSDK_UART_TypeDef *) CMSDK_UART0_BASE_ADDRESS)
void uart_config(uint32_t wUARTFrequency)
{
CMSDK_UART0->CTRL = 0; /* Disable UART when changing configuration */
CMSDK_UART0->BAUDDIV = wUARTFrequency / 115200ul; /* 25MHz / 38400 = 651 */
CMSDK_UART0->CTRL = CMSDK_UART_CTRL_TXEN_Msk|CMSDK_UART_CTRL_RXEN_Msk;
}
char stdin_getchar(void)
{
while(!(CMSDK_UART0->STATE & CMSDK_UART_STATE_RXBF_Msk));
return (char)(CMSDK_UART0->DATA);
}
int stdout_putchar(char txchar)
{
if (txchar == 10) stdout_putchar((char) 13);
while(CMSDK_UART0->STATE & CMSDK_UART_STATE_TXBF_Msk);
CMSDK_UART0->DATA = (uint32_t)txchar;
return (int) txchar;
}
int _write (int fd, char *ptr, int len)
{
if (fd == 1) {
int n = len;
do {
stdout_putchar(*ptr++);
} while(--n);
return len;
}
return -1;
}
int stderr_putchar(char txchar)
{
return stdout_putchar(txchar);
}
void ttywrch (int ch)
{
stdout_putchar(ch);
}
#define log_str(...) \
do { \
const char *pchSrc = __VA_ARGS__; \
uint_fast16_t hwSize = sizeof(__VA_ARGS__); \
do { \
stdout_putchar(*pchSrc++); \
} while(--hwSize); \
} while(0)
__NO_RETURN
void _sys_exit(int n)
{
log_str("\r\n");
log_str("_[TEST COMPLETE]_________________________________________________\r\n");
log_str("\r\n\r\n");
while(1) {
__asm volatile ("nop");
}
}
#ifdef __MICROLIB
__NO_RETURN void exit(int n)
{
_sys_exit(n);
}
#endif

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#!/bin/bash
# Version: 1.1
# Date: 2020-04-29
# This bash script generates a CMSIS Software Pack:
#
# Pre-requisites:
# - bash shell (for Windows: install git for Windows)
# - 7z in path (zip archiving utility)
# e.g. Ubuntu: sudo apt-get install p7zip-full p7zip-rar)
# - PackChk in path with execute permission
# (see CMSIS-Pack: CMSIS/Utilities/<os>/PackChk)
# - xmllint in path (XML schema validation)
# e.g. Ubuntu: sudo apt-get install libxml2-utils
# Windows: download from https://www.zlatkovic.com/pub/libxml/
############### EDIT BELOW ###############
# Extend Path environment variable locally
#
if [ `uname -s` = "Linux" ]
then
CMSIS_PACK_PATH="/home/$USER/.arm/Packs/ARM/CMSIS/5.7.0/"
PATH_TO_ADD="$CMSIS_PACK_PATH/CMSIS/Utilities/Linux64/"
else
CMSIS_PACK_PATH="/C/Users/gabriel/AppData/Local/Arm/Packs/ARM/CMSIS/5.7.0"
PATH_TO_ADD="/C/Program Files (x86)/7-Zip/:$CMSIS_PACK_PATH/CMSIS/Utilities/Win32/:/C/xmllint/"
fi
[[ ":$PATH:" != *":$PATH_TO_ADD}:"* ]] && PATH="${PATH}:${PATH_TO_ADD}"
echo $PATH_TO_ADD appended to PATH
echo " "
# Pack warehouse directory - destination
PACK_WAREHOUSE=cmsis-pack/
# Temporary pack build directory
PACK_BUILD=build/
# Specify directories included in pack relative to base directory
# All directories:
# PACK_DIRS=`ls -d */`
# Do not include the build directory if it is local
# PACK_DIRS=${PACK_DIRS//$PACK_BUILD/}
# PACK_DIRS=${PACK_DIRS//$PACK_WAREHOUSE/}
# alternative: specify directory names to be added to pack base directory
PACK_DIRS="
lib
"
# Specify file names to be added to pack base directory
PACK_BASE_FILES="
perf_counter.c
perf_counter.h
systick_wrapper_gcc.s
systick_wrapper_ual.s
LICENSE
README.md
"
############ DO NOT EDIT BELOW ###########
echo Starting CMSIS-Pack Generation: `date`
# Zip utility check
ZIP=7z
type -a $ZIP
errorlevel=$?
if [ $errorlevel -gt 0 ]
then
echo "Error: No 7zip Utility found"
echo "Action: Add 7zip to your path"
echo " "
exit
fi
# Pack checking utility check
PACKCHK=PackChk
type -a $PACKCHK
errorlevel=$?
if [ $errorlevel != 0 ]
then
echo "Error: No PackChk Utility found"
echo "Action: Add PackChk to your path"
echo "Hint: Included in CMSIS Pack:"
echo "<pack_root_dir>/ARM/CMSIS/<version>/CMSIS/Utilities/<os>/"
echo " "
exit
fi
echo " "
# XML syntax checking utility check
XMLLINT=xmllint
type -a $XMLLINT
errorlevel=$?
if [ $errorlevel != 0 ]
then
echo "Error: No xmllint found"
echo "Action: Add xmllint to your path"
echo " "
exit
fi
echo " "
# Locate Package Description file
# check whether there is more than one pdsc file
NUM_PDSCS=`ls -1 *.pdsc | wc -l`
PACK_DESCRIPTION_FILE=`ls *.pdsc`
if [ $NUM_PDSCS -lt 1 ]
then
echo "Error: No *.pdsc file found in current directory"
echo " "
elif [ $NUM_PDSCS -gt 1 ]
then
echo "Error: Only one PDSC file allowed in directory structure:"
echo "Found:"
echo "$PACK_DESCRIPTION_FILE"
echo "Action: Delete unused pdsc files"
echo " "
exit
fi
SAVEIFS=$IFS
IFS=.
set $PACK_DESCRIPTION_FILE
# Pack Vendor
PACK_VENDOR=$1
# Pack Name
PACK_NAME=$2
echo Generating Pack Version: for $PACK_VENDOR.$PACK_NAME
echo " "
IFS=$SAVEIFS
#if $PACK_BUILD directory does not exist, create it.
if [ ! -d $PACK_BUILD ]; then
mkdir -p $PACK_BUILD
fi
# Copy files into build base directory: $PACK_BUILD
# pdsc file is mandatory in base directory:
cp -f ./$PACK_VENDOR.$PACK_NAME.pdsc ${PACK_BUILD}
# directories
echo Adding directories to pack:
echo $PACK_DIRS
echo " "
for d in ${PACK_DIRS}
do
cp -r "$d" ${PACK_BUILD}
done
# files for base directory
echo Adding files to pack:
echo $PACK_BASE_FILES
echo " "
for f in $PACK_BASE_FILES
do
cp -f "$f" $PACK_BUILD/
done
# Run Schema Check (for Linux only):
# sudo apt-get install libxml2-utils
echo Running schema check for $PACK_VENDOR.$PACK_NAME.pdsc
$XMLLINT --noout --schema ${CMSIS_PACK_PATH}/CMSIS/Utilities/PACK.xsd $PACK_BUILD/$PACK_VENDOR.$PACK_NAME.pdsc
errorlevel=$?
if [ $errorlevel -ne 0 ]; then
echo "build aborted: Schema check of $PACK_VENDOR.$PACK_NAME.pdsc against PACK.xsd failed"
echo " "
exit
fi
# Run Pack Check and generate PackName file with version
$PACKCHK $PACK_BUILD/$PACK_VENDOR.$PACK_NAME.pdsc -n PackName.txt -x M362
errorlevel=$?
if [ $errorlevel -ne 0 ]; then
echo "build aborted: pack check failed"
echo " "
exit
fi
PACKNAME=`cat PackName.txt`
rm -rf PackName.txt
# Archiving
# $ZIP a $PACKNAME
echo creating pack file $PACKNAME
#if $PACK_WAREHOUSE directory does not exist create it
if [ ! -d $PACK_WAREHOUSE ]; then
mkdir -p $PACK_WAREHOUSE
fi
pushd $PACK_WAREHOUSE
PACK_WAREHOUSE=`pwd`
popd
pushd $PACK_BUILD
"$ZIP" a $PACK_WAREHOUSE/$PACKNAME -tzip
popd
errorlevel=$?
if [ $errorlevel -ne 0 ]; then
echo "build aborted: archiving failed"
exit
fi
cp -f ./$PACK_VENDOR.$PACK_NAME.pdsc ${PACK_WAREHOUSE}
echo "build of pack succeeded"
# Clean up
echo "cleaning up ..."
rm -rf $PACK_BUILD
echo " "
echo Completed CMSIS-Pack Generation: `date`

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Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
#ifndef __PERFORMANCE_COUNTER_H__
#define __PERFORMANCE_COUNTER_H__
/*============================ INCLUDES ======================================*/
#include <stdbool.h>
#include <stdint.h>
#include <stddef.h>
/*============================ MACROS ========================================*/
//! \name The macros to identify the compiler
//! @{
//! \note for IAR
#ifdef __IS_COMPILER_IAR__
# undef __IS_COMPILER_IAR__
#endif
#if defined(__IAR_SYSTEMS_ICC__)
# define __IS_COMPILER_IAR__ 1
#endif
//! \note for arm compiler 5
#ifdef __IS_COMPILER_ARM_COMPILER_5__
# undef __IS_COMPILER_ARM_COMPILER_5__
#endif
#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000))
# define __IS_COMPILER_ARM_COMPILER_5__ 1
#endif
//! @}
//! \note for arm compiler 6
#ifdef __IS_COMPILER_ARM_COMPILER_6__
# undef __IS_COMPILER_ARM_COMPILER_6__
#endif
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
# define __IS_COMPILER_ARM_COMPILER_6__ 1
#endif
#ifdef __IS_COMPILER_LLVM__
# undef __IS_COMPILER_LLVM__
#endif
#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__
# define __IS_COMPILER_LLVM__ 1
#else
//! \note for gcc
# ifdef __IS_COMPILER_GCC__
# undef __IS_COMPILER_GCC__
# endif
# if defined(__GNUC__) && !( defined(__IS_COMPILER_ARM_COMPILER_5__) \
|| defined(__IS_COMPILER_ARM_COMPILER_6__) \
|| defined(__IS_COMPILER_LLVM__))
# define __IS_COMPILER_GCC__ 1
# endif
//! @}
#endif
//! @}
#ifndef __PLOOC_VA_NUM_ARGS_IMPL
# define __PLOOC_VA_NUM_ARGS_IMPL( _0,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,_11, \
_12,_13,_14,_15,_16,__N,...) __N
#endif
#ifndef __PLOOC_VA_NUM_ARGS
#define __PLOOC_VA_NUM_ARGS(...) \
__PLOOC_VA_NUM_ARGS_IMPL( 0,##__VA_ARGS__,16,15,14,13,12,11,10,9, \
8,7,6,5,4,3,2,1,0)
#endif
#if defined(__clang__)
//# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wcompound-token-split-by-macro"
#elif defined(__IS_COMPILER_GCC__)
//# pragma GCC diagnostic push
# pragma GCC diagnostic ignored "-Wpedantic"
#endif
#undef __CONNECT2
#undef __CONNECT3
#undef __CONNECT4
#undef __CONNECT5
#undef __CONNECT6
#undef __CONNECT7
#undef __CONNECT8
#undef __CONNECT9
#undef CONNECT2
#undef CONNECT3
#undef CONNECT4
#undef CONNECT5
#undef CONNECT6
#undef CONNECT7
#undef CONNECT8
#undef CONNECT9
#undef CONNECT
#define __CONNECT2(__A, __B) __A##__B
#define __CONNECT3(__A, __B, __C) __A##__B##__C
#define __CONNECT4(__A, __B, __C, __D) __A##__B##__C##__D
#define __CONNECT5(__A, __B, __C, __D, __E) __A##__B##__C##__D##__E
#define __CONNECT6(__A, __B, __C, __D, __E, __F) __A##__B##__C##__D##__E##__F
#define __CONNECT7(__A, __B, __C, __D, __E, __F, __G) \
__A##__B##__C##__D##__E##__F##__G
#define __CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H) \
__A##__B##__C##__D##__E##__F##__G##__H
#define __CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I) \
__A##__B##__C##__D##__E##__F##__G##__H##__I
#define CONNECT2(__A, __B) __CONNECT2(__A, __B)
#define CONNECT3(__A, __B, __C) __CONNECT3(__A, __B, __C)
#define CONNECT4(__A, __B, __C, __D) __CONNECT4(__A, __B, __C, __D)
#define CONNECT5(__A, __B, __C, __D, __E) __CONNECT5(__A, __B, __C, __D, __E)
#define CONNECT6(__A, __B, __C, __D, __E, __F) \
__CONNECT6(__A, __B, __C, __D, __E, __F)
#define CONNECT7(__A, __B, __C, __D, __E, __F, __G) \
__CONNECT7(__A, __B, __C, __D, __E, __F, __G)
#define CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H) \
__CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H)
#define CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I) \
__CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I)
#define CONNECT(...) \
CONNECT2(CONNECT, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef __using1
#undef __using2
#undef __using3
#undef __using4
#undef using
#define __using1(__declare) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL; \
)
#define __using2(__declare, __on_leave_expr) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL; \
(__on_leave_expr) \
)
#define __using3(__declare, __on_enter_expr, __on_leave_expr) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL ? \
((__on_enter_expr),1) : 0; \
(__on_leave_expr) \
)
#define __using4(__dcl1, __dcl2, __on_enter_expr, __on_leave_expr) \
for (__dcl1, __dcl2, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL ? \
((__on_enter_expr),1) : 0; \
(__on_leave_expr) \
)
#define using(...) \
CONNECT2(__using, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef __with2
#undef __with3
#undef with
#define __with2(__type, __addr) \
using(__type *_=(__addr))
#define __with3(__type, __addr, __item) \
using(__type *_=(__addr), *__item = _, _=_,_=_ )
#define with(...) \
CONNECT2(__with, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef _
#ifndef dimof
# define dimof(__array) (sizeof(__array)/sizeof(__array[0]))
#endif
#undef foreach2
#undef foreach3
#undef foreach
#define foreach2(__type, __array) \
using(__type *_ = __array) \
for ( uint_fast32_t CONNECT2(count,__LINE__) = dimof(__array); \
CONNECT2(count,__LINE__) > 0; \
_++, CONNECT2(count,__LINE__)-- \
)
#define foreach3(__type, __array, __item) \
using(__type *_ = __array, *__item = _, _ = _, _ = _ ) \
for ( uint_fast32_t CONNECT2(count,__LINE__) = dimof(__array); \
CONNECT2(count,__LINE__) > 0; \
_++, __item = _, CONNECT2(count,__LINE__)-- \
)
#define foreach(...) \
CONNECT2(foreach, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#ifndef safe_atom_code
# define safe_atom_code() \
using( uint32_t CONNECT2(temp,__LINE__) = \
({uint32_t temp=__get_PRIMASK();__disable_irq();temp;}),\
__set_PRIMASK(CONNECT2(temp,__LINE__)))
#endif
#ifndef __IRQ_SAFE
# define __IRQ_SAFE \
using( uint32_t CONNECT2(temp,__LINE__) = \
({uint32_t temp=__get_PRIMASK();__disable_irq();temp;}),\
__set_PRIMASK(CONNECT2(temp,__LINE__)))
#endif
/*============================ MACROFIED FUNCTIONS ===========================*/
#define __cycleof__(__STR, ...) \
using(int64_t _ = get_system_ticks(), __cycle_count__ = _, \
_=_, { \
_ = get_system_ticks() - _; \
if (__PLOOC_VA_NUM_ARGS(__VA_ARGS__) == 0) { \
printf("\r\n"); \
printf("-[Cycle Report]"); \
printf("--------------------------------------------\r\n"); \
printf(__STR " total cycle count: %d [%08x]\r\n", \
(int)_, (int)_); \
} else { \
__VA_ARGS__ \
}; \
})
/*============================ TYPES =========================================*/
/*============================ GLOBAL VARIABLES ==============================*/
/*============================ LOCAL VARIABLES ===============================*/
/*============================ PROTOTYPES ====================================*/
/*! \brief try to set a start pointer for the performance counter
*! \retval false the LOAD register is too small
*! \retval true performance counter starts
*/
extern bool start_cycle_counter(void);
/*! \brief calculate the elapsed cycle count since the last start point
*!
*! \note you can have multiple stop_cycle_counter following one start point
*!
*! \return the elapsed cycle count.
*/
extern int32_t stop_cycle_counter(void);
/* Function : delay specified us with the help from systick
*/
extern void delay_us(int32_t iUs);
/*! \note the prototype of this clock() is different from the one defined in
*! time.h. As clock_t is usually defined as unsigned int, it is
*! not big enough in Cortex-M system to hold a time-stamp. clock()
*! defined here returns the timestamp since the begining of main()
*! and its unit is clock cycle (rather than 1ms). Hence, for a system
*! running under several hundreds MHz or even 1GHz, e.g. RT10xx from
*! NXP, it is very easy to see a counter overflow as clock_t is
*! defined as uint32_t in timer.h.
*! Since we are not allowed to change the defintion of clock_t in
*! official header file, i.e. time.h, I use a compatible prototype
*! after I checked the AAPCS spec. So, the return of the clock() is
*! int64_t, which will use the R0 to store the lower 32bits and R1
*! to store the higher 32bits. When you are using the prototype from
*! timer.h, caller will only take the lower 32bits stored in R0 and
*! the higher 32bits stored in R1 will be ignored.
*!
*! If you want to use the non-overflow version of this clock(), please
*! 1) define the MACRO: __PERF_CNT_USE_LONG_CLOCK__ in your project
*! and 2) do not include system header file <time.h>
*!
*/
#ifdef __PERF_CNT_USE_LONG_CLOCK__
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
extern int64_t clock(void);
#endif
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
extern int64_t get_system_ticks(void);
/*----------------------------------------------------------------------------*
* Please ignore the following APIs unless you have encountered some known *
* special conditions *
*----------------------------------------------------------------------------*/
/*! \brief initialise cycle counter service
*! and don't forget to tell the function whether the systick is already
*! used by user applications.
*! Don't worry, this cycle counter service won't affect your existing
*! systick service.
*!
*! \note Usually the perf_counter can initialise itself with the help of
*! __attribute__((constructor(255))), this works fine in Arm Compiler
*! 5 (armcc), Arm Compiler 6 (armclang), arm gcc and llvm. It doesn't
*! work for IAR. So, when you are using IAR, please call this function
*! manually to initialise the perf_counter service.
*!
*! \note Perf_counter library assumes that:
*! a. Your project has already using SysTick
*! b. It assumes that you have already implemented the SysTick_Handler
*! c. It assumes that you have enabled the exception handling for
*! SysTick.
*! If these are not the case, please:
*! a. Add an empty SysTick_Handler to your project if you don't have
*! one
*! b. Make sure you have the SysTick Exception handling enabled
*! c. And call function init_cycle_counter(false) if you doesn't
*! use SysTick in your project at all.
*!
*! \param bSysTickIsOccupied A boolean value which indicates whether SysTick
*! is already used by user application.
*/
extern void init_cycle_counter(bool bSysTickIsOccupied);
/*! \note if you are using a compiler other than armcc or armclang, e.g. iar,
*! arm gcc etc, the systick_wrapper_ual.o doesn't work with the linker
*! of your target toolchain as it use the $Super$$ which is only supported
*! by armlink. For this condition, you have to manually put this function
*! into your existing SysTick_Handler to make the perf_counter library
*! work.
*!
*! \note if you are using Arm Compiler 5 (armcc) or Arm Compiler 6 (armclang)
*! you do NOT have to insert this function into your SysTick_Handler,
*! the systick_wrapper_ual.s will do the work for you.
*/
extern void user_code_insert_to_systick_handler(void);
//#if defined(__clang__)
//# pragma clang diagnostic pop
//#elif defined(__IS_COMPILER_GCC__)
//# pragma GCC diagnostic pop
//#endif
#endif

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View File

@ -0,0 +1,381 @@
/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
/*============================ INCLUDES ======================================*/
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include "cmsis_compiler.h"
#include "perf_counter.h"
#if defined(__IS_COMPILER_GCC__)
# pragma GCC diagnostic ignored "-Wattributes"
#endif
/*============================ MACROS ========================================*/
#ifndef PERF_CNT_COMPENSATION_THRESHOLD
# define PERF_CNT_COMPENSATION_THRESHOLD 16
#endif
#ifndef PERF_CNT_DELAY_US_COMPENSATION
# define PERF_CNT_DELAY_US_COMPENSATION 90
#endif
/* IO definitions (access restrictions to peripheral registers) */
/**
\defgroup CMSIS_glob_defs CMSIS Global Defines
<strong>IO Type Qualifiers</strong> are used
\li to specify the access to peripheral variables.
\li for automatic generation of peripheral register debug information.
*/
#ifdef __cplusplus
#define __I volatile /*!< Defines 'read only' permissions */
#else
#define __I volatile const /*!< Defines 'read only' permissions */
#endif
#define __O volatile /*!< Defines 'write only' permissions */
#define __IO volatile /*!< Defines 'read / write' permissions */
/* following defines should be used for structure members */
#define __IM volatile const /*! Defines 'read only' structure member permissions */
#define __OM volatile /*! Defines 'write only' structure member permissions */
#define __IOM volatile /*! Defines 'read / write' structure member permissions */
/* Memory mapping of Core Hardware */
#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */
#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */
#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */
#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */
#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */
#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */
#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */
#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */
#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */
#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */
#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */
#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */
#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */
#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */
/*@} end of group CMSIS_SysTick */
#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */
#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */
#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */
#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */
/*============================ MACROFIED FUNCTIONS ===========================*/
/*============================ TYPES =========================================*/
/*
\brief Structure type to access the System Timer (SysTick).
*/
typedef struct
{
__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */
__IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */
__IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */
__IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */
} SysTick_Type;
/*
\brief Structure type to access the System Control Block (SCB).
*/
typedef struct
{
__IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
__IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
__IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
__IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
__IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
__IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
__IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
__IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
__IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
__IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
__IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
__IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
__IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
__IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
__IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
__IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
__IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
__IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
__IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
uint32_t RESERVED0[5U];
__IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
} SCB_Type;
/*============================ GLOBAL VARIABLES ==============================*/
extern uint32_t SystemCoreClock;
/*============================ LOCAL VARIABLES ===============================*/
volatile static int32_t s_nCycleCounts = 0;
volatile static int32_t s_nOffset = 0;
volatile static int32_t s_nUnit = 1;
volatile static int64_t s_lSystemClockCounts = 0;
/*============================ PROTOTYPES ====================================*/
/*============================ IMPLEMENTATION ================================*/
/*============================ INCLUDES ======================================*/
/**
\brief System Tick Configuration
\details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
Counter is in free running mode to generate periodic interrupts.
\param [in] ticks Number of ticks between two interrupts.
\return 0 Function succeeded.
\return 1 Function failed.
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
{
return (1UL); /* Reload value impossible */
}
//__IRQ_SAFE {
SysTick->CTRL = 0;
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
//NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
//SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
//}
return (0UL); /* Function successful */
}
void user_code_insert_to_systick_handler(void)
{
uint32_t wLoad = SysTick->LOAD + 1;
s_nCycleCounts += wLoad;
s_lSystemClockCounts += wLoad;
}
/*! \brief initialise cycle counter service
*! and don't forget to tell the function whether the systick is already
*! used by user applications.
*! Don't worry, this cycle counter service won't affect your existing
*! systick service.
*! \param bSysTickIsOccupied A boolean value which indicates whether SysTick
*! is already used by user application.
*/
void init_cycle_counter(bool bSysTickIsOccupied)
{
__IRQ_SAFE {
if (!bSysTickIsOccupied) {
SysTick_Config(0x01000000); //!< use the longest period
}
SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
}
start_cycle_counter();
//s_nSystemClockCounts = s_nCycleCounts;
s_nOffset = stop_cycle_counter();
s_nUnit = SystemCoreClock / 1000000ul;
#if defined(__IS_COMPILER_ARM_COMPILER_5__) \
|| defined(__IS_COMPILER_ARM_COMPILER_6__) \
|| defined(__IS_COMPILER_GCC__)
extern void __ensure_systick_wrapper(void);
__ensure_systick_wrapper();
#endif
}
/*! \brief try to start the performance counter
*! \retval false the LOAD register is too small
*! \retval true performance counter starts
*/
bool start_cycle_counter(void)
{
if (SysTick->LOAD < PERF_CNT_COMPENSATION_THRESHOLD) {
return false;
}
__IRQ_SAFE {
s_nCycleCounts = (int32_t)SysTick->VAL - (int32_t)SysTick->LOAD;
}
return true;
}
/*! \note this function should only be called when irq is disabled
*! hence SysTick-LOAD and (SCB->ICSR & SCB_ICSR_PENDSTSET_Msk)
*! won't change.
*/
__STATIC_INLINE int32_t check_systick(void)
{
int32_t nTemp = (int32_t)SysTick->LOAD - (int32_t)SysTick->VAL;
/*! \note Since we cannot stop counting temporarily, there are several
*! conditions which we should take into consideration:
*! Condition 1: when assigning nTemp with the register value (LOAD-VAL),
*! the underflow didn't happen but when we check the PENDSTSET bit,
*! the underflow happens, for this condition, we should not
*! do any compensation. When this happens, the (LOAD-nTemp) is
*! smaller than PERF_CNT_COMPENSATION_THRESHOLD (a small value) as
*! long as LOAD is bigger than (or equals to) the
*! PERF_CNT_COMPENSATION_THRESHOLD;
*! Condition 2: when assigning nTemp with the register value (LOAD-VAL),
*! the VAL is zero and underflow happened and the PENDSTSET bit
*! is set, for this condition, we should not do any compensation.
*! When this happens, the (LOAD-nTemp) is equals to zero.
*! Condition 3: when assigning nTemp with the register value (LOAD-VAL),
*! the underflow has already happened, hence the PENDSTSET
*! is set, for this condition, we should compensate the return
*! value. When this happens, the (LOAD-nTemp) is bigger than (or
*! equals to) PERF_CNT_COMPENSATION_THRESHOLD.
*! The following code implements an equivalent logic.
*/
if (SCB->ICSR & SCB_ICSR_PENDSTSET_Msk){
if (((int32_t)SysTick->LOAD - nTemp) >= PERF_CNT_COMPENSATION_THRESHOLD) {
nTemp += SysTick->LOAD + 1;
}
}
return nTemp;
}
/*! \brief calculate the elapsed cycle count since the last start point
*!
*! \note you can have multiple stop_cycle_counter following one start point
*!
*! \return the elapsed cycle count.
*/
int32_t stop_cycle_counter(void)
{
int32_t nTemp = 0;
__IRQ_SAFE {
nTemp = check_systick() + s_nCycleCounts;
}
return nTemp - s_nOffset;
}
#if defined(__IS_COMPILER_IAR__)
__attribute__((constructor))
#else
__attribute__((constructor(255)))
#endif
void __perf_counter_init(void)
{
init_cycle_counter(true);
}
void delay_us(int32_t nUs)
{
int64_t lUs = nUs * s_nUnit;
if (lUs <= PERF_CNT_DELAY_US_COMPENSATION) {
return ;
}
lUs -= PERF_CNT_DELAY_US_COMPENSATION;
lUs += get_system_ticks();
while(get_system_ticks() < lUs);
}
/*! \note the prototype of this clock() is different from the one defined in
*! time.h. As clock_t is usually defined as unsigned int, it is
*! not big enough in Cortex-M system to hold a time-stamp. clock()
*! defined here returns the timestamp since the begining of main()
*! and its unit is clock cycle (rather than 1ms). Hence, for a system
*! running under several hundreds MHz or even 1GHz, e.g. RT10xx from
*! NXP, it is very easy to see a counter overflow as clock_t is
*! defined as uint32_t in timer.h.
*! Since we are not allowed to change the defintion of clock_t in
*! official header file, i.e. time.h, I use a compatible prototype
*! after I checked the AAPCS spec. So, the return of the clock() is
*! int64_t, which will use the R0 to store the lower 32bits and R1
*! to store the higher 32bits. When you are using the prototype from
*! timer.h, caller will only take the lower 32bits stored in R0 and
*! the higher 32bits stored in R1 will be ignored.
*!
*! If you want to use the non-overflow version of this clock(), please
*! 1) define the MACRO: __PERF_CNT_USE_LONG_CLOCK__ in your project
*! and 2) do not include system header file <time.h>
*!
*/
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
int64_t clock(void)
{
int64_t lTemp = 0;
__IRQ_SAFE {
lTemp = check_systick() + s_lSystemClockCounts;
}
return lTemp;
}
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
int64_t get_system_ticks(void)
{
int64_t lTemp = 0;
__IRQ_SAFE {
lTemp = check_systick() + s_lSystemClockCounts;
}
return lTemp;
}

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
#ifndef __PERFORMANCE_COUNTER_H__
#define __PERFORMANCE_COUNTER_H__
/*============================ INCLUDES ======================================*/
#include <stdbool.h>
#include <stdint.h>
#include <stddef.h>
/*============================ MACROS ========================================*/
//! \name The macros to identify the compiler
//! @{
//! \note for IAR
#ifdef __IS_COMPILER_IAR__
# undef __IS_COMPILER_IAR__
#endif
#if defined(__IAR_SYSTEMS_ICC__)
# define __IS_COMPILER_IAR__ 1
#endif
//! \note for arm compiler 5
#ifdef __IS_COMPILER_ARM_COMPILER_5__
# undef __IS_COMPILER_ARM_COMPILER_5__
#endif
#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000))
# define __IS_COMPILER_ARM_COMPILER_5__ 1
#endif
//! @}
//! \note for arm compiler 6
#ifdef __IS_COMPILER_ARM_COMPILER_6__
# undef __IS_COMPILER_ARM_COMPILER_6__
#endif
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
# define __IS_COMPILER_ARM_COMPILER_6__ 1
#endif
#ifdef __IS_COMPILER_LLVM__
# undef __IS_COMPILER_LLVM__
#endif
#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__
# define __IS_COMPILER_LLVM__ 1
#else
//! \note for gcc
# ifdef __IS_COMPILER_GCC__
# undef __IS_COMPILER_GCC__
# endif
# if defined(__GNUC__) && !( defined(__IS_COMPILER_ARM_COMPILER_5__) \
|| defined(__IS_COMPILER_ARM_COMPILER_6__) \
|| defined(__IS_COMPILER_LLVM__))
# define __IS_COMPILER_GCC__ 1
# endif
//! @}
#endif
//! @}
#ifndef __PLOOC_VA_NUM_ARGS_IMPL
# define __PLOOC_VA_NUM_ARGS_IMPL( _0,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,_11, \
_12,_13,_14,_15,_16,__N,...) __N
#endif
#ifndef __PLOOC_VA_NUM_ARGS
#define __PLOOC_VA_NUM_ARGS(...) \
__PLOOC_VA_NUM_ARGS_IMPL( 0,##__VA_ARGS__,16,15,14,13,12,11,10,9, \
8,7,6,5,4,3,2,1,0)
#endif
#if defined(__clang__)
//# pragma clang diagnostic push
# pragma clang diagnostic ignored "-Wcompound-token-split-by-macro"
#elif defined(__IS_COMPILER_GCC__)
//# pragma GCC diagnostic push
# pragma GCC diagnostic ignored "-Wpedantic"
#endif
#undef __CONNECT2
#undef __CONNECT3
#undef __CONNECT4
#undef __CONNECT5
#undef __CONNECT6
#undef __CONNECT7
#undef __CONNECT8
#undef __CONNECT9
#undef CONNECT2
#undef CONNECT3
#undef CONNECT4
#undef CONNECT5
#undef CONNECT6
#undef CONNECT7
#undef CONNECT8
#undef CONNECT9
#undef CONNECT
#define __CONNECT2(__A, __B) __A##__B
#define __CONNECT3(__A, __B, __C) __A##__B##__C
#define __CONNECT4(__A, __B, __C, __D) __A##__B##__C##__D
#define __CONNECT5(__A, __B, __C, __D, __E) __A##__B##__C##__D##__E
#define __CONNECT6(__A, __B, __C, __D, __E, __F) __A##__B##__C##__D##__E##__F
#define __CONNECT7(__A, __B, __C, __D, __E, __F, __G) \
__A##__B##__C##__D##__E##__F##__G
#define __CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H) \
__A##__B##__C##__D##__E##__F##__G##__H
#define __CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I) \
__A##__B##__C##__D##__E##__F##__G##__H##__I
#define CONNECT2(__A, __B) __CONNECT2(__A, __B)
#define CONNECT3(__A, __B, __C) __CONNECT3(__A, __B, __C)
#define CONNECT4(__A, __B, __C, __D) __CONNECT4(__A, __B, __C, __D)
#define CONNECT5(__A, __B, __C, __D, __E) __CONNECT5(__A, __B, __C, __D, __E)
#define CONNECT6(__A, __B, __C, __D, __E, __F) \
__CONNECT6(__A, __B, __C, __D, __E, __F)
#define CONNECT7(__A, __B, __C, __D, __E, __F, __G) \
__CONNECT7(__A, __B, __C, __D, __E, __F, __G)
#define CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H) \
__CONNECT8(__A, __B, __C, __D, __E, __F, __G, __H)
#define CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I) \
__CONNECT9(__A, __B, __C, __D, __E, __F, __G, __H, __I)
#define CONNECT(...) \
CONNECT2(CONNECT, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef __using1
#undef __using2
#undef __using3
#undef __using4
#undef using
#define __using1(__declare) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL; \
)
#define __using2(__declare, __on_leave_expr) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL; \
(__on_leave_expr) \
)
#define __using3(__declare, __on_enter_expr, __on_leave_expr) \
for (__declare, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL ? \
((__on_enter_expr),1) : 0; \
(__on_leave_expr) \
)
#define __using4(__dcl1, __dcl2, __on_enter_expr, __on_leave_expr) \
for (__dcl1, __dcl2, *CONNECT3(__using_, __LINE__,_ptr) = NULL; \
CONNECT3(__using_, __LINE__,_ptr)++ == NULL ? \
((__on_enter_expr),1) : 0; \
(__on_leave_expr) \
)
#define using(...) \
CONNECT2(__using, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef __with2
#undef __with3
#undef with
#define __with2(__type, __addr) \
using(__type *_=(__addr))
#define __with3(__type, __addr, __item) \
using(__type *_=(__addr), *__item = _, _=_,_=_ )
#define with(...) \
CONNECT2(__with, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#undef _
#ifndef dimof
# define dimof(__array) (sizeof(__array)/sizeof(__array[0]))
#endif
#undef foreach2
#undef foreach3
#undef foreach
#define foreach2(__type, __array) \
using(__type *_ = __array) \
for ( uint_fast32_t CONNECT2(count,__LINE__) = dimof(__array); \
CONNECT2(count,__LINE__) > 0; \
_++, CONNECT2(count,__LINE__)-- \
)
#define foreach3(__type, __array, __item) \
using(__type *_ = __array, *__item = _, _ = _, _ = _ ) \
for ( uint_fast32_t CONNECT2(count,__LINE__) = dimof(__array); \
CONNECT2(count,__LINE__) > 0; \
_++, __item = _, CONNECT2(count,__LINE__)-- \
)
#define foreach(...) \
CONNECT2(foreach, __PLOOC_VA_NUM_ARGS(__VA_ARGS__))(__VA_ARGS__)
#ifndef safe_atom_code
# define safe_atom_code() \
using( uint32_t CONNECT2(temp,__LINE__) = \
({uint32_t temp=__get_PRIMASK();__disable_irq();temp;}),\
__set_PRIMASK(CONNECT2(temp,__LINE__)))
#endif
#ifndef __IRQ_SAFE
# define __IRQ_SAFE \
using( uint32_t CONNECT2(temp,__LINE__) = \
({uint32_t temp=__get_PRIMASK();__disable_irq();temp;}),\
__set_PRIMASK(CONNECT2(temp,__LINE__)))
#endif
/*============================ MACROFIED FUNCTIONS ===========================*/
#define __cycleof__(__STR, ...) \
using(int64_t _ = get_system_ticks(), __cycle_count__ = _, \
_=_, { \
_ = get_system_ticks() - _; \
if (__PLOOC_VA_NUM_ARGS(__VA_ARGS__) == 0) { \
printf("\r\n"); \
printf("-[Cycle Report]"); \
printf("--------------------------------------------\r\n"); \
printf(__STR " total cycle count: %d [%08x]\r\n", \
(int)_, (int)_); \
} else { \
__VA_ARGS__ \
}; \
})
/*============================ TYPES =========================================*/
/*============================ GLOBAL VARIABLES ==============================*/
/*============================ LOCAL VARIABLES ===============================*/
/*============================ PROTOTYPES ====================================*/
/*! \brief try to set a start pointer for the performance counter
*! \retval false the LOAD register is too small
*! \retval true performance counter starts
*/
extern bool start_cycle_counter(void);
/*! \brief calculate the elapsed cycle count since the last start point
*!
*! \note you can have multiple stop_cycle_counter following one start point
*!
*! \return the elapsed cycle count.
*/
extern int32_t stop_cycle_counter(void);
/* Function : delay specified us with the help from systick
*/
extern void delay_us(int32_t iUs);
/*! \note the prototype of this clock() is different from the one defined in
*! time.h. As clock_t is usually defined as unsigned int, it is
*! not big enough in Cortex-M system to hold a time-stamp. clock()
*! defined here returns the timestamp since the begining of main()
*! and its unit is clock cycle (rather than 1ms). Hence, for a system
*! running under several hundreds MHz or even 1GHz, e.g. RT10xx from
*! NXP, it is very easy to see a counter overflow as clock_t is
*! defined as uint32_t in timer.h.
*! Since we are not allowed to change the defintion of clock_t in
*! official header file, i.e. time.h, I use a compatible prototype
*! after I checked the AAPCS spec. So, the return of the clock() is
*! int64_t, which will use the R0 to store the lower 32bits and R1
*! to store the higher 32bits. When you are using the prototype from
*! timer.h, caller will only take the lower 32bits stored in R0 and
*! the higher 32bits stored in R1 will be ignored.
*!
*! If you want to use the non-overflow version of this clock(), please
*! 1) define the MACRO: __PERF_CNT_USE_LONG_CLOCK__ in your project
*! and 2) do not include system header file <time.h>
*!
*/
#ifdef __PERF_CNT_USE_LONG_CLOCK__
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
extern int64_t clock(void);
#endif
#if !defined(__IS_COMPILER_IAR__)
__attribute__((nothrow))
#endif
extern int64_t get_system_ticks(void);
/*----------------------------------------------------------------------------*
* Please ignore the following APIs unless you have encountered some known *
* special conditions *
*----------------------------------------------------------------------------*/
/*! \brief initialise cycle counter service
*! and don't forget to tell the function whether the systick is already
*! used by user applications.
*! Don't worry, this cycle counter service won't affect your existing
*! systick service.
*!
*! \note Usually the perf_counter can initialise itself with the help of
*! __attribute__((constructor(255))), this works fine in Arm Compiler
*! 5 (armcc), Arm Compiler 6 (armclang), arm gcc and llvm. It doesn't
*! work for IAR. So, when you are using IAR, please call this function
*! manually to initialise the perf_counter service.
*!
*! \note Perf_counter library assumes that:
*! a. Your project has already using SysTick
*! b. It assumes that you have already implemented the SysTick_Handler
*! c. It assumes that you have enabled the exception handling for
*! SysTick.
*! If these are not the case, please:
*! a. Add an empty SysTick_Handler to your project if you don't have
*! one
*! b. Make sure you have the SysTick Exception handling enabled
*! c. And call function init_cycle_counter(false) if you doesn't
*! use SysTick in your project at all.
*!
*! \param bSysTickIsOccupied A boolean value which indicates whether SysTick
*! is already used by user application.
*/
extern void init_cycle_counter(bool bSysTickIsOccupied);
/*! \note if you are using a compiler other than armcc or armclang, e.g. iar,
*! arm gcc etc, the systick_wrapper_ual.o doesn't work with the linker
*! of your target toolchain as it use the $Super$$ which is only supported
*! by armlink. For this condition, you have to manually put this function
*! into your existing SysTick_Handler to make the perf_counter library
*! work.
*!
*! \note if you are using Arm Compiler 5 (armcc) or Arm Compiler 6 (armclang)
*! you do NOT have to insert this function into your SysTick_Handler,
*! the systick_wrapper_ual.s will do the work for you.
*/
extern void user_code_insert_to_systick_handler(void);
//#if defined(__clang__)
//# pragma clang diagnostic pop
//#elif defined(__IS_COMPILER_GCC__)
//# pragma GCC diagnostic pop
//#endif
#endif

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;/****************************************************************************
;* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
;* *
;* Licensed under the Apache License, Version 2.0 (the "License"); *
;* you may not use this file except in compliance with the License. *
;* You may obtain a copy of the License at *
;* *
;* http://www.apache.org/licenses/LICENSE-2.0 *
;* *
;* Unless required by applicable law or agreed to in writing, software *
;* distributed under the License is distributed on an "AS IS" BASIS, *
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
;* See the License for the specific language governing permissions and *
;* limitations under the License. *
;* *
;****************************************************************************/
.syntax unified
.arch armv6-m
.text
.thumb
.thumb_func
.align 2
.globl __wrap_SysTick_Handler
.type __wrap_SysTick_Handler, %function
__wrap_SysTick_Handler:
push {r4, r5}
push {r4, lr}
ldr R0, =user_code_insert_to_systick_handler
blx R0
pop {r4, r5}
mov lr, r5
pop {r4, r5}
ldr R0, =__real_SysTick_Handler
bx R0
.globl __ensure_systick_wrapper
.type __ensure_systick_wrapper, %function
__ensure_systick_wrapper:
bx lr

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;/****************************************************************************
;* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
;* *
;* Licensed under the Apache License, Version 2.0 (the "License"); *
;* you may not use this file except in compliance with the License. *
;* You may obtain a copy of the License at *
;* *
;* http://www.apache.org/licenses/LICENSE-2.0 *
;* *
;* Unless required by applicable law or agreed to in writing, software *
;* distributed under the License is distributed on an "AS IS" BASIS, *
;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
;* See the License for the specific language governing permissions and *
;* limitations under the License. *
;* *
;****************************************************************************/
PRESERVE8
THUMB
AREA |.text|, CODE, READONLY
|$Sub$$SysTick_Handler| PROC
EXPORT |$Sub$$SysTick_Handler|
IMPORT user_code_insert_to_systick_handler
IMPORT |$Super$$SysTick_Handler|
push {r4, r5}
push {r4, lr}
LDR R0, =user_code_insert_to_systick_handler
BLX R0
pop {r4, r5}
mov lr, r5
pop {r4, r5}
LDR R0, =|$Super$$SysTick_Handler|
BX R0
ENDP
ALIGN
AREA |.text|, CODE, READONLY
__ensure_systick_wrapper PROC
EXPORT __ensure_systick_wrapper
NOP
BX LR
ENDP
END

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/******************************************************************************
* @file startup_ARMCM0plus.c
* @brief CMSIS-Core(M) Device Startup File for a Cortex-M0+ Device
* @version V2.0.3
* @date 31. March 2020
******************************************************************************/
/*
* Copyright (c) 2009-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "RP2040.h"
/*----------------------------------------------------------------------------
External References
*----------------------------------------------------------------------------*/
extern uint32_t __INITIAL_SP;
extern __NO_RETURN void __PROGRAM_START(void);
/*----------------------------------------------------------------------------
Internal References
*----------------------------------------------------------------------------*/
__NO_RETURN void Reset_Handler (void);
void Default_Handler(void);
/*----------------------------------------------------------------------------
Exception / Interrupt Handler
*----------------------------------------------------------------------------*/
/* Exceptions */
void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void HardFault_Handler (void) __attribute__ ((weak));
void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER_IRQ_0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER_IRQ_1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER_IRQ_2_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void TIMER_IRQ_3_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PWM_IRQ_WRAP_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void USBCTRL_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void XIP_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PIO0_IRQ_0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PIO0_IRQ_1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PIO1_IRQ_0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void PIO1_IRQ_1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void DMA_IRQ_0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void DMA_IRQ_1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void IO_IRQ_BANK0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void IO_IRQ_QSPI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SIO_IRQ_PROC0_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SIO_IRQ_PROC1_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void CLOCKS_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SPI0_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void SPI1_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void UART0_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void UART1_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void ADC_IRQ_FIFO_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void I2C0_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void I2C1_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
void RTC_IRQ_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
/*----------------------------------------------------------------------------
Exception / Interrupt Vector table
*----------------------------------------------------------------------------*/
#if defined ( __GNUC__ )
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wpedantic"
#endif
extern const VECTOR_TABLE_Type __VECTOR_TABLE[48];
__attribute__((aligned(256)))
const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE = {
(VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
Reset_Handler, /* Reset Handler */
NMI_Handler, /* -14 NMI Handler */
HardFault_Handler, /* -13 Hard Fault Handler */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
0, /* Reserved */
SVC_Handler, /* -5 SVCall Handler */
0, /* Reserved */
0, /* Reserved */
PendSV_Handler, /* -2 PendSV Handler */
SysTick_Handler, /* -1 SysTick Handler */
/* Interrupts */
TIMER_IRQ_0_Handler,
TIMER_IRQ_1_Handler,
TIMER_IRQ_2_Handler,
TIMER_IRQ_3_Handler,
PWM_IRQ_WRAP_Handler,
USBCTRL_IRQ_Handler,
XIP_IRQ_Handler,
PIO0_IRQ_0_Handler,
PIO0_IRQ_1_Handler,
PIO1_IRQ_0_Handler,
PIO1_IRQ_1_Handler,
DMA_IRQ_0_Handler,
DMA_IRQ_1_Handler,
IO_IRQ_BANK0_Handler,
IO_IRQ_QSPI_Handler,
SIO_IRQ_PROC0_Handler,
SIO_IRQ_PROC1_Handler,
CLOCKS_IRQ_Handler,
SPI0_IRQ_Handler,
SPI1_IRQ_Handler,
UART0_IRQ_Handler,
UART1_IRQ_Handler,
ADC_IRQ_FIFO_Handler,
I2C0_IRQ_Handler,
I2C1_IRQ_Handler,
RTC_IRQ_Handler,
Default_Handler,
Default_Handler,
Default_Handler,
Default_Handler,
Default_Handler,
Default_Handler,
/* Interrupts 10..31 are left out */
};
#if defined ( __GNUC__ )
#pragma GCC diagnostic pop
#endif
/*----------------------------------------------------------------------------
Reset Handler called on controller reset
*----------------------------------------------------------------------------*/
__attribute__((constructor(255), used))
void __pico_entry(void)
{
extern void runtime_init(void);
runtime_init();
}
__NO_RETURN void Reset_Handler(void)
{
SCB->VTOR = (uintptr_t)__VECTOR_TABLE;
__set_MSP((uintptr_t)(&__INITIAL_SP));
//SystemInit(); /* CMSIS System Initialization */
__PROGRAM_START(); /* Enter PreMain (C library entry point) */
}
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wmissing-noreturn"
#endif
/*----------------------------------------------------------------------------
Hard Fault Handler
*----------------------------------------------------------------------------*/
void HardFault_Handler(void)
{
while(1);
}
/*----------------------------------------------------------------------------
Default Handler for Exceptions / Interrupts
*----------------------------------------------------------------------------*/
void Default_Handler(void)
{
while(1);
}
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang diagnostic pop
#endif

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
/*============================ INCLUDES ======================================*/
#include "cmsis_compiler.h"
#include "RTE_Components.h"
#include <stdio.h>
/*============================ MACROS ========================================*/
/*============================ MACROFIED FUNCTIONS ===========================*/
/*============================ TYPES =========================================*/
/*============================ GLOBAL VARIABLES ==============================*/
/*============================ LOCAL VARIABLES ===============================*/
/*============================ PROTOTYPES ====================================*/
extern int _read(int handle, char *buffer, int length);
extern int _write(int handle, char *buffer, int length);
/*============================ IMPLEMENTATION ================================*/
int __real_vprintf(const char *format, __va_list va)
{
extern int $Super$$vprintf(const char *format, __va_list va);
return $Super$$vprintf(format, va);
}
/*----------------------------------------------------------------------------*
* bridge the Arm Compiler's stdio and the pico-sdk's stdio *
*----------------------------------------------------------------------------*/
#if !defined(LIB_PICO_STDIO_SEMIHOSTING) \
|| (defined(LIB_PICO_STDIO_SEMIHOSTING) && !LIB_PICO_STDIO_SEMIHOSTING)
__attribute__((weak))
int stdin_getchar(void)
{
/*! \note If you don't want to use pico-sdk stdio, then you can implement
*! function by yourself in other c source code. Your scanf will work
*! directly.
*! by default, we use this function to bridge the _read implemented
*! in stdio.c of pico-sdk
*/
int byte;
_read(0, (char *)&byte, 1);
return byte;
}
__attribute__((weak))
int stdout_putchar(int ch)
{
/*! \note If you don't want to use pico-sdk stdio, then you can implement
*! function by yourself in other c source code. Your printf will work
*! directly.
*! by default, we use this function to bridge the _write implemented
*! in stdio.c of pico-sdk
*/
return _write(1, (char *)&ch, 1);
}
#else
/*! \note If you want to use semihosting (currently only Arm-DS supports it),
*! pleae open the RTE configuration and unselect the Compiler->I/O->STDIN
*! and Compiler->I/O->STDOUT
*/
#endif
#if defined(__IS_COMPILER_ARM_COMPILER_6__) \
&& ( !defined(LIB_PICO_STDIO_SEMIHOSTING) \
|| (defined(LIB_PICO_STDIO_SEMIHOSTING) && !LIB_PICO_STDIO_SEMIHOSTING))
__asm(".global __use_no_semihosting\n\t");
# ifndef __MICROLIB
__asm(".global __ARM_use_no_argv\n\t");
# endif
#if !defined(RTE_Compiler_IO_STDOUT)
#if defined(__MICROLIB)
_ARMABI_NORETURN
void __aeabi_assert(const char *chCond, const char *chLine, int wErrCode)
{
UNUSED_PARAM(chCond);
UNUSED_PARAM(chLine);
UNUSED_PARAM(wErrCode);
while(1) {
__NOP();
}
}
#endif
#endif
void _ttywrch(int ch)
{
UNUSED_PARAM(ch);
}
#if !defined(RETARGET_SYS)
#include <rt_sys.h>
FILEHANDLE $Sub$$_sys_open(const char *name, int openmode)
{
UNUSED_PARAM(name);
UNUSED_PARAM(openmode);
return 0;
}
#endif
__NO_RETURN
void _sys_exit(int ret)
{
UNUSED_PARAM(ret);
while(1) {}
}
#endif

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
/*============================ INCLUDES ======================================*/
#include "cmsis_compiler.h"
/*============================ MACROS ========================================*/
/*============================ MACROFIED FUNCTIONS ===========================*/
/*============================ TYPES =========================================*/
/*============================ GLOBAL VARIABLES ==============================*/
/*============================ LOCAL VARIABLES ===============================*/
/*============================ PROTOTYPES ====================================*/
/*============================ IMPLEMENTATION ================================*/
#ifndef __ENV_WRAPPER_H__
# define __ENV_WRAPPER_H__ 1
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
//! \name The macros to identify the compiler
//! @{
//! \note for IAR
#ifdef __IS_COMPILER_IAR__
# undef __IS_COMPILER_IAR__
#endif
#if defined(__IAR_SYSTEMS_ICC__)
# define __IS_COMPILER_IAR__ 1
#endif
//! \note for arm compiler 5
#ifdef __IS_COMPILER_ARM_COMPILER_5__
# undef __IS_COMPILER_ARM_COMPILER_5__
#endif
#if ((__ARMCC_VERSION >= 5000000) && (__ARMCC_VERSION < 6000000))
# define __IS_COMPILER_ARM_COMPILER_5__ 1
#endif
//! @}
//! \note for arm compiler 6
#ifdef __IS_COMPILER_ARM_COMPILER_6__
# undef __IS_COMPILER_ARM_COMPILER_6__
#endif
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
# define __IS_COMPILER_ARM_COMPILER_6__ 1
#endif
#ifdef __IS_COMPILER_LLVM__
# undef __IS_COMPILER_LLVM__
#endif
#if defined(__clang__) && !__IS_COMPILER_ARM_COMPILER_6__
# define __IS_COMPILER_LLVM__ 1
#else
//! \note for gcc
# ifdef __IS_COMPILER_GCC__
# undef __IS_COMPILER_GCC__
# endif
# if defined(__GNUC__) && !( defined(__IS_COMPILER_ARM_COMPILER_5__) \
|| defined(__IS_COMPILER_ARM_COMPILER_6__) \
|| defined(__IS_COMPILER_LLVM__))
# define __IS_COMPILER_GCC__ 1
# endif
//! @}
#endif
//! @}
#if defined(__IS_COMPILER_ARM_COMPILER_6__)
# pragma clang diagnostic ignored "-Wformat-extra-args"
#endif
#ifndef __ASM
#define __ASM __asm
#endif
#if defined(__clang__) || defined(__IS_COMPILER_ARM_COMPILER_5__)
# undef __force_inline
# define __force_inline __attribute__((always_inline))
# undef __always_inline
# define __always_inline __attribute__((always_inline))
# undef __unused
# define __unused __attribute__((unused))
# undef __used
# define __used __USED
# undef __packed_aligned
# define __packed_aligned __attribute__((packed, aligned(4)))
# undef __printflike
# define __printflike(...) __attribute__((format(printf, __VA_ARGS__)))
#endif
#undef __STRING
# define __STRING(__S) #__S
#undef offsetof
#if defined(__clang__) || defined(__IS_COMPILER_GCC__)
# define offsetof(st, m) __builtin_offsetof(st, m)
#else
# undef static_assert
# define static_assert(...)
# define offsetof(st, m) ((size_t)((char *)&((st *)0)->m - (char *)0))
#endif
typedef unsigned int uint;
#undef UNUSED_PARAM
#define UNUSED_PARAM(__VAR) __VAR = __VAR
#ifndef __CONCAT
# define ____CONCAT(a,b) a##b
# define __CONCAT(a,b) ____CONCAT(a,b)
#endif
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
static __force_inline uint32_t __get_current_exception(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return(result);
}
#define __unhandled_user_irq Default_Handler
#define __StackOneBottom Image$$ARM_LIB_STACK_ONE$$ZI$$Base
#define __mutex_array_start Image$$ER_MUTEX_ARRAY$$ZI$$Base
#define __mutex_array_end Image$$ER_MUTEX_ARRAY$$ZI$$Limit
#define __preinit_array_start Image$$ER_PREINIT_ARRAY$$ZI$$Base
#define __preinit_array_end Image$$ER_PREINIT_ARRAY$$ZI$$Limit
#define PROGRAM_STATUS_REG
#define LIB_CMSIS_CORE 1
#define PICO_CMSIS_RENAME_EXCEPTIONS 1
#define PICO_ON_DEVICE 1
enum {
PICO_ERROR_NO_DATA = -3,
PICO_ERROR_GENERIC = -2,
PICO_ERROR_TIMEOUT = -1,
};
#undef __sev
#undef __wfe
#undef __dmb
#undef __dsb
#undef __isb
#define __sev __SEV
#define __wfe __WFE
#define __dmb __DMB
#define __dsb __DSB
#define __isb __ISB
#include "pico/platform.h"
#endif

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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _HARDWARE_SYNC_H
#define _HARDWARE_SYNC_H
#include "pico.h"
#include "hardware/address_mapped.h"
#include "hardware/regs/sio.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \file hardware/sync.h
* \defgroup hardware_sync hardware_sync
*
* Low level hardware spin locks, barrier and processor event APIs
*
* Spin Locks
* ----------
*
* The RP2040 provides 32 hardware spin locks, which can be used to manage mutually-exclusive access to shared software
* and hardware resources.
*
* Generally each spin lock itself is a shared resource,
* i.e. the same hardware spin lock can be used by multiple higher level primitives (as long as the spin locks are neither held for long periods, nor
* held concurrently with other spin locks by the same core - which could lead to deadlock). A hardware spin lock that is exclusively owned can be used
* individually without more flexibility and without regard to other software. Note that no hardware spin lock may
* be acquired re-entrantly (i.e. hardware spin locks are not on their own safe for use by both thread code and IRQs) however the default spinlock related
* methods here (e.g. \ref spin_lock_blocking) always disable interrupts while the lock is held as use by IRQ handlers and user code is common/desirable,
* and spin locks are only expected to be held for brief periods.
*
* The SDK uses the following default spin lock assignments, classifying which spin locks are reserved for exclusive/special purposes
* vs those suitable for more general shared use:
*
* Number (ID) | Description
* :---------: | -----------
* 0-13 | Currently reserved for exclusive use by the SDK and other libraries. If you use these spin locks, you risk breaking SDK or other library functionality. Each reserved spin lock used individually has its own PICO_SPINLOCK_ID so you can search for those.
* 14,15 | (\ref PICO_SPINLOCK_ID_OS1 and \ref PICO_SPINLOCK_ID_OS2). Currently reserved for exclusive use by an operating system (or other system level software) co-existing with the SDK.
* 16-23 | (\ref PICO_SPINLOCK_ID_STRIPED_FIRST - \ref PICO_SPINLOCK_ID_STRIPED_LAST). Spin locks from this range are assigned in a round-robin fashion via \ref next_striped_spin_lock_num(). These spin locks are shared, but assigning numbers from a range reduces the probability that two higher level locking primitives using _striped_ spin locks will actually be using the same spin lock.
* 24-31 | (\ref PICO_SPINLOCK_ID_CLAIM_FREE_FIRST - \ref PICO_SPINLOCK_ID_CLAIM_FREE_LAST). These are reserved for exclusive use and are allocated on a first come first served basis at runtime via \ref spin_lock_claim_unused()
*/
// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_SYNC, Enable/disable assertions in the HW sync module, type=bool, default=0, group=hardware_sync
#ifndef PARAM_ASSERTIONS_ENABLED_SYNC
#define PARAM_ASSERTIONS_ENABLED_SYNC 0
#endif
/** \brief A spin lock identifier
* \ingroup hardware_sync
*/
typedef volatile uint32_t spin_lock_t;
// PICO_CONFIG: PICO_SPINLOCK_ID_IRQ, Spinlock ID for IRQ protection, min=0, max=31, default=9, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_IRQ
#define PICO_SPINLOCK_ID_IRQ 9
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_TIMER, Spinlock ID for Timer protection, min=0, max=31, default=10, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_TIMER
#define PICO_SPINLOCK_ID_TIMER 10
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_HARDWARE_CLAIM, Spinlock ID for Hardware claim protection, min=0, max=31, default=11, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_HARDWARE_CLAIM
#define PICO_SPINLOCK_ID_HARDWARE_CLAIM 11
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_OS1, First Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=14, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_OS1
#define PICO_SPINLOCK_ID_OS1 14
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_OS2, Second Spinlock ID reserved for use by low level OS style software, min=0, max=31, default=15, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_OS2
#define PICO_SPINLOCK_ID_OS2 15
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_STRIPED_FIRST, Lowest Spinlock ID in the 'striped' range, min=0, max=31, default=16, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_STRIPED_FIRST
#define PICO_SPINLOCK_ID_STRIPED_FIRST 16
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_STRIPED_LAST, Highest Spinlock ID in the 'striped' range, min=0, max=31, default=23, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_STRIPED_LAST
#define PICO_SPINLOCK_ID_STRIPED_LAST 23
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_FIRST, Lowest Spinlock ID in the 'claim free' range, min=0, max=31, default=24, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_FIRST
#define PICO_SPINLOCK_ID_CLAIM_FREE_FIRST 24
#endif
#ifdef PICO_SPINLOCK_ID_CLAIM_FREE_END
#warning PICO_SPINLOCK_ID_CLAIM_FREE_END has been renamed to PICO_SPINLOCK_ID_CLAIM_FREE_LAST
#endif
// PICO_CONFIG: PICO_SPINLOCK_ID_CLAIM_FREE_LAST, Highest Spinlock ID in the 'claim free' range, min=0, max=31, default=31, group=hardware_sync
#ifndef PICO_SPINLOCK_ID_CLAIM_FREE_LAST
#define PICO_SPINLOCK_ID_CLAIM_FREE_LAST 31
#endif
#if !defined(__IS_COMPILER_ARM_COMPILER_6__)
/*! \brief Insert a SEV instruction in to the code path.
* \ingroup hardware_sync
* The SEV (send event) instruction sends an event to both cores.
*/
__force_inline static void __sev(void) {
__asm volatile ("sev");
}
/*! \brief Insert a WFE instruction in to the code path.
* \ingroup hardware_sync
*
* The WFE (wait for event) instruction waits until one of a number of
* events occurs, including events signalled by the SEV instruction on either core.
*/
__force_inline static void __wfe(void) {
__asm volatile ("wfe");
}
/*! \brief Insert a WFI instruction in to the code path.
* \ingroup hardware_sync
*
* The WFI (wait for interrupt) instruction waits for a interrupt to wake up the core.
*/
__force_inline static void __wfi(void) {
__asm volatile ("wfi");
}
/*! \brief Insert a DMB instruction in to the code path.
* \ingroup hardware_sync
*
* The DMB (data memory barrier) acts as a memory barrier, all memory accesses prior to this
* instruction will be observed before any explicit access after the instruction.
*/
__force_inline static void __dmb(void) {
__asm volatile ("dmb" : : : "memory");
}
/*! \brief Insert a DSB instruction in to the code path.
* \ingroup hardware_sync
*
* The DSB (data synchronization barrier) acts as a special kind of data
* memory barrier (DMB). The DSB operation completes when all explicit memory
* accesses before this instruction complete.
*/
__force_inline static void __dsb(void) {
__asm volatile ("dsb" : : : "memory");
}
/*! \brief Insert a ISB instruction in to the code path.
* \ingroup hardware_sync
*
* ISB acts as an instruction synchronization barrier. It flushes the pipeline of the processor,
* so that all instructions following the ISB are fetched from cache or memory again, after
* the ISB instruction has been completed.
*/
__force_inline static void __isb(void) {
__asm volatile ("isb");
}
#endif
/*! \brief Acquire a memory fence
* \ingroup hardware_sync
*/
__force_inline static void __mem_fence_acquire(void) {
// the original code below makes it hard for us to be included from C++ via a header
// which itself is in an extern "C", so just use __dmb instead, which is what
// is required on Cortex M0+
__dmb();
//#ifndef __cplusplus
// atomic_thread_fence(memory_order_acquire);
//#else
// std::atomic_thread_fence(std::memory_order_acquire);
//#endif
}
/*! \brief Release a memory fence
* \ingroup hardware_sync
*
*/
__force_inline static void __mem_fence_release(void) {
// the original code below makes it hard for us to be included from C++ via a header
// which itself is in an extern "C", so just use __dmb instead, which is what
// is required on Cortex M0+
__dmb();
//#ifndef __cplusplus
// atomic_thread_fence(memory_order_release);
//#else
// std::atomic_thread_fence(std::memory_order_release);
//#endif
}
/*! \brief Save and disable interrupts
* \ingroup hardware_sync
*
* \return The prior interrupt enable status for restoration later via restore_interrupts()
*/
__force_inline static uint32_t save_and_disable_interrupts(void) {
uint32_t status;
__asm volatile ("mrs %0, PRIMASK" : "=r" (status)::);
__asm volatile ("cpsid i");
return status;
}
/*! \brief Restore interrupts to a specified state
* \ingroup hardware_sync
*
* \param status Previous interrupt status from save_and_disable_interrupts()
*/
__force_inline static void restore_interrupts(uint32_t status) {
__asm volatile ("msr PRIMASK,%0"::"r" (status) : );
}
/*! \brief Get HW Spinlock instance from number
* \ingroup hardware_sync
*
* \param lock_num Spinlock ID
* \return The spinlock instance
*/
__force_inline static spin_lock_t *spin_lock_instance(uint lock_num) {
invalid_params_if(SYNC, lock_num >= NUM_SPIN_LOCKS);
return (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET + lock_num * 4);
}
/*! \brief Get HW Spinlock number from instance
* \ingroup hardware_sync
*
* \param lock The Spinlock instance
* \return The Spinlock ID
*/
__force_inline static uint spin_lock_get_num(spin_lock_t *lock) {
invalid_params_if(SYNC, (uint) lock < SIO_BASE + SIO_SPINLOCK0_OFFSET ||
(uint) lock >= NUM_SPIN_LOCKS * sizeof(spin_lock_t) + SIO_BASE + SIO_SPINLOCK0_OFFSET ||
((uint) lock - SIO_BASE + SIO_SPINLOCK0_OFFSET) % sizeof(spin_lock_t) != 0);
return (uint) (lock - (spin_lock_t *) (SIO_BASE + SIO_SPINLOCK0_OFFSET));
}
/*! \brief Acquire a spin lock without disabling interrupts (hence unsafe)
* \ingroup hardware_sync
*
* \param lock Spinlock instance
*/
__force_inline static void spin_lock_unsafe_blocking(spin_lock_t *lock) {
// Note we don't do a wfe or anything, because by convention these spin_locks are VERY SHORT LIVED and NEVER BLOCK and run
// with INTERRUPTS disabled (to ensure that)... therefore nothing on our core could be blocking us, so we just need to wait on another core
// anyway which should be finished soon
while (__builtin_expect(!*lock, 0));
__mem_fence_acquire();
}
/*! \brief Release a spin lock without re-enabling interrupts
* \ingroup hardware_sync
*
* \param lock Spinlock instance
*/
__force_inline static void spin_unlock_unsafe(spin_lock_t *lock) {
__mem_fence_release();
*lock = 0;
}
/*! \brief Acquire a spin lock safely
* \ingroup hardware_sync
*
* This function will disable interrupts prior to acquiring the spinlock
*
* \param lock Spinlock instance
* \return interrupt status to be used when unlocking, to restore to original state
*/
__force_inline static uint32_t spin_lock_blocking(spin_lock_t *lock) {
uint32_t save = save_and_disable_interrupts();
spin_lock_unsafe_blocking(lock);
return save;
}
/*! \brief Check to see if a spinlock is currently acquired elsewhere.
* \ingroup hardware_sync
*
* \param lock Spinlock instance
*/
inline static bool is_spin_locked(spin_lock_t *lock) {
check_hw_size(spin_lock_t, 4);
uint lock_num = spin_lock_get_num(lock);
return 0 != (*(io_ro_32 *) (SIO_BASE + SIO_SPINLOCK_ST_OFFSET) & (1u << lock_num));
}
/*! \brief Release a spin lock safely
* \ingroup hardware_sync
*
* This function will re-enable interrupts according to the parameters.
*
* \param lock Spinlock instance
* \param saved_irq Return value from the \ref spin_lock_blocking() function.
* \return interrupt status to be used when unlocking, to restore to original state
*
* \sa spin_lock_blocking()
*/
__force_inline static void spin_unlock(spin_lock_t *lock, uint32_t saved_irq) {
spin_unlock_unsafe(lock);
restore_interrupts(saved_irq);
}
/*! \brief Get the current core number
* \ingroup hardware_sync
*
* \return The core number the call was made from
*/
__force_inline static uint get_core_num(void) {
return (*(uint32_t *) (SIO_BASE + SIO_CPUID_OFFSET));
}
/*! \brief Initialise a spin lock
* \ingroup hardware_sync
*
* The spin lock is initially unlocked
*
* \param lock_num The spin lock number
* \return The spin lock instance
*/
spin_lock_t *spin_lock_init(uint lock_num);
/*! \brief Release all spin locks
* \ingroup hardware_sync
*/
void spin_locks_reset(void);
/*! \brief Return a spin lock number from the _striped_ range
* \ingroup hardware_sync
*
* Returns a spin lock number in the range PICO_SPINLOCK_ID_STRIPED_FIRST to PICO_SPINLOCK_ID_STRIPED_LAST
* in a round robin fashion. This does not grant the caller exclusive access to the spin lock, so the caller
* must:
*
* -# Abide (with other callers) by the contract of only holding this spin lock briefly (and with IRQs disabled - the default via \ref spin_lock_blocking()),
* and not whilst holding other spin locks.
* -# Be OK with any contention caused by the - brief due to the above requirement - contention with other possible users of the spin lock.
*
* \return lock_num a spin lock number the caller may use (non exclusively)
* \see PICO_SPINLOCK_ID_STRIPED_FIRST
* \see PICO_SPINLOCK_ID_STRIPED_LAST
*/
uint next_striped_spin_lock_num(void);
/*! \brief Mark a spin lock as used
* \ingroup hardware_sync
*
* Method for cooperative claiming of hardware. Will cause a panic if the spin lock
* is already claimed. Use of this method by libraries detects accidental
* configurations that would fail in unpredictable ways.
*
* \param lock_num the spin lock number
*/
void spin_lock_claim(uint lock_num);
/*! \brief Mark multiple spin locks as used
* \ingroup hardware_sync
*
* Method for cooperative claiming of hardware. Will cause a panic if any of the spin locks
* are already claimed. Use of this method by libraries detects accidental
* configurations that would fail in unpredictable ways.
*
* \param lock_num_mask Bitfield of all required spin locks to claim (bit 0 == spin lock 0, bit 1 == spin lock 1 etc)
*/
void spin_lock_claim_mask(uint32_t lock_num_mask);
/*! \brief Mark a spin lock as no longer used
* \ingroup hardware_sync
*
* Method for cooperative claiming of hardware.
*
* \param lock_num the spin lock number to release
*/
void spin_lock_unclaim(uint lock_num);
/*! \brief Claim a free spin lock
* \ingroup hardware_sync
*
* \param required if true the function will panic if none are available
* \return the spin lock number or -1 if required was false, and none were free
*/
int spin_lock_claim_unused(bool required);
/*! \brief Determine if a spin lock is claimed
* \ingroup hardware_sync
*
* \param lock_num the spin lock number
* \return true if claimed, false otherwise
* \see spin_lock_claim
* \see spin_lock_claim_mask
*/
bool spin_lock_is_claimed(uint lock_num);
#define remove_volatile_cast(t, x) ({__mem_fence_acquire(); (t)(x); })
#ifdef __cplusplus
}
#endif
#endif

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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _PICO_PLATFORM_H_
#define _PICO_PLATFORM_H_
#include <sys/cdefs.h>
#include "pico/types.h"
#include "hardware/platform_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \file platform.h
* \defgroup pico_platform pico_platform
* Compiler definitions for the selected PICO_PLATFORM
*/
#define __isr
// Section naming macros
#define __after_data(group) __attribute__((section(".after_data." group)))
#define __not_in_flash(group) __attribute__((section(".time_critical." group)))
#define __scratch_x(group) __attribute__((section(".scratch_x." group)))
#define __scratch_y(group) __attribute__((section(".scratch_y." group)))
#define __uninitialized_ram(group) __attribute__((section(".uninitialized_ram." #group))) group
// For use with PICO_COPY_TO_RAM:
#define __in_flash(group) __attribute__((section(".flashdata" group)))
/**
* Decorates a function name, such that the function will execute from RAM (assuming it is not inlined
* into a flash function by the compiler)
*/
#define __not_in_flash_func(func_name) __not_in_flash(__STRING(func_name)) func_name
/**
* Historical synonym for __not_in_flash_func()
*/
#define __time_critical_func(func_name) __not_in_flash_func(func_name)
/**
* Decorates a function name, such that the function will execute from RAM, explicitly marking it as
* noinline to prevent it being inlined into a flash function by the compiler
*/
#define __no_inline_not_in_flash_func(func_name) __noinline __not_in_flash_func(func_name)
#if !defined(__IS_COMPILER_ARM_COMPILER_6__)
#define __packed_aligned __packed __aligned(4)
#if defined(__GNUC__) && __GNUC__ < 7
#define __force_inline inline __always_inline
#else
#define __force_inline __always_inline
#endif
#endif
#ifndef count_of
#define count_of(a) (sizeof(a)/sizeof((a)[0]))
#endif
#ifndef MAX
#define MAX(a, b) ((a)>(b)?(a):(b))
#endif
#ifndef MIN
#define MIN(a, b) ((b)>(a)?(a):(b))
#endif
#if !defined(__IS_COMPILER_ARM_COMPILER_6__)
/**
* Execute a breakpoint instruction
*/
static inline void __breakpoint(void) {
__asm__("bkpt #0");
}
#endif
/**
* Ensure that the compiler does not move memory access across this method call
*/
__force_inline static void __compiler_memory_barrier(void) {
__asm__ volatile ("" : : : "memory");
}
// return a 32 bit handle for a raw ptr; DMA chaining for example embeds pointers in 32 bit values
// which of course does not work if we're running the code natively on a 64 bit platforms. Therefore
// we provide this macro which allows that code to provide a 64->32 bit mapping in host mode
#define host_safe_hw_ptr(x) ((uintptr_t)(x))
/**
* Panic (see panic()) with the message "Unsupported".
*/
void __attribute__((noreturn)) panic_unsupported(void);
/**
* Panic with a message. An attempt is made to output the message to all registered STDOUT drivers
* after which this method executes a BKPT instruction.
*
* @param fmt format string (printf-like)
* @param ... printf-like arguments
*/
void __attribute__((noreturn)) panic(const char *fmt, ...);
// PICO_CONFIG: PICO_NO_FPGA_CHECK, Remove the FPGA platform check for small code size reduction, type=bool, default=0, advanced=true, group=pico_runtime
#ifndef PICO_NO_FPGA_CHECK
#define PICO_NO_FPGA_CHECK 0
#endif
#if PICO_NO_FPGA_CHECK
static inline bool running_on_fpga(void) {return false;}
#else
bool running_on_fpga(void);
#endif
/**
* @return the RP2040 chip revision number
*/
uint8_t rp2040_chip_version(void);
/**
* @return the RP2040 rom version number
*/
static inline uint8_t rp2040_rom_version(void) {
return *(uint8_t*)0x13;
}
/**
* Empty function intended to be called by any tight hardware polling loop. using this ubiquitously
* makes it much easier to find tight loops, but also in the future \#ifdef-ed support for lockup
* debugging might be added
*/
static inline void tight_loop_contents(void) {}
/**
* Helper macro for making chain DMA code portable to PICO_PLATFORM=host. The problem here is
* that embedded pointers in the data are only 32 bit, which is a problem if the host
* system is 64 bit. This macro is zero cost on the actual device, but in host mode
* it provides a 64->32 bit mapping
*/
#define native_safe_hw_ptr(x) ((uintptr_t)(x))
/**
* Multiplies a by b using multiply instruction using the ARM mul instruction regardless of values;
* i.e. this is a 1 cycle operation.
*
* \param a the first operand
* \param b the second operand
* \return a * b
*/
__force_inline static int32_t __mul_instruction(int32_t a, int32_t b) {
asm ("mul %0, %1" : "+l" (a) : "l" (b) : );
return a;
}
/**
* Efficiently Multiplies value a by possibly constant value b.
* If b is known to be constant and not zero or a power of 2, then a mul instruction is used rather than gcc's default
* which is often a slow combination of shifts and adds
*
* \param a the first operand
* \param b the second operand
* \return a * b
*/
#define __fast_mul(a, b) __builtin_choose_expr(__builtin_constant_p(b) && !__builtin_constant_p(a), \
(__builtin_popcount(b) >= 2 ? __mul_instruction(a,b) : (a)*(b)), \
(a)*(b))
#if defined(__IS_COMPILER_ARM_COMPILER_6__)
# define WRAPPER_FUNC(__FUNC) $Sub$$##__FUNC
# define REAL_FUNC(__FUNC) $Super$$## __FUNC
#else
# define WRAPPER_FUNC(x) __wrap_ ## x
# define REAL_FUNC(x) __real_ ## x
#endif
#define __check_type_compatible(type_a, type_b) static_assert(__builtin_types_compatible_p(type_a, type_b), __STRING(type_a) " is not compatible with " __STRING(type_b));
/**
* Get the current exception level on this core
* \return the exception number if the CPU is handling an exception, or 0 otherwise
*/
uint __get_current_exception(void);
#ifdef __cplusplus
}
#endif
#endif

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// AUTOGENERATED FROM PICO_CONFIG_HEADER_FILES and then PICO_<PLATFORM>_CONFIG_HEADER_FILES
// DO NOT EDIT!
// based on PICO_CONFIG_HEADER_FILES:
#include "..\..\..\..\..\pico-sdk\src\boards\include\boards\pico.h"
// based on PICO_RP2040_CONFIG_HEADER_FILES:
#include "..\..\..\..\..\pico-sdk\src\rp2_common\cmsis\include\cmsis\rename_exceptions.h"

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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
// ---------------------------------------
// THIS FILE IS AUTOGENERATED; DO NOT EDIT
// ---------------------------------------
#ifndef _PICO_VERSION_H
#define _PICO_VERSION_H
#define PICO_SDK_VERSION_MAJOR 1
#define PICO_SDK_VERSION_MINOR 2
#define PICO_SDK_VERSION_REVISION 0
#define PICO_SDK_VERSION_STRING "1.2.0"
#endif

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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdio.h>
#include <stdarg.h>
#include "pico.h"
#include "hardware/regs/m0plus.h"
#include "hardware/regs/resets.h"
#include "hardware/structs/mpu.h"
#include "hardware/structs/scb.h"
#include "hardware/structs/padsbank0.h"
#include "hardware/clocks.h"
#include "hardware/irq.h"
#include "hardware/resets.h"
#include "pico/mutex.h"
#include "pico/time.h"
#if LIB_PICO_PRINTF_PICO
#include "pico/printf.h"
#else
#define weak_raw_printf printf
#define weak_raw_vprintf vprintf
#endif
#if PICO_ENTER_USB_BOOT_ON_EXIT
#include "pico/bootrom.h"
#endif
#if defined(__IS_COMPILER_ARM_COMPILER_6__)
# undef __breakpoint
# define __breakpoint(...) __BKPT(0)
#endif
extern char __StackLimit; /* Set by linker. */
uint32_t __attribute__((section(".ram_vector_table"))) ram_vector_table[48];
// this is called for each thread since they have their own MPU
void runtime_install_stack_guard(void *stack_bottom) {
// this is called b4 runtime_init is complete, so beware printf or assert
// make sure no one is using the MPU yet
if (mpu_hw->ctrl) {
// Note that it would be tempting to change this to a panic, but it happens so early, printing is not a good idea
__breakpoint();
}
uintptr_t addr = (uintptr_t) stack_bottom;
// the minimum we can protect is 32 bytes on a 32 byte boundary, so round up which will
// just shorten the valid stack range a tad
addr = (addr + 31u) & ~31u;
// mask is 1 bit per 32 bytes of the 256 byte range... clear the bit for the segment we want
uint32_t subregion_select = 0xffu ^ (1u << ((addr >> 5u) & 7u));
mpu_hw->ctrl = 5; // enable mpu with background default map
mpu_hw->rbar = (addr & (uint)~0xff) | 0x8 | 0;
mpu_hw->rasr = 1 // enable region
| (0x7 << 1) // size 2^(7 + 1) = 256
| (subregion_select << 8)
| 0x10000000; // XN = disable instruction fetch; no other bits means no permissions
}
void runtime_init(void) {
// Reset all peripherals to put system into a known state,
// - except for QSPI pads and the XIP IO bank, as this is fatal if running from flash
// - and the PLLs, as this is fatal if clock muxing has not been reset on this boot
// - and USB, syscfg, as this disturbs USB-to-SWD on core 1
reset_block(~(
RESETS_RESET_IO_QSPI_BITS |
RESETS_RESET_PADS_QSPI_BITS |
RESETS_RESET_PLL_USB_BITS |
RESETS_RESET_USBCTRL_BITS |
RESETS_RESET_SYSCFG_BITS |
RESETS_RESET_PLL_SYS_BITS
));
// Remove reset from peripherals which are clocked only by clk_sys and
// clk_ref. Other peripherals stay in reset until we've configured clocks.
unreset_block_wait(RESETS_RESET_BITS & ~(
RESETS_RESET_ADC_BITS |
RESETS_RESET_RTC_BITS |
RESETS_RESET_SPI0_BITS |
RESETS_RESET_SPI1_BITS |
RESETS_RESET_UART0_BITS |
RESETS_RESET_UART1_BITS |
RESETS_RESET_USBCTRL_BITS
));
#if defined(__IS_COMPILER_GCC__)
// pre-init runs really early since we need it even for memcpy and divide!
// (basically anything in aeabi that uses bootrom)
// Start and end points of the constructor list,
// defined by the linker script.
extern void (*__preinit_array_start)(void);
extern void (*__preinit_array_end)(void);
// Call each function in the list.
// We have to take the address of the symbols, as __preinit_array_start *is*
// the first function pointer, not the address of it.
for (void (**p)(void) = &__preinit_array_start; p < &__preinit_array_end; ++p) {
(*p)();
}
#endif
// After calling preinit we have enough runtime to do the exciting maths
// in clocks_init
clocks_init();
// Peripheral clocks should now all be running
unreset_block_wait(RESETS_RESET_BITS);
#if !PICO_IE_26_29_UNCHANGED_ON_RESET
// after resetting BANK0 we should disable IE on 26-29
hw_clear_alias(padsbank0_hw)->io[26] = hw_clear_alias(padsbank0_hw)->io[27] =
hw_clear_alias(padsbank0_hw)->io[28] = hw_clear_alias(padsbank0_hw)->io[29] = PADS_BANK0_GPIO0_IE_BITS;
#endif
// this is an array of either mutex_t or recursive_mutex_t (i.e. not necessarily the same size)
// however each starts with a lock_core_t, and the spin_lock is initialized to address 1 for a recursive
// spinlock and 0 for a regular one.
static_assert(!(sizeof(mutex_t)&3), "");
static_assert(!(sizeof(recursive_mutex_t)&3), "");
static_assert(!offsetof(mutex_t, core), "");
static_assert(!offsetof(recursive_mutex_t, core), "");
extern lock_core_t __mutex_array_start;
extern lock_core_t __mutex_array_end;
for (lock_core_t *l = &__mutex_array_start; l < &__mutex_array_end; ) {
if (l->spin_lock) {
assert(1 == (uintptr_t)l->spin_lock); // indicator for a recursive mutex
recursive_mutex_t *rm = (recursive_mutex_t *)l;
recursive_mutex_init(rm);
l = &rm[1].core; // next
} else {
mutex_t *m = (mutex_t *)l;
mutex_init(m);
l = &m[1].core; // next
}
}
#if !(PICO_NO_RAM_VECTOR_TABLE || PICO_NO_FLASH)
__builtin_memcpy(ram_vector_table, (uint32_t *) scb_hw->vtor, sizeof(ram_vector_table));
scb_hw->vtor = (uintptr_t) ram_vector_table;
#endif
#ifndef NDEBUG
if (__get_current_exception()) {
// crap; started in exception handler
__asm ("bkpt #0");
}
#endif
#if PICO_USE_STACK_GUARDS
// install core0 stack guard
extern char __StackBottom;
runtime_install_stack_guard(&__StackBottom);
#endif
spin_locks_reset();
irq_init_priorities();
alarm_pool_init_default();
#if defined(__IS_COMPILER_GCC__)
// Start and end points of the constructor list,
// defined by the linker script.
extern void (*__init_array_start)(void);
extern void (*__init_array_end)(void);
// Call each function in the list.
// We have to take the address of the symbols, as __init_array_start *is*
// the first function pointer, not the address of it.
for (void (**p)(void) = &__init_array_start; p < &__init_array_end; ++p) {
(*p)();
}
#endif
}
void _exit(__unused int status) {
#if PICO_ENTER_USB_BOOT_ON_EXIT
reset_usb_boot(0,0);
#else
while (1) {
__breakpoint();
}
#endif
}
#if defined(__IS_COMPILER_GCC__)
void *_sbrk(int incr) {
extern char end; /* Set by linker. */
static char *heap_end;
char *prev_heap_end;
if (heap_end == 0)
heap_end = &end;
prev_heap_end = heap_end;
char *next_heap_end = heap_end + incr;
if (__builtin_expect(next_heap_end > (&__StackLimit), false)) {
#if PICO_USE_OPTIMISTIC_SBRK
if (heap_end == &__StackLimit) {
// errno = ENOMEM;
return (char *) -1;
}
next_heap_end = &__StackLimit;
#else
return (char *) -1;
#endif
}
heap_end = next_heap_end;
return (void *) prev_heap_end;
}
// exit is not useful... no desire to pull in __call_exitprocs
void exit(int status) {
_exit(status);
}
#endif
#if defined(__IS_COMPILER_GCC__)
// incorrect warning from GCC 6
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wsuggest-attribute=format"
#endif
void __assert_func(const char *file, int line, const char *func, const char *failedexpr) {
weak_raw_printf("assertion \"%s\" failed: file \"%s\", line %d%s%s\n",
failedexpr, file, line, func ? ", function: " : "",
func ? func : "");
_exit(1);
}
#if defined(__IS_COMPILER_GCC__)
#pragma GCC diagnostic pop
#endif
void __attribute__((noreturn)) panic_unsupported() {
panic("not supported");
}
// PICO_CONFIG: PICO_PANIC_FUNCTION, Name of a function to use in place of the stock panic function or empty string to simply breakpoint on panic, group=pico_runtime
// note the default is not "panic" it is undefined
#ifdef PICO_PANIC_FUNCTION
#define PICO_PANIC_FUNCTION_EMPTY (__CONCAT(PICO_PANIC_FUNCTION, 1) == 1)
#if !PICO_PANIC_FUNCTION_EMPTY
extern void __attribute__((noreturn)) __printflike(1, 0) PICO_PANIC_FUNCTION(__unused const char *fmt, ...);
#endif
// Use a forwarding method here as it is a little simpler than renaming the symbol as it is used from assembler
void __attribute__((naked, noreturn)) __printflike(1, 0) panic(__unused const char *fmt, ...) {
// if you get an undefined reference here, you didn't define your PICO_PANIC_FUNCTION!
__asm (
"push {lr}\n"
#if !PICO_PANIC_FUNCTION_EMPTY
"bl " __XSTRING(PICO_PANIC_FUNCTION) "\n"
#endif
"bkpt #0\n"
"1: b 1b\n" // loop for ever as we are no return
:
:
:
);
}
#else
// todo consider making this try harder to output if we panic early
// right now, print mutex may be uninitialised (in which case it deadlocks - although after printing "PANIC")
// more importantly there may be no stdout/UART initialized yet
// todo we may want to think about where we print panic messages to; writing to USB appears to work
// though it doesn't seem like we can expect it to... fine for now
void __attribute__((noreturn)) __printflike(1, 0) panic(const char *fmt, ...) {
puts("\n*** PANIC ***\n");
if (fmt) {
#if LIB_PICO_PRINTF_NONE
puts(fmt);
#else
va_list args;
va_start(args, fmt);
#if PICO_PRINTF_ALWAYS_INCLUDED
vprintf(fmt, args);
#else
weak_raw_vprintf(fmt, args);
#endif
va_end(args);
puts("\n");
#endif
}
_exit(1);
}
#endif
void hard_assertion_failure(void) {
panic("Hard assert");
}

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//! a fake header file

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/****************************************************************************
* Copyright 2021 Gorgon Meducer (Email:embedded_zhuoran@hotmail.com) *
* *
* Licensed under the Apache License, Version 2.0 (the "License"); *
* you may not use this file except in compliance with the License. *
* You may obtain a copy of the License at *
* *
* http://www.apache.org/licenses/LICENSE-2.0 *
* *
* Unless required by applicable law or agreed to in writing, software *
* distributed under the License is distributed on an "AS IS" BASIS, *
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. *
* See the License for the specific language governing permissions and *
* limitations under the License. *
* *
****************************************************************************/
/*============================ INCLUDES ======================================*/
#include "pico/stdlib.h"
#include "perf_counter.h"
#include "pico/stdio_usb.h"
#include <stdio.h>
#include "pikaScript.h"
/*============================ MACROS ========================================*/
#define TOP (0x1FFF)
/*============================ MACROFIED FUNCTIONS ===========================*/
#define ABS(__N) ((__N) < 0 ? -(__N) : (__N))
#define _BV(__N) ((uint32_t)1<<(__N))
/*============================ TYPES =========================================*/
/*============================ GLOBAL VARIABLES ==============================*/
/*============================ LOCAL VARIABLES ===============================*/
/*============================ PROTOTYPES ====================================*/
/*============================ IMPLEMENTATION ================================*/
void SysTick_Handler(void)
{
}
/*! \brief set the 16-level led gradation
*! \param hwLevel gradation
*! \return none
*/
static void set_led_gradation(uint16_t hwLevel)
{
static uint16_t s_hwCounter = 0;
if (hwLevel >= s_hwCounter) {
gpio_put(PICO_DEFAULT_LED_PIN, 1);
} else {
gpio_put(PICO_DEFAULT_LED_PIN, 0);
}
s_hwCounter++;
s_hwCounter &= TOP;
}
static void breath_led(void)
{
static uint16_t s_hwCounter = 0;
static int16_t s_nGray = (TOP >> 1);
s_hwCounter++;
if (!(s_hwCounter & (_BV(10)-1))) {
s_nGray++;
if (s_nGray == TOP) {
s_nGray = 0;
}
}
set_led_gradation(ABS(s_nGray - (TOP >> 1)));
}
static void system_init(void)
{
/*! \note if you do want to use SysTick in your application, please use
*! init_cycle_counter(true);
*! instead of
*! init_cycle_counter(false);
*/
// init_cycle_counter(false);
stdio_init_all();
gpio_init(PICO_DEFAULT_LED_PIN);
gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
}
int main(void)
{
system_init();
printf("pico system init ok.\r\n");
printf("------------------------------------------------------------------\r\n");
printf("| |\r\n");
printf("| ____ _ __ _____ _ __ |\r\n");
printf("| / __ \\ (_) / /__ ____ _ / ___/ _____ _____ (_) ____ / /_ |\r\n");
printf("| / /_/ // / / //_// __ `/ \\__ \\ / ___// ___// / / __ \\ / __/ |\r\n");
printf("| / ____// / / ,< / /_/ / ___/ // /__ / / / / / /_/ // /_ |\r\n");
printf("| /_/ /_/ /_/|_| \\__,_/ /____/ \\___//_/ /_/ / .___/ \\__/ |\r\n");
printf("| /_/ |\r\n");
printf("| PikaScript - An Ultra Lightweight Python Engine |\r\n");
printf("| |\r\n");
printf("| [ https://github.com/pikastech/pikascript ] |\r\n");
printf("| [ https://gitee.com/lyon1998/pikascript ] |\r\n");
printf("| |\r\n");
printf("------------------------------------------------------------------\r\n");
PikaObj * pikaMain = pikaScriptInit();
while (true) {
sleep_ms(500);
}
//return 0;
}

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_Instructions: (please delete)_
- _please do not submit against `master`, use `develop` instead_
- _please make sure there is an associated issue for your PR, and reference it via "Fixes #num" in the description_
- _please enter a detailed description_

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name: CMake
on: [push, pull_request]
env:
# Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
BUILD_TYPE: Release
jobs:
build:
if: github.repository_owner == 'raspberrypi'
runs-on: [self-hosted, Linux, X64]
steps:
- name: Clean workspace
run: |
echo "Cleaning up previous run"
rm -rf "${{ github.workspace }}"
mkdir -p "${{ github.workspace }}"
- name: Checkout repo
uses: actions/checkout@v2
- name: Checkout submodules
run: git submodule update --init
- name: Create Build Environment
# Some projects don't allow in-source building, so create a separate build directory
# We'll use this as our working directory for all subsequent commands
run: cmake -E make_directory ${{github.workspace}}/build
- name: Configure CMake
# Use a bash shell so we can use the same syntax for environment variable
# access regardless of the host operating system
shell: bash
working-directory: ${{github.workspace}}/build
# Note the current convention is to use the -S and -B options here to specify source
# and build directories, but this is only available with CMake 3.13 and higher.
# The CMake binaries on the Github Actions machines are (as of this writing) 3.12
run: cmake $GITHUB_WORKSPACE -DCMAKE_BUILD_TYPE=$BUILD_TYPE
- name: Get core count
id: core_count
run : cat /proc/cpuinfo | grep processor | wc -l
- name: Build
working-directory: ${{github.workspace}}/build
shell: bash
# Execute the build. You can specify a specific target with "--target <NAME>"
run: cmake --build . --config $BUILD_TYPE --parallel ${{steps.core_count.outputs.output}}

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.idea
.vscode
cmake-*
.DS_Store
build

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[submodule "tinyusb"]
path = lib/tinyusb
url = https://github.com/hathach/tinyusb.git

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# Contributing to Raspberry Pi Pico C/C++ SDK
## How to Report a Bug
We use GitHub to host code, track [issues](https://github.com/raspberrypi/pico-sdk/issues) and feature requests, and to accept [pull requests](https://github.com/raspberrypi/pico-sdk/pulls). If you find think you have found a bug in the SDK please report it by [opening a new issue](https://github.com/raspberrypi/pico-sdk/issues/new). Please include as much detail as possible, and ideally some code to reproduce the problem.
## How to Contribute Code
In order to contribute new or updated code, you must first create a GitHub account and fork the original repository to your own account. You can make changes, save them in your repository, then [make a pull request](https://docs.github.com/en/github/collaborating-with-pull-requests/proposing-changes-to-your-work-with-pull-requests/creating-a-pull-request-from-a-fork) against this repository. The pull request will appear [in the repository](https://github.com/raspberrypi/pico-sdk/pulls) where it can be assessed by the maintainers, and if appropriate, merged with the official repository.
**NOTE:** Development takes place on the `develop` branch in this repository. Please open your https://github.com/raspberrypi/pico-sdk/pulls[pull request] (PR) against the [`develop`](https://github.com/raspberrypi/pico-sdk/tree/develop) branch, pull requests against the `master` branch will automatically CI fail checks and will not be accepted. You will be asked to rebase your PR against `develop` and if you do not do so, your PR will be closed.
While we are happy to take contributions, big or small, changes in the SDK may have knock-on effects in other places so it is possible that apparently benign pull requests that make seemingly small changes could be refused.
### Code Style
If you are contributing new or updated code please match the existing code style, particularly:
* Use 4 spaces for indentation rather than tabs.
* Braces are required for everything except single line `if` statements.
* Opening braces should not be placed on a new line.
### Licensing
Code in this repository is lisensed under the [BSD-3 License](LICENSE.TXT). By contributing content to this repository you are agreeing to place your contributions under this licence.

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Copyright 2020 (c) 2020 Raspberry Pi (Trading) Ltd.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the
following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following
disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
disclaimer in the documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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# Raspberry Pi Pico SDK
The Raspberry Pi Pico SDK (henceforth the SDK) provides the headers, libraries and build system
necessary to write programs for the RP2040-based devices such as the Raspberry Pi Pico
in C, C++ or assembly language.
The SDK is designed to provide an API and programming environment that is familiar both to non-embedded C developers and embedded C developers alike.
A single program runs on the device at a time and starts with a conventional `main()` method. Standard C/C++ libraries are supported along with
C level libraries/APIs for accessing all of the RP2040's hardware include PIO (Programmable IO).
Additionally the SDK provides higher level libraries for dealing with timers, synchronization, USB (TinyUSB) and multi-core programming
along with various utilities.
The SDK can be used to build anything from simple applications, to fully fledged runtime environments such as MicroPython, to low level software
such as RP2040's on-chip bootrom itself.
Additional libraries/APIs that are not yet ready for inclusion in the SDK can be found in [pico-extras](https://github.com/raspberrypi/pico-extras).
# Documentation
See [Getting Started with the Raspberry Pi Pico](https://rptl.io/pico-get-started) for information on how to setup your
hardware, IDE/environment and for how to build and debug software for the Raspberry Pi Pico
and other RP2040-based devices.
See [Raspberry Pi Pico C/C++ SDK](https://rptl.io/pico-c-sdk) to learn more about programming using the
SDK, to explore more advanced features, and for complete PDF-based API documentation.
See [Online Raspberry Pi Pico SDK API docs](https://rptl.io/pico-doxygen) for HTML-based API documentation.
# Example code
See [pico-examples](https://github.com/raspberrypi/pico-examples) for example code you can build.
# Quick-start your own project
These instructions are extremely terse, and Linux-based only. For detailed steps,
instructions for other platforms, and just in general, we recommend you see [Raspberry Pi Pico C/C++ SDK](https://rptl.io/pico-c-sdk)
1. Install CMake (at least version 3.13), and GCC cross compiler
```
sudo apt install cmake gcc-arm-none-eabi libnewlib-arm-none-eabi libstdc++-arm-none-eabi-newlib
```
1. Set up your project to point to use the Raspberry Pi Pico SDK
* Either by cloning the SDK locally (most common) :
1. `git clone` this Raspberry Pi Pico SDK repository
1. Copy [pico_sdk_import.cmake](https://github.com/raspberrypi/pico-sdk/blob/master/external/pico_sdk_import.cmake)
from the SDK into your project directory
2. Set `PICO_SDK_PATH` to the SDK location in your environment, or pass it (`-DPICO_SDK_PATH=`) to cmake later.
3. Setup a `CMakeLists.txt` like:
```cmake
cmake_minimum_required(VERSION 3.13)
# initialize the SDK based on PICO_SDK_PATH
# note: this must happen before project()
include(pico_sdk_import.cmake)
project(my_project)
# initialize the Raspberry Pi Pico SDK
pico_sdk_init()
# rest of your project
```
* Or with the Raspberry Pi Pico SDK as a submodule :
1. Clone the SDK as a submodule called `pico-sdk`
1. Setup a `CMakeLists.txt` like:
```cmake
cmake_minimum_required(VERSION 3.13)
# initialize pico-sdk from submodule
# note: this must happen before project()
include(pico-sdk/pico_sdk_init.cmake)
project(my_project)
# initialize the Raspberry Pi Pico SDK
pico_sdk_init()
# rest of your project
```
* Or with automatic download from GitHub :
1. Copy [pico_sdk_import.cmake](https://github.com/raspberrypi/pico-sdk/blob/master/external/pico_sdk_import.cmake)
from the SDK into your project directory
1. Setup a `CMakeLists.txt` like:
```cmake
cmake_minimum_required(VERSION 3.13)
# initialize pico-sdk from GIT
# (note this can come from environment, CMake cache etc)
set(PICO_SDK_FETCH_FROM_GIT on)
# pico_sdk_import.cmake is a single file copied from this SDK
# note: this must happen before project()
include(pico_sdk_import.cmake)
project(my_project)
# initialize the Raspberry Pi Pico SDK
pico_sdk_init()
# rest of your project
```
1. Write your code (see [pico-examples](https://github.com/raspberrypi/pico-examples) or the [Raspberry Pi Pico C/C++ SDK](https://rptl.io/pico-c-sdk) documentation for more information)
About the simplest you can do is a single source file (e.g. hello_world.c)
```c
#include <stdio.h>
#include "pico/stdlib.h"
int main() {
setup_default_uart();
printf("Hello, world!\n");
return 0;
}
```
And add the following to your `CMakeLists.txt`:
```cmake
add_executable(hello_world
hello_world.c
)
# Add pico_stdlib library which aggregates commonly used features
target_link_libraries(hello_world pico_stdlib)
# create map/bin/hex/uf2 file in addition to ELF.
pico_add_extra_outputs(hello_world)
```
Note this example uses the default UART for _stdout_;
if you want to use the default USB see the [hello-usb](https://github.com/raspberrypi/pico-examples/tree/master/hello_world/usb) example.
1. Setup a CMake build directory.
For example, if not using an IDE:
```
$ mkdir build
$ cd build
$ cmake ..
```
1. Make your target from the build directory you created.
```sh
$ make hello_world
```
1. You now have `hello_world.elf` to load via a debugger, or `hello_world.uf2` that can be installed and run on your Raspberry Pi Pico via drag and drop.

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# this is included because toolchain file sets SYSTEM_NAME=PICO
set_property(GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS FALSE)
set(CMAKE_EXECUTABLE_SUFFIX .elf)

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# PICO_CMAKE_CONFIG: PICO_PLATFORM, platform to build for e.g. rp2040/host, default=rp2040 or environment value, group=build
if (DEFINED ENV{PICO_PLATFORM} AND (NOT PICO_PLATFORM))
set(PICO_PLATFORM $ENV{PICO_PLATFORM})
message("Using PICO_PLATFORM from environment ('${PICO_PLATFORM}')")
else()
if (NOT PICO_PLATFORM)
set(PICO_PLATFORM "rp2040")
pico_message("Defaulting PICO_PLATFORM to ${PICO_PLATFORM} since not specified.")
else()
message("PICO platform is ${PICO_PLATFORM}.")
endif()
endif ()
set(PICO_PLATFORM ${PICO_PLATFORM} CACHE STRING "PICO Build platform (e.g. rp2040, host)")
# PICO_CMAKE_CONFIG: PICO_CMAKE_RELOAD_PLATFORM_FILE, custom CMake file to use to set up the platform environment, default=none, group=build
set(PICO_CMAKE_PRELOAD_PLATFORM_FILE "" CACHE INTERNAL "")
set(PICO_CMAKE_PRELOAD_PLATFORM_DIR "${CMAKE_CURRENT_LIST_DIR}/preload/platforms" CACHE INTERNAL "")
if (NOT PICO_CMAKE_PRELOAD_PLATFORM_FILE)
set(PICO_CMAKE_PRELOAD_PLATFORM_FILE ${PICO_CMAKE_PRELOAD_PLATFORM_DIR}/${PICO_PLATFORM}.cmake CACHE INTERNAL "")
endif ()
if (NOT EXISTS "${PICO_CMAKE_PRELOAD_PLATFORM_FILE}")
message(FATAL_ERROR "${PICO_CMAKE_PRELOAD_PLATFORM_FILE} does not exist. \
Either specify a valid PICO_PLATFORM (or PICO_CMAKE_PRELOAD_PLATFORM_FILE).")
endif ()
include(${PICO_CMAKE_PRELOAD_PLATFORM_FILE})

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# PICO_CMAKE_CONFIG: PICO_TOOLCHAIN_PATH, Path to search for compiler, default=none (i.e. search system paths), group=build
set(PICO_TOOLCHAIN_PATH "${PICO_TOOLCHAIN_PATH}" CACHE INTERNAL "")
# Set a default build type if none was specified
set(default_build_type "Release")
if(NOT CMAKE_BUILD_TYPE AND NOT CMAKE_CONFIGURATION_TYPES)
message(STATUS "Defaulting build type to '${default_build_type}' since not specified.")
set(CMAKE_BUILD_TYPE "${default_build_type}" CACHE STRING "Choose the type of build, options are: 'Debug', 'Release', 'MinSizeRel', 'RelWithDebInfo'." FORCE)
# Set the possible values of build type for cmake-gui
set_property(CACHE CMAKE_BUILD_TYPE PROPERTY STRINGS
"Debug" "Release" "MinSizeRel" "RelWithDebInfo")
endif()
if (CMAKE_BUILD_TYPE STREQUAL "Default")
error("Default build type is NOT supported")
endif()
# PICO_CMAKE_CONFIG: PICO_COMPILER, Optionally specifies a different compiler (other than pico_arm_gcc.cmake) - this is not yet fully supported, default=none, group=build
# If PICO_COMPILER is specified, set toolchain file to ${PICO_COMPILER}.cmake.
if (DEFINED PICO_COMPILER)
if (DEFINED CMAKE_TOOLCHAIN_FILE)
get_filename_component(toolchain "${CMAKE_TOOLCHAIN_FILE}" NAME_WE)
if (NOT "${PICO_COMPILER}" STREQUAL "${toolchain}")
message(WARNING "CMAKE_TOOLCHAIN_FILE is already defined to ${toolchain}.cmake, you\
need to delete cache and reconfigure if you want to switch compiler.")
endif ()
else ()
set(toolchain_dir "${CMAKE_CURRENT_LIST_DIR}/preload/toolchains")
set(toolchain_file "${toolchain_dir}/${PICO_COMPILER}.cmake")
if (EXISTS "${toolchain_file}")
set(CMAKE_TOOLCHAIN_FILE "${toolchain_file}" CACHE INTERNAL "")
else ()
# todo improve message
message(FATAL_ERROR "Toolchain file \"${PICO_COMPILER}.cmake\" does not exist, please\
select one from \"cmake/toolchains\" folder.")
endif ()
endif ()
message("PICO compiler is ${PICO_COMPILER}")
endif ()
unset(PICO_COMPILER CACHE)

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function(pico_message param)
if (${ARGC} EQUAL 1)
message("${param}")
return()
endif ()
if (NOT ${ARGC} EQUAL 2)
message(FATAL_ERROR "Expect at most 2 arguments")
endif ()
message("${param}" "${ARGV1}")
endfunction()
macro(assert VAR MSG)
if (NOT ${VAR})
message(FATAL_ERROR "${MSG}")
endif ()
endmacro()
function(pico_find_in_paths OUT PATHS NAME)
foreach(PATH IN LISTS ${PATHS})
if (EXISTS ${PATH}/${NAME})
get_filename_component(FULLNAME ${PATH}/${NAME} ABSOLUTE)
set(${OUT} ${FULLNAME} PARENT_SCOPE)
return()
endif()
endforeach()
set(${OUT} "" PARENT_SCOPE)
endfunction()

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if (NOT (DEFINED PICO_COMPILER OR DEFINED CMAKE_TOOLCHAIN_FILE))
pico_message("Defaulting PICO platform compiler to pico_arm_gcc since not specified.")
set(PICO_COMPILER "pico_arm_gcc")
endif ()

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include(${CMAKE_CURRENT_LIST_DIR}/pico/pico.cmake)

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# Toolchain file is processed multiple times, however, it cannot access CMake cache on some runs.
# We store the search path in an environment variable so that we can always access it.
if (NOT "${PICO_TOOLCHAIN_PATH}" STREQUAL "")
set(ENV{PICO_TOOLCHAIN_PATH} "${PICO_TOOLCHAIN_PATH}")
endif ()
# Find the compiler executable and store its path in a cache entry ${compiler_path}.
# If not found, issue a fatal message and stop processing. PICO_TOOLCHAIN_PATH can be provided from
# commandline as additional search path.
function(pico_find_compiler compiler_path compiler_exe)
# Search user provided path first.
find_program(
${compiler_path} ${compiler_exe}
PATHS ENV PICO_TOOLCHAIN_PATH
PATH_SUFFIXES bin
NO_DEFAULT_PATH
)
# If not then search system paths.
if ("${${compiler_path}}" STREQUAL "${compiler_path}-NOTFOUND")
if (DEFINED ENV{PICO_TOOLCHAIN_PATH})
message(WARNING "PICO_TOOLCHAIN_PATH specified ($ENV{PICO_TOOLCHAIN_PATH}), but ${compiler_exe} not found there")
endif()
find_program(${compiler_path} ${compiler_exe})
endif ()
if ("${${compiler_path}}" STREQUAL "${compiler_path}-NOTFOUND")
set(PICO_TOOLCHAIN_PATH "" CACHE PATH "Path to search for compiler.")
message(FATAL_ERROR "Compiler '${compiler_exe}' not found, you can specify search path with\
\"PICO_TOOLCHAIN_PATH\".")
endif ()
endfunction()

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# NOTE: THIS IS A WIP ONLY PICO_ARM_GCC IS CURRENTLY SUPPORTED
# todo there is probably a more "cmake" way of doing this going thru the standard path with our "PICO" platform
# i.e. CMake<Lang>Information and whatnot
include(${CMAKE_CURRENT_LIST_DIR}/find_compiler.cmake)
# include our Platform/pico.cmake
set(CMAKE_SYSTEM_NAME PICO)
set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus)
# Find CLANG
pico_find_compiler(PICO_COMPILER_CC clang)
pico_find_compiler(PICO_COMPILER_CXX clang)
#pico_find_compiler(PICO_COMPILER_ASM armasm)
set(PICO_COMPILER_ASM "${PICO_COMPILER_CC}" CACHE INTERNAL "")
pico_find_compiler(PICO_OBJCOPY llvm-objcopy)
pico_find_compiler(PICO_OBJDUMP llvm-objdump)
# Specify the cross compiler.
set(CMAKE_C_COMPILER ${PICO_COMPILER_CC} CACHE FILEPATH "C compiler")
set(CMAKE_CXX_COMPILER ${PICO_COMPILER_CXX} CACHE FILEPATH "C++ compiler")
set(CMAKE_C_OUTPUT_EXTENSION .o)
# todo should we be including CMakeASMInformation anyway - i guess that is host side
set(CMAKE_ASM_COMPILER ${PICO_COMPILER_ASM} CACHE FILEPATH "ASM compiler")
set(CMAKE_ASM_COMPILE_OBJECT "<CMAKE_ASM_COMPILER> <DEFINES> <INCLUDES> <FLAGS> -o <OBJECT> -c <SOURCE>")
set(CMAKE_INCLUDE_FLAG_ASM "-I")
set(CMAKE_OBJCOPY ${PICO_OBJCOPY} CACHE FILEPATH "")
set(CMAKE_OBJDUMP ${PICO_OBJDUMP} CACHE FILEPATH "")
# Disable compiler checks.
set(CMAKE_C_COMPILER_FORCED TRUE)
set(CMAKE_CXX_COMPILER_FORCED TRUE)
# Add target system root to cmake find path.
get_filename_component(PICO_COMPILER_DIR "${PICO_COMPILER_CC}" DIRECTORY)
get_filename_component(CMAKE_FIND_ROOT_PATH "${PICO_COMPILER_DIR}" DIRECTORY)
# Look for includes and libraries only in the target system prefix.
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
include_directories(/usr/include/newlib)
# todo move to platform/Generix-xxx
set(ARM_CLANG_COMMON_FLAGS " --target=arm-none-eabi -mcpu=cortex-m0plus -mthumb")
set(CMAKE_C_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
set(CMAKE_CXX_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
set(CMAKE_ASM_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
set(CMAKE_C_FLAGS_DEBUG_INIT "${ARM_CLANG_COMMON_FLAGS} -Og")
set(CMAKE_CXX_FLAGS_DEBUG_INIT "${ARM_CLANG_COMMON_FLAGS} -Og")

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# NOTE: THIS IS A WIP ONLY PICO_ARM_GCC IS CURRENTLY SUPPORTED
# todo there is probably a more "cmake" way of doing this going thru the standard path with our "PICO" platform
# i.e. CMake<Lang>Information and whatnot
include(${CMAKE_CURRENT_LIST_DIR}/find_compiler.cmake)
# include our Platform/PICO.cmake
set(CMAKE_SYSTEM_NAME PICO)
set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus)
# Find ARMClang.
pico_find_compiler(PICO_COMPILER_CC armclang)
pico_find_compiler(PICO_COMPILER_CXX armclang)
pico_find_compiler(PICO_COMPILER_ASM armasm)
set(PICO_COMPILER_ASM "${PICO_COMPILER_ASM}" CACHE INTERNAL "")
pico_find_compiler(PICO_OBJCOPY llvm-objcopy)
pico_find_compiler(PICO_OBJDUMP llvm-objdump)
# Specify the cross compiler.
set(CMAKE_C_COMPILER ${PICO_COMPILER_CC} CACHE FILEPATH "C compiler")
set(CMAKE_CXX_COMPILER ${PICO_COMPILER_CXX} CACHE FILEPATH "C++ compiler")
set(CMAKE_C_OUTPUT_EXTENSION .o)
# todo should we be including CMakeASMInformation anyway - i guess that is host side
set(CMAKE_ASM_COMPILER ${PICO_COMPILER_ASM} CACHE FILEPATH "ASM compiler")
set(CMAKE_ASM_COMPILE_OBJECT "<CMAKE_ASM_COMPILER> <DEFINES> <INCLUDES> <FLAGS> -o <OBJECT> -c <SOURCE>")
set(CMAKE_INCLUDE_FLAG_ASM "-I")
set(CMAKE_OBJCOPY ${PICO_OBJCOPY} CACHE FILEPATH "")
set(CMAKE_OBJDUMP ${PICO_OBJDUMP} CACHE FILEPATH "")
# Disable compiler checks.
set(CMAKE_C_COMPILER_FORCED TRUE)
set(CMAKE_CXX_COMPILER_FORCED TRUE)
# Add target system root to cmake find path.
get_filename_component(PICO_COMPILER_DIR "${PICO_COMPILER_CC}" DIRECTORY)
get_filename_component(CMAKE_FIND_ROOT_PATH "${PICO_COMPILER_DIR}" DIRECTORY)
# Look for includes and libraries only in the target system prefix.
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
# todo move to platform/Generix-xxx
set(ARM_CLANG_COMMON_FLAGS " --cpu=Cortex-M0plus")
string(APPEND CMAKE_C_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
string(APPEND CMAKE_CXX_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
string(APPEND CMAKE_ASM_FLAGS_INIT "${ARM_CLANG_COMMON_FLAGS}")
string(APPEND CMAKE_C_FLAGS_DEBUG_INIT "${ARM_CLANG_COMMON_FLAGS} -Og")
string(APPEND CMAKE_CXX_FLAGS_DEBUG_INIT "${ARM_CLANG_COMMON_FLAGS} -Og")

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# todo there is probably a more "cmake" way of doing this going thru the standard path with our "PICO" platform
# i.e. CMake<Lang>Information and whatnot
include(${CMAKE_CURRENT_LIST_DIR}/find_compiler.cmake)
# include our Platform/PICO.cmake
set(CMAKE_SYSTEM_NAME PICO)
set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus)
if (NOT PICO_GCC_TRIPLE)
if (DEFINED ENV{PICO_GCC_TRIPLE})
set(PICO_GCC_TRIPLE $ENV{PICO_GCC_TRIPLE})
message("PICO_GCC_TRIPLE set from environment: $ENV{PICO_GCC_TRIPLE}")
else()
set(PICO_GCC_TRIPLE arm-none-eabi)
#pico_message_debug("PICO_GCC_TRIPLE defaulted to arm-none-eabi")
endif()
endif()
# Find GCC for ARM.
pico_find_compiler(PICO_COMPILER_CC ${PICO_GCC_TRIPLE}-gcc)
pico_find_compiler(PICO_COMPILER_CXX ${PICO_GCC_TRIPLE}-g++)
set(PICO_COMPILER_ASM "${PICO_COMPILER_CC}" CACHE INTERNAL "")
pico_find_compiler(PICO_OBJCOPY ${PICO_GCC_TRIPLE}-objcopy)
pico_find_compiler(PICO_OBJDUMP ${PICO_GCC_TRIPLE}-objdump)
# Specify the cross compiler.
set(CMAKE_C_COMPILER ${PICO_COMPILER_CC} CACHE FILEPATH "C compiler")
set(CMAKE_CXX_COMPILER ${PICO_COMPILER_CXX} CACHE FILEPATH "C++ compiler")
set(CMAKE_C_OUTPUT_EXTENSION .o)
# todo should we be including CMakeASMInformation anyway - i guess that is host side
set(CMAKE_ASM_COMPILER ${PICO_COMPILER_ASM} CACHE FILEPATH "ASM compiler")
set(CMAKE_ASM_COMPILE_OBJECT "<CMAKE_ASM_COMPILER> <DEFINES> <INCLUDES> <FLAGS> -o <OBJECT> -c <SOURCE>")
set(CMAKE_INCLUDE_FLAG_ASM "-I")
set(CMAKE_OBJCOPY ${PICO_OBJCOPY} CACHE FILEPATH "")
set(CMAKE_OBJDUMP ${PICO_OBJDUMP} CACHE FILEPATH "")
# Disable compiler checks.
set(CMAKE_C_COMPILER_FORCED TRUE)
set(CMAKE_CXX_COMPILER_FORCED TRUE)
# Add target system root to cmake find path.
get_filename_component(PICO_COMPILER_DIR "${PICO_COMPILER_CC}" DIRECTORY)
get_filename_component(CMAKE_FIND_ROOT_PATH "${PICO_COMPILER_DIR}" DIRECTORY)
# Look for includes and libraries only in the target system prefix.
set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
option(PICO_DEOPTIMIZED_DEBUG "Build debug builds with -O0" 0)
# todo move to platform/Generix-xxx
# on ARM -mcpu should not be mixed with -march
set(ARM_GCC_COMMON_FLAGS " -mcpu=cortex-m0plus -mthumb")
foreach(LANG IN ITEMS C CXX ASM)
set(CMAKE_${LANG}_FLAGS_INIT "${ARM_GCC_COMMON_FLAGS}")
if (PICO_DEOPTIMIZED_DEBUG)
set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
else()
set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
endif()
set(CMAKE_${LANG}_LINK_FLAGS "-Wl,--build-id=none")
endforeach()

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PROJECT_NAME = "Raspberry Pi Pico SDK"
PROJECT_BRIEF = "Raspberry Pi Pico SDK documentation"
PROJECT_NUMBER = @PICO_SDK_VERSION_STRING@
#STRIP_FROM_PATH = @PROJECT_SOURCE_DIR@
STRIP_FROM_PATH = @DOXY_INPUT_DIRS@
# @PROJECT_BINARY_DIR@
#INPUT = @doxy_main_page@ \
# @PROJECT_SOURCE_DIR@ \
# @PROJECT_BINARY_DIR@
FILE_PATTERNS = *.h \
*.cpp \
*.c \
*.S \
*.s \
*.md
USE_MDFILE_AS_MAINPAGE = @PROJECT_SOURCE_DIR@/docs/mainpage.md
LAYOUT_FILE = @PROJECT_SOURCE_DIR@/docs/DoxygenLayout.xml
HTML_FOOTER = @PROJECT_SOURCE_DIR@/docs/footer.html
HTML_HEADER = @PROJECT_SOURCE_DIR@/docs/header.html
OPTIMIZE_OUTPUT_FOR_C = YES
# HTML_EXTRA_STYLESHEET = @PROJECT_SOURCE_DIR@/docs/customdoxygen.css
HTML_EXTRA_STYLESHEET = @PROJECT_SOURCE_DIR@/docs/normalise.css @PROJECT_SOURCE_DIR@/docs/main.css @PROJECT_SOURCE_DIR@/docs/styles.css
HTML_EXTRA_FILES = @PROJECT_SOURCE_DIR@/docs/logo-mobile.svg @PROJECT_SOURCE_DIR@/docs/logo.svg @PROJECT_SOURCE_DIR@/docs/search.svg \
@PROJECT_SOURCE_DIR@/docs/main.js @PROJECT_SOURCE_DIR@/docs/pico.jpg @PROJECT_SOURCE_DIR@/docs/rp2040.png
GENERATE_TREEVIEW = YES # This is needed as it wraps the content area in an HTML tag that we need to use
HTML_COLORSTYLE_HUE = 350
HTML_COLORSTYLE_SAT = 200
HTML_COLORSTYLE_GAMMA = 150
GENERATE_LATEX = NO
GENERATE_XML = YES
GROUP_GRAPHS = NO
ALIASES += tag=@internal
ALIASES += end=@internal
OUTPUT_DIRECTORY = @DOXY_OUTPUT_DIR@
INPUT = @PROJECT_SOURCE_DIR@/docs/index.h @DOXY_INPUT_DIRS@ @PROJECT_SOURCE_DIR@/docs/
#EXCLUDE = @DOXY_EXCLUDE_DIRS@ @PROJECT_SOURCE_DIR@/src/rp2040
EXCLUDE = @DOXY_EXCLUDE_DIRS@
RECURSIVE = YES
EXAMPLE_PATH = @PICO_EXAMPLES_PATH@
# This is needed as we have a number of static inline functions that need to be documented.
EXTRACT_STATIC = YES
EXTRACT_ALL = NO
ALWAYS_DETAILED_SEC = NO
#REPEAT_BRIEF = NO
# Need these next options to ensure that functions with modifiers do not confuse the Doxygen parser.
# And any further function modifiers here.
MACRO_EXPANSION = YES
PREDEFINED = __not_in_flash_func(x) \
__time_critical_func(x) \
__not_in_flash(x)= \
__no_inline_not_in_flash(x)= \
__attribute__(x)=

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<doxygenlayout version="1.0">
<!-- Generated by doxygen 1.8.17 -->
<!-- Navigation index tabs for HTML output -->
<navindex>
<tab type="mainpage" visible="yes" title="Introduction"></tab>
<tab type="modules" visible="yes" title="API Documentation" intro="These are the libraries supplied in the Raspberry Pi Pico SDK"/>
<tab type="user" url="@ref examples_page" visible="yes" title="Examples" intro="Links to SDK examples"/>
<tab type="usergroup" url="@ref weblinks_page" visible="yes" title="Additional Documentation" intro="Links to datasheets and documentation">
<tab type="user" url="https://rptl.io/pico-datasheet" visible="yes" title="Raspberry Pi Pico Datasheet" intro=""/>
<tab type="user" url="https://rptl.io/rp2040-datasheet" visible="yes" title="RP2040 Datasheet" intro=""/>
<tab type="user" url="https://rptl.io/rp2040-design" visible="yes" title="Hardware design with RP2040" intro=""/>
<tab type="user" url="https://rptl.io/pico-c-sdk" visible="yes" title="Raspberry Pi Pico C/C++ SDK" intro=""/>
<tab type="user" url="https://rptl.io/pico-micropython" visible="yes" title="Raspberry Pi Pico Python SDK" intro=""/>
<tab type="user" url="https://rptl.io/pico-get-started" visible="yes" title="Getting started with Raspberry Pi Pico" intro=""/>
<tab type="user" url="https://rptl.io/pico-faq" visible="yes" title="Raspberry Pi Pico FAQ" intro=""/>
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<tab type="exceptionhierarchy" visible="yes" title="" intro=""/>
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<tab type="files" visible="no" title="">
<tab type="filelist" visible="yes" title="" intro=""/>
<tab type="globals" visible="yes" title="" intro=""/>
</tab>
<tab type="examples" visible="yes" title="" intro=""/>
</navindex>
<!-- Layout definition for a class page -->
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## Examples Index {#examples_page}
This page links to the various example code fragments in this documentation. For more complete examples, please see the [pico-examples](https://github.com/raspberrypi/pico-examples) repository, which contains complete buildable projects.
- [RTC example](@ref rtc_example)
- [UART example](@ref uart_example)
- [ADC example](@ref adc_example)
- [I2C example](@ref i2c_example)
- [Clock example](@ref clock_example)
- [Timer example](@ref timer_example)
- [Flash programming example](@ref flash_example)
- [Watchdog example](@ref watchdog_example)
- [Divider example](@ref divider_example)
- [PWM example](@ref pwm_example)
- [Multicore example](@ref multicore_example)
- [Reset example](@ref reset_example)
All examples are "Copyright (c) 2020 Raspberry Pi (Trading) Ltd", and are released under a 3-Clause BSD licence. Briefly, this means you are free to use the example code
as long as you retain the copyright notice. Full details on the licence can be found [here](https://opensource.org/licenses/BSD-3-Clause).

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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
// Here to organize documentation order
/**
* \defgroup hardware Hardware APIs
* This group of libraries provides a thin and efficient C API / abstractions to access the RP2040 hardware without having to read and write
* hardware registers directly.
* @{
* \defgroup hardware_adc hardware_adc
* \defgroup hardware_base hardware_base
* \defgroup hardware_claim hardware_claim
* \defgroup hardware_clocks hardware_clocks
* \defgroup hardware_divider hardware_divider
* \defgroup hardware_dma hardware_dma
* \defgroup hardware_exception hardware_exception
* \defgroup hardware_flash hardware_flash
* \defgroup hardware_gpio hardware_gpio
* \defgroup hardware_i2c hardware_i2c
* \defgroup hardware_interp hardware_interp
* \defgroup hardware_irq hardware_irq
* \defgroup hardware_pio hardware_pio
* \defgroup hardware_pll hardware_pll
* \defgroup hardware_pwm hardware_pwm
* \defgroup hardware_resets hardware_resets
* \defgroup hardware_rtc hardware_rtc
* \defgroup hardware_spi hardware_spi
* \defgroup hardware_sync hardware_sync
* \defgroup hardware_timer hardware_timer
* \defgroup hardware_uart hardware_uart
* \defgroup hardware_vreg hardware_vreg
* \defgroup hardware_watchdog hardware_watchdog
* \defgroup hardware_xosc hardware_xosc
* @}
*
* \defgroup high_level High Level APIs
* This group of libraries provide higher level functionality that isn't hardware related or provides a richer
* set of functionality above the basic hardware interfaces
* @{
* \defgroup pico_multicore pico_multicore
* \defgroup pico_stdlib pico_stdlib
* \defgroup pico_sync pico_sync
* \defgroup pico_time pico_time
* \defgroup pico_unique_id pico_unique_id
* \defgroup pico_util pico_util
* @}
*
* \defgroup third_party Third-party Libraries
* Third party libraries for implementing high level functionality.
* @{
* \defgroup tinyusb_device tinyusb_device
* \defgroup tinyusb_host tinyusb_host
* @}
*
* \defgroup runtime Runtime Infrastructure
* Libraries that are used to provide efficient implementation of certain
* language level and C library functions, as well as CMake INTERFACE libraries
* abstracting the compilation and link steps in the SDK
* @{
* \defgroup boot_stage2 boot_stage2
* \defgroup pico_base pico_base
* \defgroup pico_binary_info pico_binary_info
* \defgroup pico_bit_ops pico_bit_ops
* \defgroup pico_bootrom pico_bootrom
* \defgroup pico_bootsel_via_double_reset pico_bootsel_via_double_reset
* \defgroup pico_cxx_options pico_cxx_options
* \defgroup pico_divider pico_divider
* \defgroup pico_double pico_double
* \defgroup pico_float pico_float
* \defgroup pico_int64_ops pico_int64_ops
* \defgroup pico_malloc pico_malloc
* \defgroup pico_mem_ops pico_mem_ops
* \defgroup pico_platform pico_platform
* \defgroup pico_printf pico_printf
* \defgroup pico_runtime pico_runtime
* \defgroup pico_stdio pico_stdio
* \defgroup pico_standard_link pico_standard_link
* @}
*
* \defgroup misc External API Headers
* Headers for interfaces that are shared with code outside of the SDK
* @{
* \defgroup boot_picoboot boot_picoboot
* \defgroup boot_uf2 boot_uf2
* @}
*/

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# Raspberry Pi Pico SDK
The Raspberry Pi Pico SDK (Software Development Kit), henceforth SDK, provides the headers, libraries and build system necessary to write programs for the RP2040 based devices such as the Raspberry Pi Pico in C, C++ or assembly language. The SDK is designed to provide an API and programming environment that is familiar both to non-embedded C developers and embedded C developers alike.
A single program runs on the device at a time with a conventional main() method. Standard C/C++ libraries are supported along with APIs for accessing the RP2040’s hardware, including DMA, IRQs, and the wide variety fixed function peripherals and PIO (Programmable IO).
Additionally the SDK provides higher level libraries for dealing with timers, USB, synchronization and multi-core programming, along with additional high level functionality built using PIO such as audio. The SDK can be used to build anything from simple applications, full fledged runtime environments such as MicroPython, to low level software such as the RP2040’s on chip bootrom itself.
This documentation is generated from the SDK source tree using Doxygen. It provides basic information on the APIs used for each library, but does not provide usage information. Please refer to the Databooks for usage and more technical information.
## SDK Design
The RP2040 is a powerful chip, however it is an embedded environment, so both RAM, and program space are at premium. Additionally the trade offs between performance and other factors (e.g. edge case error handling, runtime vs compile time configuration) are necessarily much more visible to the developer than they might be on other higher level platforms.
The intention within the SDK has been for features to just work out of the box, with sensible defaults, but also to give the developer as much control and power as possible (if they want it) to fine tune every aspect of the application they are building and the libraries used.
## The Build System
The SDK uses CMake to manage the build. CMake is widely supported by IDEs (Integrated Development Environments), and allows a simple specification of the build (via CMakeLists.txt files), from which CMake can generate a build system (for use by `make`, `ninja` or other build tools) customized for the platform and by any configuration variables the developer chooses for a list of configuration variables).
Apart from being a widely used build system for C/C++ development, CMake is fundamental to the way the SDK is structured, and how applications are configured and built.
The SDK builds an executable which is bare metal, i.e. it includes the entirety of the code needed to run on the device (other than floating point and other optimized code contained in the bootrom within the RP2040).
## Examples
This SDK documentation contains a number of example code fragments. An index of these examples can be found [here](@ref examples_page). These examples, and any other source code included in this documentation, is Copyright &copy; 2020 Raspberry Pi (Trading) Ltd. and licensed under the [3-Clause BSD](https://opensource.org/licenses/BSD-3-Clause) license.

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color: black;
font: 400 14px/22px Roboto,sans-serif;
font-weight: bold;
}
div.toc ul {
margin: 0;
}
div.toc ul li {
margin-left: 0 !important;
padding-left: 15px !important;
font: 400 14px/22px Roboto,sans-serif;
}
div.toc li ul {
padding-left: 10px;
padding-top: 7px;
}
/* Group Headers */
h2.groupheader {
border-bottom: solid 1px #d4d4d4;
color: black;
margin: 0px;
margin-top: 30px;
padding: 10px 0;
}
tr.heading h2 {
margin: 0px;
}
/* Tables */
table.memberdecls {
margin-top: 30px;
/*margin-bottom: 30px;*/
}
table.memberdecls td.memSeparator {
line-height: 0;
font-size: 0;
border-bottom: 1px solid #d4d4d4;
}
table.memberdecls td.memItemLeft {
padding: 7px 15px 4px 15px;
background-color: #f5f5f5;
}
table.memberdecls td.memItemRight {
padding: 7px 15px 4px 15px;
background-color: #f5f5f5;
}
table.memberdecls td.mdescLeft {
padding: 7px 15px 4px 15px;
background-color: #f5f5f5;
}
table.memberdecls td.mdescRight {
padding: 7px 15px 4px 15px;
background-color: #f5f5f5;
}
table.params .paramname {
color: black;
}
table.markdownTable td, table.markdownTable th {
border: 1px solid #d4d4d4;
padding: 3px 7px;
color: black;
}
table.markdownTable th.markdownTableHeadLeft, table.markdownTable th.markdownTableHeadRight, table.markdownTable th.markdownTableHeadCenter, table.markdownTable th.markdownTableHeadNone {
background-color: #f5f5f5;
color: black;
padding: 3px 7px;
}
div.contents .fragment {
border: solid 1px #CA4F62;
padding: 20px;
border-radius: 4px;
}
div.contents .line {
line-height: 15px;
}
.memtitle {
margin-top: 10px;
border-top: solid 1px #d4d4d4;
border-left: solid 1px #d4d4d4;
border-right: solid 1px #d4d4d4;
background: none;
background-color: #f5f5f5;
padding: 8px 10px;
font-weight: bold;
font-size: 18px;
}
.memtitle .permalink a, .memtitle .permalink a:visited {
color: black;
}
.memtitle .permalink a:hover {
text-decoration: none;
}
.memitem {
margin: 0;
box-shadow: none;
}
.memitem.glow {
box-shadow: 0 0 15px #CA4F62;
}
.memitem .memproto {
box-shadow: none;
background: none;
background-color: #f5f5f5;
border-top: solid 1px #d4d4d4;
border-left: solid 1px #d4d4d4;
border-right: solid 1px #d4d4d4;
color: black;
padding: 8px 10px;
}
.memitem .memproto .memname {
margin-left: 0;
}
.memitem .memdoc {
box-shadow: none;
background: none;
border-bottom: solid 1px #d4d4d4;
border-left: solid 1px #d4d4d4;
border-right: solid 1px #d4d4d4;
padding: 10px 12px;
}
/* General links? */
a.el {
font-weight: normal;
}
a.el {
color: #CA4F62;
}
a.el:visited {
color: #CA4F62;
}
a.el:hover {
color: #CA4F62;
}
div.contents a {
color: #CA4F62;
}
div.contents a:visited {
color: #CA4F62;
}
div.contents a:hover {
color: #CA4F62;
}
/* Highlighted effect */
h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow {
text-shadow: 0 0 15px #CA4F62;
}
/* Directory */
div.directory {
margin: 20px 0px;
border-top: 1px solid #d4d4d4;
border-bottom: 1px solid #d4d4d4;
}
div.directory .levels {
font-size: 13px;
padding: 8px 0;
}
div.directory .levels span:hover {
color: #CA4F62;
}
table.directory {
/*width: 100%;*/
}
table.directory tr.even {
background-color: #f5f5f5;
}
table.directory td.entry {
padding: 8px 6px;
vertical-align: middle;
box-sizing: border-box;
}
table.directory td.desc {
padding: 8px 6px;
vertical-align: middle;
box-sizing: border-box;
}
/* Icons */
.iconfopen, .icondoc {
margin: 0;
}
dl.reflist dt {
box-shadow: none;
background-color: #F5F5F5;
border-top: solid 1px #d4d4d4;
border-left: solid 1px #d4d4d4;
border-right: solid 1px #d4d4d4;
padding: 10px;
}
dl.reflist dd {
box-shadow: none;
background: none;
border-bottom: solid 1px #d4d4d4;
border-left: solid 1px #d4d4d4;
border-right: solid 1px #d4d4d4;
padding: 10px;
}
/* Standard arrow icon? */
.arrow {
color: #d4d4d4;
width: auto;
height: auto;
margin: 0 5px;
}
.icona {
height: auto;
width: auto;
margin-right: 8px;
}
.icona .icon {
font-family: 'Roboto', sans-serif;
margin: 0;
background-color: #CA4F62;
padding: 1px;
font-weight: normal;
}
/* horizontal ruler */
hr {
border: none;
border-top: 1px solid #d4d4d4;
margin-top: 20px;
margin-bottom: 20px;
}
/* Notes */
dl.warning {
margin: 0px;
padding: 0px;
padding-left: 10px;
}
dl.note {
margin: 0px;
padding: 0px;
padding-left: 10px;
}
dl.attention {
margin: 0px;
padding: 0px;
padding-left: 10px;
}
dl.todo {
margin: 0px;
padding: 0px;
padding-left: 10px;
}
dl dt, dl dt a.el {
font-weight: bold;
}
dl dd {
margin: 0px;
}
table.fieldtable {
box-shadow: none;
border: 1px solid #d4d4d4;
}
table.fieldtable th {
background: none;
background-color: #F5F5F5;
border-bottom: 1px solid #d4d4d4;
color: black;
font-size: 100%;
font-weight: bold;
}
table.fieldtable td.fieldname, table.fieldtable td.fielddoc {
border-bottom: 1px solid #d4d4d4;
border-right: 1px solid #d4d4d4;
vertical-align: middle;
}
div.qindex {
background-color: #F5F5F5;
border: none;
text-align: center;
padding: 8px 0;
}
table.classindex div.ah {
font-family: 'Roboto', sans-serif;
margin: 0;
background: none;
background-color: #CA4F62;
padding: 1px;
font-weight: normal;
border: none;
box-shadow: none;
border-radius: 0;
padding: 3px;
}
table.classindex td {
padding: 3px 6px;
vertical-align: middle;
font-size: 14px;
}
table.classindex table td {
padding: 0;
vertical-align: middle;
}
div.textblock h2 {
border-bottom: solid 1px #d4d4d4;
padding-bottom: 10px;
}
.navigation-mobile {
display: none;
background-color: #F5F5F5;
position: fixed;
top: 0;
left: 0;
width: 100%;
height: 70px;
}
@media (max-width: 1012px) {
.navigation-mobile {
display: block;
}
}
.navigation-toggle {
cursor: pointer;
width: 44px;
height: 44px;
margin-right: 20px;
position: absolute;
right: 0;
top: 50%;
transform: translateY(-50%);
bottom: 5%;
z-index: 50;
display: none;
}
@media (max-width: 1012px) {
.navigation-toggle {
display: block;
}
}
@media (max-width: 767px) {
.navigation-toggle {
margin-right: 0px;
}
}
.navigation-toggle span {
display: block;
text-indent: -9999px;
position: absolute;
height: 2px;
left: 10px;
right: 10px;
background-color: #CA4F62;
border-radius: 1px;
transition: 0.15s all;
}
.line-1 {
top: 14px;
}
.line-2 {
top: 50%;
margin-top: -1px;
}
.line-3 {
bottom: 14px;
}
.navigation-toggle.clicked .line-1 {
transform: rotate(45deg);
top: 21px;
}
.navigation-toggle.clicked .line-2 {
opacity: 0;
}
.navigation-toggle.clicked .line-3 {
transform: rotate(-45deg);
bottom: 21px;
}

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## Documentation and datasheets {#weblinks_page}
The full documentation for the RP2040 and Raspberry Pi Pico board can be found at the following links
- [RP2040 Datasheet](https://rptl.io/rp2040-datasheet)
- [Raspberry Pi Pico Datasheet](https://rptl.io/pico-datasheet)
- [Hardware design with the RP2040](https://rptl.io/rp2040-design)
- [Raspberry Pi Pico C/C++ SDK](https://rptl.io/pico-c-sdk)
- [Raspberry Pi Pico Python SDK](https://rptl.io/pico-micropython)
- [Getting started with Raspberry Pi Pico](https://rptl.io/pico-get-started)
- [Raspberry Pi Pico FAQ](https://rptl.io/pico-faq)
### Weblinks
At Raspberry Pi we have a very community-based attitude to help. We run a very popular and busy forum where you can ask questions about any aspect of the Raspberry Pi ecosystem, including the Raspberry Pi Pico.
You can find our forums at the [following link](https://forums.raspberrypi.com/).
For the main Raspberry Pi website, [see here](https://www.raspberrypi.com)
For the Raspberry Pi Pico page, [see here](https://rptl.io/rp2040-get-started)
### GitHub
All the source code for the Raspberry Pi Pico SDK, examples and other libraries can be found on GitHub.
- [Raspberry Pi Pico SDK](https://github.com/raspberrypi/pico-sdk)
- [Pico Examples](https://github.com/raspberrypi/pico-examples)
- [Pico Extras - Libraries under development](https://github.com/raspberrypi/pico-extras)
- [Pico Playground - Examples that use Pico Extras](https://github.com/raspberrypi/pico-playground)
- [Pico Bootrom source code](https://github.com/raspberrypi/pico-bootrom)

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# This is a copy of <PICO_SDK_PATH>/external/pico_sdk_import.cmake
# This can be dropped into an external project to help locate this SDK
# It should be include()ed prior to project()
if (DEFINED ENV{PICO_SDK_PATH} AND (NOT PICO_SDK_PATH))
set(PICO_SDK_PATH $ENV{PICO_SDK_PATH})
message("Using PICO_SDK_PATH from environment ('${PICO_SDK_PATH}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT} AND (NOT PICO_SDK_FETCH_FROM_GIT))
set(PICO_SDK_FETCH_FROM_GIT $ENV{PICO_SDK_FETCH_FROM_GIT})
message("Using PICO_SDK_FETCH_FROM_GIT from environment ('${PICO_SDK_FETCH_FROM_GIT}')")
endif ()
if (DEFINED ENV{PICO_SDK_FETCH_FROM_GIT_PATH} AND (NOT PICO_SDK_FETCH_FROM_GIT_PATH))
set(PICO_SDK_FETCH_FROM_GIT_PATH $ENV{PICO_SDK_FETCH_FROM_GIT_PATH})
message("Using PICO_SDK_FETCH_FROM_GIT_PATH from environment ('${PICO_SDK_FETCH_FROM_GIT_PATH}')")
endif ()
set(PICO_SDK_PATH "${PICO_SDK_PATH}" CACHE PATH "Path to the Raspberry Pi Pico SDK")
set(PICO_SDK_FETCH_FROM_GIT "${PICO_SDK_FETCH_FROM_GIT}" CACHE BOOL "Set to ON to fetch copy of SDK from git if not otherwise locatable")
set(PICO_SDK_FETCH_FROM_GIT_PATH "${PICO_SDK_FETCH_FROM_GIT_PATH}" CACHE FILEPATH "location to download SDK")
if (NOT PICO_SDK_PATH)
if (PICO_SDK_FETCH_FROM_GIT)
include(FetchContent)
set(FETCHCONTENT_BASE_DIR_SAVE ${FETCHCONTENT_BASE_DIR})
if (PICO_SDK_FETCH_FROM_GIT_PATH)
get_filename_component(FETCHCONTENT_BASE_DIR "${PICO_SDK_FETCH_FROM_GIT_PATH}" REALPATH BASE_DIR "${CMAKE_SOURCE_DIR}")
endif ()
FetchContent_Declare(
pico_sdk
GIT_REPOSITORY https://github.com/raspberrypi/pico-sdk
GIT_TAG master
)
if (NOT pico_sdk)
message("Downloading Raspberry Pi Pico SDK")
FetchContent_Populate(pico_sdk)
set(PICO_SDK_PATH ${pico_sdk_SOURCE_DIR})
endif ()
set(FETCHCONTENT_BASE_DIR ${FETCHCONTENT_BASE_DIR_SAVE})
else ()
message(FATAL_ERROR
"SDK location was not specified. Please set PICO_SDK_PATH or set PICO_SDK_FETCH_FROM_GIT to on to fetch from git."
)
endif ()
endif ()
get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
if (NOT EXISTS ${PICO_SDK_PATH})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' not found")
endif ()
set(PICO_SDK_INIT_CMAKE_FILE ${PICO_SDK_PATH}/pico_sdk_init.cmake)
if (NOT EXISTS ${PICO_SDK_INIT_CMAKE_FILE})
message(FATAL_ERROR "Directory '${PICO_SDK_PATH}' does not appear to contain the Raspberry Pi Pico SDK")
endif ()
set(PICO_SDK_PATH ${PICO_SDK_PATH} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
include(${PICO_SDK_INIT_CMAKE_FILE})

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# Pre-initialize the Raspberry Pi Pico SDK, setting up the platform and toolchain and some CMake utility functions
# This file must be included prior to the project() call
# Note: this file is perhaps named badly, as it provides a method pico_sdk_init which
# the enclosing project calls LATER to actually "initialize" the SDK (by including the CMakeLists.txt from this
# same directory)
if (NOT TARGET _pico_sdk_pre_init_marker)
add_library(_pico_sdk_pre_init_marker INTERFACE)
function(pico_is_top_level_project VAR)
string(TOLOWER ${CMAKE_CURRENT_LIST_DIR} __list_dir)
string(TOLOWER ${CMAKE_SOURCE_DIR} __source_dir)
if (__source_dir STREQUAL __list_dir)
set(${VAR} 1 PARENT_SCOPE)
else()
set(${VAR} 0 PARENT_SCOPE)
endif()
endfunction()
function(pico_message_debug MESSAGE)
# The log-level system was added in CMake 3.15.
if(${CMAKE_VERSION} VERSION_LESS "3.15.0")
message(${MESSAGE})
else()
message(DEBUG ${MESSAGE})
endif()
endfunction()
if (NOT PICO_SDK_PATH)
set(PICO_SDK_PATH ${CMAKE_CURRENT_LIST_DIR})
endif ()
get_filename_component(PICO_SDK_PATH "${PICO_SDK_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
set(PICO_SDK_PATH ${CMAKE_CURRENT_LIST_DIR} CACHE PATH "Path to the Raspberry Pi Pico SDK" FORCE)
list(APPEND CMAKE_MODULE_PATH ${PICO_SDK_PATH}/cmake)
include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_version.cmake)
include(pico_utils)
message("PICO_SDK_PATH is ${CMAKE_CURRENT_LIST_DIR}")
include(pico_pre_load_platform)
# We want to configure correct toolchain prior to project load
# todo perhaps this should be included by the platform instead?
include(pico_pre_load_toolchain)
macro(pico_sdk_init)
if (NOT CMAKE_PROJECT_NAME)
message(WARNING "pico_sdk_init() should be called after the project is created (and languages added)")
endif()
add_subdirectory(${PICO_SDK_PATH} pico-sdk)
pico_is_top_level_project(ISTOP)
endmacro()
macro(add_sub_list_dirs var)
foreach(LIST_DIR IN LISTS ${var})
get_filename_component(SHORT_NAME "${LIST_DIR}" NAME)
pico_message_debug("Including custom CMakeLists.txt ${SHORT_NAME}")
add_subdirectory(${LIST_DIR} ${SHORT_NAME})
endforeach()
endmacro()
macro(add_sub_list_files var)
foreach(LIST_FILE IN LISTS ${var})
pico_message_debug("Including custom CMake file ${LIST_FILE}")
include(${LIST_FILE})
endforeach()
endmacro()
macro(pico_register_common_scope_var NAME)
if (NOT ${NAME} IN_LIST PICO_PROMOTE_COMMON_SCOPE_VARS)
list(APPEND PICO_PROMOTE_COMMON_SCOPE_VARS ${NAME})
endif()
endmacro()
set(PICO_PROMOTE_COMMON_SCOPE_VARS
PICO_INCLUDE_DIRS
PICO_SDK_POST_LIST_DIRS
PICO_SDK_POST_LIST_FILES
PICO_CONFIG_HEADER_FILES
PICO_RP2040_CONFIG_HEADER_FILES
)
macro(pico_promote_common_scope_vars)
set(PICO_PROMOTE_COMMON_SCOPE_VARS ${PICO_PROMOTE_COMMON_SCOPE_VARS} PARENT_SCOPE)
foreach(VAR IN LISTS PICO_PROMOTE_COMMON_SCOPE_VARS)
SET(${VAR} ${${VAR}} PARENT_SCOPE)
endforeach()
endmacro()
endif()

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bsp/pico/pico-sdk/pico_sdk_version.cmake Normal file
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# PICO_BUILD_DEFINE: PICO_SDK_VERSION_MAJOR, SDK major version number, type=int, group=pico_base
# PICO_CONFIG: PICO_SDK_VERSION_MAJOR, SDK major version number, type=int, group=pico_base
set(PICO_SDK_VERSION_MAJOR 1)
# PICO_BUILD_DEFINE: PICO_SDK_VERSION_MINOR, SDK minor version number, type=int, group=pico_base
# PICO_CONFIG: PICO_SDK_VERSION_MINOR, SDK minor version number, type=int, group=pico_base
set(PICO_SDK_VERSION_MINOR 3)
# PICO_BUILD_DEFINE: PICO_SDK_VERSION_REVISION, SDK version revision, type=int, group=pico_base
# PICO_CONFIG: PICO_SDK_VERSION_REVISION, SDK version revision, type=int, group=pico_base
set(PICO_SDK_VERSION_REVISION 0)
# PICO_BUILD_DEFINE: PICO_SDK_VERSION_PRE_RELEASE_ID, optional SDK pre-release version identifier, type=string, group=pico_base
# PICO_CONFIG: PICO_SDK_VERSION_PRE_RELEASE_ID, optional SDK pre-release version identifier, type=string, group=pico_base
#set(PICO_SDK_VERSION_PRE_RELEASE_ID develop)
# PICO_BUILD_DEFINE: PICO_SDK_VERSION_STRING, SDK version, type=string, group=pico_base
# PICO_CONFIG: PICO_SDK_VERSION_STRING, SDK version, type=string, group=pico_base
set(PICO_SDK_VERSION_STRING "${PICO_SDK_VERSION_MAJOR}.${PICO_SDK_VERSION_MINOR}.${PICO_SDK_VERSION_REVISION}")
if (PICO_SDK_VERSION_PRE_RELEASE_ID)
set(PICO_SDK_VERSION_STRING "${PICO_SDK_VERSION_STRING}-${PICO_SDK_VERSION_PRE_RELEASE_ID}")
endif()

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# PICO_CMAKE_CONFIG: PICO_BOARD, The board name being built for. This is overridable from the user environment, type=string, default=pico, group=build
if (DEFINED ENV{PICO_BOARD})
set(PICO_BOARD $ENV{PICO_BOARD})
message("Using PICO_BOARD from environment ('${PICO_BOARD}')")
else()
if (NOT PICO_BOARD)
set(PICO_BOARD "pico")
pico_message("Defaulting PICO target board to ${PICO_BOARD} since not specified.")
else()
message("PICO target board is ${PICO_BOARD}.")
endif()
endif()
set(PICO_BOARD ${PICO_BOARD} CACHE STRING "PICO target board (e.g. pico)")
# PICO_CMAKE_CONFIG: PICO_BOARD_CMAKE_DIRS, Directories to look for <PICO_BOARD>.cmake in. This is overridable from the user environment, type=list, default="", group=build
if (DEFINED ENV{PICO_BOARD_CMAKE_DIRS})
set(PICO_BOARD_CMAKE_DIRS $ENV{PICO_BOARD_CMAKE_DIRS})
message("Using PICO_BOARD_CMAKE_DIRS from environment ('${PICO_BOARD_CMAKE_DIRS}')")
endif()
list(APPEND PICO_BOARD_CMAKE_DIRS ${CMAKE_CURRENT_LIST_DIR}/boards)
pico_find_in_paths(PICO_BOARD_CMAKE_FILE PICO_BOARD_CMAKE_DIRS ${PICO_BOARD}.cmake)
if (EXISTS "${PICO_BOARD_CMAKE_FILE}")
message("Using CMake board configuration from ${PICO_BOARD_CMAKE_FILE}")
include(${PICO_BOARD_CMAKE_FILE} board_config)
else()
include(boards/generic_board.cmake)
endif()
list(APPEND PICO_INCLUDE_DIRS ${CMAKE_CURRENT_LIST_DIR}/boards/include) # so boards/foo.h can be explicitly included

23
bsp/pico/pico-sdk/src/boards/generic_board.cmake Normal file
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# For boards without their own cmake file, simply include a header
# PICO_CMAKE_CONFIG: PICO_BOARD_HEADER_DIRS, Directories to look for <PICO_BOARD>.h in. This is overridable from the user environment, type=list, default="", group=build
if (DEFINED ENV{PICO_BOARD_HEADER_DIRS})
set(PICO_BOARD_HEADER_DIRS $ENV{PICO_BOARD_HEADER_DIRS})
message("Using PICO_BOARD_HEADER_DIRS from environment ('${PICO_BOARD_HEADER_DIRS}')")
endif()
set(PICO_BOARD_HEADER_DIRS ${PICO_BOARD_HEADER_DIRS} CACHE STRING "PICO board header directories")
list(APPEND PICO_BOARD_HEADER_DIRS ${CMAKE_CURRENT_LIST_DIR}/include/boards)
pico_find_in_paths(PICO_BOARD_HEADER_FILE PICO_BOARD_HEADER_DIRS ${PICO_BOARD}.h)
if (EXISTS ${PICO_BOARD_HEADER_FILE})
message("Using board configuration from ${PICO_BOARD_HEADER_FILE}")
list(APPEND PICO_CONFIG_HEADER_FILES ${PICO_BOARD_HEADER_FILE})
else()
set(msg "Unable to find definition of board '${PICO_BOARD}' (specified by PICO_BOARD):\n")
list(JOIN PICO_BOARD_HEADER_DIRS ", " DIRS)
string(CONCAT msg ${msg} " Looked for ${PICO_BOARD}.h in ${DIRS} (additional paths specified by PICO_BOARD_HEADER_DIRS)\n")
list(JOIN PICO_BOARD_CMAKE_DIRS ", " DIRS)
string(CONCAT msg ${msg} " Looked for ${PICO_BOARD}.cmake in ${DIRS} (additional paths specified by PICO_BOARD_CMAKE_DIRS)")
message(FATAL_ERROR ${msg})
endif()

93
bsp/pico/pico-sdk/src/boards/include/boards/adafruit_feather_rp2040.h Normal file
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/*
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
// -----------------------------------------------------
// NOTE: THIS HEADER IS ALSO INCLUDED BY ASSEMBLER SO
// SHOULD ONLY CONSIST OF PREPROCESSOR DIRECTIVES
// -----------------------------------------------------
#ifndef _BOARDS_ADAFRUIT_FEATHER_RP2040_H
#define _BOARDS_ADAFRUIT_FEATHER_RP2040_H
// For board detection
#define ADAFRUIT_FEATHER_RP2040
// On some samples, the xosc can take longer to stabilize than is usual
#ifndef PICO_XOSC_STARTUP_DELAY_MULTIPLIER
#define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 64
#endif
//------------- UART -------------//
#ifndef PICO_DEFAULT_UART
#define PICO_DEFAULT_UART 0
#endif
#ifndef PICO_DEFAULT_UART_TX_PIN
#define PICO_DEFAULT_UART_TX_PIN 0
#endif
#ifndef PICO_DEFAULT_UART_RX_PIN
#define PICO_DEFAULT_UART_RX_PIN 1
#endif
//------------- LED -------------//
#ifndef PICO_DEFAULT_LED_PIN
#define PICO_DEFAULT_LED_PIN 13
#endif
#ifndef PICO_DEFAULT_WS2812_PIN
#define PICO_DEFAULT_WS2812_PIN 16
#endif
//------------- I2C -------------//
#ifndef PICO_DEFAULT_I2C
#define PICO_DEFAULT_I2C 1
#endif
#ifndef PICO_DEFAULT_I2C_SDA_PIN
#define PICO_DEFAULT_I2C_SDA_PIN 2
#endif
#ifndef PICO_DEFAULT_I2C_SCL_PIN
#define PICO_DEFAULT_I2C_SCL_PIN 3
#endif
//------------- SPI -------------//
#ifndef PICO_DEFAULT_SPI
#define PICO_DEFAULT_SPI 0
#endif
#ifndef PICO_DEFAULT_SPI_TX_PIN
#define PICO_DEFAULT_SPI_TX_PIN 19
#endif
#ifndef PICO_DEFAULT_SPI_RX_PIN
#define PICO_DEFAULT_SPI_RX_PIN 20
#endif
#ifndef PICO_DEFAULT_SPI_SCK_PIN
#define PICO_DEFAULT_SPI_SCK_PIN 18
#endif
//------------- FLASH -------------//
// Use slower generic flash access
#define PICO_BOOT_STAGE2_CHOOSE_GENERIC_03H 1
#ifndef PICO_FLASH_SPI_CLKDIV
#define PICO_FLASH_SPI_CLKDIV 4
#endif
#ifndef PICO_FLASH_SIZE_BYTES
#define PICO_FLASH_SIZE_BYTES (8 * 1024 * 1024)
#endif
// All boards have B1 RP2040
#ifndef PICO_RP2040_B0_SUPPORTED
#define PICO_RP2040_B0_SUPPORTED 0
#endif
#endif

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