50 Commits

Author	SHA1	Message	Date
Lyon	fc4a1b56c3	use typedef struct	2021-09-22 16:24:54 +08:00
Lyon	20658eeb11	format lib for g030	2021-09-22 16:10:33 +08:00
Lyon	28ecb106d9	update core for g030	2021-09-22 16:09:12 +08:00
graduateDesign	9c648df6c9	add flow	2021-09-21 12:35:44 +08:00
graduateDesign	292ede2b50	use fast optimize	2021-09-21 12:14:19 +08:00
graduateDesign	6b3bfd6035	debug RGB_ASM	2021-09-21 12:10:28 +08:00
graduateDesign	86e7d7d109	add rgb lib	2021-09-21 10:30:26 +08:00
graduateDesign	93cc02d409	Merge branch 'master' of https://github.com/pikastech/pikascript	2021-09-20 22:35:16 +08:00
graduateDesign	cecf429d92	commit	2021-09-20 22:35:09 +08:00
Lyon	4ce12cfbdd	Merge branch 'master' of https://github.com/pikastech/pikascript into master	2021-09-20 22:30:07 +08:00
Lyon	ad36af1baf	add rgb	2021-09-20 22:29:34 +08:00
graduateDesign	e9cdaf2e11	update stm32g030 stm32 lib	2021-09-19 09:45:29 +08:00
graduateDesign	e3e5167e76	support pwm for stm32f103c8	2021-09-19 09:43:10 +08:00
Lyon	b5d125503a	add std device to core	2021-09-18 22:28:59 +08:00
Lyon	f722c6b128	pwm for stdDevice and g030 is ok	2021-09-18 22:09:26 +08:00
Lyon	25b8f95a7f	update simu pika core and lib	2021-09-18 16:57:01 +08:00
Lyon	c3b0b96208	update simu demo compiler to v0.5.1	2021-09-18 16:51:40 +08:00
Lyon	62be34427d	update driver for g030	2021-09-18 11:04:15 +08:00
Lyon	9de25279de	format STM32 lib	2021-09-17 14:21:09 +08:00
graduateDesign	98d9f6a65b	add stm32g030c8	2021-09-17 00:27:52 +08:00
graduateDesign	81823d53dc	rm build file	2021-09-13 23:25:08 +08:00
graduateDesign	7f67d783bf	rm .vscode	2021-09-13 23:24:36 +08:00
graduateDesign	23ba46742a	rm build foilder	2021-09-13 23:24:14 +08:00
graduateDesign	3758afaf6d	stm32f103c8 device is ok	2021-09-13 23:07:03 +08:00
graduateDesign	6081a5a933	change name for stm32g070cb	2021-09-13 22:11:45 +08:00
graduateDesign	290950f648	remove stm32f103c8t6	2021-09-13 22:10:44 +08:00
graduateDesign	e3c407ca1e	format	2021-09-11 09:16:21 +08:00
graduateDesign	a46f47c031	uart for g0 is ok, std device for uart is ok	2021-09-11 09:06:03 +08:00
graduateDesign	01a53046f7	init for uart is work well, recive tested ok	2021-09-11 00:08:40 +08:00
graduateDesign	f631d7453d	format by chromuim	2021-09-10 17:51:53 +08:00
graduateDesign	ee022d1c10	change format to google	2021-09-10 17:49:56 +08:00
graduateDesign	cdc3815d93	change stack	2021-09-09 09:07:53 +08:00
graduateDesign	fda690b6d4	add driver file	2021-09-09 08:42:25 +08:00
graduateDesign	3107b1154f	adc driver is ok	2021-09-09 08:40:13 +08:00
graduateDesign	708dd7aee1	updelete	2021-09-08 21:26:36 +08:00
graduateDesign	7303741ce6	use hsi	2021-09-08 21:25:52 +08:00
Lyon	01ce4ecedd	change deivce to device	2021-09-08 10:51:33 +08:00
Lyon	bb10916803	update c8t6	2021-09-08 10:42:50 +08:00
graduateDesign	33db5cf1f4	simplify main.py	2021-09-07 22:37:19 +08:00
graduateDesign	5c61b90354	g0 demo gpio and delay is ok	2021-09-07 22:35:19 +08:00
graduateDesign	406b0d859b	gpio and while in g0 is ok	2021-09-07 22:21:25 +08:00
graduateDesign	147141a479	support if and while in main.py	2021-09-07 22:15:59 +08:00
graduateDesign	29ebd32798	stm32 gpio for g0 is ok	2021-09-07 21:28:47 +08:00
graduateDesign	ddc13ec56c	add stm32 gpio	2021-09-07 21:22:08 +08:00
graduateDesign	d25a837d99	adding std abstruct device	2021-09-07 00:18:23 +08:00
graduateDesign	7267aacd48	add stm32g070	2021-09-06 17:40:27 +08:00
graduateDesign	14bf07d742	add demo for g070	2021-09-06 17:27:40 +08:00
lyon	7ebb97a85b	should suply buffszie when format	2021-09-04 08:28:29 +08:00
lyon	a8a1c2831e	simplize prefix and inner arg length	2021-09-04 08:03:42 +08:00
lyon	7e0b3b279f	add demo as normal file	2021-09-05 14:34:01 +08:00