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554 lines
12 KiB
C
554 lines
12 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : CH57x_timer.h
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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#ifndef __CH58x_TIMER_H__
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#define __CH58x_TIMER_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define DataBit_25 (1 << 25)
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/**
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* @brief TMR0 interrupt bit define
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*/
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#define TMR0_3_IT_CYC_END 0x01 // <20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>-<2D><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʱ-<2D><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD>PWM-<2D><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD>
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#define TMR0_3_IT_DATA_ACT 0x02 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>־<EFBFBD><D6BE><EFBFBD><EFBFBD>-<2D><><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>PWM-<2D><>Ч<EFBFBD><D0A7>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>
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#define TMR0_3_IT_FIFO_HF 0x04 // FIFO ʹ<>ù<EFBFBD><C3B9>룺<EFBFBD><EBA3BA>- FIFO>=4<><34> PWM- FIFO<4
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#define TMR1_2_IT_DMA_END 0x08 // DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><D6A7>TMR1<52><31>TMR2
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#define TMR0_3_IT_FIFO_OV 0x10 // FIFO <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>- FIFO<46><4F><EFBFBD><EFBFBD> PWM- FIFO<46><4F>
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/**
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* @brief Configuration PWM effective level repeat times
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*/
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typedef enum
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{
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PWM_Times_1 = 0, // PWM <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD>
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PWM_Times_4, // PWM <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>4<EFBFBD><34><EFBFBD><EFBFBD>
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PWM_Times_8, // PWM <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>8<EFBFBD><38><EFBFBD><EFBFBD>
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PWM_Times_16, // PWM <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>16<31><36><EFBFBD><EFBFBD>
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} PWM_RepeatTsTypeDef;
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/**
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* @brief Configuration Cap mode
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*/
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typedef enum
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{
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CAP_NULL = 0, // <20><><EFBFBD><EFBFBD> & <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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Edge_To_Edge, // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE> & <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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FallEdge_To_FallEdge, // <20>½<EFBFBD><C2BD>ص<EFBFBD><D8B5>½<EFBFBD><C2BD><EFBFBD> & <20><><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD><C2BD><EFBFBD>
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RiseEdge_To_RiseEdge, // <20><><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> & <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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} CapModeTypeDef;
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/**
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* @brief Configuration DMA mode
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*/
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typedef enum
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{
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Mode_Single = 0, // <20><><EFBFBD><EFBFBD>ģʽ
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Mode_LOOP, // ѭ<><D1AD>ģʽ
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} DMAModeTypeDef;
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/**
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* @brief <20><>ʱ<EFBFBD><CAB1><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param t - <20><>ʱʱ<CAB1>䣬<EFBFBD><E4A3AC><EFBFBD>ڵ<EFBFBD>ǰϵͳʱ<CDB3><CAB1>Tsys, <20><EFBFBD><EEB3A4>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 67108864
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*/
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void TMR0_TimerInit(uint32_t t);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108864
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*
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* @return <20><>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ
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*/
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#define TMR0_GetCurrentTimer() R32_TMR0_COUNT
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/**
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* @brief <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param cap - <20>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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void TMR0_EXTSingleCounterInit(CapModeTypeDef cap);
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/**
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* @brief <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
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*
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* @param cyc - <20><><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
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*/
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#define TMR0_CountOverflowCfg(cyc) (R32_TMR0_CNT_END = (cyc + 2))
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
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*
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* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ
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*/
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#define TMR0_GetCurrentCount() R32_TMR0_COUNT
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/**
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* @brief PWM0 ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
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*
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* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR0_PWMCycleCfg(cyc) (R32_TMR0_CNT_END = cyc)
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/**
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* @brief PWM <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param pr - select wave polar, refer to PWMX_PolarTypeDef
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* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
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*/
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void TMR0_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
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/**
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* @brief PWM0 <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
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*
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* @param d - <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR0_PWMActDataWidth(d) (R32_TMR0_FIFO = d)
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/**
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* @brief CAP0 <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>33554432
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*
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* @param cyc - <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ
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*/
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#define TMR0_CAPTimeoutCfg(cyc) (R32_TMR0_CNT_END = cyc)
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/**
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* @brief <20>ⲿ<EFBFBD>źŲ<C5BA><EFBFBD><D7BD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param cap - select capture mode, refer to CapModeTypeDef
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*/
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void TMR0_CapInit(CapModeTypeDef cap);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @return <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR0_CAPGetData() R32_TMR0_FIFO
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
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*
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* @return <20><>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
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*/
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#define TMR0_CAPDataCounter() R8_TMR0_FIFO_COUNT
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/**
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* @brief <20>ر<EFBFBD> TMR0
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*/
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#define TMR0_Disable() (R8_TMR0_CTRL_MOD &= ~RB_TMR_COUNT_EN)
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/**
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* @brief <20><><EFBFBD><EFBFBD> TMR0
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*/
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#define TMR0_Enable() (R8_TMR0_CTRL_MOD |= RB_TMR_COUNT_EN)
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/**
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* @brief <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - ʹ<><CAB9>/<2F>ر<EFBFBD>
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR0_ITCfg(s, f) ((s) ? (R8_TMR0_INTER_EN |= f) : (R8_TMR0_INTER_EN &= ~f))
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/**
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* @brief <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
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*
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR0_ClearITFlag(f) (R8_TMR0_INT_FLAG = f)
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/**
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* @brief <20><>ѯ<EFBFBD>жϱ<D0B6>־״̬
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*
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR0_GetITFlag(f) (R8_TMR0_INT_FLAG & f)
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/**
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* @brief <20><>ʱ<EFBFBD><CAB1><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param t - <20><>ʱʱ<CAB1>䣬<EFBFBD><E4A3AC><EFBFBD>ڵ<EFBFBD>ǰϵͳʱ<CDB3><CAB1>Tsys, <20><EFBFBD><EEB3A4>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 67108864
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*/
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void TMR1_TimerInit(uint32_t t);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108864
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*
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* @return <20><>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ
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*/
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#define TMR1_GetCurrentTimer() R32_TMR1_COUNT
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/**
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* @brief <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param cap - <20>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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void TMR1_EXTSingleCounterInit(CapModeTypeDef cap);
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/**
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* @brief <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
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*
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* @param cyc - <20><><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
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*/
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#define TMR1_CountOverflowCfg(cyc) (R32_TMR1_CNT_END = (cyc + 2))
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
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*
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* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ
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*/
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#define TMR1_GetCurrentCount() R32_TMR1_COUNT
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/**
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* @brief PWM1 ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
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*
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* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR1_PWMCycleCfg(cyc) (R32_TMR1_CNT_END = cyc)
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/**
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* @brief PWM <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param pr - select wave polar, refer to PWMX_PolarTypeDef
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* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
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*/
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void TMR1_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
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/**
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* @brief PWM1 <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
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*
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* @param d - <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR1_PWMActDataWidth(d) (R32_TMR1_FIFO = d)
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/**
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* @brief CAP1 <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>33554432
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*
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* @param cyc - <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ
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*/
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#define TMR1_CAPTimeoutCfg(cyc) (R32_TMR1_CNT_END = cyc)
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/**
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* @brief <20>ⲿ<EFBFBD>źŲ<C5BA><EFBFBD><D7BD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param cap - select capture mode, refer to CapModeTypeDef
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*/
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void TMR1_CapInit(CapModeTypeDef cap);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @return <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*/
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#define TMR1_CAPGetData() R32_TMR1_FIFO
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
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*
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* @return <20><>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
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*/
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#define TMR1_CAPDataCounter() R8_TMR1_FIFO_COUNT
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/**
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* @brief <20><><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
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* @param startAddr - DMA <20><>ʼ<EFBFBD><CABC>ַ
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* @param endAddr - DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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* @param m - <20><><EFBFBD><EFBFBD>DMAģʽ
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*/
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void TMR1_DMACfg(uint8_t s, uint16_t startAddr, uint16_t endAddr, DMAModeTypeDef m);
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/**
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* @brief <20>ر<EFBFBD> TMR1
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*/
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#define TMR1_Disable() (R8_TMR1_CTRL_MOD &= ~RB_TMR_COUNT_EN)
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/**
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* @brief <20><><EFBFBD><EFBFBD> TMR1
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*/
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#define TMR1_Enable() (R8_TMR1_CTRL_MOD |= RB_TMR_COUNT_EN)
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/**
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* @brief <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param s - ʹ<><CAB9>/<2F>ر<EFBFBD>
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR1_ITCfg(s, f) ((s) ? (R8_TMR1_INTER_EN |= f) : (R8_TMR1_INTER_EN &= ~f))
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/**
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* @brief <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
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*
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR1_ClearITFlag(f) (R8_TMR1_INT_FLAG = f)
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/**
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* @brief <20><>ѯ<EFBFBD>жϱ<D0B6>־״̬
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*
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* @param f - refer to TMR interrupt bit define
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*/
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#define TMR1_GetITFlag(f) (R8_TMR1_INT_FLAG & f)
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/**
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* @brief <20><>ʱ<EFBFBD><CAB1><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param t - <20><>ʱʱ<CAB1>䣬<EFBFBD><E4A3AC><EFBFBD>ڵ<EFBFBD>ǰϵͳʱ<CDB3><CAB1>Tsys, <20><EFBFBD><EEB3A4>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 67108864
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*/
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void TMR2_TimerInit(uint32_t t);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108864
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*
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* @return <20><>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ
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*/
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#define TMR2_GetCurrentTimer() R32_TMR2_COUNT
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/**
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* @brief <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
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*
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* @param cap - <20>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
void TMR2_EXTSingleCounterInit(CapModeTypeDef cap);
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
|
||
*
|
||
* @param cyc - <20><><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
|
||
*/
|
||
#define TMR2_CountOverflowCfg(cyc) (R32_TMR2_CNT_END = (cyc + 2))
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
|
||
*
|
||
* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ
|
||
*/
|
||
#define TMR2_GetCurrentCount() R32_TMR2_COUNT
|
||
|
||
/**
|
||
* @brief PWM2 ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
|
||
*
|
||
* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR2_PWMCycleCfg(cyc) (R32_TMR2_CNT_END = cyc)
|
||
|
||
/**
|
||
* @brief PWM <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
|
||
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
|
||
*/
|
||
void TMR2_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
|
||
|
||
/**
|
||
* @brief PWM2 <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
|
||
*
|
||
* @param d - <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR2_PWMActDataWidth(d) (R32_TMR2_FIFO = d)
|
||
|
||
/**
|
||
* @brief CAP2 <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>33554432
|
||
*
|
||
* @param cyc - <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ
|
||
*/
|
||
#define TMR2_CAPTimeoutCfg(cyc) (R32_TMR2_CNT_END = cyc)
|
||
|
||
/**
|
||
* @brief <20>ⲿ<EFBFBD>źŲ<C5BA><EFBFBD><D7BD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param cap - select capture mode, refer to CapModeTypeDef
|
||
*/
|
||
void TMR2_CapInit(CapModeTypeDef cap);
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*
|
||
* @return <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR2_CAPGetData() R32_TMR2_FIFO
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
|
||
*
|
||
* @return <20><>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
|
||
*/
|
||
#define TMR2_CAPDataCounter() R8_TMR2_FIFO_COUNT
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
|
||
*
|
||
* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
|
||
* @param startAddr - DMA <20><>ʼ<EFBFBD><CABC>ַ
|
||
* @param endAddr - DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||
* @param m - <20><><EFBFBD><EFBFBD>DMAģʽ
|
||
*/
|
||
void TMR2_DMACfg(uint8_t s, uint16_t startAddr, uint16_t endAddr, DMAModeTypeDef m);
|
||
|
||
/**
|
||
* @brief <20>ر<EFBFBD> TMR2
|
||
*/
|
||
#define TMR2_Disable() (R8_TMR2_CTRL_MOD &= ~RB_TMR_COUNT_EN)
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD><EFBFBD> TMR2
|
||
*/
|
||
#define TMR2_Enable() (R8_TMR2_CTRL_MOD |= RB_TMR_COUNT_EN)
|
||
|
||
/**
|
||
* @brief <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||
*
|
||
* @param s - ʹ<><CAB9>/<2F>ر<EFBFBD>
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR2_ITCfg(s, f) ((s) ? (R8_TMR2_INTER_EN |= f) : (R8_TMR2_INTER_EN &= ~f))
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
||
*
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR2_ClearITFlag(f) (R8_TMR2_INT_FLAG = f)
|
||
|
||
/**
|
||
* @brief <20><>ѯ<EFBFBD>жϱ<D0B6>־״̬
|
||
*
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR2_GetITFlag(f) (R8_TMR2_INT_FLAG & f)
|
||
|
||
/**
|
||
* @brief <20><>ʱ<EFBFBD><CAB1><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param t - <20><>ʱʱ<CAB1>䣬<EFBFBD><E4A3AC><EFBFBD>ڵ<EFBFBD>ǰϵͳʱ<CDB3><CAB1>Tsys, <20><EFBFBD><EEB3A4>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 67108864
|
||
*/
|
||
void TMR3_TimerInit(uint32_t t);
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108864
|
||
*
|
||
* @return <20><>ǰ<EFBFBD><C7B0>ʱ<EFBFBD><CAB1>ֵ
|
||
*/
|
||
#define TMR3_GetCurrentTimer() R32_TMR3_COUNT
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param cap - <20>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
void TMR3_EXTSingleCounterInit(CapModeTypeDef cap);
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
|
||
*
|
||
* @param cyc - <20><><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
|
||
*/
|
||
#define TMR3_CountOverflowCfg(cyc) (R32_TMR3_CNT_END = (cyc + 2))
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>67108862
|
||
*
|
||
* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ֵ
|
||
*/
|
||
#define TMR3_GetCurrentCount() R32_TMR3_COUNT
|
||
|
||
/**
|
||
* @brief PWM3 ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
|
||
*
|
||
* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR3_PWMCycleCfg(cyc) (R32_TMR3_CNT_END = cyc)
|
||
|
||
/**
|
||
* @brief PWM <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param pr - select wave polar, refer to PWMX_PolarTypeDef
|
||
* @param ts - set pwm repeat times, refer to PWM_RepeatTsTypeDef
|
||
*/
|
||
void TMR3_PWMInit(PWMX_PolarTypeDef pr, PWM_RepeatTsTypeDef ts);
|
||
|
||
/**
|
||
* @brief PWM3 <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>67108864
|
||
*
|
||
* @param d - <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR3_PWMActDataWidth(d) (R32_TMR3_FIFO = d)
|
||
|
||
/**
|
||
* @brief CAP3 <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD>33554432
|
||
*
|
||
* @param cyc - <20><><EFBFBD><D7BD>ƽ<EFBFBD><C6BD>ʱ
|
||
*/
|
||
#define TMR3_CAPTimeoutCfg(cyc) (R32_TMR3_CNT_END = cyc)
|
||
|
||
/**
|
||
* @brief <20>ⲿ<EFBFBD>źŲ<C5BA><EFBFBD><D7BD><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||
*
|
||
* @param cap - select capture mode, refer to CapModeTypeDef
|
||
*/
|
||
void TMR3_CapInit(CapModeTypeDef cap);
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*
|
||
* @return <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||
*/
|
||
#define TMR3_CAPGetData() R32_TMR3_FIFO
|
||
|
||
/**
|
||
* @brief <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
|
||
*
|
||
* @return <20><>ǰ<EFBFBD>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD><DDB8><EFBFBD>
|
||
*/
|
||
#define TMR3_CAPDataCounter() R8_TMR3_FIFO_COUNT
|
||
|
||
/**
|
||
* @brief <20>ر<EFBFBD> TMR3
|
||
*/
|
||
#define TMR3_Disable() (R8_TMR3_CTRL_MOD &= ~RB_TMR_COUNT_EN)
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD><EFBFBD> TMR3
|
||
*/
|
||
#define TMR3_Enable() (R8_TMR3_CTRL_MOD |= RB_TMR_COUNT_EN)
|
||
|
||
/**
|
||
* @brief <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||
*
|
||
* @param s - ʹ<><CAB9>/<2F>ر<EFBFBD>
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR3_ITCfg(s, f) ((s) ? (R8_TMR3_INTER_EN |= f) : (R8_TMR3_INTER_EN &= ~f))
|
||
|
||
/**
|
||
* @brief <20><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
||
*
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR3_ClearITFlag(f) (R8_TMR3_INT_FLAG = f)
|
||
|
||
/**
|
||
* @brief <20><>ѯ<EFBFBD>жϱ<D0B6>־״̬
|
||
*
|
||
* @param f - refer to TMR interrupt bit define
|
||
*/
|
||
#define TMR3_GetITFlag(f) (R8_TMR3_INT_FLAG & f)
|
||
|
||
#ifdef __cplusplus
|
||
}
|
||
#endif
|
||
|
||
#endif // __CH58x_TIMER_H__
|