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320 lines
6.6 KiB
C
320 lines
6.6 KiB
C
/*!
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* @file apm32e10x_spi.h
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*
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* @brief This file contains all the functions prototypes for the SPI firmware library
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*
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* @version V1.0.0
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*
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* @date 2021-07-26
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*
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*/
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#ifndef __APM32E10X_SPI_H
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#define __APM32E10X_SPI_H
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#include "apm32e10x.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup Peripherals_Library Standard Peripheral Library
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@{
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*/
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/** @addtogroup SPI_Driver SPI Driver
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@{
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*/
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/** @addtogroup SPI_Enumerations Enumerations
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@{
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*/
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/**
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* @brief SPI data direction mode
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*/
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typedef enum
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{
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SPI_DIRECTION_2LINES_FULLDUPLEX = 0x0000,
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SPI_DIRECTION_2LINES_RXONLY = 0x0400,
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SPI_DIRECTION_1LINE_RX = 0x8000,
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SPI_DIRECTION_1LINE_TX = 0xC000
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}SPI_DIRECTION_T;
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/**
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* @brief SPI mode
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*/
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typedef enum
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{
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SPI_MODE_MASTER = 0x0104,
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SPI_MODE_SLAVE = 0x0000
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}SPI_MODE_T;
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/**
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* @brief SPI Data length
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*/
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typedef enum
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{
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SPI_DATA_LENGTH_16B = 0x0800,
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SPI_DATA_LENGTH_8B = 0x0000
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}SPI_DATA_LENGTH_T;
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/**
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* @brief SPI Clock Polarity
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*/
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typedef enum
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{
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SPI_CLKPOL_LOW = 0x0000,
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SPI_CLKPOL_HIGH = 0x0002
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}SPI_CLKPOL_T;
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/**
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* @brief SPI Clock Phase
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*/
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typedef enum
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{
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SPI_CLKPHA_1EDGE = 0x0000,
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SPI_CLKPHA_2EDGE = 0x0001
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}SPI_CLKPHA_T;
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/**
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* @brief SPI Slave Select management
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*/
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typedef enum
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{
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SPI_NSS_SOFT = 0x0200,
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SPI_NSS_HARD = 0x0000
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}SPI_NSS_T;
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/**
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* @brief SPI BaudRate Prescaler
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*/
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typedef enum
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{
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SPI_BAUDRATE_DIV_2 = 0x0000,
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SPI_BAUDRATE_DIV_4 = 0x0008,
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SPI_BAUDRATE_DIV_8 = 0x0010,
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SPI_BAUDRATE_DIV_16 = 0x0018,
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SPI_BAUDRATE_DIV_32 = 0x0020,
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SPI_BAUDRATE_DIV_64 = 0x0028,
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SPI_BAUDRATE_DIV_128 = 0x0030,
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SPI_BAUDRATE_DIV_256 = 0x0038,
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}SPI_BAUDRATE_DIV_T;
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/**
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* @brief SPI MSB LSB transmission
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*/
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typedef enum
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{
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SPI_FIRSTBIT_MSB = 0x0000,
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SPI_FIRSTBIT_LSB = 0x0080
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}SPI_FIRSTBIT_T;
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/**
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* @brief I2S Mode
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*/
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typedef enum
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{
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I2S_MODE_SLAVE_TX = 0x0000,
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I2S_MODE_SLAVE_RX = 0x0100,
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I2S_MODE_MASTER_TX = 0x0200,
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I2S_MODE_MASTER_RX = 0x0300
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}I2S_MODE_T;
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/**
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* @brief I2S Standard
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*/
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typedef enum
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{
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I2S_STANDARD_PHILLIPS = 0x0000,
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I2S_STANDARD_MSB = 0x0010,
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I2S_STANDARD_LSB = 0x0020,
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I2S_STANDARD_PCMSHORT = 0x0030,
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I2S_STANDARD_PCMLONG = 0x00B0
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}I2S_STANDARD_T;
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/**
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* @brief I2S data length
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*/
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typedef enum
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{
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I2S_DATA_LENGHT_16B = 0x0000,
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I2S_DATA_LENGHT_16BEX = 0x0001,
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I2S_DATA_LENGHT_24B = 0x0003,
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I2S_DATA_LENGHT_32B = 0x0005,
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} I2S_DATA_LENGTH_T;
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/**
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* @brief I2S_MCLK_Output
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*/
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typedef enum
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{
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I2S_MCLK_OUTPUT_DISABLE = 0x0000,
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I2S_MCLK_OUTPUT_ENABLE = 0x0200,
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}I2S_MCLK_OUTPUT_T;
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/**
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* @brief I2S Audio divider
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*/
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typedef enum
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{
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I2S_AUDIO_DIV_192K = 192000,
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I2S_AUDIO_DIV_96K = 96000,
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I2S_AUDIO_DIV_48K = 48000,
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I2S_AUDIO_DIV_44K = 44100,
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I2S_AUDIO_DIV_32K = 32000,
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I2S_AUDIO_DIV_22K = 22050,
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I2S_AUDIO_DIV_16K = 16000,
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I2S_AUDIO_DIV_11K = 11025,
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I2S_AUDIO_DIV_8K = 8000,
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I2S_AUDIO_DIV_DEFAULT = 2
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}I2S_AUDIO_DIV_T;
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/**
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* @brief I2S Clock Polarity
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*/
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typedef enum
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{
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I2S_CLKPOL_LOW = 0x0000,
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I2S_CLKPOL_HIGH = 0x0008
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}I2S_CLKPOL_T;
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/**
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* @brief SPI Direction select
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*/
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typedef enum
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{
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SPI_DIRECTION_RX = 0xBFFF,
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SPI_DIRECTION_TX = 0x4000
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}SPI_DIRECTION_SELECT_T;
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/**
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* @brief SPI interrupts definition
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*/
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typedef enum
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{
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SPI_I2S_INT_TXBE = 0x8002,
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SPI_I2S_INT_RXBNE = 0x4001,
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SPI_I2S_INT_ERR = 0x2000,
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SPI_I2S_INT_OVR = 0x2040,
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SPI_INT_CRCE = 0x2010,
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SPI_INT_ME = 0x2020,
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I2S_INT_UDR = 0x2008
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}SPI_I2S_INT_T;
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/**
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* @brief SPI flags definition
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*/
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typedef enum
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{
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SPI_FLAG_RXBNE = 0x0001,
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SPI_FLAG_TXBE = 0x0002,
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I2S_FLAG_SCHDIR = 0x0004,
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I2S_FLAG_UDR = 0x0008,
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SPI_FLAG_CRCE = 0x0010,
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SPI_FLAG_ME = 0x0020,
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SPI_FLAG_OVR = 0x0040,
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SPI_FLAG_BSY = 0x0080
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}SPI_FLAG_T;
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/**
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* @brief SPI I2S DMA requests
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*/
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typedef enum
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{
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SPI_I2S_DMA_REQ_TX = 0x0002,
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SPI_I2S_DMA_REQ_RX = 0x0001
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}SPI_I2S_DMA_REQ_T;
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/**@} end of group SPI_Enumerations*/
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/** @addtogroup SPI_Structure Data Structure
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@{
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*/
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/**
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* @brief SPI Config structure definition
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*/
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typedef struct
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{
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SPI_MODE_T mode;
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SPI_DATA_LENGTH_T length;
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SPI_CLKPHA_T phase;
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SPI_CLKPOL_T polarity;
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SPI_NSS_T nss;
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SPI_FIRSTBIT_T firstBit;
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SPI_DIRECTION_T direction;
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SPI_BAUDRATE_DIV_T baudrateDiv;
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uint16_t crcPolynomial;
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}SPI_Config_T;
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/**
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* @brief I2S Config structure definition
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*/
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typedef struct
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{
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I2S_MODE_T mode;
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I2S_STANDARD_T standard;
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I2S_DATA_LENGTH_T length;
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I2S_MCLK_OUTPUT_T MCLKOutput;
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I2S_AUDIO_DIV_T audioDiv;
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I2S_CLKPOL_T polarity;
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}I2S_Config_T;
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/**@} end of group SPI_Structure*/
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/** @addtogroup SPI_Fuctions Fuctions
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@{
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*/
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/** Reset and Configuration */
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void SPI_I2S_Reset(SPI_T* spi);
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void SPI_Config(SPI_T* spi, SPI_Config_T* spiConfig);
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void I2S_Config(SPI_T* spi, I2S_Config_T* i2sConfig);
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void SPI_ConfigStructInit(SPI_Config_T* spiConfig);
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void I2S_ConfigStructInit(I2S_Config_T* i2sConfig);
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void SPI_Enable(SPI_T* spi);
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void SPI_Disable(SPI_T* spi);
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void I2S_Enable(SPI_T* spi);
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void I2S_Disable(SPI_T* spi);
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void SPI_I2S_TxData(SPI_T* spi, uint16_t data);
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uint16_t SPI_I2S_RxData(SPI_T* spi);
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void SPI_SetSoftwareNSS(SPI_T* spi);
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void SPI_ResetSoftwareNSS(SPI_T* spi);
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void SPI_EnableSSOutput(SPI_T* spi);
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void SPI_DisableSSOutput(SPI_T* spi);
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void SPI_ConfigDataSize(SPI_T* spi, uint16_t dataSize);
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/** DMA */
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void SPI_I2S_EnableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq);
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void SPI_I2S_DisableDMA(SPI_T* spi, SPI_I2S_DMA_REQ_T dmaReq);
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/** CRC */
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void SPI_TxCRC(SPI_T* spi);
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void SPI_EnableCRC(SPI_T* spi);
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void SPI_DisableCRC(SPI_T* spi);
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uint16_t SPI_ReadTxCRC(SPI_T* spi);
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uint16_t SPI_ReadRxCRC(SPI_T* spi);
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uint16_t SPI_ReadCRCPolynomial(SPI_T* spi);
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void SPI_ConfigBiDirectionalLine(SPI_T* spi, SPI_DIRECTION_SELECT_T direction);
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/** Interrupts and flag */
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void SPI_I2S_EnableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt);
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void SPI_I2S_DisableInterrupt(SPI_T* spi, SPI_I2S_INT_T interrupt);
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uint8_t SPI_I2S_ReadStatusFlag(SPI_T* spi, SPI_FLAG_T flag);
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void SPI_I2S_ClearStatusFlag(SPI_T* spi, SPI_FLAG_T flag);
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uint8_t SPI_I2S_ReadIntFlag(SPI_T* spi, SPI_I2S_INT_T flag);
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void SPI_I2S_ClearIntFlag(SPI_T* spi, SPI_I2S_INT_T flag);
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/**@} end of group SPI_Fuctions*/
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/**@} end of group SPI_Driver*/
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/**@} end of group Peripherals_Library*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __APM32E10X_SPI_H */
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