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146 lines
4.3 KiB
C
146 lines
4.3 KiB
C
/*!
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* @file apm32f0xx_crs.h
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*
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* @brief This file contains all the functions prototypes for the CRS firmware library
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*
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* @note It's only for APM32F072 and APM32F091 devices
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*
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* @version V1.0.1
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*
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* @date 2021-07-01
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*
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*/
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#ifndef __CRS_H
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#define __CRS_H
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#include "apm32f0xx.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup Peripherals_Library Standard Peripheral Library
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@{
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*/
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/** @addtogroup CRS_Driver CRS Driver
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@{
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*/
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/** @addtogroup CRS_Enumerations Enumerations
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@{
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*/
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/**
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* @brief CRS_Interrupt_Sources
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*/
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typedef enum
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{
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CRS_INT_SYNCOK = ((uint32_t)0x00000001), //!<SYNC event OK interrupt
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CRS_INT_SYNCWARN = ((uint32_t)0x00000002), //!<SYNC warning interrupt
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CRS_INT_ERR = ((uint32_t)0x00000004), //!<Synchronization or trimming error interrupt
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CRS_INT_ESYNC = ((uint32_t)0x00000008), //!<Expected SYNC interrupt
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CRS_INT_SYNCERR = ((uint32_t)0x00000100), //!<SYNC error
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CRS_INT_SYNCMISS = ((uint32_t)0x00000200), //!<SYNC missed
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CRS_INT_TRIMOVF = ((uint32_t)0x00000400), //!<Trimming overflow or underflow
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}CRS_INT_T;
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/**
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* @brief CRS_Flags
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*/
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typedef enum
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{
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CRS_FLAG_SYNCOK = ((uint32_t)0x00000001), //!<SYNC event OK flag
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CRS_FLAG_SYNCWARN = ((uint32_t)0x00000002), //!<SYNC warning flag
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CRS_FLAG_ERR = ((uint32_t)0x00000004), //!<Synchronization or trimming error flag
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CRS_FLAG_ESYNC = ((uint32_t)0x00000008), //!<Expected SYNC flag
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CRS_FLAG_SYNCERR = ((uint32_t)0x00000100), //!<SYNC error flag
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CRS_FLAG_SYNCMISS = ((uint32_t)0x00000200), //!<SYNC missed flag
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CRS_FLAG_TRIMOVF = ((uint32_t)0x00000400), //!<Trimming overflow or underflow falg
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}CRS_FLAG_T;
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/**
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* @brief CRS_Synchro_Source
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*/
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typedef enum
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{
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CRS_SYNC_SOURCE_GPIO = 0x00, //!<GPIO selected as SYNC signal source
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CRS_SYNC_SOURCE_LSE = 0x01, //!<LSE selected as SYNC signal source
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CRS_SYNC_SOURCE_USB = 0x02, //!<USB SNFLG selected as SYNC signal source (default).
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}CRS_SYNC_SOURCE_T;
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/**
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* @brief CRS_Synchro_Source
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*/
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typedef enum
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{
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CRS_SYNC_DIV1 = 0x00, //!<Synchro Signal not divided (default)
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CRS_SYNC_DIV2 = 0x01, //!<Synchro Signal divided by 2
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CRS_SYNC_DIV4 = 0x02, //!<Synchro Signal divided by 4
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CRS_SYNC_DIV8 = 0x03, //!<Synchro Signal divided by 8
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CRS_SYNC_DIV16 = 0x04, //!<Synchro Signal divided by 16
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CRS_SYNC_DIV32 = 0x05, //!<Synchro Signal divided by 32
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CRS_SYNC_DIV64 = 0x06, //!<Synchro Signal divided by 64
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CRS_SYNC_DIV128 = 0x07, //!<Synchro Signal divided by 128
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} CRS_SYNC_DIV_T;
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/**@} end of group CRS_Enumerations*/
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/** @addtogroup CRS_Structure Data Structure
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@{
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*/
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/**
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* @brief CRS_SynchroPolarity
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*/
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typedef enum
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{
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CRS_SYNC_POL_RISING, //!<Synchro active on rising edge
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CRS_SYNC_POL_FALLING //!<Synchro active on falling edge
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}CRS_SYNC_POL_T;
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/**@} end of group CRS_Structure*/
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/** @addtogroup CRS_Fuctions Fuctions
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@{
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*/
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/** Configuration of the CRS **/
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void CRS_Reset(void);
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void CRS_AdjustHSI48CalibrationValue(uint8_t calibrationVal);
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void CRS_EnableFrequencyErrorCounter(void);
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void CRS_DisableFrequencyErrorCounter(void);
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void CRS_EnableAutomaticCalibration(void);
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void CRS_DisableAutomaticCalibration(void);
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void CRS_GenerateSoftwareSynchronization(void);
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void CRS_FrequencyErrorCounterReloadValue(uint16_t reloadVal);
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void CRS_ConfigFrequencyErrorLimit(uint8_t errLimitVal);
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void CRS_ConfigSynchronizationPrescaler(CRS_SYNC_DIV_T div);
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void CRS_ConfigSynchronizationSource(CRS_SYNC_SOURCE_T source);
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void CRS_ConfigSynchronizationPolarity(CRS_SYNC_POL_T polarity);
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uint32_t CRS_ReadReloadValue(void);
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uint32_t CRS_ReadHSI48CalibrationValue(void);
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uint32_t CRS_ReadFrequencyErrorValue(void);
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uint32_t CRS_ReadFrequencyErrorDirection(void);
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/** Interrupts and flags management functions **/
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void CRS_EnableInterrupt(CRS_INT_T interrupt);
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void CRS_DisableInterrupt(CRS_INT_T interrupt);
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uint8_t CRS_ReadStatusFlag(CRS_FLAG_T flag);
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void CRS_ClearStatusFlag(CRS_FLAG_T flag);
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uint8_t CRS_ReadIntFlag(CRS_INT_T flag);
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void CRS_ClearIntFlag(CRS_INT_T intFlag);
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/**@} end of group CRS_Fuctions*/
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/**@} end of group CRS_Driver */
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/**@} end of group Peripherals_Library*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CRS_H */
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