mirror of
https://gitee.com/Lyon1998/pikapython.git
synced 2025-01-15 17:02:53 +08:00
351 lines
21 KiB
ArmAsm
351 lines
21 KiB
ArmAsm
;/* ------------------------------------------------------------------------- */
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;/* @file: startup_MM32F5277.s */
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;/* @purpose: CMSIS Cortex-M0 Core Device Startup File */
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;/* */
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;/* @version: 1.0 */
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;/* @date: 2022-03-03 */
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;/* @build: b220303 */
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;/* ------------------------------------------------------------------------- */
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;/* */
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;/* Copyright 2022 MindMotion */
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;/* All rights reserved. */
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;/* */
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;/* SPDX-License-Identifier: BSD-3-Clause */
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;/*****************************************************************************/
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;/* Version: MDK for ARM Embedded Processors */
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;/*****************************************************************************/
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
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__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; -14 NMI Handler
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DCD HardFault_Handler ; -13 Hard Fault Handler
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DCD MemManage_Handler ; -12 MPU Fault Handler
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DCD BusFault_Handler ; -11 Bus Fault Handler
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DCD UsageFault_Handler ; -10 Usage Fault Handler
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DCD 0 ; -9 Reserved
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DCD 0 ; -8 Reserved
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DCD 0 ; -7 Reserved
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DCD 0 ; -6 Reserved
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DCD SVC_Handler ; -5 SVCall Handler
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DCD DebugMon_Handler ; -4 Debug Monitor Handler
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DCD 0 ; -3 Reserved
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DCD PendSV_Handler ; -2 PendSV Handler
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DCD SysTick_Handler ; -1 SysTick Handler ; External Interrupts
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DCD WWDG_IWDG_IRQHandler ; 0 Watchdog interrupt (IWDG is EXTI21)
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DCD PVD_IRQHandler ; 1 Supply Voltage Detect (PVD) Interrupt (EXTI16)
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DCD BKP_TAMPER_IRQHandler ; 2 BKP intrusion detection interrupted
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DCD RTC_IRQHandler ; 3 RTC global interrupt
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DCD FLASH_IRQHandler ; 4 Flash Global Interrupt
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DCD RCC_CRS_IRQHandler ; 5 RCC and CRS global interrupt
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DCD EXTI0_IRQHandler ; 6 EXTI line 0 interrupt
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DCD EXTI1_IRQHandler ; 7 EXTI line 1 interrupt
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DCD EXTI2_IRQHandler ; 8 EXTI line 2 interrupt
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DCD EXTI3_IRQHandler ; 9 EXTI line 3 interrupt
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DCD EXTI4_IRQHandler ; 10 EXTI line 4 interrupt
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DCD DMA1_CH1_IRQHandler ; 11 DMA1 channel 1 global interrupt
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DCD DMA1_CH2_IRQHandler ; 12 DMA1 channel 2 global interrupt
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DCD DMA1_CH3_IRQHandler ; 13 DMA1 channel 3 global interrupt
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DCD DMA1_CH4_IRQHandler ; 14 DMA1 channel 4 global interrupt
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DCD DMA1_CH5_IRQHandler ; 15 DMA1 channel 5 global interrupt
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DCD DMA1_CH6_IRQHandler ; 16 DMA1 channel 6 global interrupt
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DCD DMA1_CH7_IRQHandler ; 17 DMA1 channel 7 global interrupt
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DCD ADC1_2_IRQHandler ; 18 ADC1/2 global interrupt
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DCD 0 ; 19 Reserved
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DCD DMA1_CH8_IRQHandler ; 20 DMA1 channel 8 global interrupt
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DCD FlexCAN1_IRQHandler ; 21 FlexCAN1 global interrupt
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DCD 0 ; 22 Reserved
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DCD EXTI9_5_IRQHandler ; 23 EXTI line[9:5] interrupt
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DCD TIM1_BRK_IRQHandler ; 24 TIM1 brake interrupt
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DCD TIM1_UP_IRQHandler ; 25 TIM1 update interrupted
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DCD TIM1_TRG_COM_IRQHandler ; 26 TIM1 trigger/COM interrupt
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DCD TIM1_CC_IRQHandler ; 27 TIM1 capture compare interrupt
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DCD TIM2_IRQHandler ; 28 TIM2 global interrupt
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DCD TIM3_IRQHandler ; 29 TIM3 global interrupt
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DCD TIM4_IRQHandler ; 30 TIM4 global interrupt
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DCD I2C1_IRQHandler ; 31 I2C1 global interrupt
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DCD 0 ; 32 Reserved
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DCD I2C2_IRQHandler ; 33 I2C2 global interrupt
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DCD 0 ; 34 Reserved
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DCD SPI1_IRQHandler ; 35 SPI1 global interrupt
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DCD SPI2_IRQHandler ; 36 SPI2 global interrupt
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DCD UART1_IRQHandler ; 37 UART1 global interrupt
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DCD UART2_IRQHandler ; 38 UART2 global interrupt
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DCD UART3_IRQHandler ; 39 UART3 global interrupt
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DCD EXTI15_10_IRQHandler ; 40 Interrupt on EXTI line[15:10]
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DCD RTC_ALR_IRQHandler ; 41 RTC Alarm Interrupt (EXTI17)
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DCD USB_WKUP_IRQHandler ; 42 USB Wakeup Interrupt (EXTI18)
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DCD TIM8_BRK_IRQHandler ; 43 TIM8 brake interrupt
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DCD TIM8_UP_IRQHandler ; 44 TIM8 update interrupted
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DCD TIM8_TRG_COM_IRQHandler ; 45 TIM8 trigger/COM interrupt
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DCD TIM8_CC_IRQHandler ; 46 TIM8 capture compare interrupt
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DCD 0 ; 47 Reserved
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DCD 0 ; 48 Reserved
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DCD 0 ; 49 Reserved
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DCD TIM5_IRQHandler ; 50 TIM5 global interrupt
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DCD SPI3_IRQHandler ; 51 SPI3 global interrupt
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DCD UART4_IRQHandler ; 52 UART4 global interrupt
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DCD UART5_IRQHandler ; 53 UART5 global interrupt
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DCD TIM6_IRQHandler ; 54 TIM6 global interrupt
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DCD TIM7_IRQHandler ; 55 TIM7 global interrupt
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DCD DMA2_CH1_IRQHandler ; 56 DMA2 channel 1 global interrupt
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DCD DMA2_CH2_IRQHandler ; 57 DMA2 channel 2 global interrupt
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DCD DMA2_CH3_IRQHandler ; 58 DMA2 channel 3 global interrupt
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DCD DMA2_CH4_IRQHandler ; 59 DMA2 channel 4 global interrupt
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DCD DMA2_CH5_IRQHandler ; 60 DMA2 channel 5 global interrupt
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DCD ENET_IRQHandler ; 61 ENET global interrupt
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DCD ENET_WKUP_IRQHandler ; 62 ENET wake-up interrupt (EXTI25)
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DCD 0 ; 63 Reserved
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DCD COMP_IRQHandler ; 64 Comparator 1/2/3 Global Interrupts (EXTI19/20/24)
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DCD FlexCAN2_IRQHandler ; 65 FLexCAN2 global interrupt
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DCD 0 ; 66 Reserved
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DCD USB_FS_IRQHandler ; 67 USB OTG global interrupt
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DCD DMA2_CH6_IRQHandler ; 68 DMA2 channel 6 global interrupt
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DCD DMA2_CH7_IRQHandler ; 69 DMA2 channel 7 global interrupt
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DCD DMA2_CH8_IRQHandler ; 70 DMA2 channel 8 global interrupt
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DCD UART6_IRQHandler ; 71 UART6 global interrupt
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DCD 0 ; 72 Reserved
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DCD 0 ; 73 Reserved
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DCD 0 ; 74 Reserved
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DCD 0 ; 75 Reserved
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DCD 0 ; 76 Reserved
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DCD 0 ; 77 Reserved
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DCD 0 ; 78 Reserved
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DCD 0 ; 79 Reserved
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DCD 0 ; 80 Reserved
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DCD 0 ; 81 Reserved
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DCD UART7_IRQHandler ; 82 UART7 global interrupt
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DCD 0 ; 83 Reserved
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DCD 0 ; 84 Reserved
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DCD 0 ; 85 Reserved
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DCD 0 ; 86 Reserved
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DCD 0 ; 87 Reserved
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DCD 0 ; 88 Reserved
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DCD 0 ; 89 Reserved
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DCD 0 ; 90 Reserved
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DCD 0 ; 91 Reserved
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DCD 0 ; 92 Reserved
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DCD 0 ; 93 Reserved
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DCD 0 ; 94 Reserved
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DCD QSPI_IRQHandler ; 95 QSPI global interrupt
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DCD 0 ; 96 Reserved
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DCD 0 ; 97 Reserved
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DCD 0 ; 98 Reserved
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DCD 0 ; 99 Reserved
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DCD 0 ; 100 Reserved
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DCD 0 ; 101 Reserved
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DCD LPTIM_IRQHandler ; 102 LPTIM global interrupt (EXTI22)
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DCD 0 ; 103 Reserved
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DCD LPUART_IRQHandler ; 104 LPUART global interrupt (EXTI23)
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WWDG_IWDG_IRQHandler [WEAK]
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EXPORT PVD_IRQHandler [WEAK]
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EXPORT BKP_TAMPER_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT FLASH_IRQHandler [WEAK]
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EXPORT RCC_CRS_IRQHandler [WEAK]
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EXPORT EXTI0_IRQHandler [WEAK]
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EXPORT EXTI1_IRQHandler [WEAK]
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EXPORT EXTI2_IRQHandler [WEAK]
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EXPORT EXTI3_IRQHandler [WEAK]
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EXPORT EXTI4_IRQHandler [WEAK]
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EXPORT DMA1_CH1_IRQHandler [WEAK]
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EXPORT DMA1_CH2_IRQHandler [WEAK]
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EXPORT DMA1_CH3_IRQHandler [WEAK]
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EXPORT DMA1_CH4_IRQHandler [WEAK]
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EXPORT DMA1_CH5_IRQHandler [WEAK]
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EXPORT DMA1_CH6_IRQHandler [WEAK]
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EXPORT DMA1_CH7_IRQHandler [WEAK]
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EXPORT ADC1_2_IRQHandler [WEAK]
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EXPORT DMA1_CH8_IRQHandler [WEAK]
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EXPORT FlexCAN1_IRQHandler [WEAK]
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EXPORT EXTI9_5_IRQHandler [WEAK]
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EXPORT TIM1_BRK_IRQHandler [WEAK]
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EXPORT TIM1_UP_IRQHandler [WEAK]
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EXPORT TIM1_TRG_COM_IRQHandler [WEAK]
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EXPORT TIM1_CC_IRQHandler [WEAK]
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EXPORT TIM2_IRQHandler [WEAK]
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EXPORT TIM3_IRQHandler [WEAK]
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EXPORT TIM4_IRQHandler [WEAK]
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EXPORT I2C1_IRQHandler [WEAK]
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EXPORT I2C2_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT SPI2_IRQHandler [WEAK]
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EXPORT UART1_IRQHandler [WEAK]
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EXPORT UART2_IRQHandler [WEAK]
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EXPORT UART3_IRQHandler [WEAK]
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EXPORT EXTI15_10_IRQHandler [WEAK]
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EXPORT RTC_ALR_IRQHandler [WEAK]
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EXPORT USB_WKUP_IRQHandler [WEAK]
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EXPORT TIM8_BRK_IRQHandler [WEAK]
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EXPORT TIM8_UP_IRQHandler [WEAK]
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EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
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EXPORT TIM8_CC_IRQHandler [WEAK]
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EXPORT TIM5_IRQHandler [WEAK]
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EXPORT SPI3_IRQHandler [WEAK]
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EXPORT UART4_IRQHandler [WEAK]
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EXPORT UART5_IRQHandler [WEAK]
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EXPORT TIM6_IRQHandler [WEAK]
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EXPORT TIM7_IRQHandler [WEAK]
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EXPORT DMA2_CH1_IRQHandler [WEAK]
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EXPORT DMA2_CH2_IRQHandler [WEAK]
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EXPORT DMA2_CH3_IRQHandler [WEAK]
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EXPORT DMA2_CH4_IRQHandler [WEAK]
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EXPORT DMA2_CH5_IRQHandler [WEAK]
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EXPORT ENET_IRQHandler [WEAK]
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EXPORT ENET_WKUP_IRQHandler [WEAK]
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EXPORT COMP_IRQHandler [WEAK]
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EXPORT FlexCAN2_IRQHandler [WEAK]
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EXPORT USB_FS_IRQHandler [WEAK]
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EXPORT DMA2_CH6_IRQHandler [WEAK]
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EXPORT DMA2_CH7_IRQHandler [WEAK]
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EXPORT DMA2_CH8_IRQHandler [WEAK]
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EXPORT UART6_IRQHandler [WEAK]
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EXPORT UART7_IRQHandler [WEAK]
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EXPORT QSPI_IRQHandler [WEAK]
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EXPORT LPTIM_IRQHandler [WEAK]
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EXPORT LPUART_IRQHandler [WEAK]
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WWDG_IWDG_IRQHandler
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PVD_IRQHandler
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BKP_TAMPER_IRQHandler
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RTC_IRQHandler
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FLASH_IRQHandler
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RCC_CRS_IRQHandler
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EXTI0_IRQHandler
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EXTI1_IRQHandler
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EXTI2_IRQHandler
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EXTI3_IRQHandler
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EXTI4_IRQHandler
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DMA1_CH1_IRQHandler
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DMA1_CH2_IRQHandler
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DMA1_CH3_IRQHandler
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DMA1_CH4_IRQHandler
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DMA1_CH5_IRQHandler
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DMA1_CH6_IRQHandler
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DMA1_CH7_IRQHandler
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ADC1_2_IRQHandler
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DMA1_CH8_IRQHandler
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FlexCAN1_IRQHandler
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EXTI9_5_IRQHandler
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TIM1_BRK_IRQHandler
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TIM1_UP_IRQHandler
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TIM1_TRG_COM_IRQHandler
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TIM1_CC_IRQHandler
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TIM2_IRQHandler
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TIM3_IRQHandler
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TIM4_IRQHandler
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I2C1_IRQHandler
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I2C2_IRQHandler
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SPI1_IRQHandler
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SPI2_IRQHandler
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UART1_IRQHandler
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UART2_IRQHandler
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UART3_IRQHandler
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EXTI15_10_IRQHandler
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RTC_ALR_IRQHandler
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USB_WKUP_IRQHandler
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TIM8_BRK_IRQHandler
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TIM8_UP_IRQHandler
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TIM8_TRG_COM_IRQHandler
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TIM8_CC_IRQHandler
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TIM5_IRQHandler
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SPI3_IRQHandler
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UART4_IRQHandler
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UART5_IRQHandler
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TIM6_IRQHandler
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TIM7_IRQHandler
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DMA2_CH1_IRQHandler
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DMA2_CH2_IRQHandler
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DMA2_CH3_IRQHandler
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DMA2_CH4_IRQHandler
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DMA2_CH5_IRQHandler
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ENET_IRQHandler
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ENET_WKUP_IRQHandler
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COMP_IRQHandler
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FlexCAN2_IRQHandler
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USB_FS_IRQHandler
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DMA2_CH6_IRQHandler
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DMA2_CH7_IRQHandler
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DMA2_CH8_IRQHandler
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UART6_IRQHandler
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UART7_IRQHandler
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QSPI_IRQHandler
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LPTIM_IRQHandler
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LPUART_IRQHandler
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B .
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ENDP
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ALIGN
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END |