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https://gitee.com/Lyon1998/pikapython.git
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355 lines
14 KiB
ArmAsm
355 lines
14 KiB
ArmAsm
;/*!
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; * @file startup_apm32e10x_hd.s
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; *
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; * @brief CMSIS Cortex-M3 based Core Device Startup File for Device apm32e10x
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; *
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; * @version V1.0.0
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; *
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; * @date 2021-07-26
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; *
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; */
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00004000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDT_IRQHandler ; Window Watchdog
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DCD PVD_IRQHandler ; PVD through EINT Line detect
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DCD TAMPER_IRQHandler ; Tamper
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DCD RTC_IRQHandler ; RTC
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DCD FMC_IRQHandler ; Flash
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DCD RCM_IRQHandler ; RCM
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DCD EINT0_IRQHandler ; EINT Line 0
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DCD EINT1_IRQHandler ; EINT Line 1
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DCD EINT2_IRQHandler ; EINT Line 2
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DCD EINT3_IRQHandler ; EINT Line 3
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DCD EINT4_IRQHandler ; EINT Line 4
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DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
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DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
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DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
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DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
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DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
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DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
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DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
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DCD ADC1_2_IRQHandler ; ADC1 & ADC2
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DCD USBD1_HP_CAN1_TX_IRQHandler ; USBD1 High Priority or CAN1 TX
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DCD USBD1_LP_CAN1_RX0_IRQHandler ; USBD1 Low Priority or CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD CAN1_SCE_IRQHandler ; CAN1 SCE
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DCD EINT9_5_IRQHandler ; EINT Line 9..5
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DCD TMR1_BRK_IRQHandler ; TMR1 Break
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DCD TMR1_UP_IRQHandler ; TMR1 Update
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DCD TMR1_TRG_COM_IRQHandler ; TMR1 Trigger and Commutation
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DCD TMR1_CC_IRQHandler ; TMR1 Capture Compare
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DCD TMR2_IRQHandler ; TMR2
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DCD TMR3_IRQHandler ; TMR3
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DCD TMR4_IRQHandler ; TMR4
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DCD I2C1_EV_IRQHandler ; I2C1 Event
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DCD I2C1_ER_IRQHandler ; I2C1 Error
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DCD I2C2_EV_IRQHandler ; I2C2 Event
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DCD I2C2_ER_IRQHandler ; I2C2 Error
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD USART3_IRQHandler ; USART3
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DCD EINT15_10_IRQHandler ; EINT Line 15..10
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DCD RTCAlarm_IRQHandler ; RTC Alarm through EINT Line
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DCD USBDWakeUp_IRQHandler ; USBD Wakeup from suspend
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DCD TMR8_BRK_IRQHandler ; TMR8 Break
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DCD TMR8_UP_IRQHandler ; TMR8 Update
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DCD TMR8_TRG_COM_IRQHandler ; TMR8 Trigger and Commutation
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DCD TMR8_CC_IRQHandler ; TMR8 Capture Compare
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DCD ADC3_IRQHandler ; ADC3
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DCD EMMC_IRQHandler ; EMMC
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DCD SDIO_IRQHandler ; SDIO
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DCD TMR5_IRQHandler ; TMR5
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DCD SPI3_IRQHandler ; SPI3
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DCD UART4_IRQHandler ; UART4
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DCD UART5_IRQHandler ; UART5
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DCD TMR6_IRQHandler ; TMR6
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DCD TMR7_IRQHandler ; TMR7
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DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1
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DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2
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DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3
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DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5
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DCD 0 ; Reserved
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DCD USBD2_HP_CAN2_TX_IRQHandler ; USBD2 High Priority or CAN2 TX
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DCD USBD2_LP_CAN2_RX0_IRQHandler ; USBD2 Low Priority or CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SCE_IRQHandler ; CAN2 SCE
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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IMPORT SystemInit
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WWDT_IRQHandler [WEAK]
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EXPORT PVD_IRQHandler [WEAK]
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EXPORT TAMPER_IRQHandler [WEAK]
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EXPORT RTC_IRQHandler [WEAK]
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EXPORT FMC_IRQHandler [WEAK]
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EXPORT RCM_IRQHandler [WEAK]
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EXPORT EINT0_IRQHandler [WEAK]
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EXPORT EINT1_IRQHandler [WEAK]
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EXPORT EINT2_IRQHandler [WEAK]
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EXPORT EINT3_IRQHandler [WEAK]
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EXPORT EINT4_IRQHandler [WEAK]
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EXPORT DMA1_Channel1_IRQHandler [WEAK]
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EXPORT DMA1_Channel2_IRQHandler [WEAK]
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EXPORT DMA1_Channel3_IRQHandler [WEAK]
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EXPORT DMA1_Channel4_IRQHandler [WEAK]
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EXPORT DMA1_Channel5_IRQHandler [WEAK]
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EXPORT DMA1_Channel6_IRQHandler [WEAK]
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EXPORT DMA1_Channel7_IRQHandler [WEAK]
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EXPORT ADC1_2_IRQHandler [WEAK]
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EXPORT USBD1_HP_CAN1_TX_IRQHandler [WEAK]
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EXPORT USBD1_LP_CAN1_RX0_IRQHandler [WEAK]
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EXPORT CAN1_RX1_IRQHandler [WEAK]
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EXPORT CAN1_SCE_IRQHandler [WEAK]
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EXPORT EINT9_5_IRQHandler [WEAK]
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EXPORT TMR1_BRK_IRQHandler [WEAK]
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EXPORT TMR1_UP_IRQHandler [WEAK]
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EXPORT TMR1_TRG_COM_IRQHandler [WEAK]
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EXPORT TMR1_CC_IRQHandler [WEAK]
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EXPORT TMR2_IRQHandler [WEAK]
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EXPORT TMR3_IRQHandler [WEAK]
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EXPORT TMR4_IRQHandler [WEAK]
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EXPORT I2C1_EV_IRQHandler [WEAK]
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EXPORT I2C1_ER_IRQHandler [WEAK]
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EXPORT I2C2_EV_IRQHandler [WEAK]
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EXPORT I2C2_ER_IRQHandler [WEAK]
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EXPORT SPI1_IRQHandler [WEAK]
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EXPORT SPI2_IRQHandler [WEAK]
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EXPORT USART1_IRQHandler [WEAK]
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EXPORT USART2_IRQHandler [WEAK]
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EXPORT USART3_IRQHandler [WEAK]
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EXPORT EINT15_10_IRQHandler [WEAK]
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EXPORT RTCAlarm_IRQHandler [WEAK]
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EXPORT USBDWakeUp_IRQHandler [WEAK]
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EXPORT TMR8_BRK_IRQHandler [WEAK]
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EXPORT TMR8_UP_IRQHandler [WEAK]
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EXPORT TMR8_TRG_COM_IRQHandler [WEAK]
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EXPORT TMR8_CC_IRQHandler [WEAK]
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EXPORT ADC3_IRQHandler [WEAK]
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EXPORT EMMC_IRQHandler [WEAK]
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EXPORT SDIO_IRQHandler [WEAK]
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EXPORT TMR5_IRQHandler [WEAK]
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EXPORT SPI3_IRQHandler [WEAK]
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EXPORT UART4_IRQHandler [WEAK]
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EXPORT UART5_IRQHandler [WEAK]
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EXPORT TMR6_IRQHandler [WEAK]
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EXPORT TMR7_IRQHandler [WEAK]
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EXPORT DMA2_Channel1_IRQHandler [WEAK]
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EXPORT DMA2_Channel2_IRQHandler [WEAK]
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EXPORT DMA2_Channel3_IRQHandler [WEAK]
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EXPORT DMA2_Channel4_5_IRQHandler [WEAK]
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EXPORT USBD2_HP_CAN2_TX_IRQHandler [WEAK]
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EXPORT USBD2_LP_CAN2_RX0_IRQHandler [WEAK]
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EXPORT CAN2_RX1_IRQHandler [WEAK]
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EXPORT CAN2_SCE_IRQHandler [WEAK]
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WWDT_IRQHandler
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PVD_IRQHandler
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TAMPER_IRQHandler
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RTC_IRQHandler
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FMC_IRQHandler
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RCM_IRQHandler
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EINT0_IRQHandler
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EINT1_IRQHandler
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EINT2_IRQHandler
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EINT3_IRQHandler
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EINT4_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_IRQHandler
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DMA1_Channel3_IRQHandler
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DMA1_Channel4_IRQHandler
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DMA1_Channel5_IRQHandler
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DMA1_Channel6_IRQHandler
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DMA1_Channel7_IRQHandler
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ADC1_2_IRQHandler
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USBD1_HP_CAN1_TX_IRQHandler
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USBD1_LP_CAN1_RX0_IRQHandler
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CAN1_RX1_IRQHandler
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CAN1_SCE_IRQHandler
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EINT9_5_IRQHandler
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TMR1_BRK_IRQHandler
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TMR1_UP_IRQHandler
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TMR1_TRG_COM_IRQHandler
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TMR1_CC_IRQHandler
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TMR2_IRQHandler
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TMR3_IRQHandler
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TMR4_IRQHandler
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I2C1_EV_IRQHandler
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I2C1_ER_IRQHandler
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I2C2_EV_IRQHandler
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I2C2_ER_IRQHandler
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SPI1_IRQHandler
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SPI2_IRQHandler
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USART1_IRQHandler
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USART2_IRQHandler
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USART3_IRQHandler
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EINT15_10_IRQHandler
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RTCAlarm_IRQHandler
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USBDWakeUp_IRQHandler
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TMR8_BRK_IRQHandler
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TMR8_UP_IRQHandler
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TMR8_TRG_COM_IRQHandler
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TMR8_CC_IRQHandler
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ADC3_IRQHandler
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EMMC_IRQHandler
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SDIO_IRQHandler
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TMR5_IRQHandler
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SPI3_IRQHandler
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UART4_IRQHandler
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UART5_IRQHandler
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TMR6_IRQHandler
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TMR7_IRQHandler
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DMA2_Channel1_IRQHandler
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DMA2_Channel2_IRQHandler
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DMA2_Channel3_IRQHandler
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DMA2_Channel4_5_IRQHandler
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USBD2_HP_CAN2_TX_IRQHandler
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USBD2_LP_CAN2_RX0_IRQHandler
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CAN2_RX1_IRQHandler
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CAN2_SCE_IRQHandler
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B .
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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;*******************************END OF FILE************************************
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