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71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
/**
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* @file wm_cpu.h
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*
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* @brief cpu driver module
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*
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* @author dave
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*
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* @copyright (c) 2014 Winner Microelectronics Co., Ltd.
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*/
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#ifndef __WM_CPU_H__
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#define __WM_CPU_H__
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#include "wm_hal.h"
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/**BASE PLL CLOCK*/
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#define W805_PLL_CLK_MHZ (480)
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#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= (IRQn_Type)0x00U)
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enum CPU_CLK{
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CPU_CLK_240M = 2,
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CPU_CLK_160M = 3,
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CPU_CLK_80M = 6,
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CPU_CLK_40M = 12,
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CPU_CLK_2M = 240,
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};
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typedef union {
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struct {
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uint32_t CPU: 8; /*!< bit: 0.. 7 cpu clock divider */
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uint32_t WLAN: 8; /*!< bit: 8.. 15 Wlan clock divider */
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uint32_t BUS2: 8; /*!< bit: 16.. 23 clock dividing ratio of bus2 & bus1 */
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uint32_t PD: 4; /*!< bit: 24.. 27 peripheral divider */
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uint32_t RSV: 3; /*!< bit: 28.. 30 Reserved */
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uint32_t DIV_EN: 1; /*!< bit: 31 divide frequency enable */
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} b;
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uint32_t w;
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} clk_div_reg;
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#define UNIT_MHZ (1000000)
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typedef struct{
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uint32_t apbclk;
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uint32_t cpuclk;
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uint32_t wlanclk;
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}wm_sys_clk;
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typedef enum
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{
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HAL_TICK_FREQ_10HZ = 10,
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HAL_TICK_FREQ_100HZ = 100,
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HAL_TICK_FREQ_1KHZ = 1000,
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HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ
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} HAL_TickFreqTypeDef;
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void SystemClock_Config(uint32_t clk);
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void SystemClock_Get(wm_sys_clk *sysclk);
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HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
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void HAL_IncTick(void);
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uint32_t HAL_GetTick(void);
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void HAL_Delay(uint32_t Delay);
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void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t Priority);
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void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
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void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
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#endif /* WM_CPU_H */
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