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163 lines
5.7 KiB
C
163 lines
5.7 KiB
C
/*
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* Copyright 2021 MindMotion Microelectronics Co., Ltd.
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __HAL_DMA_H__
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#define __HAL_DMA_H__
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#include "hal_common.h"
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/*!
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* @addtogroup DMA
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* @{
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*/
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/*!
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* @addtogroup DMA_CHANNEL_INT
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* @{
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*/
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#define DMA_CHN_INT_XFER_GLOBAL (0x1u << 0u) /*!< DMA global interrupt channel. */
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#define DMA_CHN_INT_XFER_DONE (0x1u << 1u) /*!< DMA end of transfer interrupt channel. */
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#define DMA_CHN_INT_XFER_HALF_DONE (0x1u << 2u) /*!< DMA half transfer interrupt channel. */
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#define DMA_CHN_INT_XFER_ERR (0x1u << 3u) /*!< DMA transfer error interrupt channel. */
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/*!
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* @}
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*/
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/*!
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* @brief Define the enum type of DMA_XferMode_Type.
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*/
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typedef enum
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{
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DMA_XferMode_PeriphToMemory = 0u, /*!< memory to memory mode, from periph addr to memory addr. */
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DMA_XferMode_MemoryToPeriph = 1u, /*!< memory to memory mode, from periph addr to memory addr. */
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DMA_XferMode_PeriphToMemoryBurst = 2u, /*!< memory to memory mode, from periph addr to memory addr. */
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DMA_XferMode_MemoryToPeriphBurst = 3u, /*!< memory to memory mode, from memory addr to periph addr. */
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} DMA_XferMode_Type;
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/*!
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* @brief Define the enum type of DMA_ReloadMode_Type.
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*/
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typedef enum
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{
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DMA_ReloadMode_OneTime = 0u, /*!< the count is exhausted after the xfer is done. */
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DMA_ReloadMode_AutoReload = 1u, /*!< auto reload the count for the new xfer. */
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DMA_ReloadMode_AutoReloadContinuous = 2u, /*!< auto reload the count for the next xfer, and always run. */
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} DMA_ReloadMode_Type;
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/*!
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* @brief Incremental mode of peripherals and memories.
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*/
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typedef enum
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{
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DMA_AddrIncMode_StayAfterXfer = 0u, /*!< Peripheral access address accumulation. */
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DMA_AddrIncMode_IncAfterXfer = 1u, /*!< Memory access address accumulation. */
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} DMA_AddrIncMode_Type;
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/*!
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* @brief Define the enum type of DMA xfer width type.
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*/
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typedef enum
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{
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DMA_XferWidth_8b = 0u, /*!< Xfer width 8 bits. */
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DMA_XferWidth_16b = 1u, /*!< Xfer width 16 bits. */
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DMA_XferWidth_32b = 2u, /*!< Xfer width 32 bits. */
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} DMA_XferWidth_Type;
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/*!
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* @brief Configure DMA Priority.
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*/
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typedef enum
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{
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DMA_Priority_Low = 0u, /*!< Low Priority. */
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DMA_Priority_Middle = 1u, /*!< Middle Priority. */
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DMA_Priority_High = 2u, /*!< High Priority. */
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DMA_Priority_Highest = 3u, /*!< Highest Priority. */
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} DMA_Priority_Type;
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/*!
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* @brief This type of structure instance is used to keep the settings when calling the @ref DMA_InitChannel() to initialize the DMA module.
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*/
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typedef struct
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{
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DMA_XferMode_Type XferMode; /*!< Specify whether the Receive or Transmit mode is enabled or not. */
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DMA_ReloadMode_Type ReloadMode; /*!< Specify whether to automatically reload the next transfer count when the count is exhausted. */
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DMA_AddrIncMode_Type PeriphAddrIncMode; /*!< Specify peripheral Address Inc Mode. */
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DMA_AddrIncMode_Type MemAddrIncMode; /*!< Specify Memory Address Inc Mode. */
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DMA_XferWidth_Type XferWidth; /*!< Specify the transmission data width. */
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DMA_Priority_Type Priority; /*!< Specify priority mode. */
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uint32_t XferCount; /*!< Specify CircularMode's count. */
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uint32_t MemAddr; /*!< Specify Memory Address. */
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uint32_t PeriphAddr; /*!< Specify Periph Address. */
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} DMA_Channel_Init_Type;
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/*!
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* @brief Initialize the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller.
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* @param init Pointer to the initialization structure. See to @ref DMA_Channel_Init_Type.
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* @return None.
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*/
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uint32_t DMA_InitChannel(DMA_Type * DMAx, uint32_t channel, DMA_Channel_Init_Type * init);
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/*!
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* @brief enable the DMA channel interrupts of the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller.
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* @param interrupts Interrupt code masks. See to @ref DMA_CHANNEL_INT.
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* @param enable 'true' to enable the DMA channel interrupts, 'false' to disable the DMA channel interrupts.
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* @return None.
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*/
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void DMA_EnableChannelInterrupts(DMA_Type * DMAx, uint32_t channel, uint32_t interrupts, bool enable);
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/*!
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* @brief Get the channel interrupts status flags of the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller in DMA. See to @ref DMA_CHANNEL_INT.
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* @return Interrupt status flags.
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*/
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uint32_t DMA_GetChannelInterruptStatus(DMA_Type * DMAx, uint32_t channel);
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/*!
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* @brief Clear the channel interrupts status flags of the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller. See to @ref DMA_CHANNEL_INT.
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* @param interrupts Interrupt code masks.
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* @return None.
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*/
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void DMA_ClearChannelInterruptStatus(DMA_Type * DMAx, uint32_t channel, uint32_t interrupts);
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/*!
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* @brief Enable the channel of the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller.
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* @param enable 'true' to enable the DMA controller sends a reply signal to the peripheral, 'false' to disable the DMA controller sends a reply signal to the peripheral.
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* @return None.
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*/
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void DMA_EnableChannel(DMA_Type * DMAx, uint32_t channel, bool enable);
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/*!
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* @brief Enable the burst mode of the DMA module.
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*
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* @param DMAx DMA instance.
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* @param channel Channel corresponding to DMA controller.
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* @param enable 'true' to enable the DMA controller sends a reply signal to the peripheral, 'false' to disable the DMA controller sends a reply signal to the peripheral.
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* @return None.
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*/
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void DMA_EnableBurstMode(DMA_Type * DMAx, uint32_t channel, bool enable);
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/*!
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*@}
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*/
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#endif /* __HAL_DMA_H__ */
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