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46 lines
1.8 KiB
C
46 lines
1.8 KiB
C
#include "sys.h"
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//////////////////////////////////////////////////////////////////////////////////
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>ѧϰʹ<CFB0>ã<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><C9A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD><CEBA><EFBFBD>;
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//ALIENTEK Mini STM32<33><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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//ϵͳ<CFB5>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>
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//<2F><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD>@ALIENTEK
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
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//<2F><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>:2012/9/10
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//<2F>汾<EFBFBD><E6B1BE>V1.4
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//<2F><>Ȩ<EFBFBD><C8A8><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>
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//Copyright(C) <20><><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> 2009-2019
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//All rights reserved
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//********************************************************************************
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//ʱ<><CAB1>ϵͳ<CFB5><CDB3><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>
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//PLL:ѡ<><D1A1><EFBFBD>ı<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>RCC_PLL_MUL2~RCC_PLL_MUL16
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//<2F><><EFBFBD><EFBFBD>ֵ:0,<2C>ɹ<EFBFBD>;1,ʧ<><CAA7>
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void Stm32_Clock_Init(u32 PLL)
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{
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HAL_StatusTypeDef ret = HAL_OK;
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RCC_OscInitTypeDef RCC_OscInitStructure;
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RCC_ClkInitTypeDef RCC_ClkInitStructure;
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RCC_OscInitStructure.OscillatorType=RCC_OSCILLATORTYPE_HSE; //ʱ<><CAB1>ԴΪHSE
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RCC_OscInitStructure.HSEState=RCC_HSE_ON; //<2F><><EFBFBD><EFBFBD>HSE
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RCC_OscInitStructure.HSEPredivValue=RCC_HSE_PREDIV_DIV1; //HSEԤ<45><D4A4>Ƶ
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RCC_OscInitStructure.PLL.PLLState=RCC_PLL_ON; //<2F><><EFBFBD><EFBFBD>PLL
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RCC_OscInitStructure.PLL.PLLSource=RCC_PLLSOURCE_HSE; //PLLʱ<4C><CAB1>Դѡ<D4B4><D1A1>HSE
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RCC_OscInitStructure.PLL.PLLMUL=PLL; //<2F><>PLL<4C><4C>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
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ret=HAL_RCC_OscConfig(&RCC_OscInitStructure);//<2F><>ʼ<EFBFBD><CABC>
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if(ret!=HAL_OK) while(1);
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//ѡ<><D1A1>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HCLK,PCLK1<4B><31>PCLK2
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RCC_ClkInitStructure.ClockType=(RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2);
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RCC_ClkInitStructure.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK; //<2F><><EFBFBD><EFBFBD>ϵͳʱ<CDB3><CAB1>ʱ<EFBFBD><CAB1>ԴΪPLL
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RCC_ClkInitStructure.AHBCLKDivider=RCC_SYSCLK_DIV1; //AHB<48><42>Ƶϵ<C6B5><CFB5>Ϊ1
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RCC_ClkInitStructure.APB1CLKDivider=RCC_HCLK_DIV2; //APB1<42><31>Ƶϵ<C6B5><CFB5>Ϊ2
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RCC_ClkInitStructure.APB2CLKDivider=RCC_HCLK_DIV1; //APB2<42><32>Ƶϵ<C6B5><CFB5>Ϊ1
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ret=HAL_RCC_ClockConfig(&RCC_ClkInitStructure,FLASH_LATENCY_2); //ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>FLASH<53><48>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ2WS<57><53>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD>3<EFBFBD><33>CPU<50><55><EFBFBD>ڡ<EFBFBD>
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if(ret!=HAL_OK) while(1);
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}
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