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166 lines
5.1 KiB
C
166 lines
5.1 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : CH57x_pwr.h
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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#ifndef __CH58x_PWR_H__
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#define __CH58x_PWR_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Peripher CLK control bit define
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*/
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#define BIT_SLP_CLK_TMR0 (0x00000001) /*!< TMR0 peripher clk bit */
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#define BIT_SLP_CLK_TMR1 (0x00000002) /*!< TMR1 peripher clk bit */
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#define BIT_SLP_CLK_TMR2 (0x00000004) /*!< TMR2 peripher clk bit */
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#define BIT_SLP_CLK_TMR3 (0x00000008) /*!< TMR3 peripher clk bit */
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#define BIT_SLP_CLK_UART0 (0x00000010) /*!< UART0 peripher clk bit */
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#define BIT_SLP_CLK_UART1 (0x00000020) /*!< UART1 peripher clk bit */
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#define BIT_SLP_CLK_UART2 (0x00000040) /*!< UART2 peripher clk bit */
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#define BIT_SLP_CLK_UART3 (0x00000080) /*!< UART3 peripher clk bit */
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#define BIT_SLP_CLK_SPI0 (0x00000100) /*!< SPI0 peripher clk bit */
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//#define BIT_SLP_CLK_SPI1 (0x00000200) /*!< SPI1 peripher clk bit */
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#define BIT_SLP_CLK_PWMX (0x00000400) /*!< PWMX peripher clk bit */
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//#define BIT_SLP_CLK_LCD (0x00000800) /*!< LCD peripher clk bit */
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#define BIT_SLP_CLK_USB (0x00001000) /*!< USB peripher clk bit */
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//#define BIT_SLP_CLK_ETH (0x00002000) /*!< ETH peripher clk bit */
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//#define BIT_SLP_CLK_LED (0x00004000) /*!< LED peripher clk bit */
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#define BIT_SLP_CLK_BLE (0x00008000) /*!< BLE peripher clk bit */
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#define BIT_SLP_CLK_RAMX (0x10000000) /*!< main SRAM RAM16K peripher clk bit */
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#define BIT_SLP_CLK_RAM2K (0x20000000) /*!< RAM2K peripher clk bit */
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#define BIT_SLP_CLK_ALL (0x3000FFFF) /*!< All peripher clk bit */
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/**
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* @brief unit of controllable power supply
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*/
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#define UNIT_SYS_LSE RB_CLK_XT32K_PON // <20>ⲿ32K ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define UNIT_SYS_LSI RB_CLK_INT32K_PON // <20>ڲ<EFBFBD>32K ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define UNIT_SYS_HSE RB_CLK_XT32M_PON // <20>ⲿ32M ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define UNIT_SYS_PLL RB_CLK_PLL_PON // PLL ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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/**
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* @brief wakeup mode define
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*/
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typedef enum
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{
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Short_Delay = 0,
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Long_Delay,
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} WakeUP_ModeypeDef;
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/**
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* @brief wakeup mode define
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*/
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typedef enum
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{
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/* <20><><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD>ʹ<EFBFBD>ø߾<C3B8><DFBE>ȼ<EFBFBD><C8BC>أ<EFBFBD>210uA<75><41><EFBFBD><EFBFBD> */
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HALevel_1V9 = 0, // 1.7-1.9
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HALevel_2V1, // 1.9-2.1
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HALevel_2V3, // 2.1-2.3
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HALevel_2V5, // 2.3-2.5
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/* <20><><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD>ʹ<EFBFBD>õ<C3B5><CDB9>ļ<EFBFBD><C4BC>أ<EFBFBD>1uA<75><41><EFBFBD><EFBFBD> */
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LPLevel_1V8 = 0x80,
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LPLevel_1V9,
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LPLevel_2V0,
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LPLevel_2V1,
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LPLevel_2V2,
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LPLevel_2V3,
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LPLevel_2V4,
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LPLevel_2V5,
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} VolM_LevelypeDef;
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/**
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* @brief <20><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>DC/DC<44><43>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD>Լϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>DCDC<44><43>Դ
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*/
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void PWR_DCDCCfg(FunctionalState s);
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/**
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* @brief <20>ɿص<C9BF>Ԫģ<D4AA><C4A3><EFBFBD>ĵ<EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD>Դ
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* @param unit - please refer to unit of controllable power supply
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*/
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void PWR_UnitModCfg(FunctionalState s, uint8_t unit);
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/**
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* @brief <20><><EFBFBD><EFBFBD>ʱ<EFBFBD>ӿ<EFBFBD><D3BF><EFBFBD>λ
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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* @param perph - please refer to Peripher CLK control bit define
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*/
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void PWR_PeriphClkCfg(FunctionalState s, uint16_t perph);
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/**
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* @brief ˯<><EFBFBD><DFBB><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7><EFBFBD><F2BFAAB4><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD><EFBFBD><DFBB>ѹ<EFBFBD><D1B9><EFBFBD>
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* @param perph - <20><>Ҫ<EFBFBD><D2AA><EFBFBD>õĻ<C3B5><C4BB><EFBFBD>Դ
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* RB_SLP_USB_WAKE - USB Ϊ<><CEAA><EFBFBD><EFBFBD>Դ
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* RB_SLP_RTC_WAKE - RTC Ϊ<><CEAA><EFBFBD><EFBFBD>Դ
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* RB_SLP_GPIO_WAKE - GPIO Ϊ<><CEAA><EFBFBD><EFBFBD>Դ
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* RB_SLP_BAT_WAKE - BAT Ϊ<><CEAA><EFBFBD><EFBFBD>Դ
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* @param mode - refer to WakeUP_ModeypeDef
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*/
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void PWR_PeriphWakeUpCfg(FunctionalState s, uint8_t perph, WakeUP_ModeypeDef mode);
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/**
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* @brief <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
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*
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* @param s - <20>Ƿ<EFBFBD><C7B7>˹<F2BFAAB4><CBB9><EFBFBD>
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* @param vl - refer to VolM_LevelypeDef
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*/
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void PowerMonitor(FunctionalState s, VolM_LevelypeDef vl);
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/**
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* @brief <20><EFBFBD><CDB9><EFBFBD>-Idleģʽ
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*/
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void LowPower_Idle(void);
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/**
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* @brief <20><EFBFBD><CDB9><EFBFBD>-Haltģʽ<C4A3><CABD><EFBFBD>˵<CBB5><CDB9><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<35><CAB1><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>Ѻ<EFBFBD><D1BA><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><C3BB>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>ϵͳʱ<CDB3><CAB1>Դ
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*/
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void LowPower_Halt(void);
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/**
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* @brief <20><EFBFBD><CDB9><EFBFBD>-Sleepģʽ<C4A3><CABD><EFBFBD>˵<CBB5><CDB9><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<35><CAB1><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>Ѻ<EFBFBD><D1BA><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><C3BB>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>ϵͳʱ<CDB3><CAB1>Դ
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* @note ע<><D7A2><EFBFBD><EFBFBD><EFBFBD>ô˺<C3B4><CBBA><EFBFBD><EFBFBD><EFBFBD>DCDC<44><43><EFBFBD><EFBFBD>ǿ<EFBFBD>ƹرգ<D8B1><D5A3><EFBFBD><EFBFBD>Ѻ<EFBFBD><D1BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><D6B6>ٴδ<D9B4><CEB4><EFBFBD>
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*
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* @param rm - <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ѡ<EFBFBD><D1A1>
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* RB_PWR_RAM2K - 2K retention SRAM <20><><EFBFBD><EFBFBD>
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* RB_PWR_RAM16K - 16K main SRAM <20><><EFBFBD><EFBFBD>
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* RB_PWR_EXTEND - USB <20><> BLE <20><>Ԫ<EFBFBD><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* RB_PWR_XROM - FlashROM <20><><EFBFBD><EFBFBD>
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* NULL - <20><><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><D4AA><EFBFBD>ϵ<EFBFBD>
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*/
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void LowPower_Sleep(uint8_t rm);
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/**
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* @brief <20><EFBFBD><CDB9><EFBFBD>-Shutdownģʽ<C4A3><CABD><EFBFBD>˵<CBB5><CDB9><EFBFBD><EFBFBD>е<EFBFBD>HSI/5ʱ<35><CAB1><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>Ѻ<EFBFBD><D1BA><EFBFBD>Ҫ<EFBFBD>û<EFBFBD><C3BB>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>ϵͳʱ<CDB3><CAB1>Դ
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* @note ע<><D7A2><EFBFBD><EFBFBD><EFBFBD>ô˺<C3B4><CBBA><EFBFBD><EFBFBD><EFBFBD>DCDC<44><43><EFBFBD><EFBFBD>ǿ<EFBFBD>ƹرգ<D8B1><D5A3><EFBFBD><EFBFBD>Ѻ<EFBFBD><D1BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><D6B6>ٴδ<D9B4><CEB4><EFBFBD>
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*
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* @param rm - <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ѡ<EFBFBD><D1A1>
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* RB_PWR_RAM2K - 2K retention SRAM <20><><EFBFBD><EFBFBD>
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* RB_PWR_RAM16K - 16K main SRAM <20><><EFBFBD><EFBFBD>
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* NULL - <20><><EFBFBD>ϵ<EFBFBD>Ԫ<EFBFBD><D4AA><EFBFBD>ϵ<EFBFBD>
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*/
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void LowPower_Shutdown(uint8_t rm);
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#ifdef __cplusplus
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}
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#endif
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#endif // __CH58x_PWR_H__
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