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/********************************** (C) COPYRIGHT *******************************
* File Name : CH57x_clk.h
* Author : WCH
* Version : V1.2
* Date : 2021/11/17
* Description
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
* SPDX-License-Identifier: Apache-2.0
*******************************************************************************/
#ifndef __CH58x_CLK_H__
#define __CH58x_CLK_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief ϵͳ<CFB5><CDB3>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
*/
typedef enum
{
CLK_SOURCE_LSI = 0x00,
CLK_SOURCE_LSE,
CLK_SOURCE_HSE_16MHz = 0x22,
CLK_SOURCE_HSE_8MHz = 0x24,
CLK_SOURCE_HSE_6_4MHz = 0x25,
CLK_SOURCE_HSE_4MHz = 0x28,
CLK_SOURCE_HSE_2MHz = (0x20 | 16),
CLK_SOURCE_HSE_1MHz = (0x20 | 0),
CLK_SOURCE_PLL_80MHz = 0x46,
CLK_SOURCE_PLL_60MHz = 0x48,
CLK_SOURCE_PLL_48MHz = (0x40 | 10),
CLK_SOURCE_PLL_40MHz = (0x40 | 12),
CLK_SOURCE_PLL_36_9MHz = (0x40 | 13),
CLK_SOURCE_PLL_32MHz = (0x40 | 15),
CLK_SOURCE_PLL_30MHz = (0x40 | 16),
CLK_SOURCE_PLL_24MHz = (0x40 | 20),
CLK_SOURCE_PLL_20MHz = (0x40 | 24),
CLK_SOURCE_PLL_15MHz = (0x40 | 0),
} SYS_CLKTypeDef;
/**
* @brief 32Kʱ<4B><CAB1>ѡ<EFBFBD><D1A1>
*/
typedef enum
{
Clk32K_LSI = 0,
Clk32K_LSE,
} LClk32KTypeDef;
/**
* @brief 32M<32><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
*/
typedef enum
{
HSE_RCur_75 = 0,
HSE_RCur_100,
HSE_RCur_125,
HSE_RCur_150
} HSECurrentTypeDef;
/**
* @brief 32M<32><4D><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
*/
typedef enum
{
HSECap_10p = 0,
HSECap_12p,
HSECap_14p,
HSECap_16p,
HSECap_18p,
HSECap_20p,
HSECap_22p,
HSECap_24p
} HSECapTypeDef;
/**
* @brief 32K<32><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
*/
typedef enum
{
LSE_RCur_70 = 0,
LSE_RCur_100,
LSE_RCur_140,
LSE_RCur_200
} LSECurrentTypeDef;
/**
* @brief 32K<32><4B><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
*/
typedef enum
{
LSECap_2p = 0,
LSECap_13p,
LSECap_14p,
LSECap_15p,
LSECap_16p,
LSECap_17p,
LSECap_18p,
LSECap_19p,
LSECap_20p,
LSECap_21p,
LSECap_22p,
LSECap_23p,
LSECap_24p,
LSECap_25p,
LSECap_26p,
LSECap_27p
} LSECapTypeDef;
#define MAX_DAY 0x00004000
#define MAX_2_SEC 0x0000A8C0
//#define MAX_SEC 0x545FFFFF
#define BEGYEAR 2020
#define IsLeapYear(yr) (!((yr) % 400) || (((yr) % 100) && !((yr) % 4)))
#define YearLength(yr) (IsLeapYear(yr) ? 366 : 365)
#define monthLength(lpyr, mon) ((mon == 1) ? (28 + lpyr) : ((mon > 6) ? ((mon & 1) ? 31 : 30) : ((mon & 1) ? 30 : 31)))
/**
* @brief rtc timer mode period define
*/
typedef enum
{
Period_0_125_S = 0, // 0.125s <20><><EFBFBD><EFBFBD>
Period_0_25_S, // 0.25s <20><><EFBFBD><EFBFBD>
Period_0_5_S, // 0.5s <20><><EFBFBD><EFBFBD>
Period_1_S, // 1s <20><><EFBFBD><EFBFBD>
Period_2_S, // 2s <20><><EFBFBD><EFBFBD>
Period_4_S, // 4s <20><><EFBFBD><EFBFBD>
Period_8_S, // 8s <20><><EFBFBD><EFBFBD>
Period_16_S, // 16s <20><><EFBFBD><EFBFBD>
} RTC_TMRCycTypeDef;
/**
* @brief rtc interrupt event define
*/
typedef enum
{
RTC_TRIG_EVENT = 0, // RTC <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
RTC_TMR_EVENT, // RTC <20><><EFBFBD>ڶ<EFBFBD>ʱ<EFBFBD>¼<EFBFBD>
} RTC_EVENTTypeDef;
/**
* @brief rtc interrupt event define
*/
typedef enum
{
RTC_TRIG_MODE = 0, // RTC <20><><EFBFBD><EFBFBD>ģʽ
RTC_TMR_MODE, // RTC <20><><EFBFBD>ڶ<EFBFBD>ʱģʽ
} RTC_MODETypeDef;
typedef enum
{
/* У׼<D0A3><D7BC><EFBFBD><EFBFBD>Խ<EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>ʱԽ<CAB1><D4BD> */
Level_32 = 3, // <20><>ʱ 1.2ms 1000ppm (32M <20><>Ƶ) 1100ppm (64M <20><>Ƶ)
Level_64, // <20><>ʱ 2.2ms 800ppm (32M <20><>Ƶ) 1000ppm (64M <20><>Ƶ)
Level_128, // <20><>ʱ 4.2ms 600ppm (32M <20><>Ƶ) 800ppm (64M <20><>Ƶ)
} Cali_LevelTypeDef;
/**
* @brief 32K <20><>Ƶʱ<C6B5><CAB1><EFBFBD><EFBFBD>Դ
*
* @param hc - ѡ<><D1A1>32Kʹ<4B><CAB9><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ
*/
void LClk32K_Select(LClk32KTypeDef hc);
/**
* @brief HSE<53><45><EFBFBD><EFBFBD> ƫ<>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param c - 75%,100%,125%,150%
*/
void HSECFG_Current(HSECurrentTypeDef c);
/**
* @brief HSE<53><45><EFBFBD><EFBFBD> <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param c - refer to HSECapTypeDef
*/
void HSECFG_Capacitance(HSECapTypeDef c);
/**
* @brief LSE<53><45><EFBFBD><EFBFBD> ƫ<>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param c - 70%,100%,140%,200%
*/
void LSECFG_Current(LSECurrentTypeDef c);
/**
* @brief LSE<53><45><EFBFBD><EFBFBD> <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param c - refer to LSECapTypeDef
*/
void LSECFG_Capacitance(LSECapTypeDef c);
void Calibration_LSI(Cali_LevelTypeDef cali_Lv); /* <20><><EFBFBD><EFBFBD>ƵУ׼<D0A3>ڲ<EFBFBD>32Kʱ<4B><CAB1> */
/**
* @brief RTCʱ<43>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1>
*
* @param y - <20><><EFBFBD><EFBFBD><EFBFBD>꣬MAX_Y = BEGYEAR + 44
* @param mon - <20><><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>MAX_MON = 12
* @param d - <20><><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>MAX_D = 31
* @param h - <20><><EFBFBD><EFBFBD>Сʱ<D0A1><CAB1>MAX_H = 23
* @param m - <20><><EFBFBD>÷<EFBFBD><C3B7>ӣ<EFBFBD>MAX_M = 59
* @param s - <20><><EFBFBD><EFBFBD><EFBFBD>룬MAX_S = 59
*/
void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s);
/**
* @brief <20><>ȡ<EFBFBD><C8A1>ǰʱ<C7B0><CAB1>
*
* @param py - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>꣬MAX_Y = BEGYEAR + 44
* @param pmon - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>MAX_MON = 12
* @param pd - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>MAX_D = 31
* @param ph - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>Сʱ<D0A1><CAB1>MAX_H = 23
* @param pm - <20><>ȡ<EFBFBD><C8A1><EFBFBD>ķ<EFBFBD><C4B7>ӣ<EFBFBD>MAX_M = 59
* @param ps - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>룬MAX_S = 59
*/
void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps);
/**
* @brief <20><><EFBFBD><EFBFBD>LSE/LSIʱ<49>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD>õ<EFBFBD>ǰRTC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>MAX_CYC = 0xA8BFFFFF = 2831155199
*/
void RTC_SetCycle32k(uint32_t cyc);
/**
* @brief <20><><EFBFBD><EFBFBD>LSE/LSIʱ<49>ӣ<EFBFBD><D3A3><EFBFBD>ȡ<EFBFBD><C8A1>ǰRTC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MAX_CYC = 0xA8BFFFFF = 2831155199
*/
uint32_t RTC_GetCycle32k(void);
/**
* @brief RTC<54><43>ʱģʽ<C4A3><CABD><EFBFBD>ã<EFBFBD>ע<EFBFBD>ⶨʱ<E2B6A8><CAB1>׼<EFBFBD>̶<EFBFBD>Ϊ32768Hz<48><7A>
*
* @param t - refer to RTC_TMRCycTypeDef
*/
void RTC_TRIGFunCfg(uint32_t cyc);
/**
* @brief RTC<54><43>ʱģʽ<C4A3><CABD><EFBFBD>ã<EFBFBD>ע<EFBFBD>ⶨʱ<E2B6A8><CAB1>׼<EFBFBD>̶<EFBFBD>Ϊ32768Hz<48><7A>
*
* @param t - refer to RTC_TMRCycTypeDef
*/
void RTC_TMRFunCfg(RTC_TMRCycTypeDef t);
/**
* @brief RTC ģʽ<C4A3><CABD><EFBFBD>ܹر<DCB9>
*
* @param m - <20><>Ҫ<EFBFBD>رյĵ<D5B5>ǰģʽ
*/
void RTC_ModeFunDisable(RTC_MODETypeDef m);
/**
* @brief <20><>ȡRTC<54>жϱ<D0B6>־
*
* @param f - refer to RTC_EVENTTypeDef
*
* @return <20>жϱ<D0B6>־״̬
*/
uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f);
/**
* @brief <20><><EFBFBD><EFBFBD>RTC<54>жϱ<D0B6>־
*
* @param f - refer to RTC_EVENTTypeDef
*/
void RTC_ClearITFlag(RTC_EVENTTypeDef f);
#ifdef __cplusplus
}
#endif
#endif // __CH58x_CLK_H__