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289 lines
6.0 KiB
C
289 lines
6.0 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : CH57x_clk.h
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* SPDX-License-Identifier: Apache-2.0
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*******************************************************************************/
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#ifndef __CH58x_CLK_H__
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#define __CH58x_CLK_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ϵͳ<CFB5><CDB3>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>
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*/
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typedef enum
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{
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CLK_SOURCE_LSI = 0x00,
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CLK_SOURCE_LSE,
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CLK_SOURCE_HSE_16MHz = 0x22,
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CLK_SOURCE_HSE_8MHz = 0x24,
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CLK_SOURCE_HSE_6_4MHz = 0x25,
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CLK_SOURCE_HSE_4MHz = 0x28,
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CLK_SOURCE_HSE_2MHz = (0x20 | 16),
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CLK_SOURCE_HSE_1MHz = (0x20 | 0),
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CLK_SOURCE_PLL_80MHz = 0x46,
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CLK_SOURCE_PLL_60MHz = 0x48,
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CLK_SOURCE_PLL_48MHz = (0x40 | 10),
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CLK_SOURCE_PLL_40MHz = (0x40 | 12),
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CLK_SOURCE_PLL_36_9MHz = (0x40 | 13),
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CLK_SOURCE_PLL_32MHz = (0x40 | 15),
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CLK_SOURCE_PLL_30MHz = (0x40 | 16),
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CLK_SOURCE_PLL_24MHz = (0x40 | 20),
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CLK_SOURCE_PLL_20MHz = (0x40 | 24),
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CLK_SOURCE_PLL_15MHz = (0x40 | 0),
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} SYS_CLKTypeDef;
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/**
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* @brief 32Kʱ<4B><CAB1>ѡ<EFBFBD><D1A1>
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*/
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typedef enum
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{
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Clk32K_LSI = 0,
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Clk32K_LSE,
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} LClk32KTypeDef;
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/**
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* @brief 32M<32><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
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*/
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typedef enum
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{
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HSE_RCur_75 = 0,
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HSE_RCur_100,
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HSE_RCur_125,
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HSE_RCur_150
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} HSECurrentTypeDef;
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/**
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* @brief 32M<32><4D><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
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*/
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typedef enum
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{
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HSECap_10p = 0,
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HSECap_12p,
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HSECap_14p,
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HSECap_16p,
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HSECap_18p,
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HSECap_20p,
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HSECap_22p,
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HSECap_24p
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} HSECapTypeDef;
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/**
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* @brief 32K<32><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
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*/
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typedef enum
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{
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LSE_RCur_70 = 0,
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LSE_RCur_100,
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LSE_RCur_140,
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LSE_RCur_200
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} LSECurrentTypeDef;
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/**
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* @brief 32K<32><4B><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD>ݵ<EFBFBD>λ
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*/
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typedef enum
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{
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LSECap_2p = 0,
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LSECap_13p,
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LSECap_14p,
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LSECap_15p,
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LSECap_16p,
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LSECap_17p,
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LSECap_18p,
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LSECap_19p,
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LSECap_20p,
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LSECap_21p,
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LSECap_22p,
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LSECap_23p,
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LSECap_24p,
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LSECap_25p,
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LSECap_26p,
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LSECap_27p
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} LSECapTypeDef;
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#define MAX_DAY 0x00004000
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#define MAX_2_SEC 0x0000A8C0
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//#define MAX_SEC 0x545FFFFF
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#define BEGYEAR 2020
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#define IsLeapYear(yr) (!((yr) % 400) || (((yr) % 100) && !((yr) % 4)))
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#define YearLength(yr) (IsLeapYear(yr) ? 366 : 365)
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#define monthLength(lpyr, mon) ((mon == 1) ? (28 + lpyr) : ((mon > 6) ? ((mon & 1) ? 31 : 30) : ((mon & 1) ? 30 : 31)))
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/**
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* @brief rtc timer mode period define
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*/
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typedef enum
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{
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Period_0_125_S = 0, // 0.125s <20><><EFBFBD><EFBFBD>
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Period_0_25_S, // 0.25s <20><><EFBFBD><EFBFBD>
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Period_0_5_S, // 0.5s <20><><EFBFBD><EFBFBD>
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Period_1_S, // 1s <20><><EFBFBD><EFBFBD>
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Period_2_S, // 2s <20><><EFBFBD><EFBFBD>
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Period_4_S, // 4s <20><><EFBFBD><EFBFBD>
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Period_8_S, // 8s <20><><EFBFBD><EFBFBD>
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Period_16_S, // 16s <20><><EFBFBD><EFBFBD>
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} RTC_TMRCycTypeDef;
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/**
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* @brief rtc interrupt event define
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*/
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typedef enum
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{
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RTC_TRIG_EVENT = 0, // RTC <20><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>
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RTC_TMR_EVENT, // RTC <20><><EFBFBD>ڶ<EFBFBD>ʱ<EFBFBD>¼<EFBFBD>
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} RTC_EVENTTypeDef;
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/**
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* @brief rtc interrupt event define
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*/
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typedef enum
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{
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RTC_TRIG_MODE = 0, // RTC <20><><EFBFBD><EFBFBD>ģʽ
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RTC_TMR_MODE, // RTC <20><><EFBFBD>ڶ<EFBFBD>ʱģʽ
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} RTC_MODETypeDef;
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typedef enum
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{
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/* У<D0A3><D7BC><EFBFBD><EFBFBD>Խ<EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>ʱԽ<CAB1><D4BD> */
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Level_32 = 3, // <20><>ʱ 1.2ms 1000ppm (32M <20><>Ƶ) 1100ppm (64M <20><>Ƶ)
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Level_64, // <20><>ʱ 2.2ms 800ppm (32M <20><>Ƶ) 1000ppm (64M <20><>Ƶ)
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Level_128, // <20><>ʱ 4.2ms 600ppm (32M <20><>Ƶ) 800ppm (64M <20><>Ƶ)
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} Cali_LevelTypeDef;
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/**
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* @brief 32K <20><>Ƶʱ<C6B5><CAB1><EFBFBD><EFBFBD>Դ
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*
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* @param hc - ѡ<><D1A1>32Kʹ<4B><CAB9><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ
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*/
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void LClk32K_Select(LClk32KTypeDef hc);
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/**
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* @brief HSE<53><45><EFBFBD><EFBFBD> ƫ<>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param c - 75%,100%,125%,150%
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*/
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void HSECFG_Current(HSECurrentTypeDef c);
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/**
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* @brief HSE<53><45><EFBFBD><EFBFBD> <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param c - refer to HSECapTypeDef
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*/
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void HSECFG_Capacitance(HSECapTypeDef c);
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/**
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* @brief LSE<53><45><EFBFBD><EFBFBD> ƫ<>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param c - 70%,100%,140%,200%
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*/
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void LSECFG_Current(LSECurrentTypeDef c);
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/**
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* @brief LSE<53><45><EFBFBD><EFBFBD> <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param c - refer to LSECapTypeDef
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*/
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void LSECFG_Capacitance(LSECapTypeDef c);
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void Calibration_LSI(Cali_LevelTypeDef cali_Lv); /* <20><><EFBFBD><EFBFBD>ƵУ<D0A3>ڲ<EFBFBD>32Kʱ<4B><CAB1> */
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/**
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* @brief RTCʱ<43>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1>
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*
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* @param y - <20><><EFBFBD><EFBFBD><EFBFBD>꣬MAX_Y = BEGYEAR + 44
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* @param mon - <20><><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>MAX_MON = 12
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* @param d - <20><><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>MAX_D = 31
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* @param h - <20><><EFBFBD><EFBFBD>Сʱ<D0A1><CAB1>MAX_H = 23
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* @param m - <20><><EFBFBD>÷<EFBFBD><C3B7>ӣ<EFBFBD>MAX_M = 59
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* @param s - <20><><EFBFBD><EFBFBD><EFBFBD>룬MAX_S = 59
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*/
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void RTC_InitTime(uint16_t y, uint16_t mon, uint16_t d, uint16_t h, uint16_t m, uint16_t s);
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/**
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* @brief <20><>ȡ<EFBFBD><C8A1>ǰʱ<C7B0><CAB1>
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*
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* @param py - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>꣬MAX_Y = BEGYEAR + 44
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* @param pmon - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>MAX_MON = 12
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* @param pd - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>MAX_D = 31
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* @param ph - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>Сʱ<D0A1><CAB1>MAX_H = 23
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* @param pm - <20><>ȡ<EFBFBD><C8A1><EFBFBD>ķ<EFBFBD><C4B7>ӣ<EFBFBD>MAX_M = 59
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* @param ps - <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>룬MAX_S = 59
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*/
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void RTC_GetTime(uint16_t *py, uint16_t *pmon, uint16_t *pd, uint16_t *ph, uint16_t *pm, uint16_t *ps);
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/**
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* @brief <20><><EFBFBD><EFBFBD>LSE/LSIʱ<49>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD>õ<EFBFBD>ǰRTC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @param cyc - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>MAX_CYC = 0xA8BFFFFF = 2831155199
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*/
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void RTC_SetCycle32k(uint32_t cyc);
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/**
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* @brief <20><><EFBFBD><EFBFBD>LSE/LSIʱ<49>ӣ<EFBFBD><D3A3><EFBFBD>ȡ<EFBFBD><C8A1>ǰRTC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @return <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MAX_CYC = 0xA8BFFFFF = 2831155199
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*/
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uint32_t RTC_GetCycle32k(void);
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/**
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* @brief RTC<54><43>ʱģʽ<C4A3><CABD><EFBFBD>ã<EFBFBD>ע<EFBFBD>ⶨʱ<E2B6A8><CAB1><EFBFBD>̶<EFBFBD>Ϊ32768Hz<48><7A>
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*
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* @param t - refer to RTC_TMRCycTypeDef
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*/
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void RTC_TRIGFunCfg(uint32_t cyc);
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/**
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* @brief RTC<54><43>ʱģʽ<C4A3><CABD><EFBFBD>ã<EFBFBD>ע<EFBFBD>ⶨʱ<E2B6A8><CAB1><EFBFBD>̶<EFBFBD>Ϊ32768Hz<48><7A>
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*
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* @param t - refer to RTC_TMRCycTypeDef
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*/
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void RTC_TMRFunCfg(RTC_TMRCycTypeDef t);
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/**
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* @brief RTC ģʽ<C4A3><CABD><EFBFBD>ܹر<DCB9>
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*
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* @param m - <20><>Ҫ<EFBFBD>رյĵ<D5B5>ǰģʽ
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*/
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void RTC_ModeFunDisable(RTC_MODETypeDef m);
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/**
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* @brief <20><>ȡRTC<54>жϱ<D0B6>־
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*
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* @param f - refer to RTC_EVENTTypeDef
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*
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* @return <20>жϱ<D0B6>־״̬
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*/
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uint8_t RTC_GetITFlag(RTC_EVENTTypeDef f);
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/**
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* @brief <20><><EFBFBD><EFBFBD>RTC<54>жϱ<D0B6>־
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*
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* @param f - refer to RTC_EVENTTypeDef
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*/
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void RTC_ClearITFlag(RTC_EVENTTypeDef f);
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#ifdef __cplusplus
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}
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#endif
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#endif // __CH58x_CLK_H__
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