mirror of
https://github.com/azure-rtos/threadx
synced 2025-01-16 07:42:57 +08:00
patch from ST patch 87f130e.diff.
This commit is contained in:
parent
776ea213ce
commit
2ef4ac0cb0
@ -23,6 +23,13 @@
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#include "tx_user.h"
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#endif
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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#ifdef TX_ENABLE_FIQ_SUPPORT
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DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts
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#else
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@ -31,11 +38,6 @@ DISABLE_INTS = 0x80 // Disable IRQ interrupts
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MODE_MASK = 0x1F // Mode mask
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FIQ_MODE_BITS = 0x11 // FIQ mode bits
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/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
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since it will never be called 16-bit mode. */
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.arm
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.text
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.align 2
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/**************************************************************************/
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@ -90,6 +92,9 @@ FIQ_MODE_BITS = 0x11 // FIQ mode bits
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_fiq_nesting_end
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.type _tx_thread_fiq_nesting_end,function
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_tx_thread_fiq_nesting_end:
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@ -103,8 +108,4 @@ _tx_thread_fiq_nesting_end:
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ORR r0, r0, #FIQ_MODE_BITS // Build IRQ mode CPSR
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MSR CPSR_c, r0 // Reenter IRQ mode
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#ifdef __THUMB_INTERWORK
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BX r3 // Return to caller
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#else
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MOV pc, r3 // Return to caller
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#endif
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@ -1,15 +1,30 @@
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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/* .text is used instead of .section .text so it works with arm-aout too. */
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.text
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.code 32
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.align 0
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _mainCRTStartup
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_mainCRTStartup:
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _start
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_start:
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global start
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start:
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_start:
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_mainCRTStartup:
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/* Start by setting up a stack */
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/* Set up the stack pointer to a fixed value */
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@ -69,15 +84,7 @@ _mainCRTStartup:
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.word _fini
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#endif */
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/* Return ... */
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#ifdef __APCS_26__
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movs pc, lr
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#else
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#ifdef __THUMB_INTERWORK
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bx lr
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#else
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mov pc, lr
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#endif
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#endif
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.global _fini
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.type _fini,function
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@ -23,7 +23,12 @@
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#include "tx_user.h"
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#endif
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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SVC_MODE = 0xD3 // Disable IRQ/FIQ SVC mode
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IRQ_MODE = 0xD2 // Disable IRQ/FIQ IRQ mode
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@ -48,22 +53,7 @@ SYS_STACK_SIZE = 1024 // System stack size
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.global enableCaches
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.global init_private_timer
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.global start_private_timer
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/* Define the 16-bit Thumb mode veneer for _tx_initialize_low_level for
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applications calling this function from to 16-bit Thumb mode. */
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.text
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.align 2
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.thumb
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.global $_tx_initialize_low_level
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.type $_tx_initialize_low_level,function
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$_tx_initialize_low_level:
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BX pc // Switch to 32-bit mode
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NOP //
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.arm
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STMFD sp!, {lr} // Save return address
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BL _tx_initialize_low_level // Call _tx_initialize_low_level function
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LDMFD sp!, {lr} // Recover saved return address
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BX lr // Return to 16-bit caller
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.text
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.align 2
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@ -113,6 +103,9 @@ $_tx_initialize_low_level:
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_initialize_low_level
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.type _tx_initialize_low_level,function
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_tx_initialize_low_level:
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@ -201,34 +194,48 @@ _stack_error_loop:
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BL start_private_timer
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POP {lr}
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#ifdef __THUMB_INTERWORK
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BX lr // Return to caller
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#else
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MOV pc, lr // Return to caller
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#endif
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/* Define shells for each of the interrupt vectors. */
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_undefined
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__tx_undefined:
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B __tx_undefined // Undefined handler
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_swi_interrupt
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__tx_swi_interrupt:
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B __tx_swi_interrupt // Software interrupt handler
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_prefetch_handler
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__tx_prefetch_handler:
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B __tx_prefetch_handler // Prefetch exception handler
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_abort_handler
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__tx_abort_handler:
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B __tx_abort_handler // Abort exception handler
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_reserved_handler
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__tx_reserved_handler:
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B __tx_reserved_handler // Reserved exception handler
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_irq_handler
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.global __tx_irq_processing_return
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__tx_irq_handler:
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@ -302,6 +309,9 @@ by_pass_timer_interrupt:
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#ifdef TX_ENABLE_FIQ_SUPPORT
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_fiq_handler
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.global __tx_fiq_processing_return
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__tx_fiq_handler:
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@ -336,6 +346,9 @@ __tx_fiq_processing_return:
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#else
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global __tx_fiq_handler
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__tx_fiq_handler:
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B __tx_fiq_handler // FIQ interrupt handler
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@ -23,6 +23,13 @@
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#include "tx_user.h"
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#endif
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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#ifdef TX_ENABLE_FIQ_SUPPORT
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DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts
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#else
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@ -31,11 +38,6 @@ DISABLE_INTS = 0x80 // Disable IRQ interrupts
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MODE_MASK = 0x1F // Mode mask
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FIQ_MODE_BITS = 0x11 // FIQ mode bits
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/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_end
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since it will never be called 16-bit mode. */
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.arm
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.text
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.align 2
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/**************************************************************************/
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@ -90,6 +92,9 @@ FIQ_MODE_BITS = 0x11 // FIQ mode bits
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_fiq_nesting_end
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.type _tx_thread_fiq_nesting_end,function
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_tx_thread_fiq_nesting_end:
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@ -103,8 +108,4 @@ _tx_thread_fiq_nesting_end:
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ORR r0, r0, #FIQ_MODE_BITS // Build IRQ mode CPSR
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MSR CPSR_c, r0 // Reenter IRQ mode
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#ifdef __THUMB_INTERWORK
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BX r3 // Return to caller
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#else
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MOV pc, r3 // Return to caller
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#endif
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#include "tx_user.h"
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#endif
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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FIQ_DISABLE = 0x40 // FIQ disable bit
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MODE_MASK = 0x1F // Mode mask
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SYS_MODE_BITS = 0x1F // System mode bits
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/* No 16-bit Thumb mode veneer code is needed for _tx_thread_fiq_nesting_start
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since it will never be called 16-bit mode. */
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.arm
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.text
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.align 2
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/**************************************************************************/
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@ -83,6 +85,9 @@ SYS_MODE_BITS = 0x1F // System mode bits
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_fiq_nesting_start
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.type _tx_thread_fiq_nesting_start,function
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_tx_thread_fiq_nesting_start:
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@ -95,8 +100,4 @@ _tx_thread_fiq_nesting_start:
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// and push r1 just to keep 8-byte alignment
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BIC r0, r0, #FIQ_DISABLE // Build enable FIQ CPSR
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MSR CPSR_c, r0 // Enter system mode
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#ifdef __THUMB_INTERWORK
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BX r3 // Return to caller
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#else
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MOV pc, r3 // Return to caller
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#endif
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@ -23,24 +23,14 @@
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#include "tx_user.h"
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#endif
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INT_MASK = 0x03F
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/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_control for
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applications calling this function from to 16-bit Thumb mode. */
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.text
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.align 2
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.global $_tx_thread_interrupt_control
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$_tx_thread_interrupt_control:
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.thumb
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BX pc // Switch to 32-bit mode
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NOP //
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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STMFD sp!, {lr} // Save return address
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BL _tx_thread_interrupt_control // Call _tx_thread_interrupt_control function
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LDMFD sp!, {lr} // Recover saved return address
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BX lr // Return to 16-bit caller
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#else
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.thumb
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#endif
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INT_MASK = 0x03F
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.text
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@ -88,6 +78,9 @@ $_tx_thread_interrupt_control:
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_interrupt_control
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.type _tx_thread_interrupt_control,function
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_tx_thread_interrupt_control:
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@ -103,8 +96,4 @@ _tx_thread_interrupt_control:
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MSR CPSR_c, r1 // Setup new CPSR
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BIC r0, r3, r2 // Return previous interrupt mask
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#ifdef __THUMB_INTERWORK
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BX lr // Return to caller
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#else
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MOV pc, lr // Return to caller
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#endif
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@ -23,22 +23,11 @@
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#include "tx_user.h"
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#endif
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/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_disable for
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applications calling this function from to 16-bit Thumb mode. */
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.text
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.align 2
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.global $_tx_thread_interrupt_disable
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$_tx_thread_interrupt_disable:
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.thumb
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BX pc // Switch to 32-bit mode
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NOP //
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#if defined(ARM_MODE)
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.arm
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STMFD sp!, {lr} // Save return address
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BL _tx_thread_interrupt_disable // Call _tx_thread_interrupt_disable function
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LDMFD sp!, {lr} // Recover saved return address
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BX lr // Return to 16-bit caller
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#else
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.thumb
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#endif
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.text
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.align 2
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@ -84,6 +73,9 @@ $_tx_thread_interrupt_disable:
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_interrupt_disable
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.type _tx_thread_interrupt_disable,function
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_tx_thread_interrupt_disable:
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@ -100,8 +92,4 @@ _tx_thread_interrupt_disable:
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CPSID i // Disable IRQ
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#endif
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#ifdef __THUMB_INTERWORK
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BX lr // Return to caller
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#else
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MOV pc, lr // Return to caller
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#endif
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@ -23,22 +23,17 @@
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#include "tx_user.h"
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#endif
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/* Define the 16-bit Thumb mode veneer for _tx_thread_interrupt_restore for
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applications calling this function from to 16-bit Thumb mode. */
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.text
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.align 2
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.global $_tx_thread_interrupt_restore
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$_tx_thread_interrupt_restore:
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.thumb
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BX pc // Switch to 32-bit mode
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NOP //
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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STMFD sp!, {lr} // Save return address
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BL _tx_thread_interrupt_restore // Call _tx_thread_interrupt_restore function
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LDMFD sp!, {lr} // Recover saved return address
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BX lr // Return to 16-bit caller
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#else
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.thumb
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#endif
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IRQ_MASK = 0x080
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#ifdef TX_ENABLE_FIQ_SUPPORT
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FIQ_MASK = 0x040
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#endif
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.text
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.align 2
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@ -85,15 +80,22 @@ $_tx_thread_interrupt_restore:
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/* resulting in version 6.3.0 */
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_interrupt_restore
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.type _tx_thread_interrupt_restore,function
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_tx_thread_interrupt_restore:
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/* Apply the new interrupt posture. */
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MSR CPSR_c, r0 // Setup new CPSR
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#ifdef __THUMB_INTERWORK
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BX lr // Return to caller
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#else
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MOV pc, lr // Return to caller
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TST r0, #IRQ_MASK
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BNE no_irq
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CPSIE i
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no_irq:
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#ifdef TX_ENABLE_FIQ_SUPPORT
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TST r0, #FIQ_MASK
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BNE no_fiq
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CPSIE f
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no_fiq:
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#endif
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BX lr // Return to caller
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|
@ -23,6 +23,13 @@
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#include "tx_user.h"
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#endif
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.syntax unified
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#if defined(ARM_MODE)
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.arm
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#else
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.thumb
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#endif
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#ifdef TX_ENABLE_FIQ_SUPPORT
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DISABLE_INTS = 0xC0 // Disable IRQ/FIQ interrupts
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#else
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@ -31,11 +38,6 @@ DISABLE_INTS = 0x80 // Disable IRQ interrupts
|
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MODE_MASK = 0x1F // Mode mask
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IRQ_MODE_BITS = 0x12 // IRQ mode bits
|
||||
|
||||
|
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/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
|
||||
since it will never be called 16-bit mode. */
|
||||
|
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.arm
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.text
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.align 2
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/**************************************************************************/
|
||||
@ -90,6 +92,9 @@ IRQ_MODE_BITS = 0x12 // IRQ mode bits
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/* resulting in version 6.3.0 */
|
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/* */
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/**************************************************************************/
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#if !defined(ARM_MODE)
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.thumb_func
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#endif
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.global _tx_thread_irq_nesting_end
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.type _tx_thread_irq_nesting_end,function
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_tx_thread_irq_nesting_end:
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@ -102,8 +107,4 @@ _tx_thread_irq_nesting_end:
|
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BIC r0, r0, #MODE_MASK // Clear mode bits
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ORR r0, r0, #IRQ_MODE_BITS // Build IRQ mode CPSR
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MSR CPSR_c, r0 // Reenter IRQ mode
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#ifdef __THUMB_INTERWORK
|
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BX r3 // Return to caller
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#else
|
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MOV pc, r3 // Return to caller
|
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#endif
|
||||
|
@ -23,15 +23,17 @@
|
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#include "tx_user.h"
|
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#endif
|
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|
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.syntax unified
|
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#if defined(ARM_MODE)
|
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.arm
|
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#else
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||||
.thumb
|
||||
#endif
|
||||
|
||||
IRQ_DISABLE = 0x80 // IRQ disable bit
|
||||
MODE_MASK = 0x1F // Mode mask
|
||||
SYS_MODE_BITS = 0x1F // System mode bits
|
||||
|
||||
|
||||
/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_start
|
||||
since it will never be called 16-bit mode. */
|
||||
|
||||
.arm
|
||||
.text
|
||||
.align 2
|
||||
/**************************************************************************/
|
||||
@ -83,6 +85,9 @@ SYS_MODE_BITS = 0x1F // System mode bits
|
||||
/* resulting in version 6.3.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global _tx_thread_irq_nesting_start
|
||||
.type _tx_thread_irq_nesting_start,function
|
||||
_tx_thread_irq_nesting_start:
|
||||
@ -95,8 +100,4 @@ _tx_thread_irq_nesting_start:
|
||||
// and push r1 just to keep 8-byte alignment
|
||||
BIC r0, r0, #IRQ_DISABLE // Build enable IRQ CPSR
|
||||
MSR CPSR_c, r0 // Enter system mode
|
||||
#ifdef __THUMB_INTERWORK
|
||||
BX r3 // Return to caller
|
||||
#else
|
||||
MOV pc, r3 // Return to caller
|
||||
#endif
|
||||
|
@ -23,29 +23,17 @@
|
||||
#include "tx_user.h"
|
||||
#endif
|
||||
|
||||
.syntax unified
|
||||
#if defined(ARM_MODE)
|
||||
.arm
|
||||
#else
|
||||
.thumb
|
||||
#endif
|
||||
|
||||
.global _tx_thread_execute_ptr
|
||||
.global _tx_thread_current_ptr
|
||||
.global _tx_timer_time_slice
|
||||
|
||||
|
||||
/* Define the 16-bit Thumb mode veneer for _tx_thread_schedule for
|
||||
applications calling this function from to 16-bit Thumb mode. */
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.global $_tx_thread_schedule
|
||||
.type $_tx_thread_schedule,function
|
||||
$_tx_thread_schedule:
|
||||
.thumb
|
||||
BX pc // Switch to 32-bit mode
|
||||
NOP //
|
||||
.arm
|
||||
STMFD sp!, {lr} // Save return address
|
||||
BL _tx_thread_schedule // Call _tx_thread_schedule function
|
||||
LDMFD sp!, {lr} // Recover saved return address
|
||||
BX lr // Return to 16-bit caller
|
||||
|
||||
|
||||
.text
|
||||
.align 2
|
||||
/**************************************************************************/
|
||||
@ -97,6 +85,9 @@ $_tx_thread_schedule:
|
||||
/* resulting in version 6.3.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global _tx_thread_schedule
|
||||
.type _tx_thread_schedule,function
|
||||
_tx_thread_schedule:
|
||||
@ -187,14 +178,13 @@ _tx_skip_solicited_vfp_restore:
|
||||
#endif
|
||||
MSR CPSR_cxsf, r5 // Recover CPSR
|
||||
LDMIA sp!, {r4-r11, lr} // Return to thread synchronously
|
||||
#ifdef __THUMB_INTERWORK
|
||||
BX lr // Return to caller
|
||||
#else
|
||||
MOV pc, lr // Return to caller
|
||||
#endif
|
||||
|
||||
#ifdef TX_ENABLE_VFP_SUPPORT
|
||||
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global tx_thread_vfp_enable
|
||||
.type tx_thread_vfp_enable,function
|
||||
tx_thread_vfp_enable:
|
||||
@ -214,6 +204,9 @@ __tx_no_thread_to_enable:
|
||||
MSR CPSR_cxsf, r2 // Recover CPSR
|
||||
BX LR // Return to caller
|
||||
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global tx_thread_vfp_disable
|
||||
.type tx_thread_vfp_disable,function
|
||||
tx_thread_vfp_disable:
|
||||
|
@ -23,7 +23,12 @@
|
||||
#include "tx_user.h"
|
||||
#endif
|
||||
|
||||
.syntax unified
|
||||
#if defined(ARM_MODE)
|
||||
.arm
|
||||
#else
|
||||
.thumb
|
||||
#endif
|
||||
|
||||
SVC_MODE = 0x13 // SVC mode
|
||||
#ifdef TX_ENABLE_FIQ_SUPPORT
|
||||
@ -32,25 +37,6 @@ CPSR_MASK = 0xDF // Mask initial CPSR, IRQ & FIQ
|
||||
CPSR_MASK = 0x9F // Mask initial CPSR, IRQ interrupts enabled
|
||||
#endif
|
||||
|
||||
|
||||
/* Define the 16-bit Thumb mode veneer for _tx_thread_stack_build for
|
||||
applications calling this function from to 16-bit Thumb mode. */
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.thumb
|
||||
.global $_tx_thread_stack_build
|
||||
.type $_tx_thread_stack_build,function
|
||||
$_tx_thread_stack_build:
|
||||
BX pc // Switch to 32-bit mode
|
||||
NOP //
|
||||
.arm
|
||||
STMFD sp!, {lr} // Save return address
|
||||
BL _tx_thread_stack_build // Call _tx_thread_stack_build function
|
||||
LDMFD sp!, {lr} // Recover saved return address
|
||||
BX lr // Return to 16-bit caller
|
||||
|
||||
|
||||
.text
|
||||
.align 2
|
||||
/**************************************************************************/
|
||||
@ -98,6 +84,9 @@ $_tx_thread_stack_build:
|
||||
/* resulting in version 6.3.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global _tx_thread_stack_build
|
||||
.type _tx_thread_stack_build,function
|
||||
_tx_thread_stack_build:
|
||||
@ -164,8 +153,4 @@ _tx_thread_stack_build:
|
||||
|
||||
STR r2, [r0, #8] // Save stack pointer in thread's
|
||||
// control block
|
||||
#ifdef __THUMB_INTERWORK
|
||||
BX lr // Return to caller
|
||||
#else
|
||||
MOV pc, lr // Return to caller
|
||||
#endif
|
||||
|
@ -23,8 +23,12 @@
|
||||
#include "tx_user.h"
|
||||
#endif
|
||||
|
||||
.syntax unified
|
||||
#if defined(ARM_MODE)
|
||||
.arm
|
||||
|
||||
#else
|
||||
.thumb
|
||||
#endif
|
||||
|
||||
/* Define Assembly language external references... */
|
||||
|
||||
@ -37,26 +41,6 @@
|
||||
.global _tx_timer_expired
|
||||
.global _tx_thread_time_slice
|
||||
|
||||
|
||||
|
||||
/* Define the 16-bit Thumb mode veneer for _tx_timer_interrupt for
|
||||
applications calling this function from to 16-bit Thumb mode. */
|
||||
|
||||
.text
|
||||
.align 2
|
||||
.thumb
|
||||
.global $_tx_timer_interrupt
|
||||
.type $_tx_timer_interrupt,function
|
||||
$_tx_timer_interrupt:
|
||||
BX pc // Switch to 32-bit mode
|
||||
NOP //
|
||||
.arm
|
||||
STMFD sp!, {lr} // Save return address
|
||||
BL _tx_timer_interrupt // Call _tx_timer_interrupt function
|
||||
LDMFD sp!, {lr} // Recover saved return address
|
||||
BX lr // Return to 16-bit caller
|
||||
|
||||
|
||||
.text
|
||||
.align 2
|
||||
/**************************************************************************/
|
||||
@ -106,6 +90,9 @@ $_tx_timer_interrupt:
|
||||
/* resulting in version 6.3.0 */
|
||||
/* */
|
||||
/**************************************************************************/
|
||||
#if !defined(ARM_MODE)
|
||||
.thumb_func
|
||||
#endif
|
||||
.global _tx_timer_interrupt
|
||||
.type _tx_timer_interrupt,function
|
||||
_tx_timer_interrupt:
|
||||
@ -230,8 +217,4 @@ __tx_timer_not_ts_expiration:
|
||||
|
||||
__tx_timer_nothing_expired:
|
||||
|
||||
#ifdef __THUMB_INTERWORK
|
||||
BX lr // Return to caller
|
||||
#else
|
||||
MOV pc, lr // Return to caller
|
||||
#endif
|
||||
|
Loading…
x
Reference in New Issue
Block a user