20 Commits

Author	SHA1	Message	Date
TiejunZhou	672c5e953e	Release ARMv7-A architecture ports and add tx_user.h to GNU port assembly files (#250) ... * Release ARMv7-A architecture ports * Add tx_user.h to GNU port assembly files * Update GitHub action to perform check for Cortex-A ports	2023-04-19 17:56:09 +08:00
TiejunZhou	23680f5e5f	Release ARMv7-M and ARMv8-M architecture ports (#249) ... * Release ARMv7-M and ARMv8-M architecture ports * Add a pipeline to check ports_arch	2023-04-18 18:11:20 +08:00
TiejunZhou	d64ef2ab06	Filter the path for PR trigger and add codeowners (#248) ... * Filter the path for PR trigger * Add codeowners * Fix syntax in pipeline	2023-04-17 13:16:14 +08:00
Liya Du	35a301ad3b	Update issue templates	2022-11-15 21:03:59 -08:00
Liya Du	e23b09fe0b	Update issue templates	2022-11-15 20:48:09 -08:00
Liya Du	aea1a3d8f9	Update issue templates	2022-11-15 20:44:48 -08:00
Scott Larson	69287b8bb4	update workflows	2020-12-09 10:57:26 -08:00
Scott Larson	1777796996	Update ci_cortex_m0.yml	2020-12-07 14:56:14 -08:00
Scott Larson	64b4d510ba	Update ci_cortex_m0.yml	2020-12-07 14:38:48 -08:00
PProvost	dd64ed2b19	Cache update every 3 days is better	2020-05-15 18:47:55 -06:00
PProvost	70c3360947	Added cortex m0 and m3 to cloud CI	2020-05-14 14:14:19 -06:00
PProvost	f9401c4c03	Updated GH actions to cache arm-none-eabi	2020-05-14 14:11:20 -06:00
PProvost	1710230620	Still working on path issues	2020-05-14 14:02:43 -06:00
PProvost	1bc7f6aa50	Add cached folder to path	2020-05-14 13:45:25 -06:00
PProvost	2efcfc4ad9	Typo in cache updater	2020-05-14 13:37:37 -06:00
PProvost	710a8b8d53	Scheduled cache updater	2020-05-14 13:25:27 -06:00
PProvost	9e56e21def	Caching arm compiler for builds	2020-05-14 13:02:07 -06:00
PProvost	6d776b3572	Tweaking GH actions	2020-05-14 12:54:26 -06:00
PProvost	281e030ea1	More CI build updates	2020-05-13 14:26:55 -06:00
PProvost	72ff4cff48	Added CI build skeleton	2020-05-13 14:09:22 -06:00