mirror of
https://github.com/azure-rtos/threadx
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49 lines
1.7 KiB
C
49 lines
1.7 KiB
C
/**************************************************************************/
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/* */
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/* Copyright (c) Microsoft Corporation. All rights reserved. */
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/* */
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/* This software is licensed under the Microsoft Software License */
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/* Terms for Microsoft Azure RTOS. Full text of the license can be */
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/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
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/* and in the root directory of this software. */
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/* */
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/**************************************************************************/
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#ifndef TM_PORTING_LAYER_H
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#define TM_PORTING_LAYER_H
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#include <stdio.h>
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/* Define the TRAP instruction. This is used by the Interrupt Processing and Interrupt Preemption Processing tests.
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The SVC instruction below is for Cortex-M architectures using IAR tools. This will likely need to be modified
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for different processors and/or development tools.
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Note also that for the Interrupt Processing test there is the assumption that the SVC ISR looks like:
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PUBLIC SVC_Handler
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SVC_Handler:
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PUSH {lr}
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BL tm_interrupt_handler
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POP {lr}
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BX LR
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And that for the Interrupt Preemption Processing test the SVC ISR looks like:
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PUBLIC SVC_Handler
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SVC_Handler:
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PUSH {lr}
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BL tm_interrupt_preemption_handler
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POP {lr}
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BX LR
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Again, this is very processor/tool specific so changes are likely needed for non Cortex-M/IAR
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environments. */
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#define TM_CAUSE_INTERRUPT asm("SVC #0");
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#endif
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