2019-08-24 12:40:18 -04:00
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 William D. Jones for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "tusb_option.h"
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#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32H7
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#include "device/dcd.h"
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#include "stm32h7xx.h"
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/*------------------------------------------------------------------*/
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/* MACRO TYPEDEF CONSTANT ENUM
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*------------------------------------------------------------------*/
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2019-08-30 21:57:06 -04:00
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#define DEVICE_BASE (USB_OTG_DeviceTypeDef *) (USB2_OTG_FS_PERIPH_BASE + USB_OTG_DEVICE_BASE)
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2019-08-24 12:40:18 -04:00
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/*------------------------------------------------------------------*/
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/* Controller API
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*------------------------------------------------------------------*/
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void dcd_init (uint8_t rhport)
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{
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(void) rhport;
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2019-08-30 21:57:06 -04:00
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// Programming model begins on page 2634 of Rev 6 of reference manual.
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USB2_OTG_FS->GAHBCFG |= USB_OTG_GAHBCFG_TXFELVL | USB_OTG_GAHBCFG_GINT;
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// No HNP/SRP (no OTG support), program timeout later, turnaround
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// programmed for 32+ MHz.
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2019-08-30 22:07:35 -04:00
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USB2_OTG_FS->GUSBCFG |= (0x06 << USB_OTG_GUSBCFG_TRDT_Pos) | USB_OTG_GUSBCFG_PHYSEL;
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2019-08-30 21:57:06 -04:00
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// Clear all used interrupts
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USB2_OTG_FS->GINTSTS |= USB_OTG_GINTSTS_OTGINT | USB_OTG_GINTSTS_MMIS | \
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USB_OTG_GINTSTS_USBRST | USB_OTG_GINTSTS_ENUMDNE | \
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USB_OTG_GINTSTS_ESUSP | USB_OTG_GINTSTS_USBSUSP | USB_OTG_GINTSTS_SOF;
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// Required as part of core initialization. Disable OTGINT as we don't use
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// it right now. TODO: How should mode mismatch be handled? It will cause
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// the core to stop working/require reset.
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USB2_OTG_FS->GINTMSK |= /* USB_OTG_GINTMSK_OTGINT | */ USB_OTG_GINTMSK_MMISM;
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USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;
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// If USB host misbehaves during status portion of control xfer
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// (non zero-length packet), send STALL back and discard. Full speed.
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dev->DCFG |= USB_OTG_DCFG_NZLSOHSK | (3 << USB_OTG_DCFG_DSPD_Pos);
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USB2_OTG_FS->GINTMSK |= USB_OTG_GINTMSK_USBRST | USB_OTG_GINTMSK_ENUMDNEM | \
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USB_OTG_GINTMSK_SOFM | USB_OTG_GINTMSK_RXFLVLM /* SB_OTG_GINTMSK_ESUSPM | \
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USB_OTG_GINTMSK_USBSUSPM */;
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// Enable pullup, enable peripheral.
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#ifdef USB_OTG_GCCFG_VBDEN
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USB2_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN | USB_OTG_GCCFG_PWRDWN;
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#else
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USB2_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN | USB_OTG_GCCFG_PWRDWN;
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#endif
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// This step does not appear to be specified in the programmer's model.
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dev->DCTL &= ~USB_OTG_DCTL_SDIS;
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2019-08-24 12:40:18 -04:00
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}
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void dcd_int_enable (uint8_t rhport)
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{
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(void) rhport;
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NVIC_EnableIRQ(OTG_FS_IRQn);
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}
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void dcd_int_disable (uint8_t rhport)
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{
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(void) rhport;
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NVIC_DisableIRQ(OTG_FS_IRQn);
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}
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void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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{
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(void) rhport;
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(void) dev_addr;
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}
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void dcd_set_config (uint8_t rhport, uint8_t config_num)
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{
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(void) rhport;
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(void) config_num;
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// Nothing to do
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}
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void dcd_remote_wakeup(uint8_t rhport)
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{
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(void) rhport;
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}
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/*------------------------------------------------------------------*/
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/* DCD Endpoint port
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*------------------------------------------------------------------*/
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bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
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{
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(void) rhport;
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(void) desc_edpt;
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return false;
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}
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bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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(void) rhport;
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(void) ep_addr;
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(void) buffer;
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(void) total_bytes;
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return false;
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}
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// TODO: The logic for STALLing and disabling an endpoint is very similar
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// (send STALL versus NAK handshakes back). Refactor into resuable function.
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void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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(void) ep_addr;
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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(void) ep_addr;
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}
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/*------------------------------------------------------------------*/
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void OTG_FS_IRQHandler (void)
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{
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}
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#endif
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