2021-04-28 18:11:49 +07:00
|
|
|
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
|
2021-03-04 22:50:45 +07:00
|
|
|
|
2019-09-05 14:29:17 +07:00
|
|
|
CFLAGS += \
|
2019-11-20 16:06:40 +07:00
|
|
|
-flto \
|
2019-09-05 14:29:17 +07:00
|
|
|
-mthumb \
|
|
|
|
|
-mabi=aapcs \
|
|
|
|
|
-mcpu=cortex-m3 \
|
|
|
|
|
-nostdlib \
|
|
|
|
|
-DCORE_M3 \
|
|
|
|
|
-D__USE_LPCOPEN \
|
|
|
|
|
-DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
|
|
|
|
|
-DRTC_EV_SUPPORT=0
|
|
|
|
|
|
2019-09-06 15:06:04 +07:00
|
|
|
# startup.c and lpc_types.h cause following errors
|
2020-03-23 22:52:59 +07:00
|
|
|
CFLAGS += -Wno-error=strict-prototypes
|
2019-09-06 15:06:04 +07:00
|
|
|
|
2019-11-11 11:51:51 +07:00
|
|
|
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
|
2019-09-09 12:23:03 +07:00
|
|
|
|
2019-09-05 14:29:17 +07:00
|
|
|
# All source paths should be relative to the top level.
|
2020-03-07 17:49:30 +07:00
|
|
|
LD_FILE = hw/bsp/$(BOARD)/lpc1768.ld
|
2019-09-05 14:29:17 +07:00
|
|
|
|
|
|
|
|
SRC_C += \
|
2021-03-17 16:52:07 +07:00
|
|
|
src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
|
2019-09-09 12:39:58 +07:00
|
|
|
$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
|
2019-09-09 12:23:03 +07:00
|
|
|
$(MCU_DIR)/src/chip_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/clock_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/gpio_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/iocon_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/sysctl_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/sysinit_17xx_40xx.c \
|
|
|
|
|
$(MCU_DIR)/src/uart_17xx_40xx.c
|
2019-09-05 14:29:17 +07:00
|
|
|
|
|
|
|
|
INC += \
|
2019-09-09 12:23:03 +07:00
|
|
|
$(TOP)/$(MCU_DIR)/inc
|
2019-09-05 14:29:17 +07:00
|
|
|
|
|
|
|
|
# For freeRTOS port source
|
|
|
|
|
FREERTOS_PORT = ARM_CM3
|
|
|
|
|
|
|
|
|
|
# For flash-jlink target
|
|
|
|
|
JLINK_DEVICE = LPC1768
|
|
|
|
|
|
2019-11-21 23:19:38 +07:00
|
|
|
# flash using pyocd
|
2021-01-26 12:46:24 +07:00
|
|
|
flash: $(BUILD)/$(PROJECT).hex
|
2019-11-21 23:19:38 +07:00
|
|
|
pyocd flash -t lpc1768 $<
|
|
|
|
|
|
