2014-03-12 14:08:52 +07:00
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/**************************************************************************/
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/*!
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@file msc_host.c
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@author hathach (tinyusb.org)
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@section LICENSE
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Software License Agreement (BSD License)
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Copyright (c) 2013, hathach (tinyusb.org)
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the copyright holders nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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This file is part of the tinyusb stack.
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*/
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/**************************************************************************/
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#include "tusb_option.h"
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2018-12-06 22:24:31 +07:00
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#if MODE_HOST_SUPPORTED & CFG_TUH_MSC
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2014-03-12 14:08:52 +07:00
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#define _TINY_USB_SOURCE_FILE_
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//--------------------------------------------------------------------+
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// INCLUDE
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//--------------------------------------------------------------------+
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2018-03-12 22:45:35 +07:00
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#include "common/tusb_common.h"
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2014-03-12 14:08:52 +07:00
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#include "msc_host.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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2018-12-07 12:56:42 +07:00
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CFG_TUSB_MEM_SECTION static msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX];
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2014-03-12 14:08:52 +07:00
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//------------- Initalization Data -------------//
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2018-12-07 12:56:42 +07:00
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static osal_semaphore_def_t msch_sem_def;
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2018-03-01 11:17:11 +07:00
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static osal_semaphore_t msch_sem_hdl;
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2014-03-12 14:08:52 +07:00
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// buffer used to read scsi information when mounted, largest response data currently is inquiry
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2018-12-07 12:56:42 +07:00
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4) static uint8_t msch_buffer[sizeof(scsi_inquiry_resp_t)];
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2014-03-12 14:08:52 +07:00
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// PUBLIC API
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//--------------------------------------------------------------------+
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2015-05-01 19:06:01 +07:00
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bool tuh_msc_is_mounted(uint8_t dev_addr)
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2014-03-12 14:08:52 +07:00
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{
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2015-05-01 19:16:56 +07:00
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return tuh_device_is_configured(dev_addr) && // is configured can be omitted
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2014-03-12 14:08:52 +07:00
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msch_data[dev_addr-1].is_initialized;
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}
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2015-05-01 19:06:01 +07:00
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bool tuh_msc_is_busy(uint8_t dev_addr)
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2014-03-12 14:08:52 +07:00
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{
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return msch_data[dev_addr-1].is_initialized &&
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hcd_pipe_is_busy(msch_data[dev_addr-1].bulk_in);
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}
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2015-05-01 19:06:01 +07:00
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uint8_t const* tuh_msc_get_vendor_name(uint8_t dev_addr)
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2014-03-12 14:08:52 +07:00
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{
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return msch_data[dev_addr-1].is_initialized ? msch_data[dev_addr-1].vendor_id : NULL;
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}
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2015-05-01 19:06:01 +07:00
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uint8_t const* tuh_msc_get_product_name(uint8_t dev_addr)
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2014-03-12 14:08:52 +07:00
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{
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return msch_data[dev_addr-1].is_initialized ? msch_data[dev_addr-1].product_id : NULL;
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}
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2015-05-01 19:06:01 +07:00
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tusb_error_t tuh_msc_get_capacity(uint8_t dev_addr, uint32_t* p_last_lba, uint32_t* p_block_size)
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2014-03-12 14:08:52 +07:00
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{
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if ( !msch_data[dev_addr-1].is_initialized ) return TUSB_ERROR_MSCH_DEVICE_NOT_MOUNTED;
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2018-03-28 14:49:00 +07:00
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TU_ASSERT(p_last_lba != NULL && p_block_size != NULL, TUSB_ERROR_INVALID_PARA);
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2014-03-12 14:08:52 +07:00
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(*p_last_lba) = msch_data[dev_addr-1].last_lba;
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(*p_block_size) = (uint32_t) msch_data[dev_addr-1].block_size;
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return TUSB_ERROR_NONE;
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}
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//--------------------------------------------------------------------+
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// PUBLIC API: SCSI COMMAND
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//--------------------------------------------------------------------+
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2018-03-22 16:46:14 +07:00
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static inline void msc_cbw_add_signature(msc_cbw_t *p_cbw, uint8_t lun)
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2014-03-12 14:08:52 +07:00
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{
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p_cbw->signature = MSC_CBW_SIGNATURE;
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p_cbw->tag = 0xCAFECAFE;
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p_cbw->lun = lun;
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}
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static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer) ATTR_WARN_UNUSED_RESULT;
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static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer)
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{
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if ( NULL != p_buffer)
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{ // there is data phase
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2018-03-11 20:20:59 +07:00
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if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
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2014-03-12 14:08:52 +07:00
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{
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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2018-12-07 12:56:42 +07:00
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.total_bytes) );
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2014-03-12 14:08:52 +07:00
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}else
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{
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) );
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2018-12-07 12:56:42 +07:00
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.total_bytes, false) );
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2014-03-12 14:08:52 +07:00
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}
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}
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) );
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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{
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = sizeof(scsi_inquiry_resp_t);
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_inquiry_t);
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//------------- SCSI command -------------//
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scsi_inquiry_t cmd_inquiry =
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{
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.cmd_code = SCSI_CMD_INQUIRY,
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2018-12-07 12:56:42 +07:00
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.alloc_length = sizeof(scsi_inquiry_resp_t)
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2014-03-12 14:08:52 +07:00
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};
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memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len);
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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tusb_error_t tusbh_msc_read_capacity10(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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{
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t);
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_read_capacity10_t);
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//------------- SCSI command -------------//
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scsi_read_capacity10_t cmd_read_capacity10 =
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{
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.cmd_code = SCSI_CMD_READ_CAPACITY_10,
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.lba = 0,
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.partial_medium_indicator = 0
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};
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memcpy(p_msch->cbw.command, &cmd_read_capacity10, p_msch->cbw.cmd_len);
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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2015-05-01 19:06:01 +07:00
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tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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2014-03-12 14:08:52 +07:00
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{
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2014-03-14 14:33:50 +07:00
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(void) lun; // TODO [MSCH] multiple lun support
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2014-03-12 14:08:52 +07:00
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = 18;
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_request_sense_t);
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//------------- SCSI command -------------//
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scsi_request_sense_t cmd_request_sense =
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{
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.cmd_code = SCSI_CMD_REQUEST_SENSE,
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.alloc_length = 18
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};
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memcpy(p_msch->cbw.command, &cmd_request_sense, p_msch->cbw.cmd_len);
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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2018-03-22 16:46:14 +07:00
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tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t * p_csw)
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2014-03-12 14:08:52 +07:00
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{
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = 0; // Number of bytes
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_OUT;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_test_unit_ready_t);
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//------------- SCSI command -------------//
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scsi_test_unit_ready_t cmd_test_unit_ready =
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{
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.cmd_code = SCSI_CMD_TEST_UNIT_READY,
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.lun = lun // according to wiki
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};
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memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len);
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// TODO MSCH refractor test uinit ready
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) );
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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2015-05-01 19:06:01 +07:00
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tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count)
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2014-03-12 14:08:52 +07:00
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{
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_IN_MASK;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_read10_t);
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//------------- SCSI command -------------//
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scsi_read10_t cmd_read10 =
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{
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.cmd_code = SCSI_CMD_READ_10,
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.lba = __n2be(lba),
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2018-12-07 12:56:42 +07:00
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.block_count = tu_u16_le2be(block_count)
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2014-03-12 14:08:52 +07:00
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};
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memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len);
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2018-04-12 17:55:15 +07:00
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_buffer));
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2014-03-12 14:08:52 +07:00
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return TUSB_ERROR_NONE;
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}
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2015-05-01 19:06:01 +07:00
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tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count)
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2014-03-12 14:08:52 +07:00
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{
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msch_interface_t* p_msch = &msch_data[dev_addr-1];
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//------------- Command Block Wrapper -------------//
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msc_cbw_add_signature(&p_msch->cbw, lun);
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2018-12-07 12:56:42 +07:00
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p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes
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2018-03-11 20:20:59 +07:00
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p_msch->cbw.dir = TUSB_DIR_OUT;
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2014-03-12 14:08:52 +07:00
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p_msch->cbw.cmd_len = sizeof(scsi_write10_t);
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//------------- SCSI command -------------//
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scsi_write10_t cmd_write10 =
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{
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.cmd_code = SCSI_CMD_WRITE_10,
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.lba = __n2be(lba),
|
2018-12-07 12:56:42 +07:00
|
|
|
.block_count = tu_u16_le2be(block_count)
|
2014-03-12 14:08:52 +07:00
|
|
|
};
|
|
|
|
|
|
|
|
memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len);
|
|
|
|
|
2018-04-12 17:55:15 +07:00
|
|
|
TU_ASSERT_ERR ( msch_command_xfer(p_msch, (void*) p_buffer));
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
return TUSB_ERROR_NONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// CLASS-USBH API (don't require to verify parameters)
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
void msch_init(void)
|
|
|
|
{
|
2018-10-23 12:19:32 +07:00
|
|
|
tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX);
|
2018-12-07 12:56:42 +07:00
|
|
|
msch_sem_hdl = osal_semaphore_create(&msch_sem_def);
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
|
2018-12-07 12:56:42 +07:00
|
|
|
bool msch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
|
2014-03-12 14:08:52 +07:00
|
|
|
{
|
|
|
|
if (! ( MSC_SUBCLASS_SCSI == p_interface_desc->bInterfaceSubClass &&
|
|
|
|
MSC_PROTOCOL_BOT == p_interface_desc->bInterfaceProtocol ) )
|
|
|
|
{
|
|
|
|
return TUSB_ERROR_MSC_UNSUPPORTED_PROTOCOL;
|
|
|
|
}
|
|
|
|
|
|
|
|
//------------- Open Data Pipe -------------//
|
2018-03-23 12:32:40 +07:00
|
|
|
tusb_desc_endpoint_t const *p_endpoint;
|
|
|
|
p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_interface_desc );
|
2014-03-14 00:06:43 +07:00
|
|
|
|
2014-03-12 14:08:52 +07:00
|
|
|
for(uint32_t i=0; i<2; i++)
|
|
|
|
{
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType);
|
|
|
|
TU_ASSERT(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer);
|
2014-03-12 14:08:52 +07:00
|
|
|
|
2018-03-11 20:20:59 +07:00
|
|
|
pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ?
|
2014-03-12 14:08:52 +07:00
|
|
|
&msch_data[dev_addr-1].bulk_in : &msch_data[dev_addr-1].bulk_out;
|
|
|
|
|
|
|
|
(*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_MSC);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT( pipehandle_is_valid(*p_pipe_hdl) );
|
2014-03-12 14:08:52 +07:00
|
|
|
|
2018-03-23 12:32:40 +07:00
|
|
|
p_endpoint = (tusb_desc_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint );
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
msch_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber;
|
2018-03-23 12:32:40 +07:00
|
|
|
(*p_length) += sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t);
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
|
|
|
|
//------------- Get Max Lun -------------//
|
2018-12-07 12:56:42 +07:00
|
|
|
tusb_control_request_t request = {
|
|
|
|
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_IN },
|
|
|
|
.bRequest = MSC_REQ_GET_MAX_LUN,
|
|
|
|
.wValue = 0,
|
|
|
|
.wIndex = msch_data[dev_addr-1].interface_number,
|
|
|
|
.wLength = 1
|
|
|
|
};
|
|
|
|
// TODO STALL means zero
|
|
|
|
TU_ASSERT( usbh_control_xfer( dev_addr, &request, msch_buffer ) );
|
2014-03-12 14:08:52 +07:00
|
|
|
msch_data[dev_addr-1].max_lun = msch_buffer[0];
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
//------------- Reset -------------//
|
2018-12-07 12:56:42 +07:00
|
|
|
request = (tusb_control_request_t) {
|
|
|
|
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_INTERFACE, .type = TUSB_REQ_TYPE_CLASS, .direction = TUSB_DIR_OUT },
|
|
|
|
.bRequest = MSC_REQ_RESET,
|
|
|
|
.wValue = 0,
|
|
|
|
.wIndex = msch_data[dev_addr-1].interface_number,
|
|
|
|
.wLength = 0
|
|
|
|
};
|
|
|
|
TU_ASSERT( usbh_control_xfer( dev_addr, &request, NULL ) );
|
2014-03-12 14:08:52 +07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
enum { SCSI_XFER_TIMEOUT = 2000 };
|
|
|
|
//------------- SCSI Inquiry -------------//
|
|
|
|
tusbh_msc_inquiry(dev_addr, 0, msch_buffer);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) );
|
2014-03-12 14:08:52 +07:00
|
|
|
|
2018-12-07 12:56:42 +07:00
|
|
|
memcpy(msch_data[dev_addr-1].vendor_id , ((scsi_inquiry_resp_t*) msch_buffer)->vendor_id , 8);
|
|
|
|
memcpy(msch_data[dev_addr-1].product_id, ((scsi_inquiry_resp_t*) msch_buffer)->product_id, 16);
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
//------------- SCSI Read Capacity 10 -------------//
|
|
|
|
tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
// NOTE: my toshiba thumb-drive stall the first Read Capacity and require the sequence
|
|
|
|
// Read Capacity --> Stalled --> Clear Stall --> Request Sense --> Read Capacity (2) to work
|
|
|
|
if ( hcd_pipe_is_stalled(msch_data[dev_addr-1].bulk_in) )
|
2018-12-07 12:56:42 +07:00
|
|
|
{
|
|
|
|
// clear stall TODO abstract clear stall function
|
|
|
|
request = (tusb_control_request_t) {
|
|
|
|
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_ENDPOINT, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT },
|
|
|
|
.bRequest = TUSB_REQ_CLEAR_FEATURE,
|
|
|
|
.wValue = 0,
|
|
|
|
.wIndex = hcd_pipe_get_endpoint_addr(msch_data[dev_addr-1].bulk_in),
|
|
|
|
.wLength = 0
|
|
|
|
};
|
|
|
|
|
|
|
|
TU_ASSERT(usbh_control_xfer( dev_addr, &request, NULL ));
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
hcd_pipe_clear_stall(msch_data[dev_addr-1].bulk_in);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT( osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT) ); // wait for SCSI status
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
//------------- SCSI Request Sense -------------//
|
2015-05-01 19:06:01 +07:00
|
|
|
(void) tuh_msc_request_sense(dev_addr, 0, msch_buffer);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
//------------- Re-read SCSI Read Capactity -------------//
|
|
|
|
tusbh_msc_read_capacity10(dev_addr, 0, msch_buffer);
|
2018-12-07 12:56:42 +07:00
|
|
|
TU_ASSERT(osal_semaphore_wait(msch_sem_hdl, SCSI_XFER_TIMEOUT));
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
|
2018-12-07 12:56:42 +07:00
|
|
|
msch_data[dev_addr-1].last_lba = __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->last_lba );
|
|
|
|
msch_data[dev_addr-1].block_size = (uint16_t) __be2n( ((scsi_read_capacity10_resp_t*)msch_buffer)->block_size );
|
2014-03-12 14:08:52 +07:00
|
|
|
|
|
|
|
msch_data[dev_addr-1].is_initialized = true;
|
2015-05-01 19:06:01 +07:00
|
|
|
tuh_msc_mounted_cb(dev_addr);
|
2018-12-07 14:57:58 +07:00
|
|
|
|
|
|
|
return true;
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
|
2018-11-23 15:14:47 +07:00
|
|
|
void msch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes)
|
2014-03-12 14:08:52 +07:00
|
|
|
{
|
|
|
|
if ( pipehandle_is_equal(pipe_hdl, msch_data[pipe_hdl.dev_addr-1].bulk_in) )
|
|
|
|
{
|
|
|
|
if (msch_data[pipe_hdl.dev_addr-1].is_initialized)
|
|
|
|
{
|
2015-05-01 19:06:01 +07:00
|
|
|
tuh_msc_isr(pipe_hdl.dev_addr, event, xferred_bytes);
|
2014-03-12 14:08:52 +07:00
|
|
|
}else
|
|
|
|
{ // still initializing under open subtask
|
2018-12-07 12:56:42 +07:00
|
|
|
osal_semaphore_post(msch_sem_hdl, true);
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void msch_close(uint8_t dev_addr)
|
|
|
|
{
|
|
|
|
(void) hcd_pipe_close(msch_data[dev_addr-1].bulk_in);
|
|
|
|
(void) hcd_pipe_close(msch_data[dev_addr-1].bulk_out);
|
|
|
|
|
2018-10-23 12:19:32 +07:00
|
|
|
tu_memclr(&msch_data[dev_addr-1], sizeof(msch_interface_t));
|
2014-03-12 14:08:52 +07:00
|
|
|
osal_semaphore_reset(msch_sem_hdl);
|
|
|
|
|
2015-05-01 19:06:01 +07:00
|
|
|
tuh_msc_unmounted_cb(dev_addr); // invoke Application Callback
|
2014-03-12 14:08:52 +07:00
|
|
|
}
|
|
|
|
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
// INTERNAL & HELPER
|
|
|
|
//--------------------------------------------------------------------+
|
|
|
|
|
|
|
|
|
|
|
|
#endif
|