2013-03-06 14:25:26 +07:00
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/*
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* test_ehci_pipe_xfer.c
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*
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* Created on: Feb 27, 2013
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* Author: hathach
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*/
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/*
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* Software License Agreement (BSD License)
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* Copyright (c) 2012, hathach (tinyusb.net)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* This file is part of the tiny usb stack.
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*/
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#include "unity.h"
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#include "tusb_option.h"
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#include "errors.h"
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#include "binary.h"
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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2013-03-10 17:51:53 +07:00
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#include "mock_usbh_hcd.h"
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2013-03-06 14:25:26 +07:00
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#include "ehci.h"
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2013-03-10 17:51:53 +07:00
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#include "ehci_controller.h"
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2013-03-06 14:25:26 +07:00
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
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uint8_t const control_max_packet_size = 64;
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uint8_t const hub_addr = 2;
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uint8_t const hub_port = 2;
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uint8_t dev_addr;
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uint8_t hostid;
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uint8_t xfer_data [100];
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ehci_qhd_t *async_head;
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2013-03-23 14:18:17 +07:00
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ehci_qhd_t *p_control_qhd;
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2013-03-06 14:25:26 +07:00
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ehci_qtd_t *p_setup;
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ehci_qtd_t *p_data;
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ehci_qtd_t *p_status;
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//--------------------------------------------------------------------+
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// Setup/Teardown + helper declare
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//--------------------------------------------------------------------+
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void setUp(void)
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{
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memclr_(&lpc_usb0, sizeof(LPC_USB0_Type));
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memclr_(&lpc_usb1, sizeof(LPC_USB1_Type));
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memclr_(usbh_device_info_pool, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
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memclr_(xfer_data, sizeof(xfer_data));
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hcd_init();
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dev_addr = 1;
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hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
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2013-03-23 17:31:51 +07:00
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for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX+1; i++)
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2013-03-06 14:25:26 +07:00
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{
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usbh_device_info_pool[i].core_id = hostid;
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usbh_device_info_pool[i].hub_addr = hub_addr;
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usbh_device_info_pool[i].hub_port = hub_port;
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2013-03-07 17:59:07 +07:00
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usbh_device_info_pool[i].speed = TUSB_SPEED_HIGH;
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2013-03-06 14:25:26 +07:00
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}
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async_head = get_async_head( hostid );
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2013-03-23 17:31:51 +07:00
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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2013-03-23 14:18:17 +07:00
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p_control_qhd = &ehci_data.device[dev_addr-1].control.qhd;
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2013-03-22 21:21:00 +07:00
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p_setup = &ehci_data.device[dev_addr-1].control.qtd[0];
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p_data = &ehci_data.device[dev_addr-1].control.qtd[1];
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p_status = &ehci_data.device[dev_addr-1].control.qtd[2];
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2013-03-06 14:25:26 +07:00
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}
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void tearDown(void)
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{
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}
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//--------------------------------------------------------------------+
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// CONTROL TRANSFER
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//--------------------------------------------------------------------+
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tusb_std_request_t request_get_dev_desc =
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{
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.bmRequestType = { .direction = TUSB_DIR_DEV_TO_HOST, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_GET_DESCRIPTOR,
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.wValue = (TUSB_DESC_DEVICE << 8),
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.wLength = 18
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};
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2013-03-23 14:18:17 +07:00
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tusb_std_request_t request_set_dev_addr =
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{
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.bmRequestType = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_SET_ADDRESS,
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.wValue = 3
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};
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2013-03-06 16:24:32 +07:00
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void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length)
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{
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TEST_ASSERT_TRUE(p_qtd->alternate.terminate); // not used, always invalid
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TEST_ASSERT_FALSE(p_qtd->pingstate_err);
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TEST_ASSERT_FALSE(p_qtd->non_hs_split_state);
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TEST_ASSERT_FALSE(p_qtd->non_hs_period_missed_uframe);
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TEST_ASSERT_FALSE(p_qtd->xact_err);
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TEST_ASSERT_FALSE(p_qtd->babble_err);
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TEST_ASSERT_FALSE(p_qtd->buffer_err);
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TEST_ASSERT_FALSE(p_qtd->halted);
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TEST_ASSERT_TRUE(p_qtd->active);
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TEST_ASSERT_EQUAL(3, p_qtd->cerr);
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TEST_ASSERT_EQUAL(0, p_qtd->current_page);
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TEST_ASSERT_EQUAL(length, p_qtd->total_bytes);
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TEST_ASSERT_EQUAL_HEX(p_data, p_qtd->buffer[0]);
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}
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2013-03-23 14:18:17 +07:00
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//--------------------------------------------------------------------+
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// Address 0
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//--------------------------------------------------------------------+
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2013-03-06 14:25:26 +07:00
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void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
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{
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dev_addr = 0;
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ehci_qhd_t * const p_qhd = async_head;
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2013-03-06 16:24:32 +07:00
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2013-03-06 14:25:26 +07:00
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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2013-03-07 16:06:28 +07:00
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p_setup = &ehci_data.addr0_qtd[0];
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p_data = &ehci_data.addr0_qtd[1];
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p_status = &ehci_data.addr0_qtd[2];
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2013-03-06 14:25:26 +07:00
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2013-03-06 15:39:37 +07:00
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TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
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2013-03-07 19:54:00 +07:00
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head);
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2013-03-06 14:25:26 +07:00
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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2013-03-06 16:24:32 +07:00
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2013-03-09 14:19:40 +07:00
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verify_qtd(p_setup, &request_get_dev_desc, 8);
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2013-03-06 14:25:26 +07:00
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}
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2013-03-23 14:18:17 +07:00
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//--------------------------------------------------------------------+
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// Normal Control
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//--------------------------------------------------------------------+
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2013-03-06 14:25:26 +07:00
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void test_control_xfer_get(void)
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{
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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2013-03-23 14:18:17 +07:00
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TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
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TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
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2013-03-06 14:25:26 +07:00
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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2013-03-06 16:24:32 +07:00
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//------------- SETUP -------------//
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2013-03-09 14:19:40 +07:00
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verify_qtd(p_setup, &request_get_dev_desc, 8);
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2013-03-06 15:08:09 +07:00
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2013-03-06 16:24:32 +07:00
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TEST_ASSERT_FALSE(p_setup->int_on_complete);
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TEST_ASSERT_FALSE(p_setup->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_SETUP, p_setup->pid);
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2013-03-06 15:08:09 +07:00
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2013-03-06 16:24:32 +07:00
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//------------- DATA -------------//
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verify_qtd(p_data, xfer_data, request_get_dev_desc.wLength);
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TEST_ASSERT_FALSE(p_data->int_on_complete);
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TEST_ASSERT_TRUE(p_data->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_data->pid);
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2013-03-06 15:08:09 +07:00
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2013-03-06 16:24:32 +07:00
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//------------- STATUS -------------//
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verify_qtd(p_status, NULL, 0);
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TEST_ASSERT_TRUE(p_status->int_on_complete);
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_OUT, p_status->pid);
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2013-03-07 19:54:00 +07:00
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TEST_ASSERT_TRUE(p_status->next.terminate);
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2013-03-10 17:51:53 +07:00
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2013-03-23 14:18:17 +07:00
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TEST_ASSERT_EQUAL_HEX(p_setup, p_control_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX(p_status, p_control_qhd->p_qtd_list_tail);
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2013-03-06 14:25:26 +07:00
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}
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void test_control_xfer_set(void)
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{
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data);
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2013-03-23 14:18:17 +07:00
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TEST_ASSERT_EQUAL_HEX( p_setup, p_control_qhd->qtd_overlay.next.address );
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TEST_ASSERT_EQUAL_HEX( p_setup , p_control_qhd->p_qtd_list_head);
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2013-03-06 14:25:26 +07:00
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TEST_ASSERT_EQUAL_HEX( p_status , p_setup->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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2013-03-06 16:24:32 +07:00
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//------------- STATUS -------------//
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verify_qtd(p_status, NULL, 0);
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TEST_ASSERT_TRUE(p_status->int_on_complete);
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TEST_ASSERT_TRUE(p_status->data_toggle);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_status->pid);
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2013-03-07 19:54:00 +07:00
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TEST_ASSERT_TRUE(p_status->next.terminate);
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2013-03-10 17:51:53 +07:00
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2013-03-23 14:18:17 +07:00
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TEST_ASSERT_EQUAL_HEX(p_setup, p_control_qhd->p_qtd_list_head);
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TEST_ASSERT_EQUAL_HEX(p_status, p_control_qhd->p_qtd_list_tail);
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2013-03-10 17:51:53 +07:00
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}
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2013-03-23 14:18:17 +07:00
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void test_control_xfer_complete_isr(void)
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2013-03-10 17:51:53 +07:00
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{
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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2013-03-23 15:00:56 +07:00
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usbh_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, BUS_EVENT_XFER_COMPLETE);
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2013-03-10 17:51:53 +07:00
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//------------- Code Under TEST -------------//
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2013-03-23 17:31:51 +07:00
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ehci_controller_run(hostid);
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2013-03-10 17:51:53 +07:00
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2013-03-23 14:18:17 +07:00
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TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_head);
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TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_tail);
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2013-03-10 17:51:53 +07:00
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TEST_ASSERT_FALSE(p_setup->used);
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TEST_ASSERT_FALSE(p_data->used);
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TEST_ASSERT_FALSE(p_status->used);
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2013-03-06 14:25:26 +07:00
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}
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2013-03-23 17:31:51 +07:00
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void test_control_xfer_error_isr(void)
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{
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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usbh_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, BUS_EVENT_XFER_ERROR);
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//------------- Code Under TEST -------------//
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ehci_controller_run_error(hostid);
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}
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