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hathach 2019-10-31 12:15:16 +07:00
parent e6857d8ee0
commit 0029b58417
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1 changed files with 19 additions and 20 deletions
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39
src/device/usbd_control.c
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@ -49,14 +49,14 @@ typedef struct
bool (*complete_cb) (uint8_t, tusb_control_request_t const *); bool (*complete_cb) (uint8_t, tusb_control_request_t const *);
} usbd_control_xfer_t; } usbd_control_xfer_t;
static usbd_control_xfer_t _control_state; static usbd_control_xfer_t _ctrl_xfer;
CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE]; CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
void usbd_control_reset (uint8_t rhport) void usbd_control_reset (uint8_t rhport)
{ {
(void) rhport; (void) rhport;
tu_varclr(&_control_state); tu_varclr(&_ctrl_xfer);
} }
bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request) bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request)
@ -68,14 +68,14 @@ bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request)
// Each transaction is up to endpoint0's max packet size // Each transaction is up to endpoint0's max packet size
static bool start_control_data_xact(uint8_t rhport) static bool start_control_data_xact(uint8_t rhport)
{ {
uint16_t const xact_len = tu_min16(_control_state.len - _control_state.total_transferred, CFG_TUD_ENDPOINT0_SIZE); uint16_t const xact_len = tu_min16(_ctrl_xfer.len - _ctrl_xfer.total_transferred, CFG_TUD_ENDPOINT0_SIZE);
uint8_t ep_addr = EDPT_CTRL_OUT; uint8_t ep_addr = EDPT_CTRL_OUT;
if ( _control_state.request.bmRequestType_bit.direction == TUSB_DIR_IN ) if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN )
{ {
ep_addr = EDPT_CTRL_IN; ep_addr = EDPT_CTRL_IN;
memcpy(_usbd_ctrl_buf, _control_state.buffer, xact_len); memcpy(_usbd_ctrl_buf, _ctrl_xfer.buffer, xact_len);
} }
return dcd_edpt_xfer(rhport, ep_addr, _usbd_ctrl_buf, xact_len); return dcd_edpt_xfer(rhport, ep_addr, _usbd_ctrl_buf, xact_len);
@ -84,15 +84,15 @@ static bool start_control_data_xact(uint8_t rhport)
// TODO may find a better way // TODO may find a better way
void usbd_control_set_complete_callback( bool (*fp) (uint8_t, tusb_control_request_t const * ) ) void usbd_control_set_complete_callback( bool (*fp) (uint8_t, tusb_control_request_t const * ) )
{ {
_control_state.complete_cb = fp; _ctrl_xfer.complete_cb = fp;
} }
bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, void* buffer, uint16_t len) bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, void* buffer, uint16_t len)
{ {
_control_state.request = (*request); _ctrl_xfer.request = (*request);
_control_state.buffer = buffer; _ctrl_xfer.buffer = buffer;
_control_state.total_transferred = 0; _ctrl_xfer.total_transferred = 0;
_control_state.len = tu_min16(len, request->wLength); _ctrl_xfer.len = tu_min16(len, request->wLength);
if ( len ) if ( len )
{ {
@ -115,32 +115,31 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
(void) result; (void) result;
(void) ep_addr; (void) ep_addr;
if ( _control_state.request.bmRequestType_bit.direction == TUSB_DIR_OUT ) if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT )
{ {
TU_VERIFY(_control_state.buffer); TU_VERIFY(_ctrl_xfer.buffer);
memcpy(_control_state.buffer, _usbd_ctrl_buf, xferred_bytes); memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes);
} }
_control_state.total_transferred += xferred_bytes; _ctrl_xfer.total_transferred += xferred_bytes;
_control_state.buffer = ((uint8_t*)_control_state.buffer) + xferred_bytes; _ctrl_xfer.buffer = ((uint8_t*)_ctrl_xfer.buffer) + xferred_bytes;
if ( (_control_state.request.wLength == _control_state.total_transferred) || xferred_bytes < CFG_TUD_ENDPOINT0_SIZE )
if ( (_ctrl_xfer.request.wLength == _ctrl_xfer.total_transferred) || xferred_bytes < CFG_TUD_ENDPOINT0_SIZE )
{ {
// DATA stage is complete // DATA stage is complete
bool is_ok = true; bool is_ok = true;
// invoke complete callback if set // invoke complete callback if set
// callback can still stall control in status phase e.g out data does not make sense // callback can still stall control in status phase e.g out data does not make sense
if ( _control_state.complete_cb ) if ( _ctrl_xfer.complete_cb )
{ {
is_ok = _control_state.complete_cb(rhport, &_control_state.request); is_ok = _ctrl_xfer.complete_cb(rhport, &_ctrl_xfer.request);
} }
if ( is_ok ) if ( is_ok )
{ {
// Send status // Send status
TU_ASSERT( tud_control_status(rhport, &_control_state.request) ); TU_ASSERT( tud_control_status(rhport, &_ctrl_xfer.request) );
}else }else
{ {
// Stall both IN and OUT control endpoint // Stall both IN and OUT control endpoint