mirror of
https://github.com/hathach/tinyusb.git
synced 2025-01-17 05:32:55 +08:00
Merge branch 'master' into additional_dcd_sof_enable
This commit is contained in:
HiFiPhile
GitHub
commit
003a5d4f55
7
.idea/cmake.xml
generated
7
.idea/cmake.xml
generated
@ -128,12 +128,13 @@
|
||||
<configuration PROFILE_NAME="f1c100s" ENABLED="false" GENERATION_OPTIONS="-DBOARD=f1c100s" />
|
||||
<configuration PROFILE_NAME="mm32f327x_mb39" ENABLED="false" GENERATION_OPTIONS="-DBOARD=mm32f327x_mb39" />
|
||||
<configuration PROFILE_NAME="samg55_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=samg55_xplained" />
|
||||
<configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0" />
|
||||
<configuration PROFILE_NAME="fomu" ENABLED="false" GENERATION_OPTIONS="-DBOARD=fomu" />
|
||||
<configuration PROFILE_NAME="sipeed_longan_nano" ENABLED="false" GENERATION_OPTIONS="-DBOARD=sipeed_longan_nano" />
|
||||
<configuration PROFILE_NAME="nanoch32v203" ENABLED="false" GENERATION_OPTIONS="-DBOARD=nanoch32v203" />
|
||||
<configuration PROFILE_NAME="ch32v203_r0_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v203_r0_1v0" />
|
||||
<configuration PROFILE_NAME="ch32v307v_r1_1v0 FullSpeed" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
|
||||
<configuration PROFILE_NAME="ch32v203_r0_1v0" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203_r0_1v0" />
|
||||
<configuration PROFILE_NAME="ch32v203_r0_1v0 USBFS" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ch32v203_r0_1v0 -DPORT=1" />
|
||||
<configuration PROFILE_NAME="ch32v307v_r1_1v0" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DLOG=2" />
|
||||
<configuration PROFILE_NAME="ch32v307v_r1_1v0 USBFS" ENABLED="false" GENERATION_OPTIONS="-DBOARD=ch32v307v_r1_1v0 -DSPEED=full" />
|
||||
</configurations>
|
||||
</component>
|
||||
</project>
|
||||
41
README.rst
41
README.rst
@ -122,42 +122,45 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l
|
||||
| GigaDevice | GD32VF103 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| Infineon | XMC4500 |
|
||||
+--------------+-----+------------------------------------------------------+
|
||||
| MicroChip | SAM | D11, D21, D51, E5x, G55, L2x, E7x, S7x, V7x |
|
||||
| +-----+------------------------------------------------------+
|
||||
| | PIC | 24, 32mm, 32mk, 32mx, 32mz, dsPIC33 |
|
||||
+--------------+-----+------------------------------------------------------+
|
||||
+--------------+------------------------------------------------------------+
|
||||
| | SAM: D11, D21, D51, E5x, G55, L2x, E7x, S7x, V7x |
|
||||
| MicroChip | |
|
||||
| | PIC: 24, 32mm, 32mk, 32mx, 32mz, dsPIC33 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| Mind Montion | mm32 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| NordicSemi | nRF52833, nRF52840, nRF5340 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| Nuvoton | NUC 120, 121, 125, 126, 505 |
|
||||
+--------------+---------+--------------------------------------------------+
|
||||
| NXP | iMXRT | RT10xx, RT11xx |
|
||||
| +---------+--------------------------------------------------+
|
||||
| | Kinetis | KL, K32L2 |
|
||||
| +---------+--------------------------------------------------+
|
||||
| | LPC | 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55 |
|
||||
| +---------+--------------------------------------------------+
|
||||
| | MCX | A15, N9 |
|
||||
+--------------+---------+--------------------------------------------------+
|
||||
+--------------+------------------------------------------------------------+
|
||||
| NXP | iMXRT: RT10xx, RT11xx |
|
||||
| | |
|
||||
| | Kinetis: KL, K32L2 |
|
||||
| | |
|
||||
| | LPC: 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55 |
|
||||
| | |
|
||||
| | MCX: A15, N9 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| Raspberry Pi | RP2040 |
|
||||
+--------------+-----+------------------------------------------------------+
|
||||
| Renesas | RX | 63N, 65N, 72N |
|
||||
+--------------+-----+------------------------------------------------------+
|
||||
| | RA | 4M1, 4M3, 6M1, 6M5 |
|
||||
| Renesas | RA: 4M1, 4M3, 6M1, 6M5 |
|
||||
| | |
|
||||
| | RX: 63N, 65N, 72N |
|
||||
+--------------+-----+------------------------------------------------------+
|
||||
| Silabs | EFM32GG12 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| Sony | CXD56 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| ST STM32 | F0, F1, F2, F3, F4, F7, H7, G0, G4, L0, L1, L4, L4+ U5, WB |
|
||||
| ST STM32 | F0, F1, F2, F3, F4, F7, H5, H7, G0, G4, L0, L1, L4, L4+, |
|
||||
| | U5, WB |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| TI | MSP430, MSP432E4, TM4C123 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| ValentyUSB | eptri |
|
||||
+--------------+------------------------------------------------------------+
|
||||
| WCH | CH32F20x, CH32V20x, CH32V307 |
|
||||
| WCH | CH32F: F20x |
|
||||
| | |
|
||||
| | CH32V: V20x, V307 |
|
||||
+--------------+------------------------------------------------------------+
|
||||
|
||||
License
|
||||
|
||||
@ -2,6 +2,72 @@
|
||||
Changelog
|
||||
*********
|
||||
|
||||
0.17.0 (WIP)
|
||||
============
|
||||
|
||||
General
|
||||
-------
|
||||
|
||||
- Improved continuous integration: build both cmake and make. Make use of circleci to build arm-clang
|
||||
|
||||
|
||||
Controller Driver (DCD & HCD)
|
||||
-----------------------------
|
||||
|
||||
- WCH CH32
|
||||
|
||||
- Added support for USB OTG/FS and FSDev Driver. Update CH32V307 to allow manual select FS or HS driver.
|
||||
- Fixed various bugs in CH32v307 usbhs driver: endpoint handling and data transfer management.
|
||||
|
||||
- Fixed race conditions and other bugs in dcd_nrf5x and other drivers.
|
||||
- Implemented hcd abort transfer for Max3421 and rp2040
|
||||
- Added DWC2 Test Mode support.
|
||||
- stm32 fsdev: ISO EP buffer allocation improvements, implement dcd_edpt_close_all()
|
||||
- Added support for STM32G4 and STM32U5 microcontrollers.
|
||||
|
||||
Device Stack
|
||||
------------
|
||||
|
||||
- Added tud_deinit() to deinitialize TinyUSB device stack.
|
||||
- Added support for generic SOF callback.
|
||||
|
||||
- Audio
|
||||
|
||||
- Add audio_test_freertos & audio_4_channel_mic_freertos
|
||||
- Improved support for Audio Class 2.0 (UAC2) with various bug fixes.
|
||||
|
||||
- HID
|
||||
|
||||
- Added missing key codes for keypad
|
||||
- Added HID Lighting and Illumination functionality
|
||||
|
||||
- Vendor: Added empty transfers for tud_vendor_n_write()
|
||||
- MSC: Added support for SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL
|
||||
|
||||
- CDC
|
||||
|
||||
- Add option to make CDC TX buffer persistent
|
||||
- Add missing capability bit for CDC ACM serial break support
|
||||
|
||||
- Net
|
||||
|
||||
- Rewrite of NCM device driver
|
||||
- removed obsolete tud_network_link_state_cb()
|
||||
|
||||
- Enhanced CDC class with better handling of large data transmissions.
|
||||
- Fixed issues in the HID class for more reliable device enumeration.
|
||||
- Video Added support for USB Video Class (UVC) with MJPEG.
|
||||
- USBTMC Added notification support
|
||||
|
||||
Host Stack
|
||||
----------
|
||||
|
||||
- Added tuh_deinit() to deinitialize TinyUSB host stack.
|
||||
- Added support for new USB mass storage class APIs.
|
||||
- Enhanced stability of CDC-ACM devices during enumeration.
|
||||
- Improved error handling and retry mechanisms for unstable devices.
|
||||
- Added support for multiple interfaces in UVC.
|
||||
|
||||
0.16.0
|
||||
======
|
||||
|
||||
|
||||
@ -4,21 +4,21 @@ Dependencies
|
||||
|
||||
MCU low-level peripheral driver and external libraries for building TinyUSB examples
|
||||
|
||||
======================================== ============================================================== ======================================== =======================================================================================================================================================================================================
|
||||
======================================== ============================================================== ======================================== ==========================================================================================================================================================================================================================================================================================================================
|
||||
Local Path Repo Commit Required by
|
||||
======================================== ============================================================== ======================================== =======================================================================================================================================================================================================
|
||||
======================================== ============================================================== ======================================== ==========================================================================================================================================================================================================================================================================================================================
|
||||
hw/mcu/allwinner https://github.com/hathach/allwinner_driver.git 8e5e89e8e132c0fd90e72d5422e5d3d68232b756 fc100s
|
||||
hw/mcu/bridgetek/ft9xx/ft90x-sdk https://github.com/BRTSG-FOSS/ft90x-sdk.git 91060164afe239fcb394122e8bf9eb24d3194eb1 brtmm90x
|
||||
hw/mcu/broadcom https://github.com/adafruit/broadcom-peripherals.git 08370086080759ed54ac1136d62d2ad24c6fa267 broadcom_32bit broadcom_64bit
|
||||
hw/mcu/gd/nuclei-sdk https://github.com/Nuclei-Software/nuclei-sdk.git 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7 gd32vf103
|
||||
hw/mcu/infineon/mtb-xmclib-cat3 https://github.com/Infineon/mtb-xmclib-cat3.git daf5500d03cba23e68c2f241c30af79cd9d63880 xmc4000
|
||||
hw/mcu/microchip https://github.com/hathach/microchip_driver.git 9e8b37e307d8404033bb881623a113931e1edf27 sam3x samd11 samd21 samd51 same5x same7x saml2x samg
|
||||
hw/mcu/mindmotion/mm32sdk https://github.com/hathach/mm32sdk.git 0b79559eb411149d36e073c1635c620e576308d4 mm32
|
||||
hw/mcu/nordic/nrfx https://github.com/NordicSemiconductor/nrfx.git 2527e3c8449cfd38aee41598e8af8492f410ed15 nrf
|
||||
hw/mcu/microchip https://github.com/hathach/microchip_driver.git 9e8b37e307d8404033bb881623a113931e1edf27 sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg
|
||||
hw/mcu/mindmotion/mm32sdk https://github.com/hathach/mm32sdk.git b93e856211060ae825216c6a1d6aa347ec758843 mm32
|
||||
hw/mcu/nordic/nrfx https://github.com/NordicSemiconductor/nrfx.git 7c47cc0a56ce44658e6da2458e86cd8783ccc4a2 nrf
|
||||
hw/mcu/nuvoton https://github.com/majbthrd/nuc_driver.git 2204191ec76283371419fbcec207da02e1bc22fa nuc
|
||||
hw/mcu/nxp/lpcopen https://github.com/hathach/nxp_lpcopen.git 84e0bd3e43910aaf71eefd62075cf57495418312 lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
|
||||
hw/mcu/nxp/mcux-sdk https://github.com/hathach/mcux-sdk.git 950819b7de9b32f92c3edf396bc5ffb8d66e7009 kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
|
||||
hw/mcu/raspberry_pi/Pico-PIO-USB https://github.com/sekigon-gonnoc/Pico-PIO-USB.git d00a10a8c425d0d40f81b87169102944b01f3bb3 rp2040
|
||||
hw/mcu/nxp/lpcopen https://github.com/hathach/nxp_lpcopen.git 04bfe7a5f6ee74a89a28ad618d3367dcfcfb7d83 lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
|
||||
hw/mcu/nxp/mcux-sdk https://github.com/hathach/mcux-sdk.git 144f1eb7ea8c06512e12f12b27383601c0272410 kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
|
||||
hw/mcu/raspberry_pi/Pico-PIO-USB https://github.com/sekigon-gonnoc/Pico-PIO-USB.git 0f747aaa0c16f750bdfa2ba37ec25d6c8e1bc117 rp2040
|
||||
hw/mcu/renesas/fsp https://github.com/renesas/fsp.git d52e5a6a59b7c638da860c2bb309b6e78e752ff8 ra
|
||||
hw/mcu/renesas/rx https://github.com/kkitayam/rx_device.git 706b4e0cf485605c32351e2f90f5698267996023 rx
|
||||
hw/mcu/silabs/cmsis-dfp-efm32gg12b https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git f1c31b7887669cb230b3ea63f9b56769078960bc efm32
|
||||
@ -28,15 +28,16 @@ hw/mcu/st/cmsis_device_f1 https://github.com/STMicroelectronics/
|
||||
hw/mcu/st/cmsis_device_f2 https://github.com/STMicroelectronics/cmsis_device_f2.git 182fcb3681ce116816feb41b7764f1b019ce796f stm32f2
|
||||
hw/mcu/st/cmsis_device_f3 https://github.com/STMicroelectronics/cmsis_device_f3.git 5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b stm32f3
|
||||
hw/mcu/st/cmsis_device_f4 https://github.com/STMicroelectronics/cmsis_device_f4.git 2615e866fa48fe1ff1af9e31c348813f2b19e7ec stm32f4
|
||||
hw/mcu/st/cmsis_device_f7 https://github.com/STMicroelectronics/cmsis_device_f7.git fc676ef1ad177eb874eaa06444d3d75395fc51f4 stm32f7
|
||||
hw/mcu/st/cmsis_device_f7 https://github.com/STMicroelectronics/cmsis_device_f7.git 25b0463439303b7a38f0d27b161f7d2f3c096e79 stm32f7
|
||||
hw/mcu/st/cmsis_device_g0 https://github.com/STMicroelectronics/cmsis_device_g0.git 3a23e1224417f3f2d00300ecd620495e363f2094 stm32g0
|
||||
hw/mcu/st/cmsis_device_g4 https://github.com/STMicroelectronics/cmsis_device_g4.git ce822adb1dc552b3aedd13621edbc7fdae124878 stm32g4
|
||||
hw/mcu/st/cmsis_device_h5 https://github.com/STMicroelectronics/cmsis_device_h5.git cd2d1d579743de57b88ccaf61a968b9c05848ffc stm32h5
|
||||
hw/mcu/st/cmsis_device_h7 https://github.com/STMicroelectronics/cmsis_device_h7.git 60dc2c913203dc8629dc233d4384dcc41c91e77f stm32h7
|
||||
hw/mcu/st/cmsis_device_l0 https://github.com/STMicroelectronics/cmsis_device_l0.git 06748ca1f93827befdb8b794402320d94d02004f stm32l0
|
||||
hw/mcu/st/cmsis_device_l0 https://github.com/STMicroelectronics/cmsis_device_l0.git 69cd5999fd40ae6e546d4905b21635c6ca1bcb92 stm32l0
|
||||
hw/mcu/st/cmsis_device_l1 https://github.com/STMicroelectronics/cmsis_device_l1.git 7f16ec0a1c4c063f84160b4cc6bf88ad554a823e stm32l1
|
||||
hw/mcu/st/cmsis_device_l4 https://github.com/STMicroelectronics/cmsis_device_l4.git 6ca7312fa6a5a460b5a5a63d66da527fdd8359a6 stm32l4
|
||||
hw/mcu/st/cmsis_device_l5 https://github.com/STMicroelectronics/cmsis_device_l5.git d922865fc0326a102c26211c44b8e42f52c1e53d stm32l5
|
||||
hw/mcu/st/cmsis_device_u5 https://github.com/STMicroelectronics/cmsis_device_u5.git 06d7edade7167b0eafdd550bf77cfc4fa98eae2e stm32u5
|
||||
hw/mcu/st/cmsis_device_u5 https://github.com/STMicroelectronics/cmsis_device_u5.git 5ad9797c54ec3e55eff770fc9b3cd4a1aefc1309 stm32u5
|
||||
hw/mcu/st/cmsis_device_wb https://github.com/STMicroelectronics/cmsis_device_wb.git 9c5d1920dd9fabbe2548e10561d63db829bb744f stm32wb
|
||||
hw/mcu/st/stm32f0xx_hal_driver https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git 0e95cd88657030f640a11e690a8a5186c7712ea5 stm32f0
|
||||
hw/mcu/st/stm32f1xx_hal_driver https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git 1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29 stm32f1
|
||||
@ -46,6 +47,7 @@ hw/mcu/st/stm32f4xx_hal_driver https://github.com/STMicroelectronics/
|
||||
hw/mcu/st/stm32f7xx_hal_driver https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git f7ffdf6bf72110e58b42c632b0a051df5997e4ee stm32f7
|
||||
hw/mcu/st/stm32g0xx_hal_driver https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git e911b12c7f67084d7f6b76157a4c0d4e2ec3779c stm32g0
|
||||
hw/mcu/st/stm32g4xx_hal_driver https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git 8b4518417706d42eef5c14e56a650005abf478a8 stm32g4
|
||||
hw/mcu/st/stm32h5xx_hal_driver https://github.com/STMicroelectronics/stm32h5xx_hal_driver.git 2cf77de584196d619cec1b4586c3b9e2820a254e stm32h5
|
||||
hw/mcu/st/stm32h7xx_hal_driver https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04 stm32h7
|
||||
hw/mcu/st/stm32l0xx_hal_driver https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b stm32l0
|
||||
hw/mcu/st/stm32l1xx_hal_driver https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git 44efc446fa69ed8344e7fd966e68ed11043b35d9 stm32l1
|
||||
@ -53,13 +55,13 @@ hw/mcu/st/stm32l4xx_hal_driver https://github.com/STMicroelectronics/
|
||||
hw/mcu/st/stm32l5xx_hal_driver https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git 675c32a75df37f39d50d61f51cb0dcf53f07e1cb stm32l5
|
||||
hw/mcu/st/stm32u5xx_hal_driver https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git 4d93097a67928e9377e655ddd14622adc31b9770 stm32u5
|
||||
hw/mcu/st/stm32wbxx_hal_driver https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git 2c5f06638be516c1b772f768456ba637f077bac8 stm32wb
|
||||
hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 msp430 msp432e4 tm4c123
|
||||
hw/mcu/ti https://github.com/hathach/ti_driver.git 143ed6cc20a7615d042b03b21e070197d473e6e5 msp430 msp432e4 tm4c
|
||||
hw/mcu/wch/ch32f20x https://github.com/openwch/ch32f20x.git 77c4095087e5ed2c548ec9058e655d0b8757663b ch32f20x
|
||||
hw/mcu/wch/ch32v20x https://github.com/openwch/ch32v20x.git de6d68c654340d7f27b00cebbfc9aa2740a1abc2 ch32v20x
|
||||
hw/mcu/wch/ch32v307 https://github.com/openwch/ch32v307.git 17761f5cf9dbbf2dcf665b7c04934188add20082 ch32v307
|
||||
lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2xstm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb
|
||||
lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git 4ff01a7a4a51f53b44496aefee1e3c0071b7b173 all
|
||||
lib/CMSIS_5 https://github.com/ARM-software/CMSIS_5.git 20285262657d1b482d132d20d755c8c330d55c1f imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2xlpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wbsam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samgtm4c
|
||||
lib/FreeRTOS-Kernel https://github.com/FreeRTOS/FreeRTOS-Kernel.git cc0e0707c0c748713485b870bb980852b210877f all
|
||||
lib/lwip https://github.com/lwip-tcpip/lwip.git 159e31b689577dbf69cf0683bbaffbd71fa5ee10 all
|
||||
lib/sct_neopixel https://github.com/gsteiert/sct_neopixel.git e73e04ca63495672d955f9268e003cffe168fcd8 lpc55
|
||||
tools/uf2 https://github.com/microsoft/uf2.git 19615407727073e36d81bf239c52108ba92e7660 all
|
||||
======================================== ============================================================== ======================================== =======================================================================================================================================================================================================
|
||||
======================================== ============================================================== ======================================== ==========================================================================================================================================================================================================================================================================================================================
|
||||
|
||||
@ -8,7 +8,6 @@ extern "C" {
|
||||
#define LED_PORT GPIOA
|
||||
#define LED_PIN GPIO_Pin_15
|
||||
#define LED_STATE_ON 0
|
||||
#define LED_CLOCK_EN() RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -1,82 +1,151 @@
|
||||
#include <stdio.h>
|
||||
#include "ch32v20x.h"
|
||||
|
||||
#include "bsp/board_api.h"
|
||||
#include "board.h"
|
||||
|
||||
__attribute__((interrupt))
|
||||
/* CH32v203 depending on variants can support 2 USB IPs: FSDEV and USBFS.
|
||||
* By default, we use FSDEV, but you can explicitly select by define:
|
||||
* - CFG_TUD_WCH_USBIP_FSDEV
|
||||
* - CFG_TUD_WCH_USBIP_USBFS
|
||||
*/
|
||||
|
||||
// USBFS
|
||||
__attribute__((interrupt)) __attribute__((used))
|
||||
void USBHD_IRQHandler(void) {
|
||||
tud_int_handler(0);
|
||||
#if CFG_TUD_WCH_USBIP_USBFS
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) __attribute__((used))
|
||||
void USBHDWakeUp_IRQHandler(void) {
|
||||
#if CFG_TUD_WCH_USBIP_USBFS
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
// USBD (fsdev)
|
||||
__attribute__((interrupt)) __attribute__((used))
|
||||
void USB_LP_CAN1_RX0_IRQHandler(void) {
|
||||
#if CFG_TUD_WCH_USBIP_FSDEV
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) __attribute__((used))
|
||||
void USB_HP_CAN1_TX_IRQHandler(void) {
|
||||
#if CFG_TUD_WCH_USBIP_FSDEV
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) __attribute__((used))
|
||||
void USBWakeUp_IRQHandler(void) {
|
||||
#if CFG_TUD_WCH_USBIP_FSDEV
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
__attribute__((interrupt))
|
||||
void SysTick_Handler(void) {
|
||||
SysTick->SR = 0;
|
||||
system_ticks++;
|
||||
SysTick->SR = 0;
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t SysTick_Config(uint32_t ticks) {
|
||||
NVIC_EnableIRQ(SysTicK_IRQn);
|
||||
SysTick->CTLR = 0;
|
||||
SysTick->SR = 0;
|
||||
SysTick->CNT = 0;
|
||||
SysTick->CMP = ticks-1;
|
||||
SysTick->CTLR = 0xF;
|
||||
return 0;
|
||||
NVIC_EnableIRQ(SysTicK_IRQn);
|
||||
SysTick->CTLR = 0;
|
||||
SysTick->SR = 0;
|
||||
SysTick->CNT = 0;
|
||||
SysTick->CMP = ticks - 1;
|
||||
SysTick->CTLR = 0xF;
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void) {
|
||||
return system_ticks;
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void board_init(void) {
|
||||
__disable_irq();
|
||||
__disable_irq();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#endif
|
||||
|
||||
switch (SystemCoreClock) {
|
||||
case 48000000: RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1); break;
|
||||
case 96000000: RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div2); break;
|
||||
case 144000000: RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div3); break;
|
||||
default: TU_ASSERT(0,); break;
|
||||
}
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||||
|
||||
LED_CLOCK_EN();
|
||||
GPIO_InitTypeDef GPIO_InitStructure = {
|
||||
.GPIO_Pin = LED_PIN,
|
||||
.GPIO_Mode = GPIO_Mode_Out_OD,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
};
|
||||
GPIO_Init(LED_PORT, &GPIO_InitStructure);
|
||||
uint8_t usb_div;
|
||||
switch (SystemCoreClock) {
|
||||
case 48000000: usb_div = RCC_USBCLKSource_PLLCLK_Div1; break;
|
||||
case 96000000: usb_div = RCC_USBCLKSource_PLLCLK_Div2; break;
|
||||
case 144000000: usb_div = RCC_USBCLKSource_PLLCLK_Div3; break;
|
||||
default: TU_ASSERT(0,); break;
|
||||
}
|
||||
RCC_USBCLKConfig(usb_div);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); // FSDEV
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE); // USB FS
|
||||
|
||||
__enable_irq();
|
||||
board_delay(2);
|
||||
GPIO_InitTypeDef GPIO_InitStructure = {
|
||||
.GPIO_Pin = LED_PIN,
|
||||
.GPIO_Mode = GPIO_Mode_Out_OD,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
};
|
||||
GPIO_Init(LED_PORT, &GPIO_InitStructure);
|
||||
|
||||
// UART TX is PA9
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
|
||||
GPIO_InitTypeDef usart_init = {
|
||||
.GPIO_Pin = GPIO_Pin_9,
|
||||
.GPIO_Speed = GPIO_Speed_50MHz,
|
||||
.GPIO_Mode = GPIO_Mode_AF_PP,
|
||||
};
|
||||
GPIO_Init(GPIOA, &usart_init);
|
||||
|
||||
USART_InitTypeDef usart = {
|
||||
.USART_BaudRate = 115200,
|
||||
.USART_WordLength = USART_WordLength_8b,
|
||||
.USART_StopBits = USART_StopBits_1,
|
||||
.USART_Parity = USART_Parity_No,
|
||||
.USART_Mode = USART_Mode_Tx,
|
||||
.USART_HardwareFlowControl = USART_HardwareFlowControl_None,
|
||||
};
|
||||
USART_Init(USART1, &usart);
|
||||
USART_Cmd(USART1, ENABLE);
|
||||
|
||||
__enable_irq();
|
||||
board_delay(2);
|
||||
}
|
||||
|
||||
void board_led_write(bool state) {
|
||||
GPIO_WriteBit(LED_PORT, LED_PIN, state);
|
||||
GPIO_WriteBit(LED_PORT, LED_PIN, state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void) {
|
||||
return false;
|
||||
return false;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t *buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const *buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return len;
|
||||
const char *bufc = (const char *) buf;
|
||||
for (int i = 0; i < len; i++) {
|
||||
while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET);
|
||||
USART_SendData(USART1, *bufc++);
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
@ -14,6 +14,11 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TO
|
||||
set(FAMILY_MCUS CH32V20X CACHE INTERNAL "")
|
||||
set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
|
||||
|
||||
# Port0 use FSDev, Port1 use USBFS
|
||||
if (NOT DEFINED PORT)
|
||||
set(PORT 0)
|
||||
endif()
|
||||
|
||||
#------------------------------------
|
||||
# BOARD_TARGET
|
||||
#------------------------------------
|
||||
@ -48,9 +53,20 @@ function(add_board_target BOARD_TARGET)
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CH32V20x_${MCU_VARIANT}
|
||||
BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
|
||||
)
|
||||
|
||||
if (PORT EQUAL 0)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CFG_TUD_WCH_USBIP_FSDEV=1
|
||||
)
|
||||
elseif (PORT EQUAL 1)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CFG_TUD_WCH_USBIP_USBFS=1
|
||||
)
|
||||
else()
|
||||
message(FATAL_ERROR "Invalid PORT ${PORT}")
|
||||
endif()
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
@ -99,8 +115,10 @@ function(family_configure_example TARGET RTOS)
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_CH32V20X ${RTOS})
|
||||
|
||||
target_sources(${TARGET}-tinyusb PUBLIC
|
||||
${TOP}/src/portable/wch/dcd_ch32_usbfs.c
|
||||
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
|
||||
)
|
||||
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
|
||||
|
||||
|
||||
@ -14,13 +14,23 @@ SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
CPU_CORE ?= rv32imac-ilp32
|
||||
|
||||
# Port0 use FSDev, Port1 use USBFS
|
||||
PORT ?= 0
|
||||
|
||||
CFLAGS += \
|
||||
-mcmodel=medany \
|
||||
-ffat-lto-objects \
|
||||
-flto \
|
||||
-DCH32V20x_${MCU_VARIANT} \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_CH32V20X \
|
||||
-DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_CH32V20X
|
||||
|
||||
ifeq ($(PORT),0)
|
||||
$(info "Using FSDEV driver")
|
||||
CFLAGS += -DCFG_TUD_WCH_USBIP_FSDEV=1
|
||||
else
|
||||
$(info "Using USBFS driver")
|
||||
CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
|
||||
endif
|
||||
|
||||
LDFLAGS_GCC += \
|
||||
-nostdlib -nostartfiles \
|
||||
@ -30,6 +40,7 @@ LD_FILE = $(FAMILY_PATH)/linker/${CH32_FAMILY}.ld
|
||||
|
||||
SRC_C += \
|
||||
src/portable/wch/dcd_ch32_usbfs.c \
|
||||
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
|
||||
$(SDK_SRC_DIR)/Core/core_riscv.c \
|
||||
$(SDK_SRC_DIR)/Peripheral/src/ch32v20x_gpio.c \
|
||||
$(SDK_SRC_DIR)/Peripheral/src/ch32v20x_misc.c \
|
||||
|
||||
@ -1 +1,165 @@
|
||||
/* Define default values if not already defined */
__FLASH_SIZE = DEFINED(__flash_size) ? __flash_size : 64K;
__RAM_SIZE = DEFINED(__ram_size) ? __ram_size : 20K;
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = __FLASH_SIZE
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = __RAM_SIZE
}
ENTRY( _start )
__stack_size = 2048;
PROVIDE( _stack_size = __stack_size );
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.vector :
{
*(.vector);
. = ALIGN(64);
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2.*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
} >RAM
}
|
||||
/* Define default values if not already defined */
|
||||
__FLASH_SIZE = DEFINED(__flash_size) ? __flash_size : 64K;
|
||||
__RAM_SIZE = DEFINED(__ram_size) ? __ram_size : 20K;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = __FLASH_SIZE
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = __RAM_SIZE
|
||||
}
|
||||
|
||||
ENTRY( _start )
|
||||
|
||||
__stack_size = 2048;
|
||||
|
||||
PROVIDE( _stack_size = __stack_size );
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init :
|
||||
{
|
||||
_sinit = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(SORT_NONE(.init)))
|
||||
. = ALIGN(4);
|
||||
_einit = .;
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.vector :
|
||||
{
|
||||
*(.vector);
|
||||
. = ALIGN(64);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(SORT_NONE(.fini)))
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
PROVIDE( _etext = . );
|
||||
PROVIDE( _eitcm = . );
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_vma = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.dlalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_lma = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
*(.sdata .sdata.*)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
. = ALIGN(8);
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _sbss = .);
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _ebss = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
PROVIDE( _end = _ebss);
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_susrstack = . );
|
||||
. = . + __stack_size;
|
||||
PROVIDE( _eusrstack = .);
|
||||
} >RAM
|
||||
|
||||
}
|
||||
|
||||
@ -22,9 +22,9 @@
|
||||
//#define SYSCLK_FREQ_48MHz_HSE 48000000
|
||||
//#define SYSCLK_FREQ_56MHz_HSE 56000000
|
||||
//#define SYSCLK_FREQ_72MHz_HSE 72000000
|
||||
#define SYSCLK_FREQ_96MHz_HSE 96000000
|
||||
// #define SYSCLK_FREQ_96MHz_HSE 96000000
|
||||
//#define SYSCLK_FREQ_120MHz_HSE 120000000
|
||||
//#define SYSCLK_FREQ_144MHz_HSE 144000000
|
||||
#define SYSCLK_FREQ_144MHz_HSE 144000000
|
||||
//#define SYSCLK_FREQ_HSI HSI_VALUE
|
||||
//#define SYSCLK_FREQ_48MHz_HSI 48000000
|
||||
//#define SYSCLK_FREQ_56MHz_HSI 56000000
|
||||
|
||||
@ -38,13 +38,13 @@
|
||||
// TODO maybe having FS as port0, HS as port1
|
||||
|
||||
__attribute__((interrupt)) void USBHS_IRQHandler(void) {
|
||||
#if CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
|
||||
#if CFG_TUD_WCH_USBIP_USBHS
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
|
||||
__attribute__((interrupt)) void OTG_FS_IRQHandler(void) {
|
||||
#if CFG_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED
|
||||
#if CFG_TUD_WCH_USBIP_USBFS
|
||||
tud_int_handler(0);
|
||||
#endif
|
||||
}
|
||||
@ -74,15 +74,17 @@ void board_init(void) {
|
||||
|
||||
usart_printf_init(CFG_BOARD_UART_BAUDRATE);
|
||||
|
||||
#if CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED
|
||||
// Use Highspeed USB
|
||||
#ifdef CH32V30x_D8C
|
||||
// v305/v307: Highspeed USB
|
||||
RCC_USBCLK48MConfig(RCC_USBCLK48MCLKSource_USBPHY);
|
||||
RCC_USBHSPLLCLKConfig(RCC_HSBHSPLLCLKSource_HSE);
|
||||
RCC_USBHSConfig(RCC_USBPLL_Div2);
|
||||
RCC_USBHSPLLCKREFCLKConfig(RCC_USBHSPLLCKREFCLK_4M);
|
||||
RCC_USBHSPHYPLLALIVEcmd(ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_USBHS, ENABLE);
|
||||
#else
|
||||
#endif
|
||||
|
||||
// Fullspeed USB
|
||||
uint8_t otg_div;
|
||||
switch (SystemCoreClock) {
|
||||
case 48000000: otg_div = RCC_OTGFSCLKSource_PLLCLK_Div1; break;
|
||||
@ -92,7 +94,6 @@ void board_init(void) {
|
||||
}
|
||||
RCC_OTGFSCLKConfig(otg_div);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE);
|
||||
#endif
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStructure = {0};
|
||||
|
||||
|
||||
@ -14,7 +14,7 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TO
|
||||
set(FAMILY_MCUS CH32V307 CACHE INTERNAL "")
|
||||
set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
|
||||
|
||||
# default to highspeed
|
||||
# default to highspeed, used to select USBFS / USBHS driver
|
||||
if (NOT DEFINED SPEED)
|
||||
set(SPEED high)
|
||||
endif()
|
||||
@ -52,9 +52,16 @@ function(add_board_target BOARD_TARGET)
|
||||
${SDK_SRC_DIR}/Peripheral/inc
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
BOARD_TUD_MAX_SPEED=$<IF:$<STREQUAL:${SPEED},high>,OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
|
||||
)
|
||||
if (SPEED STREQUAL high)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CFG_TUD_WCH_USBIP_USBHS=1
|
||||
# BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
|
||||
)
|
||||
else ()
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CFG_TUD_WCH_USBIP_USBFS=1
|
||||
)
|
||||
endif ()
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
|
||||
|
||||
@ -26,11 +26,11 @@ CFLAGS += \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
|
||||
|
||||
ifeq ($(SPEED),high)
|
||||
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
|
||||
$(info "Using USBHS driver for HighSpeed mode")
|
||||
CFLAGS += -DCFG_TUD_WCH_USBIP_USBHS=1
|
||||
else
|
||||
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
|
||||
$(info "Using USBFS driver for FullSpeed mode")
|
||||
CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
|
||||
endif
|
||||
|
||||
LDFLAGS_GCC += \
|
||||
|
||||
@ -34,6 +34,8 @@ if GetDepend(["PKG_TINYUSB_DEVICE_ENABLE"]):
|
||||
src += ["../../src/class/cdc/cdc_device.c"]
|
||||
if GetDepend(["PKG_TINYUSB_DEVICE_MSC"]):
|
||||
src += ["../../src/class/msc/msc_device.c", "port/msc_device_port.c"]
|
||||
if GetDepend(["PKG_TINYUSB_DEVICE_HID"]):
|
||||
src += ["../../src/class/hid/hid_device.c"]
|
||||
|
||||
# for host stack
|
||||
if GetDepend(["PKG_TINYUSB_HOST_ENABLE"]):
|
||||
|
||||
@ -152,12 +152,12 @@ extern "C" {
|
||||
#define CFG_TUH_ENABLED (0)
|
||||
#endif
|
||||
|
||||
#if (PKG_TINYUSB_HOST_PORT == 0)
|
||||
#if (PKG_TINYUSB_HOST_PORT == 0) && defined(PKG_TINYUSB_HOST_ENABLE)
|
||||
#undef CFG_TUSB_RHPORT0_MODE
|
||||
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | PKG_TINYUSB_HOST_PORT_SPEED)
|
||||
#endif
|
||||
|
||||
#if (PKG_TINYUSB_HOST_PORT == 1)
|
||||
#if (PKG_TINYUSB_HOST_PORT == 1) && defined(PKG_TINYUSB_HOST_ENABLE)
|
||||
#undef CFG_TUSB_RHPORT1_MODE
|
||||
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_HOST | PKG_TINYUSB_HOST_PORT_SPEED)
|
||||
#endif
|
||||
|
||||
@ -128,6 +128,7 @@
|
||||
#define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name)))
|
||||
#define TU_ATTR_PACKED __attribute__ ((packed))
|
||||
#define TU_ATTR_WEAK __attribute__ ((weak))
|
||||
// #define TU_ATTR_WEAK_ALIAS(f) __attribute__ ((weak, alias(#f))
|
||||
#ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug
|
||||
#define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline))
|
||||
#endif
|
||||
|
||||
@ -402,28 +402,57 @@
|
||||
#elif TU_CHECK_MCU(OPT_MCU_F1C100S)
|
||||
#define TUP_DCD_ENDPOINT_MAX 4
|
||||
|
||||
//------------- WCH -------------//
|
||||
#elif TU_CHECK_MCU(OPT_MCU_CH32V307)
|
||||
// v307 support both FS and HS
|
||||
#define TUP_USBIP_WCH_USBHS
|
||||
#define TUP_USBIP_WCH_USBFS
|
||||
|
||||
#define TUP_RHPORT_HIGHSPEED 1 // default to highspeed
|
||||
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED ? 16 : 8)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// WCH
|
||||
//--------------------------------------------------------------------+
|
||||
#elif TU_CHECK_MCU(OPT_MCU_CH32F20X)
|
||||
#define TUP_USBIP_WCH_USBHS
|
||||
#define TUP_USBIP_WCH_USBFS
|
||||
|
||||
#define TUP_RHPORT_HIGHSPEED 1 // default to highspeed
|
||||
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED ? 16 : 8)
|
||||
#if !defined(CFG_TUD_WCH_USBIP_USBFS)
|
||||
#define CFG_TUD_WCH_USBIP_USBFS 0
|
||||
#endif
|
||||
|
||||
#if !defined(CFG_TUD_WCH_USBIP_USBHS)
|
||||
#define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
|
||||
#endif
|
||||
|
||||
#define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
|
||||
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
|
||||
|
||||
#elif TU_CHECK_MCU(OPT_MCU_CH32V20X)
|
||||
// v20x support both FSDEV (USBD) and USBFS, default to FSDEV
|
||||
#define TUP_USBIP_WCH_USBFS
|
||||
#define TUP_USBIP_FSDEV
|
||||
#define TUP_USBIP_FSDEV_CH32
|
||||
|
||||
#if !defined(CFG_TUD_WCH_USBIP_USBFS)
|
||||
#define CFG_TUD_WCH_USBIP_USBFS 0
|
||||
#endif
|
||||
|
||||
#if !defined(CFG_TUD_WCH_USBIP_FSDEV)
|
||||
#define CFG_TUD_WCH_USBIP_FSDEV (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
|
||||
#endif
|
||||
|
||||
#define TUP_DCD_ENDPOINT_MAX 8
|
||||
|
||||
#endif
|
||||
#elif TU_CHECK_MCU(OPT_MCU_CH32V307)
|
||||
// v307 support both FS and HS, default to HS
|
||||
#define TUP_USBIP_WCH_USBHS
|
||||
#define TUP_USBIP_WCH_USBFS
|
||||
|
||||
#if !defined(CFG_TUD_WCH_USBIP_USBFS)
|
||||
#define CFG_TUD_WCH_USBIP_USBFS 0
|
||||
#endif
|
||||
|
||||
#if !defined(CFG_TUD_WCH_USBIP_USBHS)
|
||||
#define CFG_TUD_WCH_USBIP_USBHS (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
|
||||
#endif
|
||||
|
||||
#define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
|
||||
#define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
|
||||
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// External USB controller
|
||||
|
||||
@ -24,8 +24,8 @@
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_DCD_H_
|
||||
#define _TUSB_DCD_H_
|
||||
#ifndef TUSB_DCD_H_
|
||||
#define TUSB_DCD_H_
|
||||
|
||||
#include "common/tusb_common.h"
|
||||
#include "osal/osal.h"
|
||||
@ -35,14 +35,6 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Configuration
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#ifndef CFG_TUD_ENDPPOINT_MAX
|
||||
#define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO CONSTANT TYPEDEF PROTYPES
|
||||
//--------------------------------------------------------------------+
|
||||
@ -149,10 +141,10 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr);
|
||||
void dcd_remote_wakeup(uint8_t rhport);
|
||||
|
||||
// Connect by enabling internal pull-up resistor on D+/D-
|
||||
void dcd_connect(uint8_t rhport) TU_ATTR_WEAK;
|
||||
void dcd_connect(uint8_t rhport);
|
||||
|
||||
// Disconnect by disabling internal pull-up resistor on D+/D-
|
||||
void dcd_disconnect(uint8_t rhport) TU_ATTR_WEAK;
|
||||
void dcd_disconnect(uint8_t rhport);
|
||||
|
||||
// Enable/Disable Start-of-frame interrupt. Default is disabled
|
||||
void dcd_sof_enable(uint8_t rhport, bool en);
|
||||
@ -254,4 +246,4 @@ TU_ATTR_ALWAYS_INLINE static inline void dcd_event_sof(uint8_t rhport, uint32_t
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _TUSB_DCD_H_ */
|
||||
#endif
|
||||
|
||||
@ -45,11 +45,6 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// Weak stubs: invoked if no strong implementation is available
|
||||
//--------------------------------------------------------------------+
|
||||
TU_ATTR_WEAK bool dcd_deinit(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
return false;
|
||||
}
|
||||
|
||||
TU_ATTR_WEAK void tud_event_hook_cb(uint8_t rhport, uint32_t eventid, bool in_isr) {
|
||||
(void)rhport;
|
||||
(void)eventid;
|
||||
@ -60,6 +55,19 @@ TU_ATTR_WEAK void tud_sof_cb(uint32_t frame_count) {
|
||||
(void)frame_count;
|
||||
}
|
||||
|
||||
TU_ATTR_WEAK bool dcd_deinit(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
return false;
|
||||
}
|
||||
|
||||
TU_ATTR_WEAK void dcd_connect(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
}
|
||||
|
||||
TU_ATTR_WEAK void dcd_disconnect(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Device Data
|
||||
//--------------------------------------------------------------------+
|
||||
@ -379,19 +387,16 @@ bool tud_remote_wakeup(void) {
|
||||
}
|
||||
|
||||
bool tud_disconnect(void) {
|
||||
TU_VERIFY(dcd_disconnect);
|
||||
dcd_disconnect(_usbd_rhport);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool tud_connect(void) {
|
||||
TU_VERIFY(dcd_connect);
|
||||
dcd_connect(_usbd_rhport);
|
||||
return true;
|
||||
}
|
||||
|
||||
void tud_sof_cb_enable(bool en)
|
||||
{
|
||||
void tud_sof_cb_enable(bool en) {
|
||||
usbd_sof_enable(_usbd_rhport, SOF_CONSUMER_USER, en);
|
||||
}
|
||||
|
||||
@ -406,7 +411,7 @@ bool tud_init(uint8_t rhport) {
|
||||
// skip if already initialized
|
||||
if (tud_inited()) return true;
|
||||
|
||||
TU_LOG_USBD("USBD init on controller %u\r\n", rhport);
|
||||
TU_LOG_USBD("USBD init on controller %u, Highspeed = %u\r\n", rhport, TUD_OPT_HIGH_SPEED);
|
||||
TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(usbd_device_t));
|
||||
TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(dcd_event_t));
|
||||
TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_fifo_t));
|
||||
|
||||
@ -60,7 +60,7 @@ void tud_task (void) {
|
||||
// Check if there is pending events need processing by tud_task()
|
||||
bool tud_task_event_ready(void);
|
||||
|
||||
#ifndef _TUSB_DCD_H_
|
||||
#ifndef TUSB_DCD_H_
|
||||
extern void dcd_int_handler(uint8_t rhport);
|
||||
#endif
|
||||
|
||||
|
||||
@ -102,25 +102,29 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_FSDEV)
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_FSDEV) && \
|
||||
!(defined(TUP_USBIP_FSDEV_CH32) && CFG_TUD_WCH_USBIP_FSDEV == 0)
|
||||
|
||||
#include "device/dcd.h"
|
||||
|
||||
#ifdef TUP_USBIP_FSDEV_STM32
|
||||
// Undefine to reduce the dependence on HAL
|
||||
#undef USE_HAL_DRIVER
|
||||
#include "portable/st/stm32_fsdev/dcd_stm32_fsdev.h"
|
||||
#if defined(TUP_USBIP_FSDEV_STM32)
|
||||
// Undefine to reduce the dependence on HAL
|
||||
#undef USE_HAL_DRIVER
|
||||
#include "fsdev_stm32.h"
|
||||
#elif defined(TUP_USBIP_FSDEV_CH32)
|
||||
#include "fsdev_ch32.h"
|
||||
#else
|
||||
#error "Unknown USB IP"
|
||||
#endif
|
||||
|
||||
/*****************************************************
|
||||
* Configuration
|
||||
*****************************************************/
|
||||
#include "fsdev_common.h"
|
||||
|
||||
// HW supports max of 8 bidirectional endpoints, but this can be reduced to save RAM
|
||||
// (8u here would mean 8 IN and 8 OUT)
|
||||
#ifndef MAX_EP_COUNT
|
||||
#define MAX_EP_COUNT 8U
|
||||
#endif
|
||||
//--------------------------------------------------------------------+
|
||||
// Configuration
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// hardware limit endpoint
|
||||
#define FSDEV_EP_COUNT 8
|
||||
|
||||
// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
|
||||
// Both of these MUST be a multiple of 2, and are in byte units.
|
||||
@ -132,11 +136,6 @@
|
||||
#define DCD_STM32_BTABLE_SIZE (FSDEV_PMA_SIZE - DCD_STM32_BTABLE_BASE)
|
||||
#endif
|
||||
|
||||
/***************************************************
|
||||
* Checks, structs, defines, function definitions, etc.
|
||||
*/
|
||||
|
||||
TU_VERIFY_STATIC((MAX_EP_COUNT) <= STFSDEV_EP_COUNT, "Only 8 endpoints supported on the hardware");
|
||||
TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_SIZE)) <= (FSDEV_PMA_SIZE), "BTABLE does not fit in PMA RAM");
|
||||
TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
|
||||
|
||||
@ -162,9 +161,9 @@ typedef struct {
|
||||
bool allocated[2];
|
||||
} ep_alloc_t;
|
||||
|
||||
static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
|
||||
static xfer_ctl_t xfer_status[CFG_TUD_ENDPPOINT_MAX][2];
|
||||
|
||||
static ep_alloc_t ep_alloc_status[STFSDEV_EP_COUNT];
|
||||
static ep_alloc_t ep_alloc_status[FSDEV_EP_COUNT];
|
||||
|
||||
static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
|
||||
|
||||
@ -199,7 +198,7 @@ TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t *xfer_ctl_ptr(uint32_t ep_addr)
|
||||
uint8_t epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t dir = tu_edpt_dir(ep_addr);
|
||||
// Fix -Werror=null-dereference
|
||||
TU_ASSERT(epnum < MAX_EP_COUNT, &xfer_status[0][0]);
|
||||
TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX, &xfer_status[0][0]);
|
||||
|
||||
return &xfer_status[epnum][dir];
|
||||
}
|
||||
@ -239,7 +238,7 @@ void dcd_init(uint8_t rhport)
|
||||
USB->ISTR = 0; // Clear pending interrupts
|
||||
|
||||
// Reset endpoints to disabled
|
||||
for (uint32_t i = 0; i < STFSDEV_EP_COUNT; i++) {
|
||||
for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
|
||||
// This doesn't clear all bits since some bits are "toggle", but does set the type to DISABLED.
|
||||
pcd_set_endpoint(USB, i, 0u);
|
||||
}
|
||||
@ -248,43 +247,9 @@ void dcd_init(uint8_t rhport)
|
||||
dcd_handle_bus_reset();
|
||||
|
||||
// Enable pull-up if supported
|
||||
if (dcd_connect) {
|
||||
dcd_connect(rhport);
|
||||
}
|
||||
dcd_connect(rhport);
|
||||
}
|
||||
|
||||
// Define only on MCU with internal pull-up. BSP can define on MCU without internal PU.
|
||||
#if defined(USB_BCDR_DPPU)
|
||||
|
||||
// Disable internal D+ PU
|
||||
void dcd_disconnect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB->BCDR &= ~(USB_BCDR_DPPU);
|
||||
}
|
||||
|
||||
// Enable internal D+ PU
|
||||
void dcd_connect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
USB->BCDR |= USB_BCDR_DPPU;
|
||||
}
|
||||
|
||||
#elif defined(SYSCFG_PMC_USB_PU) // works e.g. on STM32L151
|
||||
// Disable internal D+ PU
|
||||
void dcd_disconnect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
SYSCFG->PMC &= ~(SYSCFG_PMC_USB_PU);
|
||||
}
|
||||
|
||||
// Enable internal D+ PU
|
||||
void dcd_connect(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
|
||||
}
|
||||
#endif
|
||||
|
||||
void dcd_sof_enable(uint8_t rhport, bool en)
|
||||
{
|
||||
@ -298,126 +263,6 @@ void dcd_sof_enable(uint8_t rhport, bool en)
|
||||
}
|
||||
}
|
||||
|
||||
// Enable device interrupt
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
// Member here forces write to RAM before allowing ISR to execute
|
||||
__DSB();
|
||||
__ISB();
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0 || CFG_TUSB_MCU == OPT_MCU_STM32L4
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
|
||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
|
||||
// Some STM32F302/F303 devices allow to remap the USB interrupt vectors from
|
||||
// shared USB/CAN IRQs to separate CAN and USB IRQs.
|
||||
// This dynamically checks if this remap is active to enable the right IRQs.
|
||||
#ifdef SYSCFG_CFGR1_USB_IT_RMP
|
||||
if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
|
||||
NVIC_EnableIRQ(USB_HP_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||
NVIC_EnableIRQ(USBWakeUp_RMP_IRQn);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
NVIC_EnableIRQ(USB_HP_CAN_TX_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
|
||||
NVIC_EnableIRQ(USBWakeUp_IRQn);
|
||||
}
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
NVIC_EnableIRQ(USB_HP_CAN1_TX_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
|
||||
NVIC_EnableIRQ(USBWakeUp_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
||||
NVIC_EnableIRQ(USB_HP_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||
NVIC_EnableIRQ(USBWakeUp_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
|
||||
#ifdef STM32G0B0xx
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
#else
|
||||
NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
|
||||
#endif
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
NVIC_EnableIRQ(USB_DRD_FS_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||
NVIC_EnableIRQ(USB_HP_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
|
||||
NVIC_EnableIRQ(USB_FS_IRQn);
|
||||
|
||||
#else
|
||||
#error Unknown arch in USB driver
|
||||
#endif
|
||||
}
|
||||
|
||||
// Disable device interrupt
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F0 || CFG_TUSB_MCU == OPT_MCU_STM32L0 || CFG_TUSB_MCU == OPT_MCU_STM32L4
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
|
||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
|
||||
// Some STM32F302/F303 devices allow to remap the USB interrupt vectors from
|
||||
// shared USB/CAN IRQs to separate CAN and USB IRQs.
|
||||
// This dynamically checks if this remap is active to disable the right IRQs.
|
||||
#ifdef SYSCFG_CFGR1_USB_IT_RMP
|
||||
if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
|
||||
NVIC_DisableIRQ(USB_HP_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||
NVIC_DisableIRQ(USBWakeUp_RMP_IRQn);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
NVIC_DisableIRQ(USB_HP_CAN_TX_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
|
||||
NVIC_DisableIRQ(USBWakeUp_IRQn);
|
||||
}
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
|
||||
NVIC_DisableIRQ(USBWakeUp_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
||||
NVIC_DisableIRQ(USB_HP_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||
NVIC_DisableIRQ(USBWakeUp_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
|
||||
#ifdef STM32G0B0xx
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
#else
|
||||
NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
|
||||
#endif
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
NVIC_DisableIRQ(USB_DRD_FS_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||
NVIC_DisableIRQ(USB_HP_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
|
||||
NVIC_DisableIRQ(USB_FS_IRQn);
|
||||
|
||||
#else
|
||||
#error Unknown arch in USB driver
|
||||
#endif
|
||||
|
||||
// CMSIS has a membar after disabling interrupts
|
||||
}
|
||||
|
||||
// Receive Set Address request, mcu port must also include status IN response
|
||||
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
@ -461,7 +306,7 @@ static void dcd_handle_bus_reset(void)
|
||||
{
|
||||
USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
|
||||
|
||||
for (uint32_t i = 0; i < STFSDEV_EP_COUNT; i++) {
|
||||
for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
|
||||
// Clear EP allocation status
|
||||
ep_alloc_status[i].ep_num = 0xFF;
|
||||
ep_alloc_status[i].ep_type = 0xFF;
|
||||
@ -470,7 +315,7 @@ static void dcd_handle_bus_reset(void)
|
||||
}
|
||||
|
||||
// Reset PMA allocation
|
||||
ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * MAX_EP_COUNT;
|
||||
ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX;
|
||||
|
||||
dcd_edpt_open(0, &ep0OUT_desc);
|
||||
dcd_edpt_open(0, &ep0IN_desc);
|
||||
@ -653,7 +498,6 @@ static void dcd_ep_ctr_handler(void)
|
||||
|
||||
void dcd_int_handler(uint8_t rhport)
|
||||
{
|
||||
|
||||
(void)rhport;
|
||||
|
||||
uint32_t int_status = USB->ISTR;
|
||||
@ -774,7 +618,7 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
for (uint8_t i = 0; i < STFSDEV_EP_COUNT; i++) {
|
||||
for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
|
||||
// Check if already allocated
|
||||
if (ep_alloc_status[i].allocated[dir] &&
|
||||
ep_alloc_status[i].ep_type == ep_type &&
|
||||
@ -818,7 +662,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
|
||||
uint16_t pma_addr;
|
||||
uint32_t wType;
|
||||
|
||||
TU_ASSERT(ep_idx < STFSDEV_EP_COUNT);
|
||||
TU_ASSERT(ep_idx < FSDEV_EP_COUNT);
|
||||
TU_ASSERT(buffer_size <= 64);
|
||||
|
||||
// Set type
|
||||
@ -865,7 +709,7 @@ void dcd_edpt_close_all(uint8_t rhport)
|
||||
{
|
||||
(void)rhport;
|
||||
|
||||
for (uint32_t i = 1; i < STFSDEV_EP_COUNT; i++) {
|
||||
for (uint32_t i = 1; i < FSDEV_EP_COUNT; i++) {
|
||||
// Reset endpoint
|
||||
pcd_set_endpoint(USB, i, 0);
|
||||
// Clear EP allocation status
|
||||
@ -876,7 +720,7 @@ void dcd_edpt_close_all(uint8_t rhport)
|
||||
}
|
||||
|
||||
// Reset PMA allocation
|
||||
ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * MAX_EP_COUNT + 2 * CFG_TUD_ENDPOINT0_SIZE;
|
||||
ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8 * CFG_TUD_ENDPPOINT_MAX + 2 * CFG_TUD_ENDPOINT0_SIZE;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1155,7 +999,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, ui
|
||||
}
|
||||
|
||||
if (wNBytes) {
|
||||
temp1 = *srcVal;
|
||||
temp1 = (uint16_t) *srcVal;
|
||||
*pdwVal = temp1;
|
||||
}
|
||||
|
||||
|
||||
232
src/portable/st/stm32_fsdev/fsdev_ch32.h
Normal file
232
src/portable/st/stm32_fsdev/fsdev_ch32.h
Normal file
@ -0,0 +1,232 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2024, hathach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
/** <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef TUSB_FSDEV_CH32_H
|
||||
#define TUSB_FSDEV_CH32_H
|
||||
|
||||
#include "common/tusb_compiler.h"
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_CH32V20X
|
||||
#include <ch32v20x.h>
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_CH32F20X
|
||||
#include <ch32f20x.h>
|
||||
#endif
|
||||
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
|
||||
// volatile 32-bit aligned
|
||||
#define _va32 volatile TU_ATTR_ALIGNED(4)
|
||||
|
||||
typedef struct {
|
||||
_va32 uint16_t EP0R; // 00: USB Endpoint 0 register
|
||||
_va32 uint16_t EP1R; // 04: USB Endpoint 1 register
|
||||
_va32 uint16_t EP2R; // 08: USB Endpoint 2 register
|
||||
_va32 uint16_t EP3R; // 0C: USB Endpoint 3 register
|
||||
_va32 uint16_t EP4R; // 10: USB Endpoint 4 register
|
||||
_va32 uint16_t EP5R; // 14: USB Endpoint 5 register
|
||||
_va32 uint16_t EP6R; // 18: USB Endpoint 6 register
|
||||
_va32 uint16_t EP7R; // 1C: USB Endpoint 7 register
|
||||
_va32 uint16_t RESERVED7[16]; // Reserved
|
||||
_va32 uint16_t CNTR; // 40: Control register
|
||||
_va32 uint16_t ISTR; // 44: Interrupt status register
|
||||
_va32 uint16_t FNR; // 48: Frame number register
|
||||
_va32 uint16_t DADDR; // 4C: Device address register
|
||||
_va32 uint16_t BTABLE; // 50: Buffer Table address register
|
||||
} USB_TypeDef;
|
||||
|
||||
TU_VERIFY_STATIC(sizeof(USB_TypeDef) == 0x54, "Size is not correct");
|
||||
TU_VERIFY_STATIC(offsetof(USB_TypeDef, CNTR) == 0x40, "Wrong offset");
|
||||
|
||||
#define USB_BASE (APB1PERIPH_BASE + 0x00005C00UL) /*!< USB_IP Peripheral Registers base address */
|
||||
#define USB_PMAADDR (APB1PERIPH_BASE + 0x00006000UL) /*!< USB_IP Packet Memory Area base address */
|
||||
#define USB ((USB_TypeDef *)USB_BASE)
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* USB Device General registers */
|
||||
/* */
|
||||
/******************************************************************************/
|
||||
#define USB_CNTR (USB_BASE + 0x40U) /*!< Control register */
|
||||
#define USB_ISTR (USB_BASE + 0x44U) /*!< Interrupt status register */
|
||||
#define USB_FNR (USB_BASE + 0x48U) /*!< Frame number register */
|
||||
#define USB_DADDR (USB_BASE + 0x4CU) /*!< Device address register */
|
||||
#define USB_BTABLE (USB_BASE + 0x50U) /*!< Buffer Table address register */
|
||||
|
||||
/**************************** ISTR interrupt events *************************/
|
||||
#define USB_ISTR_CTR ((uint16_t)0x8000U) /*!< Correct TRansfer (clear-only bit) */
|
||||
#define USB_ISTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun (clear-only bit) */
|
||||
#define USB_ISTR_ERR ((uint16_t)0x2000U) /*!< ERRor (clear-only bit) */
|
||||
#define USB_ISTR_WKUP ((uint16_t)0x1000U) /*!< WaKe UP (clear-only bit) */
|
||||
#define USB_ISTR_SUSP ((uint16_t)0x0800U) /*!< SUSPend (clear-only bit) */
|
||||
#define USB_ISTR_RESET ((uint16_t)0x0400U) /*!< RESET (clear-only bit) */
|
||||
#define USB_ISTR_SOF ((uint16_t)0x0200U) /*!< Start Of Frame (clear-only bit) */
|
||||
#define USB_ISTR_ESOF ((uint16_t)0x0100U) /*!< Expected Start Of Frame (clear-only bit) */
|
||||
#define USB_ISTR_DIR ((uint16_t)0x0010U) /*!< DIRection of transaction (read-only bit) */
|
||||
#define USB_ISTR_EP_ID ((uint16_t)0x000FU) /*!< EndPoint IDentifier (read-only bit) */
|
||||
|
||||
/* Legacy defines */
|
||||
#define USB_ISTR_PMAOVRM USB_ISTR_PMAOVR
|
||||
|
||||
#define USB_CLR_CTR (~USB_ISTR_CTR) /*!< clear Correct TRansfer bit */
|
||||
#define USB_CLR_PMAOVR (~USB_ISTR_PMAOVR) /*!< clear DMA OVeR/underrun bit*/
|
||||
#define USB_CLR_ERR (~USB_ISTR_ERR) /*!< clear ERRor bit */
|
||||
#define USB_CLR_WKUP (~USB_ISTR_WKUP) /*!< clear WaKe UP bit */
|
||||
#define USB_CLR_SUSP (~USB_ISTR_SUSP) /*!< clear SUSPend bit */
|
||||
#define USB_CLR_RESET (~USB_ISTR_RESET) /*!< clear RESET bit */
|
||||
#define USB_CLR_SOF (~USB_ISTR_SOF) /*!< clear Start Of Frame bit */
|
||||
#define USB_CLR_ESOF (~USB_ISTR_ESOF) /*!< clear Expected Start Of Frame bit */
|
||||
|
||||
/* Legacy defines */
|
||||
#define USB_CLR_PMAOVRM USB_CLR_PMAOVR
|
||||
|
||||
/************************* CNTR control register bits definitions ***********/
|
||||
#define USB_CNTR_CTRM ((uint16_t)0x8000U) /*!< Correct TRansfer Mask */
|
||||
#define USB_CNTR_PMAOVR ((uint16_t)0x4000U) /*!< DMA OVeR/underrun Mask */
|
||||
#define USB_CNTR_ERRM ((uint16_t)0x2000U) /*!< ERRor Mask */
|
||||
#define USB_CNTR_WKUPM ((uint16_t)0x1000U) /*!< WaKe UP Mask */
|
||||
#define USB_CNTR_SUSPM ((uint16_t)0x0800U) /*!< SUSPend Mask */
|
||||
#define USB_CNTR_RESETM ((uint16_t)0x0400U) /*!< RESET Mask */
|
||||
#define USB_CNTR_SOFM ((uint16_t)0x0200U) /*!< Start Of Frame Mask */
|
||||
#define USB_CNTR_ESOFM ((uint16_t)0x0100U) /*!< Expected Start Of Frame Mask */
|
||||
#define USB_CNTR_RESUME ((uint16_t)0x0010U) /*!< RESUME request */
|
||||
#define USB_CNTR_FSUSP ((uint16_t)0x0008U) /*!< Force SUSPend */
|
||||
#define USB_CNTR_LPMODE ((uint16_t)0x0004U) /*!< Low-power MODE */
|
||||
#define USB_CNTR_PDWN ((uint16_t)0x0002U) /*!< Power DoWN */
|
||||
#define USB_CNTR_FRES ((uint16_t)0x0001U) /*!< Force USB RESet */
|
||||
|
||||
/* Legacy defines */
|
||||
#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVR
|
||||
#define USB_CNTR_LP_MODE USB_CNTR_LPMODE
|
||||
|
||||
/******************** FNR Frame Number Register bit definitions ************/
|
||||
#define USB_FNR_RXDP ((uint16_t)0x8000U) /*!< status of D+ data line */
|
||||
#define USB_FNR_RXDM ((uint16_t)0x4000U) /*!< status of D- data line */
|
||||
#define USB_FNR_LCK ((uint16_t)0x2000U) /*!< LoCKed */
|
||||
#define USB_FNR_LSOF ((uint16_t)0x1800U) /*!< Lost SOF */
|
||||
#define USB_FNR_FN ((uint16_t)0x07FFU) /*!< Frame Number */
|
||||
|
||||
/******************** DADDR Device ADDRess bit definitions ****************/
|
||||
#define USB_DADDR_EF ((uint8_t)0x80U) /*!< USB device address Enable Function */
|
||||
#define USB_DADDR_ADD ((uint8_t)0x7FU) /*!< USB device address */
|
||||
|
||||
/****************************** Endpoint register *************************/
|
||||
#define USB_EP0R USB_BASE /*!< endpoint 0 register address */
|
||||
#define USB_EP1R (USB_BASE + 0x04U) /*!< endpoint 1 register address */
|
||||
#define USB_EP2R (USB_BASE + 0x08U) /*!< endpoint 2 register address */
|
||||
#define USB_EP3R (USB_BASE + 0x0CU) /*!< endpoint 3 register address */
|
||||
#define USB_EP4R (USB_BASE + 0x10U) /*!< endpoint 4 register address */
|
||||
#define USB_EP5R (USB_BASE + 0x14U) /*!< endpoint 5 register address */
|
||||
#define USB_EP6R (USB_BASE + 0x18U) /*!< endpoint 6 register address */
|
||||
#define USB_EP7R (USB_BASE + 0x1CU) /*!< endpoint 7 register address */
|
||||
/* bit positions */
|
||||
#define USB_EP_CTR_RX ((uint16_t)0x8000U) /*!< EndPoint Correct TRansfer RX */
|
||||
#define USB_EP_DTOG_RX ((uint16_t)0x4000U) /*!< EndPoint Data TOGGLE RX */
|
||||
#define USB_EPRX_STAT ((uint16_t)0x3000U) /*!< EndPoint RX STATus bit field */
|
||||
#define USB_EP_SETUP ((uint16_t)0x0800U) /*!< EndPoint SETUP */
|
||||
#define USB_EP_T_FIELD ((uint16_t)0x0600U) /*!< EndPoint TYPE */
|
||||
#define USB_EP_KIND ((uint16_t)0x0100U) /*!< EndPoint KIND */
|
||||
#define USB_EP_CTR_TX ((uint16_t)0x0080U) /*!< EndPoint Correct TRansfer TX */
|
||||
#define USB_EP_DTOG_TX ((uint16_t)0x0040U) /*!< EndPoint Data TOGGLE TX */
|
||||
#define USB_EPTX_STAT ((uint16_t)0x0030U) /*!< EndPoint TX STATus bit field */
|
||||
#define USB_EPADDR_FIELD ((uint16_t)0x000FU) /*!< EndPoint ADDRess FIELD */
|
||||
|
||||
/* EndPoint REGister MASK (no toggle fields) */
|
||||
#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD)
|
||||
/*!< EP_TYPE[1:0] EndPoint TYPE */
|
||||
#define USB_EP_TYPE_MASK ((uint16_t)0x0600U) /*!< EndPoint TYPE Mask */
|
||||
#define USB_EP_BULK ((uint16_t)0x0000U) /*!< EndPoint BULK */
|
||||
#define USB_EP_CONTROL ((uint16_t)0x0200U) /*!< EndPoint CONTROL */
|
||||
#define USB_EP_ISOCHRONOUS ((uint16_t)0x0400U) /*!< EndPoint ISOCHRONOUS */
|
||||
#define USB_EP_INTERRUPT ((uint16_t)0x0600U) /*!< EndPoint INTERRUPT */
|
||||
#define USB_EP_T_MASK ((uint16_t) ~USB_EP_T_FIELD & USB_EPREG_MASK)
|
||||
|
||||
#define USB_EPKIND_MASK ((uint16_t) ~USB_EP_KIND & USB_EPREG_MASK) /*!< EP_KIND EndPoint KIND */
|
||||
/*!< STAT_TX[1:0] STATus for TX transfer */
|
||||
#define USB_EP_TX_DIS ((uint16_t)0x0000U) /*!< EndPoint TX DISabled */
|
||||
#define USB_EP_TX_STALL ((uint16_t)0x0010U) /*!< EndPoint TX STALLed */
|
||||
#define USB_EP_TX_NAK ((uint16_t)0x0020U) /*!< EndPoint TX NAKed */
|
||||
#define USB_EP_TX_VALID ((uint16_t)0x0030U) /*!< EndPoint TX VALID */
|
||||
#define USB_EPTX_DTOG1 ((uint16_t)0x0010U) /*!< EndPoint TX Data TOGgle bit1 */
|
||||
#define USB_EPTX_DTOG2 ((uint16_t)0x0020U) /*!< EndPoint TX Data TOGgle bit2 */
|
||||
#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK)
|
||||
/*!< STAT_RX[1:0] STATus for RX transfer */
|
||||
#define USB_EP_RX_DIS ((uint16_t)0x0000U) /*!< EndPoint RX DISabled */
|
||||
#define USB_EP_RX_STALL ((uint16_t)0x1000U) /*!< EndPoint RX STALLed */
|
||||
#define USB_EP_RX_NAK ((uint16_t)0x2000U) /*!< EndPoint RX NAKed */
|
||||
#define USB_EP_RX_VALID ((uint16_t)0x3000U) /*!< EndPoint RX VALID */
|
||||
#define USB_EPRX_DTOG1 ((uint16_t)0x1000U) /*!< EndPoint RX Data TOGgle bit1 */
|
||||
#define USB_EPRX_DTOG2 ((uint16_t)0x2000U) /*!< EndPoint RX Data TOGgle bit1 */
|
||||
#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK)
|
||||
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
//
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_CH32V20X
|
||||
static const IRQn_Type fsdev_irq[] = {
|
||||
USB_HP_CAN1_TX_IRQn,
|
||||
USB_LP_CAN1_RX0_IRQn,
|
||||
USBWakeUp_IRQn
|
||||
};
|
||||
enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
|
||||
#else
|
||||
#error "Unsupported MCU"
|
||||
#endif
|
||||
|
||||
void dcd_int_enable(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
|
||||
NVIC_EnableIRQ(fsdev_irq[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
|
||||
NVIC_DisableIRQ(fsdev_irq[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void dcd_disconnect(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
|
||||
}
|
||||
|
||||
void dcd_connect(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -1,174 +1,43 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright(c) 2016 STMicroelectronics
|
||||
* Copyright(c) N Conrad
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
* Copyright (c) 2024, hathach (tinyusb.org)
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
// This file contains source copied from ST's HAL, and thus should have their copyright statement.
|
||||
#ifndef TUSB_FSDEV_COMMON_H
|
||||
#define TUSB_FSDEV_COMMON_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "stdint.h"
|
||||
|
||||
// FSDEV_PMA_SIZE is PMA buffer size in bytes.
|
||||
// On 512-byte devices, access with a stride of two words (use every other 16-bit address)
|
||||
// On 1024-byte devices, access with a stride of one word (use every 16-bit address)
|
||||
|
||||
#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
|
||||
#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F0
|
||||
#include "stm32f0xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
// F0x2 models are crystal-less
|
||||
// All have internal D+ pull-up
|
||||
// 070RB: 2 x 16 bits/word memory LPM Support, BCD Support
|
||||
// PMA dedicated to USB (no sharing with CAN)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
#include "stm32f1xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
// NO internal Pull-ups
|
||||
// *B, and *C: 2 x 16 bits/word
|
||||
|
||||
// F1 names this differently from the rest
|
||||
#define USB_CNTR_LPMODE USB_CNTR_LP_MODE
|
||||
|
||||
#elif defined(STM32F302xB) || defined(STM32F302xC) || \
|
||||
defined(STM32F303xB) || defined(STM32F303xC) || \
|
||||
defined(STM32F373xC)
|
||||
#include "stm32f3xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
// NO internal Pull-ups
|
||||
// *B, and *C: 1 x 16 bits/word
|
||||
// PMA dedicated to USB (no sharing with CAN)
|
||||
|
||||
#elif defined(STM32F302x6) || defined(STM32F302x8) || \
|
||||
defined(STM32F302xD) || defined(STM32F302xE) || \
|
||||
defined(STM32F303xD) || defined(STM32F303xE)
|
||||
#include "stm32f3xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
// NO internal Pull-ups
|
||||
// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support
|
||||
// When CAN clock is enabled, USB can use first 768 bytes ONLY.
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L0
|
||||
#include "stm32l0xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
|
||||
#include "stm32l1xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
||||
#include "stm32g4xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
|
||||
#include "stm32g0xx.h"
|
||||
#define FSDEV_BUS_32BIT
|
||||
#define FSDEV_PMA_SIZE (2048u)
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||
#define USB_TypeDef USB_DRD_TypeDef
|
||||
#define EP0R CHEP0R
|
||||
#define USB_EP_CTR_RX USB_EP_VTRX
|
||||
#define USB_EP_CTR_TX USB_EP_VTTX
|
||||
#define USB_EP_T_FIELD USB_CHEP_UTYPE
|
||||
#define USB_EPREG_MASK USB_CHEP_REG_MASK
|
||||
#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
|
||||
#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
|
||||
#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
|
||||
#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
|
||||
#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
|
||||
#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
|
||||
#define USB_EPRX_STAT USB_CH_RX_VALID
|
||||
#define USB_EPKIND_MASK USB_EP_KIND_MASK
|
||||
#define USB USB_DRD_FS
|
||||
#define USB_CNTR_FRES USB_CNTR_USBRST
|
||||
#define USB_CNTR_RESUME USB_CNTR_L2RES
|
||||
#define USB_ISTR_EP_ID USB_ISTR_IDN
|
||||
#define USB_EPADDR_FIELD USB_CHEP_ADDR
|
||||
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
#include "stm32h5xx.h"
|
||||
#define FSDEV_BUS_32BIT
|
||||
|
||||
#if !defined(USB_DRD_BASE) && defined(USB_DRD_FS_BASE)
|
||||
#define USB_DRD_BASE USB_DRD_FS_BASE
|
||||
#endif
|
||||
|
||||
#define FSDEV_PMA_SIZE (2048u)
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||
#define USB_TypeDef USB_DRD_TypeDef
|
||||
#define EP0R CHEP0R
|
||||
#define USB_EP_CTR_RX USB_EP_VTRX
|
||||
#define USB_EP_CTR_TX USB_EP_VTTX
|
||||
#define USB_EP_T_FIELD USB_CHEP_UTYPE
|
||||
#define USB_EPREG_MASK USB_CHEP_REG_MASK
|
||||
#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
|
||||
#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
|
||||
#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
|
||||
#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
|
||||
#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
|
||||
#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
|
||||
#define USB_EPRX_STAT USB_CH_RX_VALID
|
||||
#define USB_EPKIND_MASK USB_EP_KIND_MASK
|
||||
#define USB USB_DRD_FS
|
||||
#define USB_CNTR_FRES USB_CNTR_USBRST
|
||||
#define USB_CNTR_RESUME USB_CNTR_L2RES
|
||||
#define USB_ISTR_EP_ID USB_ISTR_IDN
|
||||
#define USB_EPADDR_FIELD USB_CHEP_ADDR
|
||||
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||
#include "stm32wbxx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
/* ST provided header has incorrect value */
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB1_PMAADDR
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
|
||||
#include "stm32l4xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
|
||||
#include "stm32l5xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#ifndef USB_PMAADDR
|
||||
#define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS))
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error You are using an untested or unimplemented STM32 variant. Please update the driver.
|
||||
// This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
|
||||
#endif
|
||||
|
||||
// For purposes of accessing the packet
|
||||
#if ((FSDEV_PMA_SIZE) == 512u)
|
||||
#define FSDEV_PMA_STRIDE (2u)
|
||||
@ -181,24 +50,24 @@
|
||||
// The compiler should warn us if we cast it to a non-volatile type?
|
||||
#ifdef FSDEV_BUS_32BIT
|
||||
typedef uint32_t fsdev_bus_t;
|
||||
static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR;
|
||||
static volatile uint32_t * const pma32 = (volatile uint32_t*)USB_PMAADDR;
|
||||
|
||||
#else
|
||||
typedef uint16_t fsdev_bus_t;
|
||||
// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
|
||||
static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
|
||||
static volatile uint16_t * const pma = (volatile uint16_t*)USB_PMAADDR;
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x) {
|
||||
TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x) {
|
||||
size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
|
||||
total_word_offset *= FSDEV_PMA_STRIDE;
|
||||
return &(pma[total_word_offset]);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
|
||||
}
|
||||
|
||||
TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
TU_ATTR_ALWAYS_INLINE static inline volatile uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
|
||||
}
|
||||
#endif
|
||||
@ -218,10 +87,10 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t si
|
||||
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue) {
|
||||
#ifdef FSDEV_BUS_32BIT
|
||||
(void) USBx;
|
||||
__O uint32_t *reg = (__O uint32_t *)(USB_DRD_BASE + bEpIdx*4);
|
||||
volatile uint32_t *reg = (volatile uint32_t *)(USB_DRD_BASE + bEpIdx*4);
|
||||
*reg = wRegValue;
|
||||
#else
|
||||
__O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
|
||||
volatile uint16_t *reg = (volatile uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
|
||||
*reg = (uint16_t)wRegValue;
|
||||
#endif
|
||||
}
|
||||
@ -229,9 +98,9 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, ui
|
||||
TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
#ifdef FSDEV_BUS_32BIT
|
||||
(void) USBx;
|
||||
__I uint32_t *reg = (__I uint32_t *)(USB_DRD_BASE + bEpIdx*4);
|
||||
volatile const uint32_t *reg = (volatile const uint32_t *)(USB_DRD_BASE + bEpIdx*4);
|
||||
#else
|
||||
__I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
|
||||
volatile const uint16_t *reg = (volatile const uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
|
||||
#endif
|
||||
return *reg;
|
||||
}
|
||||
@ -283,7 +152,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USB
|
||||
(void) USBx;
|
||||
return (pma32[2*bEpIdx] & 0x03FF0000) >> 16;
|
||||
#else
|
||||
__I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
|
||||
volatile const uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
|
||||
return *regPtr & 0x3ffU;
|
||||
#endif
|
||||
}
|
||||
@ -293,7 +162,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USB
|
||||
(void) USBx;
|
||||
return (pma32[2*bEpIdx + 1] & 0x03FF0000) >> 16;
|
||||
#else
|
||||
__I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
|
||||
volatile const uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
|
||||
return *regPtr & 0x3ffU;
|
||||
#endif
|
||||
}
|
||||
@ -363,7 +232,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, u
|
||||
(void) USBx;
|
||||
pma32[2*bEpIdx] = (pma32[2*bEpIdx] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
|
||||
#else
|
||||
__IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
|
||||
volatile uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
|
||||
*reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
|
||||
#endif
|
||||
}
|
||||
@ -375,7 +244,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_dbuf1_cnt(USB_TypeDef * U
|
||||
(void) USBx;
|
||||
pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
|
||||
#else
|
||||
__IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
|
||||
volatile uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
|
||||
*reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
|
||||
#endif
|
||||
}
|
||||
@ -387,7 +256,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDe
|
||||
(void) USBx;
|
||||
pma32[rxtx_idx] = (pma32[rxtx_idx] & 0x0000FFFFu) | (blocksize << 31) | ((numblocks - blocksize) << 26);
|
||||
#else
|
||||
__IO uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);
|
||||
volatile uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);
|
||||
*pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
|
||||
#endif
|
||||
}
|
||||
@ -472,13 +341,6 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef *
|
||||
return (regVal & USB_EPRX_STAT) >> (12u);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param bEpIdx Endpoint Number.
|
||||
* @retval None
|
||||
*/
|
||||
TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
||||
regVal &= USB_EPREG_MASK;
|
||||
@ -493,12 +355,6 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx, uint32
|
||||
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param bEpIdx Endpoint Number.
|
||||
* @retval None
|
||||
*/
|
||||
TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
||||
if((regVal & USB_EP_DTOG_RX) != 0) {
|
||||
@ -513,12 +369,6 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief set & clear EP_KIND bit.
|
||||
* @param USBx USB peripheral instance register address.
|
||||
* @param bEpIdx Endpoint Number.
|
||||
* @retval None
|
||||
*/
|
||||
TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx) {
|
||||
uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
|
||||
regVal |= USB_EP_KIND;
|
||||
@ -534,18 +384,8 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, u
|
||||
pcd_set_endpoint(USBx, bEpIdx, regVal);
|
||||
}
|
||||
|
||||
// This checks if the device has "LPM"
|
||||
#if defined(USB_ISTR_L1REQ)
|
||||
#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)
|
||||
#else
|
||||
#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
|
||||
USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
|
||||
|
||||
// Number of endpoints in hardware
|
||||
// TODO should use TUP_DCD_ENDPOINT_MAX
|
||||
#define STFSDEV_EP_COUNT (8u)
|
||||
|
||||
#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */
|
||||
#endif
|
||||
292
src/portable/st/stm32_fsdev/fsdev_stm32.h
Normal file
292
src/portable/st/stm32_fsdev/fsdev_stm32.h
Normal file
@ -0,0 +1,292 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright(c) N Conrad
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef TUSB_FSDEV_STM32_H
|
||||
#define TUSB_FSDEV_STM32_H
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F0
|
||||
#include "stm32f0xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
// F0x2 models are crystal-less
|
||||
// All have internal D+ pull-up
|
||||
// 070RB: 2 x 16 bits/word memory LPM Support, BCD Support
|
||||
// PMA dedicated to USB (no sharing with CAN)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
#include "stm32f1xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
// NO internal Pull-ups
|
||||
// *B, and *C: 2 x 16 bits/word
|
||||
|
||||
// F1 names this differently from the rest
|
||||
#define USB_CNTR_LPMODE USB_CNTR_LP_MODE
|
||||
|
||||
#elif defined(STM32F302xB) || defined(STM32F302xC) || \
|
||||
defined(STM32F303xB) || defined(STM32F303xC) || \
|
||||
defined(STM32F373xC)
|
||||
#include "stm32f3xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
// NO internal Pull-ups
|
||||
// *B, and *C: 1 x 16 bits/word
|
||||
// PMA dedicated to USB (no sharing with CAN)
|
||||
|
||||
#elif defined(STM32F302x6) || defined(STM32F302x8) || \
|
||||
defined(STM32F302xD) || defined(STM32F302xE) || \
|
||||
defined(STM32F303xD) || defined(STM32F303xE)
|
||||
#include "stm32f3xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
// NO internal Pull-ups
|
||||
// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support
|
||||
// When CAN clock is enabled, USB can use first 768 bytes ONLY.
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L0
|
||||
#include "stm32l0xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L1
|
||||
#include "stm32l1xx.h"
|
||||
#define FSDEV_PMA_SIZE (512u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G4
|
||||
#include "stm32g4xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
|
||||
#include "stm32g0xx.h"
|
||||
#define FSDEV_BUS_32BIT
|
||||
#define FSDEV_PMA_SIZE (2048u)
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||
#define USB_TypeDef USB_DRD_TypeDef
|
||||
#define EP0R CHEP0R
|
||||
#define USB_EP_CTR_RX USB_EP_VTRX
|
||||
#define USB_EP_CTR_TX USB_EP_VTTX
|
||||
#define USB_EP_T_FIELD USB_CHEP_UTYPE
|
||||
#define USB_EPREG_MASK USB_CHEP_REG_MASK
|
||||
#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
|
||||
#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
|
||||
#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
|
||||
#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
|
||||
#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
|
||||
#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
|
||||
#define USB_EPRX_STAT USB_CH_RX_VALID
|
||||
#define USB_EPKIND_MASK USB_EP_KIND_MASK
|
||||
#define USB USB_DRD_FS
|
||||
#define USB_CNTR_FRES USB_CNTR_USBRST
|
||||
#define USB_CNTR_RESUME USB_CNTR_L2RES
|
||||
#define USB_ISTR_EP_ID USB_ISTR_IDN
|
||||
#define USB_EPADDR_FIELD USB_CHEP_ADDR
|
||||
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
#include "stm32h5xx.h"
|
||||
#define FSDEV_BUS_32BIT
|
||||
|
||||
#if !defined(USB_DRD_BASE) && defined(USB_DRD_FS_BASE)
|
||||
#define USB_DRD_BASE USB_DRD_FS_BASE
|
||||
#endif
|
||||
|
||||
#define FSDEV_PMA_SIZE (2048u)
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB_DRD_PMAADDR
|
||||
#define USB_TypeDef USB_DRD_TypeDef
|
||||
#define EP0R CHEP0R
|
||||
#define USB_EP_CTR_RX USB_EP_VTRX
|
||||
#define USB_EP_CTR_TX USB_EP_VTTX
|
||||
#define USB_EP_T_FIELD USB_CHEP_UTYPE
|
||||
#define USB_EPREG_MASK USB_CHEP_REG_MASK
|
||||
#define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
|
||||
#define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
|
||||
#define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
|
||||
#define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
|
||||
#define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
|
||||
#define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
|
||||
#define USB_EPRX_STAT USB_CH_RX_VALID
|
||||
#define USB_EPKIND_MASK USB_EP_KIND_MASK
|
||||
#define USB USB_DRD_FS
|
||||
#define USB_CNTR_FRES USB_CNTR_USBRST
|
||||
#define USB_CNTR_RESUME USB_CNTR_L2RES
|
||||
#define USB_ISTR_EP_ID USB_ISTR_IDN
|
||||
#define USB_EPADDR_FIELD USB_CHEP_ADDR
|
||||
#define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
|
||||
#define USB_CNTR_FSUSP USB_CNTR_SUSPEN
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||
#include "stm32wbxx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
/* ST provided header has incorrect value */
|
||||
#undef USB_PMAADDR
|
||||
#define USB_PMAADDR USB1_PMAADDR
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
|
||||
#include "stm32l4xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
|
||||
#include "stm32l5xx.h"
|
||||
#define FSDEV_PMA_SIZE (1024u)
|
||||
|
||||
#ifndef USB_PMAADDR
|
||||
#define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS))
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error You are using an untested or unimplemented STM32 variant. Please update the driver.
|
||||
// This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
|
||||
#endif
|
||||
|
||||
// This checks if the device has "LPM"
|
||||
#if defined(USB_ISTR_L1REQ)
|
||||
#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)
|
||||
#else
|
||||
#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
|
||||
#endif
|
||||
|
||||
#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
|
||||
USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
//
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#if TU_CHECK_MCU(OPT_MCU_STM32L1) && !defined(USBWakeUp_IRQn)
|
||||
#define USBWakeUp_IRQn USB_FS_WKUP_IRQn
|
||||
#endif
|
||||
|
||||
static const IRQn_Type fsdev_irq[] = {
|
||||
#if TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32L0, OPT_MCU_STM32L4)
|
||||
USB_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
|
||||
USB_HP_CAN1_TX_IRQn,
|
||||
USB_LP_CAN1_RX0_IRQn,
|
||||
USBWakeUp_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32F3
|
||||
// USB remap handles dcd functions
|
||||
USB_HP_CAN_TX_IRQn,
|
||||
USB_LP_CAN_RX0_IRQn,
|
||||
USBWakeUp_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
|
||||
#ifdef STM32G0B0xx
|
||||
USB_IRQn,
|
||||
#else
|
||||
USB_UCPD1_2_IRQn,
|
||||
#endif
|
||||
#elif TU_CHECK_MCU(OPT_MCU_STM32G4, OPT_MCU_STM32L1)
|
||||
USB_HP_IRQn,
|
||||
USB_LP_IRQn,
|
||||
USBWakeUp_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32H5
|
||||
USB_DRD_FS_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
|
||||
USB_FS_IRQn,
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_STM32WB
|
||||
USB_HP_IRQn,
|
||||
USB_LP_IRQn,
|
||||
#else
|
||||
#error Unknown arch in USB driver
|
||||
#endif
|
||||
};
|
||||
enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
|
||||
|
||||
void dcd_int_enable(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
|
||||
// forces write to RAM before allowing ISR to execute
|
||||
__DSB(); __ISB();
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F3 && defined(SYSCFG_CFGR1_USB_IT_RMP)
|
||||
// Some STM32F302/F303 devices allow to remap the USB interrupt vectors from
|
||||
// shared USB/CAN IRQs to separate CAN and USB IRQs.
|
||||
// This dynamically checks if this remap is active to enable the right IRQs.
|
||||
if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
|
||||
NVIC_EnableIRQ(USB_HP_IRQn);
|
||||
NVIC_EnableIRQ(USB_LP_IRQn);
|
||||
NVIC_EnableIRQ(USBWakeUp_RMP_IRQn);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
for (uint8_t i = 0; i < FSDEV_IRQ_NUM; i++) {
|
||||
NVIC_EnableIRQ(fsdev_irq[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_STM32F3 && defined(SYSCFG_CFGR1_USB_IT_RMP)
|
||||
// Some STM32F302/F303 devices allow to remap the USB interrupt vectors from
|
||||
// shared USB/CAN IRQs to separate CAN and USB IRQs.
|
||||
// This dynamically checks if this remap is active to enable the right IRQs.
|
||||
if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
|
||||
NVIC_DisableIRQ(USB_HP_IRQn);
|
||||
NVIC_DisableIRQ(USB_LP_IRQn);
|
||||
NVIC_DisableIRQ(USBWakeUp_RMP_IRQn);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
for (uint8_t i = 0; i < FSDEV_IRQ_NUM; i++) {
|
||||
NVIC_DisableIRQ(fsdev_irq[i]);
|
||||
}
|
||||
}
|
||||
|
||||
// CMSIS has a membar after disabling interrupts
|
||||
}
|
||||
|
||||
// Define only on MCU with internal pull-up. BSP can define on MCU without internal PU.
|
||||
#if defined(USB_BCDR_DPPU)
|
||||
|
||||
void dcd_disconnect(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
USB->BCDR &= ~(USB_BCDR_DPPU);
|
||||
}
|
||||
|
||||
void dcd_connect(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
USB->BCDR |= USB_BCDR_DPPU;
|
||||
}
|
||||
|
||||
#elif defined(SYSCFG_PMC_USB_PU) // works e.g. on STM32L151
|
||||
|
||||
void dcd_disconnect(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
SYSCFG->PMC &= ~(SYSCFG_PMC_USB_PU);
|
||||
}
|
||||
|
||||
void dcd_connect(uint8_t rhport) {
|
||||
(void)rhport;
|
||||
SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* TUSB_FSDEV_STM32_H */
|
||||
@ -1,17 +1,34 @@
|
||||
/**
|
||||
* @author MCD Application Team
|
||||
* Ha Thach (tinyusb.org)
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2024, hathach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
/** <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_DWC2_TYPES_H_
|
||||
|
||||
@ -27,8 +27,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
// Note: CH32 can have both USB FS and HS, only use this driver if CFG_TUD_MAX_SPEED is full speed
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBFS) && (CFG_TUD_MAX_SPEED == OPT_MODE_FULL_SPEED)
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBFS) && CFG_TUD_WCH_USBIP_USBFS
|
||||
|
||||
#include "device/dcd.h"
|
||||
#include "ch32_usbfs_reg.h"
|
||||
|
||||
@ -27,8 +27,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
// Note: CH32 can have both USB FS and HS, only use this driver if CFG_TUD_MAX_SPEED is high speed
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBHS) && (CFG_TUD_MAX_SPEED == OPT_MODE_HIGH_SPEED)
|
||||
#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_USBHS) && CFG_TUD_WCH_USBIP_USBHS
|
||||
#include "ch32_usbhs_reg.h"
|
||||
|
||||
#include "device/dcd.h"
|
||||
|
||||
@ -29,14 +29,12 @@
|
||||
|
||||
#include "common/tusb_compiler.h"
|
||||
|
||||
// Version is release as major.minor.revision eg 1.0.0. though there could be notable APIs before a new release.
|
||||
// For notable API changes within a release, we increase the build number.
|
||||
// Version is release as major.minor.revision eg 1.0.0
|
||||
#define TUSB_VERSION_MAJOR 0
|
||||
#define TUSB_VERSION_MINOR 16
|
||||
#define TUSB_VERSION_MINOR 17
|
||||
#define TUSB_VERSION_REVISION 0
|
||||
#define TUSB_VERSION_BUILD 3
|
||||
|
||||
#define TUSB_VERSION_NUMBER (TUSB_VERSION_MAJOR << 24 | TUSB_VERSION_MINOR << 16 | TUSB_VERSION_REVISION << 8 | TUSB_VERSION_BUILD)
|
||||
#define TUSB_VERSION_NUMBER (TUSB_VERSION_MAJOR * 10000 + TUSB_VERSION_MINOR * 100 + TUSB_VERSION_REVISION)
|
||||
#define TUSB_VERSION_STRING TU_STRING(TUSB_VERSION_MAJOR) "." TU_STRING(TUSB_VERSION_MINOR) "." TU_STRING(TUSB_VERSION_REVISION)
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
@ -207,19 +205,9 @@
|
||||
#define OPT_OS_RTTHREAD 6 ///< RT-Thread
|
||||
#define OPT_OS_RTX4 7 ///< Keil RTX 4
|
||||
|
||||
// Allow to use command line to change the config name/location
|
||||
#ifdef CFG_TUSB_CONFIG_FILE
|
||||
#include CFG_TUSB_CONFIG_FILE
|
||||
#else
|
||||
#include "tusb_config.h"
|
||||
#endif
|
||||
|
||||
#include "common/tusb_mcu.h"
|
||||
|
||||
//--------------------------------------------------------------------
|
||||
// RootHub Mode Configuration
|
||||
// CFG_TUSB_RHPORTx_MODE contains operation mode and speed for that port
|
||||
//--------------------------------------------------------------------
|
||||
//--------------------------------------------------------------------+
|
||||
// Mode and Speed
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// Low byte is operational mode
|
||||
#define OPT_MODE_NONE 0x0000 ///< Disabled
|
||||
@ -233,7 +221,24 @@
|
||||
#define OPT_MODE_HIGH_SPEED 0x0400 ///< High Speed
|
||||
#define OPT_MODE_SPEED_MASK 0xff00
|
||||
|
||||
//------------- Roothub as Device -------------//
|
||||
//--------------------------------------------------------------------+
|
||||
// Include tusb_config.h and tusb_mcu.h
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// Allow to use command line to change the config name/location
|
||||
#ifdef CFG_TUSB_CONFIG_FILE
|
||||
#include CFG_TUSB_CONFIG_FILE
|
||||
#else
|
||||
#include "tusb_config.h"
|
||||
#endif
|
||||
|
||||
#include "common/tusb_mcu.h"
|
||||
|
||||
//--------------------------------------------------------------------
|
||||
// RootHub Mode detection
|
||||
//--------------------------------------------------------------------
|
||||
|
||||
//------------- Root hub as Device -------------//
|
||||
|
||||
#if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_DEVICE)
|
||||
#define TUD_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE)
|
||||
@ -261,7 +266,7 @@
|
||||
// highspeed support indicator
|
||||
#define TUD_OPT_HIGH_SPEED (CFG_TUD_MAX_SPEED ? (CFG_TUD_MAX_SPEED & OPT_MODE_HIGH_SPEED) : TUP_RHPORT_HIGHSPEED)
|
||||
|
||||
//------------- Roothub as Host -------------//
|
||||
//------------- Root hub as Host -------------//
|
||||
|
||||
#if defined(CFG_TUSB_RHPORT0_MODE) && ((CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST)
|
||||
#define TUH_RHPORT_MODE (CFG_TUSB_RHPORT0_MODE)
|
||||
@ -367,6 +372,15 @@
|
||||
#define CFG_TUD_INTERFACE_MAX 16
|
||||
#endif
|
||||
|
||||
// default to max hardware endpoint, but can be smaller to save RAM
|
||||
#ifndef CFG_TUD_ENDPPOINT_MAX
|
||||
#define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX
|
||||
#endif
|
||||
|
||||
#if CFG_TUD_ENDPPOINT_MAX > TUP_DCD_ENDPOINT_MAX
|
||||
#error "CFG_TUD_ENDPPOINT_MAX must be less than or equal to TUP_DCD_ENDPOINT_MAX"
|
||||
#endif
|
||||
|
||||
// USB 2.0 compliance test mode support
|
||||
#ifndef CFG_TUD_TEST_MODE
|
||||
#define CFG_TUD_TEST_MODE 0
|
||||
@ -467,26 +481,26 @@
|
||||
#define CFG_TUH_CDC 0
|
||||
#endif
|
||||
|
||||
// FTDI is not part of CDC class, only to re-use CDC driver API
|
||||
#ifndef CFG_TUH_CDC_FTDI
|
||||
// FTDI is not part of CDC class, only to re-use CDC driver API
|
||||
#define CFG_TUH_CDC_FTDI 0
|
||||
#endif
|
||||
|
||||
// List of product IDs that can use the FTDI CDC driver. 0x0403 is FTDI's VID
|
||||
#ifndef CFG_TUH_CDC_FTDI_VID_PID_LIST
|
||||
// List of product IDs that can use the FTDI CDC driver. 0x0403 is FTDI's VID
|
||||
#define CFG_TUH_CDC_FTDI_VID_PID_LIST \
|
||||
{0x0403, 0x6001}, {0x0403, 0x6006}, {0x0403, 0x6010}, {0x0403, 0x6011}, \
|
||||
{0x0403, 0x6014}, {0x0403, 0x6015}, {0x0403, 0x8372}, {0x0403, 0xFBFA}, \
|
||||
{0x0403, 0xCD18}
|
||||
#endif
|
||||
|
||||
// CP210X is not part of CDC class, only to re-use CDC driver API
|
||||
#ifndef CFG_TUH_CDC_CP210X
|
||||
// CP210X is not part of CDC class, only to re-use CDC driver API
|
||||
#define CFG_TUH_CDC_CP210X 0
|
||||
#endif
|
||||
|
||||
// List of product IDs that can use the CP210X CDC driver. 0x10C4 is Silicon Labs' VID
|
||||
#ifndef CFG_TUH_CDC_CP210X_VID_PID_LIST
|
||||
// List of product IDs that can use the CP210X CDC driver. 0x10C4 is Silicon Labs' VID
|
||||
#define CFG_TUH_CDC_CP210X_VID_PID_LIST \
|
||||
{0x10C4, 0xEA60}, {0x10C4, 0xEA70}
|
||||
#endif
|
||||
@ -496,8 +510,8 @@
|
||||
#define CFG_TUH_CDC_CH34X 0
|
||||
#endif
|
||||
|
||||
// List of product IDs that can use the CH34X CDC driver
|
||||
#ifndef CFG_TUH_CDC_CH34X_VID_PID_LIST
|
||||
// List of product IDs that can use the CH34X CDC driver
|
||||
#define CFG_TUH_CDC_CH34X_VID_PID_LIST \
|
||||
{ 0x1a86, 0x5523 }, /* ch341 chip */ \
|
||||
{ 0x1a86, 0x7522 }, /* ch340k chip */ \
|
||||
|
||||
@ -7,9 +7,9 @@ from get_deps import deps_all
|
||||
TOP = Path(__file__).parent.parent.resolve()
|
||||
|
||||
|
||||
###########################################
|
||||
# -----------------------------------------
|
||||
# Dependencies
|
||||
###########################################
|
||||
# -----------------------------------------
|
||||
|
||||
def gen_deps_doc():
|
||||
deps_rst = Path(TOP) / "docs/reference/dependencies.rst"
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
import re
|
||||
import gen_doc
|
||||
|
||||
version = '0.16.0'
|
||||
|
||||
@ -46,4 +47,6 @@ with open(f_library_json, 'w') as f:
|
||||
# docs/info/changelog.rst
|
||||
###################
|
||||
|
||||
gen_doc.gen_deps_doc()
|
||||
|
||||
print("Update docs/info/changelog.rst")
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user