From 97f9321e1d94ddb4904dba0a472790a1189e53f2 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Fri, 3 Mar 2023 22:06:57 +0900 Subject: [PATCH 01/94] Add handling for bulk EPs --- src/class/video/video_device.c | 39 +++++++++++++++++++++------------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index d6e98602b..e03ca6b1f 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -680,24 +680,30 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint (video_probe_and_commit_control_t *)&stm->ep_buf; tu_memclr(param, sizeof(*param)); TU_LOG2(" done 0\n"); - return _update_streaming_parameters(stm, param); + if (!_update_streaming_parameters(stm, param)) + return false; + /* Open bulk endpoint if present. */ + for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) { + cur = _find_desc_ep(cur, end); + TU_ASSERT(cur < end); + tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur; + TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer); + TU_ASSERT(usbd_edpt_open(rhport, ep)); + stm->desc.ep[i] = (uint16_t)(cur - desc); + TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur)); + } + return true; } - /* Open endpoints of the new settings. */ + /* Open isochronous endpoints of the new settings. */ for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) { cur = _find_desc_ep(cur, end); TU_ASSERT(cur < end); tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur; - if (!stm->max_payload_transfer_size) { - video_probe_and_commit_control_t const *param = (video_probe_and_commit_control_t const*)&stm->ep_buf; - uint_fast32_t max_size = param->dwMaxPayloadTransferSize; - if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) && - (tu_edpt_packet_size(ep) < max_size)) - { - /* FS must be less than or equal to max packet size */ - return false; - } - /* Set the negotiated value */ - stm->max_payload_transfer_size = max_size; + uint_fast32_t max_size = stm->max_payload_transfer_size; + if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) && + (tu_edpt_packet_size(ep) < max_size)) { + /* FS must be less than or equal to max packet size */ + return false; } TU_ASSERT(usbd_edpt_open(rhport, ep)); stm->desc.ep[i] = (uint16_t) (cur - desc); @@ -982,9 +988,12 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, TU_VERIFY(sizeof(video_probe_and_commit_control_t) >= request->wLength, VIDEO_ERROR_UNKNOWN); TU_VERIFY(tud_control_xfer(rhport, request, self->ep_buf, sizeof(video_probe_and_commit_control_t)), VIDEO_ERROR_UNKNOWN); } else if (stage == CONTROL_STAGE_DATA) { - TU_VERIFY(_update_streaming_parameters(self, (video_probe_and_commit_control_t*)self->ep_buf), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE); + video_probe_and_commit_control_t *param = (video_probe_and_commit_control_t*)self->ep_buf; + TU_VERIFY(_update_streaming_parameters(self, param), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE); + /* Set the negotiated value */ + self->max_payload_transfer_size = param->dwMaxPayloadTransferSize; if (tud_video_commit_cb) { - return tud_video_commit_cb(self->index_vc, self->index_vs, (video_probe_and_commit_control_t*)self->ep_buf); + return tud_video_commit_cb(self->index_vc, self->index_vs, param); } } return VIDEO_ERROR_NONE; From 78732d6733fa75e6f8b25dc9e694d4d38e7b72ce Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Fri, 10 Mar 2023 22:51:49 +0900 Subject: [PATCH 02/94] Fix streaming interface handling --- src/class/video/video_device.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index e03ca6b1f..d53de2bac 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -709,11 +709,6 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint stm->desc.ep[i] = (uint16_t) (cur - desc); TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur)); } - /* initialize payload header */ - tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)stm->ep_buf; - hdr->bHeaderLength = sizeof(*hdr); - hdr->bmHeaderInfo = 0; - TU_LOG2(" done\n"); return true; } @@ -992,8 +987,15 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, TU_VERIFY(_update_streaming_parameters(self, param), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE); /* Set the negotiated value */ self->max_payload_transfer_size = param->dwMaxPayloadTransferSize; + int ret = VIDEO_ERROR_NONE; if (tud_video_commit_cb) { - return tud_video_commit_cb(self->index_vc, self->index_vs, param); + ret = tud_video_commit_cb(self->index_vc, self->index_vs, param); + } + if (VIDEO_ERROR_NONE == ret) { + /* initialize payload header */ + tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)self->ep_buf; + hdr->bHeaderLength = sizeof(*hdr); + hdr->bmHeaderInfo = 0; } } return VIDEO_ERROR_NONE; @@ -1166,6 +1168,7 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); uint_fast8_t bInCollection = vc->ctl.bInCollection; + videod_streaming_interface_t *default_stm = NULL; /* Find the end of the video interface descriptor */ void const *cur = _next_desc_itf(itf_desc, end); for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) { @@ -1183,7 +1186,9 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); cur = _next_desc_itf(cur, end); stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); + if (!default_stm) default_stm = stm; } + TU_VERIFY(_open_vs_itf(rhport, default_stm, 0), 0); self->len = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); return (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); } From e508831561da46cfd03e59876e4218aadd57855c Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Mon, 13 Mar 2023 22:50:31 +0900 Subject: [PATCH 03/94] Update handle streaming interface --- src/class/video/video_device.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index d53de2bac..8dd39242f 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -1168,7 +1168,6 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin tusb_desc_vc_itf_t const *vc = _get_desc_vc(self); uint_fast8_t bInCollection = vc->ctl.bInCollection; - videod_streaming_interface_t *default_stm = NULL; /* Find the end of the video interface descriptor */ void const *cur = _next_desc_itf(itf_desc, end); for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) { @@ -1186,9 +1185,16 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); cur = _next_desc_itf(cur, end); stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); - if (!default_stm) default_stm = stm; + if (0 == stm_idx && 1 == bInCollection) { + /* If there is only one streaming interface and no alternate settings, + * host may not issue set_interface so open the streaming interface here. */ + uint8_t const *sbeg = (uint8_t const*)itf_desc + stm->desc.beg; + uint8_t const *send = (uint8_t const*)itf_desc + stm->desc.end; + if (end == _find_desc_itf(sbeg, send, _desc_itfnum(sbeg), 1)) { + TU_VERIFY(_open_vs_itf(rhport, stm, 0), 0); + } + } } - TU_VERIFY(_open_vs_itf(rhport, default_stm, 0), 0); self->len = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); return (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); } @@ -1201,7 +1207,6 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_ int err; TU_VERIFY(request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE); uint_fast8_t itfnum = tu_u16_low(request->wIndex); - /* Identify which control interface to use */ uint_fast8_t itf; for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) { From 389babf20bcf77159a268bbdebd534bc7e1d1bb9 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Mon, 13 Mar 2023 22:51:21 +0900 Subject: [PATCH 04/94] Add descriptor for a bulk endpoint as a streaming endpoint --- .../device/video_capture/src/tusb_config.h | 3 ++ .../video_capture/src/usb_descriptors.c | 10 ++++ .../video_capture/src/usb_descriptors.h | 51 +++++++++++++++++++ 3 files changed, 64 insertions(+) diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h index e567ba669..274bf2b9c 100644 --- a/examples/device/video_capture/src/tusb_config.h +++ b/examples/device/video_capture/src/tusb_config.h @@ -100,6 +100,9 @@ // video streaming endpoint size #define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE 256 +// use bulk endpoint for streaming interface +#define CFG_TUD_VIDEO_STREAMING_BULK 0 + #ifdef __cplusplus } #endif diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index af18d15d1..f85e3cd8a 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -77,6 +77,8 @@ uint8_t const * tud_descriptor_device_cb(void) #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) #define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN) +#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK +#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN) #else #define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN) #endif @@ -84,7 +86,11 @@ uint8_t const * tud_descriptor_device_cb(void) #if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ... +#if 1 == CFG_TUD_VIDEO_STREAMING_BULK + #define EPNUM_VIDEO_IN 0x82 +#else #define EPNUM_VIDEO_IN 0x83 +#endif #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // nRF5x ISO can only be endpoint 8 @@ -105,6 +111,10 @@ uint8_t const desc_fs_configuration[] = TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN, FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) +#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK + TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN, + FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, + 64) #else TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN, FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index 93f148a82..7b7857246 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -79,6 +79,22 @@ enum { + 7/* Endpoint */\ ) +#define TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN (\ + TUD_VIDEO_DESC_IAD_LEN\ + /* control */\ + + TUD_VIDEO_DESC_STD_VC_LEN\ + + (TUD_VIDEO_DESC_CS_VC_LEN + 1/*bInCollection*/)\ + + TUD_VIDEO_DESC_CAMERA_TERM_LEN\ + + TUD_VIDEO_DESC_OUTPUT_TERM_LEN\ + /* Interface 1, Alternate 0 */\ + + TUD_VIDEO_DESC_STD_VS_LEN\ + + (TUD_VIDEO_DESC_CS_VS_IN_LEN + 1/*bNumFormats x bControlSize*/)\ + + TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ + + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ + + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN\ + + 7/* Endpoint */\ + ) + /* Windows support YUY2 and NV12 * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */ @@ -165,4 +181,39 @@ enum { /* EP */ \ TUD_VIDEO_DESC_EP_ISO(_epin, _epsize, 1) + +#define TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \ + TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ + /* Video control 0 */ \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ + /* wTotalLength - bLength */ \ + TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ + UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ + /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ + /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ + /* Video stream alt. 0 */ \ + TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ + /* Video stream header for without still image capture */ \ + TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ + /*wTotalLength - bLength */\ + TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\ + + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\ + + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ + /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ + /*bmaControls(1)*/0), \ + /* Video stream format */ \ + TUD_VIDEO_DESC_CS_VS_FMT_YUY2(/*bFormatIndex*/1, /*bNumFrameDescriptors*/1, \ + /*bDefaultFrameIndex*/1, 0, 0, 0, /*bCopyProtect*/0), \ + /* Video stream frame format */ \ + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(/*bFrameIndex */1, 0, _width, _height, \ + _width * _height * 16, _width * _height * 16 * _fps, \ + _width * _height * 16, \ + (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \ + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ + TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1) + #endif From 993b8d66861253408c1029bf98923ccba7317482 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Sat, 25 Mar 2023 22:13:20 +0900 Subject: [PATCH 05/94] Add state variable --- src/class/video/video_device.c | 68 +++++++++++++++++++++------------- 1 file changed, 42 insertions(+), 26 deletions(-) diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c index 8dd39242f..91f452afc 100644 --- a/src/class/video/video_device.c +++ b/src/class/video/video_device.c @@ -37,6 +37,10 @@ //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ +#define VS_STATE_PROBING 0 /* Configuration in progress */ +#define VS_STATE_COMMITTED 1 /* Ready for streaming or Streaming via bulk endpoint */ +#define VS_STATE_STREAMING 2 /* Streaming via isochronous endpoint */ + typedef struct { tusb_desc_interface_t std; tusb_desc_cs_video_ctl_itf_hdr_t ctl; @@ -102,6 +106,7 @@ typedef struct TU_ATTR_PACKED { uint32_t offset; /* offset for the next payload transfer */ uint32_t max_payload_transfer_size; uint8_t error_code;/* error code */ + uint8_t state; /* 0:probing 1:committed 2:streaming */ /*------------- From this point, data is not cleared by bus reset -------------*/ CFG_TUSB_MEM_ALIGN uint8_t ep_buf[CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE]; /* EP transfer buffer for streaming */ } videod_streaming_interface_t; @@ -639,6 +644,17 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t return true; } +static bool _init_vs_configuration(videod_streaming_interface_t *stm) +{ + /* initialize streaming settings */ + stm->state = VS_STATE_PROBING; + stm->max_payload_transfer_size = 0; + video_probe_and_commit_control_t *param = + (video_probe_and_commit_control_t *)&stm->ep_buf; + tu_memclr(param, sizeof(*param)); + return _update_streaming_parameters(stm, param); +} + /** Set the alternate setting to own video streaming interface. * * @param[in,out] stm Streaming interface context. @@ -672,43 +688,32 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint uint_fast8_t numeps = ((tusb_desc_interface_t const *)cur)->bNumEndpoints; TU_ASSERT(numeps <= TU_ARRAY_SIZE(stm->desc.ep)); - stm->desc.cur = (uint16_t) (cur - desc); /* Save the offset of the new settings */ - if (!altnum) { - /* initialize streaming settings */ - stm->max_payload_transfer_size = 0; - video_probe_and_commit_control_t *param = - (video_probe_and_commit_control_t *)&stm->ep_buf; - tu_memclr(param, sizeof(*param)); - TU_LOG2(" done 0\n"); - if (!_update_streaming_parameters(stm, param)) - return false; - /* Open bulk endpoint if present. */ - for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) { - cur = _find_desc_ep(cur, end); - TU_ASSERT(cur < end); - tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur; - TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer); - TU_ASSERT(usbd_edpt_open(rhport, ep)); - stm->desc.ep[i] = (uint16_t)(cur - desc); - TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur)); - } - return true; + stm->desc.cur = (uint16_t)(cur - desc); /* Save the offset of the new settings */ + if (!altnum && (VS_STATE_COMMITTED != stm->state)) { + TU_VERIFY(_init_vs_configuration(stm)); } - /* Open isochronous endpoints of the new settings. */ + /* Open bulk or isochronous endpoints of the new settings. */ for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) { cur = _find_desc_ep(cur, end); TU_ASSERT(cur < end); tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur; uint_fast32_t max_size = stm->max_payload_transfer_size; - if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) && - (tu_edpt_packet_size(ep) < max_size)) { - /* FS must be less than or equal to max packet size */ - return false; + if (altnum) { + if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) && + (tu_edpt_packet_size(ep) < max_size)) { + /* FS must be less than or equal to max packet size */ + return false; + } + } else { + TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer); } TU_ASSERT(usbd_edpt_open(rhport, ep)); stm->desc.ep[i] = (uint16_t) (cur - desc); TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur)); } + if (altnum) { + stm->state = VS_STATE_STREAMING; + } TU_LOG2(" done\n"); return true; } @@ -921,6 +926,10 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, break; case VIDEO_VS_CTL_PROBE: + if (self->state != VS_STATE_PROBING) { + self->state = VS_STATE_PROBING; + _init_vs_configuration(self); + } switch (request->bRequest) { case VIDEO_REQUEST_SET_CUR: if (stage == CONTROL_STAGE_SETUP) { @@ -992,6 +1001,10 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage, ret = tud_video_commit_cb(self->index_vc, self->index_vs, param); } if (VIDEO_ERROR_NONE == ret) { + self->state = VS_STATE_COMMITTED; + self->buffer = NULL; + self->bufsize = 0; + self->offset = 0; /* initialize payload header */ tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)self->ep_buf; hdr->bHeaderLength = sizeof(*hdr); @@ -1080,6 +1093,7 @@ bool tud_video_n_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) TU_ASSERT(stm_idx < CFG_TUD_VIDEO_STREAMING); videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx); if (!stm || !stm->desc.ep[0]) return false; + if (stm->state == VS_STATE_PROBING) return false; return true; } @@ -1090,6 +1104,7 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu if (!buffer || !bufsize) return false; videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx); if (!stm || !stm->desc.ep[0] || stm->buffer) return false; + if (stm->state == VS_STATE_PROBING) return false; /* Find EP address */ uint8_t const *desc = _videod_itf[stm->index_vc].beg; @@ -1185,6 +1200,7 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); cur = _next_desc_itf(cur, end); stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc); + stm->state = VS_STATE_PROBING; if (0 == stm_idx && 1 == bInCollection) { /* If there is only one streaming interface and no alternate settings, * host may not issue set_interface so open the streaming interface here. */ From 5ce60c5d207b9e7de419be6956164aebde14c3f2 Mon Sep 17 00:00:00 2001 From: kkitayam <45088311+kkitayam@users.noreply.github.com> Date: Sun, 26 Mar 2023 21:22:52 +0900 Subject: [PATCH 06/94] Add MJPEG descriptor for bulk transfer --- .../video_capture/src/usb_descriptors.c | 30 ++++++++--- .../video_capture/src/usb_descriptors.h | 52 +++++++++++++++++++ 2 files changed, 74 insertions(+), 8 deletions(-) diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index f85e3cd8a..9847cf7c5 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -76,11 +76,17 @@ uint8_t const * tud_descriptor_device_cb(void) //--------------------------------------------------------------------+ #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN) -#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN) +# if 1 == CFG_TUD_VIDEO_STREAMING_BULK +# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_BULK_LEN) +# else +# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN) +# endif #else -#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN) +# if 1 == CFG_TUD_VIDEO_STREAMING_BULK +# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN) +# else +# define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN) +# endif #endif #if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) @@ -108,17 +114,25 @@ uint8_t const desc_fs_configuration[] = // IAD for Video Control #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG) +# if 1 == CFG_TUD_VIDEO_STREAMING_BULK + TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(4, EPNUM_VIDEO_IN, + FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, + 64) +# else TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN, FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) -#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK - TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN, - FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, - 64) +# endif #else +# if 1 == CFG_TUD_VIDEO_STREAMING_BULK + TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN, + FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, + 64) +# else TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN, FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE, CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE) +# endif #endif }; diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h index 7b7857246..b924c8dbe 100644 --- a/examples/device/video_capture/src/usb_descriptors.h +++ b/examples/device/video_capture/src/usb_descriptors.h @@ -95,6 +95,22 @@ enum { + 7/* Endpoint */\ ) +#define TUD_VIDEO_CAPTURE_DESC_MJPEG_BULK_LEN (\ + TUD_VIDEO_DESC_IAD_LEN\ + /* control */\ + + TUD_VIDEO_DESC_STD_VC_LEN\ + + (TUD_VIDEO_DESC_CS_VC_LEN + 1/*bInCollection*/)\ + + TUD_VIDEO_DESC_CAMERA_TERM_LEN\ + + TUD_VIDEO_DESC_OUTPUT_TERM_LEN\ + /* Interface 1, Alternate 0 */\ + + TUD_VIDEO_DESC_STD_VS_LEN\ + + (TUD_VIDEO_DESC_CS_VS_IN_LEN + 1/*bNumFormats x bControlSize*/)\ + + TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ + + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ + + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN\ + + 7/* Endpoint */\ + ) + /* Windows support YUY2 and NV12 * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */ @@ -216,4 +232,40 @@ enum { TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1) +#define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \ + TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \ + /* Video control 0 */ \ + TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \ + TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \ + /* wTotalLength - bLength */ \ + TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \ + UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \ + TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\ + /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\ + /*wObjectiveFocalLength*/0, /*bmControls*/0), \ + TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \ + /* Video stream alt. 0 */ \ + TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \ + /* Video stream header for without still image capture */ \ + TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \ + /*wTotalLength - bLength */\ + TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\ + + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\ + + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\ + _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \ + /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \ + /*bmaControls(1)*/0), \ + /* Video stream format */ \ + TUD_VIDEO_DESC_CS_VS_FMT_MJPEG(/*bFormatIndex*/1, /*bNumFrameDescriptors*/1, \ + /*bmFlags*/0, /*bDefaultFrameIndex*/1, 0, 0, 0, /*bCopyProtect*/0), \ + /* Video stream frame format */ \ + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT(/*bFrameIndex */1, 0, _width, _height, \ + _width * _height * 16, _width * _height * 16 * _fps, \ + _width * _height * 16 / 8, \ + (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \ + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \ + /* EP */ \ + TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1) + + #endif From acfaa4494faccd615475e4ae9d3df940ed13d7af Mon Sep 17 00:00:00 2001 From: gitlab Date: Sun, 28 May 2023 15:40:01 +0100 Subject: [PATCH 07/94] Fixes bug in tuh_msc_ready --- src/class/msc/msc_host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 138443de4..d32c0adb0 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -118,7 +118,7 @@ bool tuh_msc_mounted(uint8_t dev_addr) bool tuh_msc_ready(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); - return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in); + return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in) && !usbh_edpt_busy(dev_addr, p_msc->ep_out); } //--------------------------------------------------------------------+ From 268ab5863a3437c804d6db0ea5dc9f90560e9ffc Mon Sep 17 00:00:00 2001 From: Aladdin Bakosh Date: Wed, 24 May 2023 14:08:42 +0200 Subject: [PATCH 08/94] fix(RA Host Portable): git rid of the IAR warnings for packed --- src/portable/renesas/rusb2/rusb2_type.h | 146 ++++++++++++------------ 1 file changed, 73 insertions(+), 73 deletions(-) diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h index 7a2898366..d80ecc62e 100644 --- a/src/portable/renesas/rusb2/rusb2_type.h +++ b/src/portable/renesas/rusb2/rusb2_type.h @@ -41,11 +41,11 @@ extern "C" { TU_ATTR_PACKED_BEGIN TU_ATTR_BIT_FIELD_ORDER_BEGIN -typedef struct TU_ATTR_PACKED { +typedef struct { union { volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 8; volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */ volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */ @@ -56,18 +56,18 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */ } N_b; }; } RUSB2_PIPE_TR_t; /* Size = 4 (0x4) */ /* LINK_REG Structure */ -typedef struct TU_ATTR_PACKED { +typedef struct { union { volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */ uint16_t : 2; volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */ @@ -85,7 +85,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */ uint16_t : 12; } BUSWAIT_b; @@ -94,7 +94,7 @@ typedef struct TU_ATTR_PACKED { union { volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t LNST : 2; /* [1..0] USB Data Line Status Monitor */ volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */ uint16_t : 2; @@ -109,7 +109,7 @@ typedef struct TU_ATTR_PACKED { union { volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */ uint16_t : 15; } PLLSTA_b; @@ -118,7 +118,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */ uint16_t : 1; volatile uint16_t UACT : 1; /* [4..4] USB Bus Enable */ @@ -137,7 +137,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t UTST : 4; /* [3..0] Test Mode */ uint16_t : 12; } TESTMODE_b; @@ -148,7 +148,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */ - struct { + struct TU_ATTR_PACKED { union { volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */ volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */ @@ -157,7 +157,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */ - struct { + struct TU_ATTR_PACKED { volatile const uint8_t RESERVED3; volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */ }; @@ -168,7 +168,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */ - struct { + struct TU_ATTR_PACKED { union { volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */ volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */ @@ -177,7 +177,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */ - struct { + struct TU_ATTR_PACKED { volatile const uint8_t RESERVED4; volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */ }; @@ -188,7 +188,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */ - struct { + struct TU_ATTR_PACKED { union { volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */ volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */ @@ -197,7 +197,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */ - struct { + struct TU_ATTR_PACKED { volatile const uint8_t RESERVED5; volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */ }; @@ -208,7 +208,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */ uint16_t : 1; volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */ @@ -225,12 +225,12 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ uint16_t : 1; volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ } CFIFOCTR_b; }; volatile const uint32_t RESERVED6; @@ -238,7 +238,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ uint16_t : 4; volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ @@ -254,19 +254,19 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ uint16_t : 1; volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ - volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ - volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ + volatile uint16_t BCLR : 1; /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */ + volatile uint16_t BVAL : 1; /* [15..15] Buffer Memory Valid Flag */ } D0FIFOCTR_b; }; union { volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */ uint16_t : 4; volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */ @@ -282,7 +282,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */ uint16_t : 1; volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */ @@ -294,7 +294,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */ - struct { + struct TU_ATTR_PACKED { uint16_t : 8; volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */ volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */ @@ -310,7 +310,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */ uint16_t : 3; volatile uint16_t SACKE : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */ @@ -329,7 +329,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */ volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */ volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */ @@ -347,7 +347,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */ volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */ volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */ @@ -365,7 +365,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */ volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */ volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */ @@ -383,7 +383,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 4; volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */ volatile uint16_t INTL : 1; /* [5..5] Interrupt Output Sense Select */ @@ -397,7 +397,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t DIRPD : 1; /* [0..0] Power-Down Control */ volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */ uint16_t : 1; @@ -415,7 +415,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t CTSQ : 3; /* [2..0] Control Transfer Stage */ volatile uint16_t VALID : 1; /* [3..3] USB Request Reception */ volatile const uint16_t DVSQ : 3; /* [6..4] Device State */ @@ -434,7 +434,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */ uint16_t : 3; volatile uint16_t SACK : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */ @@ -456,7 +456,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */ volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */ volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */ @@ -474,7 +474,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */ volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */ volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */ @@ -492,7 +492,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */ volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */ volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */ @@ -510,7 +510,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */ uint16_t : 3; volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */ @@ -521,7 +521,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */ uint16_t : 12; volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */ @@ -531,7 +531,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */ uint16_t : 1; volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */ @@ -543,7 +543,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */ volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */ } USBREQ_b; @@ -552,7 +552,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */ } USBVAL_b; }; @@ -560,7 +560,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */ } USBINDX_b; }; @@ -568,7 +568,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */ } USBLENG_b; }; @@ -576,7 +576,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 4; volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ uint16_t : 2; @@ -589,7 +589,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */ uint16_t : 5; volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ @@ -599,7 +599,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PID : 2; /* [1..0] Response PID */ volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */ uint16_t : 2; @@ -619,7 +619,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */ uint16_t : 12; } PIPESEL_b; @@ -629,7 +629,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */ volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */ uint16_t : 2; @@ -646,7 +646,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */ uint16_t : 3; volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */ @@ -656,7 +656,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */ uint16_t : 9; volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */ @@ -667,7 +667,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t PID : 2; /* [1..0] Response PID */ uint16_t : 3; volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */ @@ -691,7 +691,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t RPDME0 : 1; /* [0..0] D- Pin Pull-Down Control */ volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */ volatile uint16_t @@ -713,7 +713,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */ uint16_t : 15; } UCKSEL_b; @@ -724,7 +724,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */ uint16_t : 6; volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */ @@ -736,7 +736,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 6; volatile uint16_t USBSPD : 2; /* [7..6] Transfer Speed of Communication Target Device */ volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */ @@ -749,7 +749,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */ - struct { + struct TU_ATTR_PACKED { volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */ volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */ volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */ @@ -762,7 +762,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 7; volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */ uint16_t : 8; @@ -772,7 +772,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */ - struct { + struct TU_ATTR_PACKED { uint16_t : 14; volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */ uint16_t : 1; @@ -783,7 +783,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t IDPSRCE : 1; /* [0..0] IDPSRC Control */ volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */ volatile uint16_t VDPSRCE : 1; /* [2..2] VDPSRC Control */ @@ -801,7 +801,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */ volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */ volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */ @@ -816,7 +816,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */ - struct { + struct TU_ATTR_PACKED { uint16_t : 8; volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */ volatile uint16_t RWEMON : 1; /* [12..12] RWE Value Monitor */ @@ -827,8 +827,8 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */ - struct { - volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ + struct TU_ATTR_PACKED { + volatile uint16_t L1REQ : 1; /* [0..0] L1 Transition Request */ volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */ uint16_t : 13; } HL1CTRL1_b; @@ -837,7 +837,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */ - struct { + struct TU_ATTR_PACKED { volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */ uint16_t : 4; volatile uint16_t HIRD : 4; /* [11..8] LPM Token HIRD */ @@ -851,7 +851,7 @@ typedef struct TU_ATTR_PACKED { union { volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */ - struct { + struct TU_ATTR_PACKED { uint32_t : 20; volatile const uint32_t DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */ volatile const uint32_t DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */ @@ -864,7 +864,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */ - struct { + struct TU_ATTR_PACKED { uint32_t : 4; volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */ volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */ @@ -882,7 +882,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */ - struct { + struct TU_ATTR_PACKED { volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */ volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */ uint16_t : 2; @@ -898,8 +898,8 @@ typedef struct TU_ATTR_PACKED { union { volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */ - struct { - volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ + struct TU_ATTR_PACKED { + volatile uint16_t FIXPHY : 1; /* [0..0] USB Transceiver Control Fix */ volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */ uint16_t : 14; } DPUSRCR_b; @@ -910,7 +910,7 @@ typedef struct TU_ATTR_PACKED { volatile uint32_t DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */ - struct { + struct TU_ATTR_PACKED { volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */ volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */ uint32_t : 1; @@ -931,7 +931,7 @@ typedef struct TU_ATTR_PACKED { union { volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */ - struct { + struct TU_ATTR_PACKED { volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */ volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */ uint32_t : 2; From f6a45a7aab42264fc9c270150549cd4c4a54292e Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 5 Jun 2023 15:41:35 +0700 Subject: [PATCH 09/94] clean up --- .idea/runConfigurations/stm32g474_jlink.xml | 10 +++++ hw/bsp/board.c | 11 ++--- hw/bsp/family_support.cmake | 17 ++++--- hw/bsp/stm32g4/family.c | 50 ++++++++++++--------- src/CMakeLists.txt | 4 -- 5 files changed, 55 insertions(+), 37 deletions(-) create mode 100644 .idea/runConfigurations/stm32g474_jlink.xml diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml new file mode 100644 index 000000000..45a755da4 --- /dev/null +++ b/.idea/runConfigurations/stm32g474_jlink.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 66ffcb199..3f62547a0 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -39,7 +39,7 @@ #define sys_read _read #endif -#if defined(LOGGER_RTT) +#if defined(LOGGER_RTT) || defined(LOGGER_rtt) // Logging with RTT // If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead @@ -62,7 +62,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count) #endif -#elif defined(LOGGER_SWO) +#elif defined(LOGGER_SWO) || defined(LOGGER_swo) // Logging with SWO for ARM Cortex #include "board_mcu.h" @@ -71,11 +71,12 @@ TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count) { (void) fhdl; uint8_t const* buf8 = (uint8_t const*) buf; - for(size_t i=0; i.map" ) endif() + + # LOGGER + if (DEFINED LOGGER) + target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) + endif () + endfunction() @@ -136,12 +142,11 @@ function(family_add_tinyusb TARGET OPT_MCU) set(TINYUSB_TARGET_PREFIX ${TARGET}-) add_library(${TARGET}-tinyusb_config INTERFACE) - target_include_directories(${TARGET}-tinyusb_config INTERFACE - ${CMAKE_CURRENT_SOURCE_DIR}/src - ) - target_compile_definitions(${TARGET}-tinyusb_config INTERFACE - CFG_TUSB_MCU=${OPT_MCU} - ) + target_include_directories(${TARGET}-tinyusb_config INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/src) + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_MCU=${OPT_MCU}) + if (DEFINED LOG) + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG}) + endif() # tinyusb's CMakeList.txt add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 3b490e9b3..19ba415bc 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -79,32 +79,35 @@ void board_init(void) NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitTypeDef gpio_init; // LED - GPIO_InitStruct.Pin = LED_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); + memset(&gpio_init, 0, sizeof(gpio_init)); + gpio_init.Pin = LED_PIN; + gpio_init.Mode = GPIO_MODE_OUTPUT_PP; + gpio_init.Pull = GPIO_PULLUP; + gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &gpio_init); board_led_write(false); // Button - GPIO_InitStruct.Pin = BUTTON_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); + memset(&gpio_init, 0, sizeof(gpio_init)); + gpio_init.Pin = BUTTON_PIN; + gpio_init.Mode = GPIO_MODE_INPUT; + gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; + gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &gpio_init); #ifdef UART_DEV // UART - GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Alternate = UART_GPIO_AF; - HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); + memset(&gpio_init, 0, sizeof(gpio_init)); + gpio_init.Pin = UART_TX_PIN | UART_RX_PIN; + gpio_init.Mode = GPIO_MODE_AF_PP; + gpio_init.Pull = GPIO_PULLUP; + gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; + gpio_init.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init); UartHandle = (UART_HandleTypeDef){ .Instance = UART_DEV, @@ -121,15 +124,18 @@ void board_init(void) // USB Pins TODO double check USB clock and pin setup // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. - GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + memset(&gpio_init, 0, sizeof(gpio_init)); + gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + gpio_init.Mode = GPIO_MODE_INPUT; + gpio_init.Pull = GPIO_NOPULL; + gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &gpio_init); __HAL_RCC_USB_CLK_ENABLE(); board_vbus_sense_init(); + + // USB PD } //--------------------------------------------------------------------+ diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 09f41c9ab..3dbd72d61 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -98,7 +98,3 @@ endif() target_link_libraries(${TINYUSB_TARGET} PUBLIC ${TINYUSB_CONFIG_TARGET} ) - -# export target name -# set(TINYUSB_TARGET ${TINYUSB_TARGET} PARENT_SCOPE) -# set(TINYUSB_CONFIG_TARGET ${TINYUSB_CONFIG_TARGET} PARENT_SCOPE) From a70978e05790cf744e777fd3e50f271fc3fffd1f Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 5 Jun 2023 19:53:40 +0700 Subject: [PATCH 10/94] clean up --- hw/bsp/board.c | 4 ++-- hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 2 ++ hw/bsp/stm32g4/family.c | 1 + hw/bsp/stm32g4/family.cmake | 2 +- 4 files changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/bsp/board.c b/hw/bsp/board.c index 3f62547a0..7804a18e0 100644 --- a/hw/bsp/board.c +++ b/hw/bsp/board.c @@ -39,7 +39,7 @@ #define sys_read _read #endif -#if defined(LOGGER_RTT) || defined(LOGGER_rtt) +#if defined(LOGGER_RTT) // Logging with RTT // If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead @@ -62,7 +62,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count) #endif -#elif defined(LOGGER_SWO) || defined(LOGGER_swo) +#elif defined(LOGGER_SWO) // Logging with SWO for ARM Cortex #include "board_mcu.h" diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 5d936d009..21d4e459b 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -57,6 +57,8 @@ //--------------------------------------------------------------------+ // RCC Clock //--------------------------------------------------------------------+ + +// CPU Frequency (Core Clock) is 170MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 19ba415bc..030abe0d0 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -136,6 +136,7 @@ void board_init(void) board_vbus_sense_init(); // USB PD + } //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index ab17c0980..2c10a9769 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -109,7 +109,7 @@ function(family_configure_example TARGET) # Flashing family_flash_stlink(${TARGET}) - #family_flash_jlink(${TARGET}) + family_flash_jlink(${TARGET}) endfunction() From b3fda4a35433a4102743ea9719e2323e4076ff34 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 6 Jun 2023 23:55:33 +0700 Subject: [PATCH 11/94] able to get usbpd irq handler - handle cc1, cc2 voltage changes - get order set, rx message end interrupt - add segger rtt support for cmake --- hw/bsp/family_support.cmake | 15 ++ hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 22 +-- hw/bsp/stm32g4/family.c | 183 +++++++++++++++++--- src/common/tusb_types.h | 13 ++ 4 files changed, 196 insertions(+), 37 deletions(-) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 2c0ee95d6..e9b4f2fdb 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -97,6 +97,18 @@ function(family_initialize_project PROJECT DIR) endfunction() +# Add segger rtt to example +function(family_add_segger_rtt TARGET) + if (NOT TARGET segger_rtt) + add_library(segger_rtt STATIC + ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + ) + target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) + endif() + + target_link_libraries(${TARGET} PUBLIC segger_rtt) +endfunction() + #------------------------------------ # Main target configure #------------------------------------ @@ -119,6 +131,9 @@ function(family_configure_common TARGET) # LOGGER if (DEFINED LOGGER) target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + family_add_segger_rtt(${TARGET}) + endif () endif () endfunction() diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 21d4e459b..b1a98ba97 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -58,7 +58,7 @@ // RCC Clock //--------------------------------------------------------------------+ -// CPU Frequency (Core Clock) is 170MHz +// CPU Frequency (Core Clock) is 150MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; @@ -68,16 +68,16 @@ static inline void board_clock_init(void) HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); /* Activate PLL with HSI as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; - RCC_OscInitStruct.PLL.PLLN = 85; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 75; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); // Initializes the CPU, AHB and APB buses clocks @@ -87,7 +87,7 @@ static inline void board_clock_init(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8); + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); //------------- HSI48 and CRS for USB -------------// RCC_OscInitTypeDef osc_hsi48 = {0}; diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 030abe0d0..8b17c0643 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -25,9 +25,127 @@ */ #include "stm32g4xx_hal.h" +#include "stm32g4xx_ll_bus.h" + #include "bsp/board.h" #include "board.h" + +//--------------------------------------------------------------------+ +// USB PD +//--------------------------------------------------------------------+ + +void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { + (void) port_num; + + // Initialization phase: CFG1 + UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | + ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // General programming sequence (with UCPD configured then enabled) + if (port_type == TUSB_TYPEC_PORT_SNK) { + // Enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + + // Read Voltage State on CC1 & CC2 fore initial state + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1_INT(vstate_cc[0]); + TU_LOG1_INT(vstate_cc[1]); + + // Enable CC1 & CC2 Interrupt + UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; + } + + // Enable interrupt + //NVIC_SetPriority(UCPD1_IRQn, 0); +// NVIC_EnableIRQ(UCPD1_IRQn); +} + +uint8_t pd_rx_buf[262]; +uint32_t pd_rx_count = 0; + +void UCPD1_IRQHandler(void) { + uint32_t sr = UCPD1->SR; + sr &= UCPD1->IMR; + + TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); + + if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + + uint32_t cr = UCPD1->CR; + + if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { + TU_LOG1("Attach CC1\n"); + cr &= ~UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { + TU_LOG1("Attach CC2\n"); + cr |= UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else { + TU_LOG1("Detach\n"); + cr &= ~UCPD_CR_PHYRXEN; + } + + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | + UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + + // Enable PD RX + UCPD1->CR = cr; + + // ack + UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; + } + + if (sr & UCPD_SR_RXORDDET) { + // SOP: Start of Packet + // TODO DMA later + uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + TU_LOG1_HEX(order_set); + + // ack + UCPD1->ICR = UCPD_ICR_RXORDDETCF; + } + + if ( sr & UCPD_SR_RXMSGEND) { + // End of message +// uint32_t payload_size = UCPD1->RX_PAYSZ; +// TU_LOG1_HEX(payload_size); +// +// for(uint32_t i=0; iRXDR; +// +// TU_LOG1("0x%02X ", pd_rx_buf[i]); +// } +// TU_LOG1("\n"); + + // ack + UCPD1->ICR = UCPD_ICR_RXMSGENDCF; + } + +// if (sr & UCPD_SR_RXNE) { +// uint8_t data = UCPD1->RXDR; +// pd_rx_buf[pd_rx_count++] = data; +// TU_LOG1_HEX(data); +// } + +// else { +// TU_LOG_LOCATION(); +// } +} + //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ @@ -79,35 +197,35 @@ void board_init(void) NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - GPIO_InitTypeDef gpio_init; + GPIO_InitTypeDef GPIO_InitStruct; // LED - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = LED_PIN; - gpio_init.Mode = GPIO_MODE_OUTPUT_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); board_led_write(false); // Button - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = BUTTON_PIN; - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(BUTTON_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); #ifdef UART_DEV // UART - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = UART_TX_PIN | UART_RX_PIN; - gpio_init.Mode = GPIO_MODE_AF_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - gpio_init.Alternate = UART_GPIO_AF; - HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); UartHandle = (UART_HandleTypeDef){ .Instance = UART_DEV, @@ -124,18 +242,31 @@ void board_init(void) // USB Pins TODO double check USB clock and pin setup // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = GPIO_NOPULL; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(GPIOA, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); __HAL_RCC_USB_CLK_ENABLE(); board_vbus_sense_init(); +#if 0 // USB PD + /* PWR register access (for disabling dead battery feature) */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); + + __HAL_RCC_UCPD1_CLK_ENABLE(); + + // Default CC1/CC2 is PB4/PB6 + // PB4 ------> UCPD1_CC2 + // PB6 ------> UCPD1_CC1 + + usbpd_init(0, TUSB_TYPEC_PORT_SNK); +#endif } diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 39a2d4564..7b82c51d9 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -232,6 +232,19 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ typedef enum { XFER_RESULT_SUCCESS = 0, From 23f7130ae47b6cbb11e1fffcb3d5e75a5417ef78 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 00:07:58 +0700 Subject: [PATCH 12/94] update rtt to rev 25842 --- .../{RTT => Config}/SEGGER_RTT_Conf.h | 140 +++-- lib/SEGGER_RTT/LICENSE.md | 36 ++ lib/SEGGER_RTT/License.txt | 34 -- lib/SEGGER_RTT/README.md | 24 + lib/SEGGER_RTT/README.txt | 20 - lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 427 +++++++++------ lib/SEGGER_RTT/RTT/SEGGER_RTT.h | 231 ++++++-- lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S | 7 + lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c | 500 ------------------ .../Syscalls/SEGGER_RTT_Syscalls_GCC.c | 120 ----- .../Syscalls/SEGGER_RTT_Syscalls_IAR.c | 115 ---- .../Syscalls/SEGGER_RTT_Syscalls_KEIL.c | 386 -------------- .../Syscalls/SEGGER_RTT_Syscalls_SES.c | 247 --------- 13 files changed, 617 insertions(+), 1670 deletions(-) rename lib/SEGGER_RTT/{RTT => Config}/SEGGER_RTT_Conf.h (69%) create mode 100644 lib/SEGGER_RTT/LICENSE.md delete mode 100644 lib/SEGGER_RTT/License.txt create mode 100644 lib/SEGGER_RTT/README.md delete mode 100644 lib/SEGGER_RTT/README.txt delete mode 100644 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h b/lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h similarity index 69% rename from lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h rename to lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h index fda5a5f51..3ac38dcf1 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h +++ b/lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h @@ -3,7 +3,7 @@ * The Embedded Experts * ********************************************************************** * * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* (c) 1995 - 2020 SEGGER Microcontroller GmbH * * * * www.segger.com Support: support@segger.com * * * @@ -46,7 +46,7 @@ File : SEGGER_RTT_Conf.h Purpose : Implementation of SEGGER real-time transfer (RTT) which allows real-time communication on targets which support debugger memory accesses while the CPU is running. -Revision: $Rev: 18601 $ +Revision: $Rev: 24316 $ */ @@ -63,10 +63,25 @@ Revision: $Rev: 18601 $ * ********************************************************************** */ + +// +// Take in and set to correct values for Cortex-A systems with CPU cache +// +//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system +//#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached +// +// Most common case: +// Up-channel 0: RTT +// Up-channel 1: SystemView +// #ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3) #endif - +// +// Most common case: +// Down-channel 0: RTT +// Down-channel 1: SystemView +// #ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3) #endif @@ -135,18 +150,18 @@ Revision: $Rev: 18601 $ #if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ + unsigned int _SEGGER_RTT__LockState; \ __asm volatile ("mrs %0, primask \n\t" \ - "movs r1, $1 \n\t" \ + "movs r1, #1 \n\t" \ "msr primask, r1 \n\t" \ - : "=r" (LockState) \ + : "=r" (_SEGGER_RTT__LockState) \ : \ - : "r1" \ + : "r1", "cc" \ ); #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ : \ - : "r" (LockState) \ + : "r" (_SEGGER_RTT__LockState) \ : \ ); \ } @@ -155,32 +170,32 @@ Revision: $Rev: 18601 $ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) #endif #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ + unsigned int _SEGGER_RTT__LockState; \ __asm volatile ("mrs %0, basepri \n\t" \ "mov r1, %1 \n\t" \ "msr basepri, r1 \n\t" \ - : "=r" (LockState) \ + : "=r" (_SEGGER_RTT__LockState) \ : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ - : "r1" \ + : "r1", "cc" \ ); #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ : \ - : "r" (LockState) \ + : "r" (_SEGGER_RTT__LockState) \ : \ ); \ } - #elif defined(__ARM_ARCH_7A__) + #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ + unsigned int _SEGGER_RTT__LockState; \ __asm volatile ("mrs r1, CPSR \n\t" \ "mov %0, r1 \n\t" \ "orr r1, r1, #0xC0 \n\t" \ "msr CPSR_c, r1 \n\t" \ - : "=r" (LockState) \ + : "=r" (_SEGGER_RTT__LockState) \ : \ - : "r1" \ + : "r1", "cc" \ ); #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ @@ -190,17 +205,17 @@ Revision: $Rev: 18601 $ "orr r1, r1, r0 \n\t" \ "msr CPSR_c, r1 \n\t" \ : \ - : "r" (LockState) \ - : "r0", "r1" \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ ); \ } #elif defined(__riscv) || defined(__riscv_xlen) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ + unsigned int _SEGGER_RTT__LockState; \ __asm volatile ("csrr %0, mstatus \n\t" \ "csrci mstatus, 8 \n\t" \ "andi %0, %0, 8 \n\t" \ - : "=r" (LockState) \ + : "=r" (_SEGGER_RTT__LockState) \ : \ : \ ); @@ -209,7 +224,7 @@ Revision: $Rev: 18601 $ "or %0, %0, a1 \n\t" \ "csrs mstatus, %0 \n\t" \ : \ - : "r" (LockState) \ + : "r" (_SEGGER_RTT__LockState) \ : "a1" \ ); \ } @@ -227,11 +242,11 @@ Revision: $Rev: 18601 $ #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ - LockState = __get_PRIMASK(); \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ __set_PRIMASK(1); - #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \ + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ } #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ @@ -241,12 +256,36 @@ Revision: $Rev: 18601 $ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) #endif #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ - LockState = __get_BASEPRI(); \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_BASEPRI(); \ __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); - #define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \ + #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ } + #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ + (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) + #define SEGGER_RTT_LOCK() { \ + unsigned int _SEGGER_RTT__LockState; \ + __asm volatile ("mrs r1, CPSR \n\t" \ + "mov %0, r1 \n\t" \ + "orr r1, r1, #0xC0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : "=r" (_SEGGER_RTT__LockState) \ + : \ + : "r1", "cc" \ + ); + + #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ + "mrs r1, CPSR \n\t" \ + "bic r1, r1, #0xC0 \n\t" \ + "and r0, r0, #0xC0 \n\t" \ + "orr r1, r1, r0 \n\t" \ + "msr CPSR_c, r1 \n\t" \ + : \ + : "r" (_SEGGER_RTT__LockState) \ + : "r0", "r1", "cc" \ + ); \ + } #endif #endif @@ -256,11 +295,11 @@ Revision: $Rev: 18601 $ */ #ifdef __ICCRX__ #define SEGGER_RTT_LOCK() { \ - unsigned long LockState; \ - LockState = __get_interrupt_state(); \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ __disable_interrupt(); - #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \ + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ } #endif @@ -270,11 +309,11 @@ Revision: $Rev: 18601 $ */ #ifdef __ICCRL78__ #define SEGGER_RTT_LOCK() { \ - __istate_t LockState; \ - LockState = __get_interrupt_state(); \ + __istate_t _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_interrupt_state(); \ __disable_interrupt(); - #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \ + #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ } #endif @@ -285,13 +324,13 @@ Revision: $Rev: 18601 $ #ifdef __CC_ARM #if (defined __TARGET_ARCH_6S_M) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ - register unsigned char PRIMASK __asm( "primask"); \ - LockState = PRIMASK; \ - PRIMASK = 1u; \ + unsigned int _SEGGER_RTT__LockState; \ + register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ + _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ + _SEGGER_RTT__PRIMASK = 1u; \ __schedule_barrier(); - #define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \ + #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ __schedule_barrier(); \ } #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) @@ -299,13 +338,13 @@ Revision: $Rev: 18601 $ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) #endif #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ + unsigned int _SEGGER_RTT__LockState; \ register unsigned char BASEPRI __asm( "basepri"); \ - LockState = BASEPRI; \ + _SEGGER_RTT__LockState = BASEPRI; \ BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ __schedule_barrier(); - #define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \ + #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ __schedule_barrier(); \ } #endif @@ -318,21 +357,21 @@ Revision: $Rev: 18601 $ #ifdef __TI_ARM__ #if defined (__TI_ARM_V6M0__) #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ - LockState = __get_PRIMASK(); \ + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = __get_PRIMASK(); \ __set_PRIMASK(1); - #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \ + #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ } #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) #endif #define SEGGER_RTT_LOCK() { \ - unsigned int LockState; \ - LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); + unsigned int _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); - #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(LockState); \ + #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ } #endif #endif @@ -342,12 +381,13 @@ Revision: $Rev: 18601 $ * RTT lock configuration for CCRX */ #ifdef __RX + #include #define SEGGER_RTT_LOCK() { \ - unsigned long LockState; \ - LockState = get_psw() & 0x010000; \ + unsigned long _SEGGER_RTT__LockState; \ + _SEGGER_RTT__LockState = get_psw() & 0x010000; \ clrpsw_i(); - #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | LockState); \ + #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ } #endif diff --git a/lib/SEGGER_RTT/LICENSE.md b/lib/SEGGER_RTT/LICENSE.md new file mode 100644 index 000000000..14881c29b --- /dev/null +++ b/lib/SEGGER_RTT/LICENSE.md @@ -0,0 +1,36 @@ + + SEGGER Microcontroller GmbH + The Embedded Experts + + (c) 1995 - 2021 SEGGER Microcontroller GmbH + www.segger.com Support: support@segger.com + + SEGGER RTT Real Time Transfer for embedded targets + + + All rights reserved. + + SEGGER strongly recommends to not make any changes + to or modify the source code of this software in order to stay + compatible with the RTT protocol and J-Link. + + Redistribution and use in source and binary forms, with or + without modification, are permitted provided that the following + condition is met: + + - Redistributions of source code must retain the above copyright + notice, this condition and the following disclaimer. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR + ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH + DAMAGE. diff --git a/lib/SEGGER_RTT/License.txt b/lib/SEGGER_RTT/License.txt deleted file mode 100644 index e1f5f89ff..000000000 --- a/lib/SEGGER_RTT/License.txt +++ /dev/null @@ -1,34 +0,0 @@ -Important - Read carefully: - -SEGGER RTT - Real Time Transfer for embedded targets - -All rights reserved. - -SEGGER strongly recommends to not make any changes -to or modify the source code of this software in order to stay -compatible with the RTT protocol and J-Link. - -Redistribution and use in source and binary forms, with or -without modification, are permitted provided that the following -condition is met: - -o Redistributions of source code must retain the above copyright - notice, this condition and the following disclaimer. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND -CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, -INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR -ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT -OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; -OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE -USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH -DAMAGE. - - -(c) 2014 - 2016 SEGGER Microcontroller GmbH -www.segger.com diff --git a/lib/SEGGER_RTT/README.md b/lib/SEGGER_RTT/README.md new file mode 100644 index 000000000..06349d248 --- /dev/null +++ b/lib/SEGGER_RTT/README.md @@ -0,0 +1,24 @@ +RTT +=== + +SEGGER RTT Sources + +https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer +https://wiki.segger.com/RTT + +## Included files + + * `RTT/` + * `SEGGER_RTT.c` - Main module for RTT. + * `SEGGER_RTT.h` - Main header for RTT. + * `SEGGER_RTT_ASM_ARMv7M.S` - Assembly-optimized implementation of RTT functions for ARMv7M processors. + * `SEGGER_RTT_Printf.c` - Simple implementation of printf (`SEGGER_RTT_Printf()`) to write formatted strings via RTT. + * `Syscalls/` + * `SEGGER_RTT_Syscalls_*.c` - Low-level syscalls to retarget `printf()` to RTT with different toolchains. + * `Config/` + * `SEGGER_RTT_Conf.h` - RTT configuration file. + * `Examples/` + * `Main_RTT_InputEchoApp.c` - Example application which echoes input on Channel 0. + * `Main_RTT_MenuApp.c` - Example application to demonstrate RTT bi-directional functionality. + * `Main_RTT_PrintfTest.c` - Example application to test RTT's simple printf implementation. + * `Main_RTT_SpeedTestApp.c` - Example application to measure RTT performance. (Requires embOS) diff --git a/lib/SEGGER_RTT/README.txt b/lib/SEGGER_RTT/README.txt deleted file mode 100644 index 49ec655c4..000000000 --- a/lib/SEGGER_RTT/README.txt +++ /dev/null @@ -1,20 +0,0 @@ -README.txt for the SEGGER RTT Implementation Pack. - -Included files: -=============== -Root Directory - - Examples - - Main_RTT_InputEchoApp.c - Sample application which echoes input on Channel 0. - - Main_RTT_MenuApp.c - Sample application to demonstrate RTT bi-directional functionality. - - Main_RTT_PrintfTest.c - Sample application to test RTT small printf implementation. - - Main_RTT_SpeedTestApp.c - Sample application for measuring RTT performance. embOS needed. - - RTT - - SEGGER_RTT.c - The RTT implementation. - - SEGGER_RTT.h - Header for RTT implementation. - - SEGGER_RTT_Conf.h - Pre-processor configuration for the RTT implementation. - - SEGGER_RTT_Printf.c - Simple implementation of printf to write formatted strings via RTT. - - Syscalls - - RTT_Syscalls_GCC.c - Low-level syscalls to retarget printf() to RTT with GCC / Newlib. - - RTT_Syscalls_IAR.c - Low-level syscalls to retarget printf() to RTT with IAR compiler. - - RTT_Syscalls_KEIL.c - Low-level syscalls to retarget printf() to RTT with KEIL/uVision compiler. - - RTT_Syscalls_SES.c - Low-level syscalls to retarget printf() to RTT with SEGGER Embedded Studio. diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c index c8de8e0f3..895085ba2 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c @@ -46,7 +46,7 @@ File : SEGGER_RTT.c Purpose : Implementation of SEGGER real-time transfer (RTT) which allows real-time communication on targets which support debugger memory accesses while the CPU is running. -Revision: $Rev: 17697 $ +Revision: $Rev: 29668 $ Additional information: Type "int" is assumed to be 32-bits in size @@ -80,6 +80,27 @@ Additional information: ********************************************************************** */ +#if SEGGER_RTT_CPU_CACHE_LINE_SIZE + #ifdef SEGGER_RTT_CB_ALIGN + #error "Custom SEGGER_RTT_CB_ALIGN() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif + #ifdef SEGGER_RTT_BUFFER_ALIGN + #error "Custom SEGGER_RTT_BUFFER_ALIGN() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif + #ifdef SEGGER_RTT_PUT_CB_SECTION + #error "Custom SEGGER_RTT_PUT_CB_SECTION() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif + #ifdef SEGGER_RTT_PUT_BUFFER_SECTION + #error "Custom SEGGER_RTT_PUT_BUFFER_SECTION() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif + #ifdef SEGGER_RTT_BUFFER_ALIGNMENT + #error "Custom SEGGER_RTT_BUFFER_ALIGNMENT is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif + #ifdef SEGGER_RTT_ALIGNMENT + #error "Custom SEGGER_RTT_ALIGNMENT is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif +#endif + #ifndef BUFFER_SIZE_UP #define BUFFER_SIZE_UP 1024 // Size of the buffer for terminal output of target, up to host #endif @@ -103,11 +124,11 @@ Additional information: #endif #ifndef SEGGER_RTT_ALIGNMENT - #define SEGGER_RTT_ALIGNMENT 0 + #define SEGGER_RTT_ALIGNMENT SEGGER_RTT_CPU_CACHE_LINE_SIZE #endif #ifndef SEGGER_RTT_BUFFER_ALIGNMENT - #define SEGGER_RTT_BUFFER_ALIGNMENT 0 + #define SEGGER_RTT_BUFFER_ALIGNMENT SEGGER_RTT_CPU_CACHE_LINE_SIZE #endif #ifndef SEGGER_RTT_MODE_DEFAULT @@ -127,7 +148,7 @@ Additional information: #endif #ifndef STRCPY - #define STRCPY(pDest, pSrc, NumBytes) strcpy((pDest), (pSrc)) + #define STRCPY(pDest, pSrc) strcpy((pDest), (pSrc)) #endif #ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP @@ -143,17 +164,17 @@ Additional information: #endif #ifndef MIN - #define MIN(a, b) (((a) < (b)) ? (a) : (b)) + #define MIN(a, b) (((a) < (b)) ? (a) : (b)) #endif #ifndef MAX - #define MAX(a, b) (((a) > (b)) ? (a) : (b)) + #define MAX(a, b) (((a) > (b)) ? (a) : (b)) #endif // // For some environments, NULL may not be defined until certain headers are included // #ifndef NULL - #define NULL 0 + #define NULL 0 #endif /********************************************************************* @@ -167,7 +188,7 @@ Additional information: #endif #if SEGGER_RTT_ALIGNMENT || SEGGER_RTT_BUFFER_ALIGNMENT - #if (defined __GNUC__) + #if ((defined __GNUC__) || (defined __clang__)) #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment))) #elif (defined __ICCARM__) || (defined __ICCRX__) #define PRAGMA(A) _Pragma(#A) @@ -183,7 +204,7 @@ Additional information: #endif #if defined(SEGGER_RTT_SECTION) || defined (SEGGER_RTT_BUFFER_SECTION) - #if (defined __GNUC__) + #if ((defined __GNUC__) || (defined __clang__)) #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section))) Var #elif (defined __ICCARM__) || (defined __ICCRX__) #define SEGGER_RTT_PUT_SECTION(Var, Section) RTT_PRAGMA(location=Section) \ @@ -197,7 +218,6 @@ Additional information: #define SEGGER_RTT_PUT_SECTION(Var, Section) Var #endif - #if SEGGER_RTT_ALIGNMENT #define SEGGER_RTT_CB_ALIGN(Var) SEGGER_RTT_ALIGN(Var, SEGGER_RTT_ALIGNMENT) #else @@ -230,7 +250,7 @@ Additional information: ********************************************************************** */ -static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' }; +static const unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' }; /********************************************************************* * @@ -238,13 +258,30 @@ static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7' * ********************************************************************** */ + // // RTT Control Block and allocate buffers for channel 0 // -SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT)); - -SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer [BUFFER_SIZE_UP])); -SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN])); +#if SEGGER_RTT_CPU_CACHE_LINE_SIZE + #if ((defined __GNUC__) || (defined __clang__)) + SEGGER_RTT_CB _SEGGER_RTT __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE))); + static char _acUpBuffer [SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_UP)] __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE))); + static char _acDownBuffer[SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_DOWN)] __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE))); + #elif (defined __ICCARM__) + #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE + SEGGER_RTT_CB _SEGGER_RTT; + #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE + static char _acUpBuffer [SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_UP)]; + #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE + static char _acDownBuffer[SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_DOWN)]; + #else + #error "Don't know how to place _SEGGER_RTT, _acUpBuffer, _acDownBuffer cache-line aligned" + #endif +#else + SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT)); + SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer [BUFFER_SIZE_UP])); + SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN])); +#endif static unsigned char _ActiveTerminal; @@ -261,18 +298,29 @@ static unsigned char _ActiveTerminal; * * Function description * Initializes the control block an buffers. -* May only be called via INIT() to avoid overriding settings. * +* Notes +* (1) May only be called via INIT() to avoid overriding settings. +* The only exception is SEGGER_RTT_Init(), to make an intentional override possible. */ -#define INIT() do { \ - if (_SEGGER_RTT.acID[0] == '\0') { _DoInit(); } \ - } while (0) + #define INIT() \ + do { \ + volatile SEGGER_RTT_CB* pRTTCBInit; \ + pRTTCBInit = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \ + if (pRTTCBInit->acID[0] != 'S') { \ + _DoInit(); \ + } \ + } while (0) + static void _DoInit(void) { - SEGGER_RTT_CB* p; + volatile SEGGER_RTT_CB* p; // Volatile to make sure that compiler cannot change the order of accesses to the control block + static const char _aInitStr[] = "\0\0\0\0\0\0TTR REGGES"; // Init complete ID string to make sure that things also work if RTT is linked to a no-init memory area + unsigned i; // // Initialize control block // - p = &_SEGGER_RTT; + p = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly + memset((SEGGER_RTT_CB*)p, 0, sizeof(_SEGGER_RTT)); // Make sure that the RTT CB is always zero initialized. p->MaxNumUpBuffers = SEGGER_RTT_MAX_NUM_UP_BUFFERS; p->MaxNumDownBuffers = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS; // @@ -280,7 +328,7 @@ static void _DoInit(void) { // p->aUp[0].sName = "Terminal"; p->aUp[0].pBuffer = _acUpBuffer; - p->aUp[0].SizeOfBuffer = sizeof(_acUpBuffer); + p->aUp[0].SizeOfBuffer = BUFFER_SIZE_UP; p->aUp[0].RdOff = 0u; p->aUp[0].WrOff = 0u; p->aUp[0].Flags = SEGGER_RTT_MODE_DEFAULT; @@ -289,18 +337,20 @@ static void _DoInit(void) { // p->aDown[0].sName = "Terminal"; p->aDown[0].pBuffer = _acDownBuffer; - p->aDown[0].SizeOfBuffer = sizeof(_acDownBuffer); + p->aDown[0].SizeOfBuffer = BUFFER_SIZE_DOWN; p->aDown[0].RdOff = 0u; p->aDown[0].WrOff = 0u; p->aDown[0].Flags = SEGGER_RTT_MODE_DEFAULT; // // Finish initialization of the control block. - // Copy Id string in three steps to make sure "SEGGER RTT" is not found - // in initializer memory (usually flash) by J-Link + // Copy Id string backwards to make sure that "SEGGER RTT" is not found in initializer memory (usually flash), + // as this would cause J-Link to "find" the control block at a wrong address. // - STRCPY(&p->acID[7], "RTT", 9); - STRCPY(&p->acID[0], "SEGGER", 7); - p->acID[6] = ' '; + RTT__DMB(); // Force order of memory accesses for cores that may perform out-of-order memory accesses + for (i = 0; i < sizeof(_aInitStr) - 1; ++i) { + p->acID[i] = _aInitStr[sizeof(_aInitStr) - 2 - i]; // Skip terminating \0 at the end of the array + } + RTT__DMB(); // Force order of memory accesses for cores that may perform out-of-order memory accesses } /********************************************************************* @@ -327,9 +377,7 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, unsigned NumBytesWritten; unsigned RdOff; unsigned WrOff; -#if SEGGER_RTT_MEMCPY_USE_BYTELOOP - char* pDst; -#endif + volatile char* pDst; // // Write data to buffer and handle wrap-around if necessary // @@ -344,8 +392,8 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, } NumBytesToWrite = MIN(NumBytesToWrite, (pRing->SizeOfBuffer - WrOff)); // Number of bytes that can be written until buffer wrap-around NumBytesToWrite = MIN(NumBytesToWrite, NumBytes); + pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pDst = pRing->pBuffer + WrOff; NumBytesWritten += NumBytesToWrite; NumBytes -= NumBytesToWrite; WrOff += NumBytesToWrite; @@ -353,7 +401,7 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, *pDst++ = *pBuffer++; }; #else - SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pBuffer, NumBytesToWrite); + SEGGER_RTT_MEMCPY((void*)pDst, pBuffer, NumBytesToWrite); NumBytesWritten += NumBytesToWrite; pBuffer += NumBytesToWrite; NumBytes -= NumBytesToWrite; @@ -362,9 +410,9 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer, if (WrOff == pRing->SizeOfBuffer) { WrOff = 0u; } + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff; } while (NumBytes); - // return NumBytesWritten; } @@ -390,9 +438,7 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign unsigned NumBytesAtOnce; unsigned WrOff; unsigned Rem; -#if SEGGER_RTT_MEMCPY_USE_BYTELOOP - char* pDst; -#endif + volatile char* pDst; WrOff = pRing->WrOff; Rem = pRing->SizeOfBuffer - WrOff; @@ -400,15 +446,17 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign // // All data fits before wrap around // + pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pDst = pRing->pBuffer + WrOff; WrOff += NumBytes; while (NumBytes--) { *pDst++ = *pData++; }; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff; #else - SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes); + SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytes); + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff + NumBytes; #endif } else { @@ -416,22 +464,26 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign // We reach the end of the buffer, so need to wrap around // #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pDst = pRing->pBuffer + WrOff; + pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF; NumBytesAtOnce = Rem; while (NumBytesAtOnce--) { *pDst++ = *pData++; }; - pDst = pRing->pBuffer; + pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF; NumBytesAtOnce = NumBytes - Rem; while (NumBytesAtOnce--) { *pDst++ = *pData++; }; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = NumBytes - Rem; #else NumBytesAtOnce = Rem; - SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytesAtOnce); + pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF; + SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytesAtOnce); NumBytesAtOnce = NumBytes - Rem; - SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytesAtOnce); + pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF; + SEGGER_RTT_MEMCPY((void*)pDst, pData + Rem, NumBytesAtOnce); + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = NumBytesAtOnce; #endif } @@ -496,6 +548,7 @@ static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) { * ********************************************************************** */ + /********************************************************************* * * SEGGER_RTT_ReadUpBufferNoLock() @@ -525,12 +578,10 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign unsigned WrOff; unsigned char* pBuffer; SEGGER_RTT_BUFFER_UP* pRing; -#if SEGGER_RTT_MEMCPY_USE_BYTELOOP - const char* pSrc; -#endif - // + volatile char* pSrc; + INIT(); - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly pBuffer = (unsigned char*)pData; RdOff = pRing->RdOff; WrOff = pRing->WrOff; @@ -541,8 +592,8 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign if (RdOff > WrOff) { NumBytesRem = pRing->SizeOfBuffer - RdOff; NumBytesRem = MIN(NumBytesRem, BufferSize); + pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pSrc = pRing->pBuffer + RdOff; NumBytesRead += NumBytesRem; BufferSize -= NumBytesRem; RdOff += NumBytesRem; @@ -550,7 +601,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign *pBuffer++ = *pSrc++; }; #else - SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem); + SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem); NumBytesRead += NumBytesRem; pBuffer += NumBytesRem; BufferSize -= NumBytesRem; @@ -569,8 +620,8 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign NumBytesRem = WrOff - RdOff; NumBytesRem = MIN(NumBytesRem, BufferSize); if (NumBytesRem > 0u) { + pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pSrc = pRing->pBuffer + RdOff; NumBytesRead += NumBytesRem; BufferSize -= NumBytesRem; RdOff += NumBytesRem; @@ -578,7 +629,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign *pBuffer++ = *pSrc++; }; #else - SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem); + SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem); NumBytesRead += NumBytesRem; pBuffer += NumBytesRem; BufferSize -= NumBytesRem; @@ -619,12 +670,10 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe unsigned WrOff; unsigned char* pBuffer; SEGGER_RTT_BUFFER_DOWN* pRing; -#if SEGGER_RTT_MEMCPY_USE_BYTELOOP - const char* pSrc; -#endif + volatile char* pSrc; // INIT(); - pRing = &_SEGGER_RTT.aDown[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly pBuffer = (unsigned char*)pData; RdOff = pRing->RdOff; WrOff = pRing->WrOff; @@ -635,8 +684,8 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe if (RdOff > WrOff) { NumBytesRem = pRing->SizeOfBuffer - RdOff; NumBytesRem = MIN(NumBytesRem, BufferSize); + pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pSrc = pRing->pBuffer + RdOff; NumBytesRead += NumBytesRem; BufferSize -= NumBytesRem; RdOff += NumBytesRem; @@ -644,7 +693,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe *pBuffer++ = *pSrc++; }; #else - SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem); + SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem); NumBytesRead += NumBytesRem; pBuffer += NumBytesRem; BufferSize -= NumBytesRem; @@ -663,8 +712,8 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe NumBytesRem = WrOff - RdOff; NumBytesRem = MIN(NumBytesRem, BufferSize); if (NumBytesRem > 0u) { + pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pSrc = pRing->pBuffer + RdOff; NumBytesRead += NumBytesRem; BufferSize -= NumBytesRem; RdOff += NumBytesRem; @@ -672,7 +721,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe *pBuffer++ = *pSrc++; }; #else - SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem); + SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem); NumBytesRead += NumBytesRem; pBuffer += NumBytesRem; BufferSize -= NumBytesRem; @@ -713,7 +762,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe */ unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) { unsigned NumBytesRead; - // + SEGGER_RTT_LOCK(); // // Call the non-locking read function @@ -745,7 +794,7 @@ unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned B */ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) { unsigned NumBytesRead; - // + SEGGER_RTT_LOCK(); // // Call the non-locking read function @@ -786,15 +835,12 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff const char* pData; SEGGER_RTT_BUFFER_UP* pRing; unsigned Avail; -#if SEGGER_RTT_MEMCPY_USE_BYTELOOP - char* pDst; -#endif - - pData = (const char *)pBuffer; + volatile char* pDst; // // Get "to-host" ring buffer and copy some elements into local variables. // - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pData = (const char *)pBuffer; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Check if we will overwrite data and need to adjust the RdOff. // @@ -820,15 +866,17 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff // // Last round // + pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pDst = pRing->pBuffer + pRing->WrOff; Avail = NumBytes; while (NumBytes--) { *pDst++ = *pData++; }; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff += Avail; #else - SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, NumBytes); + SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytes); + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff += NumBytes; #endif break; @@ -836,16 +884,18 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff // // Wrap-around necessary, write until wrap-around and reset WrOff // + pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF; #if SEGGER_RTT_MEMCPY_USE_BYTELOOP - pDst = pRing->pBuffer + pRing->WrOff; NumBytes -= Avail; while (Avail--) { *pDst++ = *pData++; }; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = 0; #else - SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, Avail); + SEGGER_RTT_MEMCPY((void*)pDst, pData, Avail); pData += Avail; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = 0; NumBytes -= Avail; #endif @@ -889,6 +939,7 @@ unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, u unsigned RdOff; unsigned WrOff; unsigned Rem; + volatile char* pDst; // // Cases: // 1) RdOff <= WrOff => Space until wrap-around is sufficient @@ -900,21 +951,22 @@ unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, u // 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough // pData = (const char *)pBuffer; - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly RdOff = pRing->RdOff; WrOff = pRing->WrOff; + pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF; if (RdOff <= WrOff) { // Case 1), 2) or 3) Avail = pRing->SizeOfBuffer - WrOff - 1u; // Space until wrap-around (assume 1 byte not usable for case that RdOff == 0) if (Avail >= NumBytes) { // Case 1)? -CopyStraight: - memcpy(pRing->pBuffer + WrOff, pData, NumBytes); + memcpy((void*)pDst, pData, NumBytes); + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff + NumBytes; return 1; } Avail += RdOff; // Space incl. wrap-around if (Avail >= NumBytes) { // Case 2? => If not, we have case 3) (does not fit) Rem = pRing->SizeOfBuffer - WrOff; // Space until end of buffer - memcpy(pRing->pBuffer + WrOff, pData, Rem); // Copy 1st chunk + memcpy((void*)pDst, pData, Rem); // Copy 1st chunk NumBytes -= Rem; // // Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used @@ -923,15 +975,20 @@ CopyStraight: // Therefore, check if 2nd memcpy is necessary at all // if (NumBytes) { - memcpy(pRing->pBuffer, pData + Rem, NumBytes); + pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF; + memcpy((void*)pDst, pData + Rem, NumBytes); } + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = NumBytes; return 1; } } else { // Potential case 4) Avail = RdOff - WrOff - 1u; if (Avail >= NumBytes) { // Case 4)? => If not, we have case 5) (does not fit) - goto CopyStraight; + memcpy((void*)pDst, pData, NumBytes); + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses + pRing->WrOff = WrOff + NumBytes; + return 1; } } return 0; // No space in buffer @@ -971,13 +1028,12 @@ unsigned SEGGER_RTT_WriteDownBufferNoLock(unsigned BufferIndex, const void* pBuf unsigned Avail; const char* pData; SEGGER_RTT_BUFFER_UP* pRing; - - pData = (const char *)pBuffer; // // Get "to-target" ring buffer. // It is save to cast that to a "to-host" buffer. Up and Down buffer differ in volatility of offsets that might be modified by J-Link. // - pRing = (SEGGER_RTT_BUFFER_UP*)&_SEGGER_RTT.aDown[BufferIndex]; + pData = (const char *)pBuffer; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // How we output depends upon the mode... // @@ -1047,12 +1103,11 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig unsigned Avail; const char* pData; SEGGER_RTT_BUFFER_UP* pRing; - - pData = (const char *)pBuffer; // // Get "to-host" ring buffer. // - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pData = (const char *)pBuffer; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // How we output depends upon the mode... // @@ -1121,18 +1176,11 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig */ unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { unsigned Status; - // + INIT(); SEGGER_RTT_LOCK(); - // - // Call the non-locking write function - // - Status = SEGGER_RTT_WriteDownBufferNoLock(BufferIndex, pBuffer, NumBytes); - // - // Finish up. - // + Status = SEGGER_RTT_WriteDownBufferNoLock(BufferIndex, pBuffer, NumBytes); // Call the non-locking write function SEGGER_RTT_UNLOCK(); - // return Status; } @@ -1157,18 +1205,11 @@ unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, u */ unsigned SEGGER_RTT_Write(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) { unsigned Status; - // + INIT(); SEGGER_RTT_LOCK(); - // - // Call the non-locking write function - // - Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes); - // - // Finish up. - // + Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes); // Call the non-locking write function SEGGER_RTT_UNLOCK(); - // return Status; } @@ -1226,10 +1267,11 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) { SEGGER_RTT_BUFFER_UP* pRing; unsigned WrOff; unsigned Status; + volatile char* pDst; // // Get "to-host" ring buffer. // - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1241,7 +1283,9 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) { // Output byte if free space is available // if (WrOff != pRing->RdOff) { - pRing->pBuffer[pRing->WrOff] = c; + pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF; + *pDst = c; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff; Status = 1; } else { @@ -1273,6 +1317,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) { SEGGER_RTT_BUFFER_UP* pRing; unsigned WrOff; unsigned Status; + volatile char* pDst; // // Prepare // @@ -1281,7 +1326,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) { // // Get "to-host" ring buffer. // - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1293,7 +1338,9 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) { // Output byte if free space is available // if (WrOff != pRing->RdOff) { - pRing->pBuffer[pRing->WrOff] = c; + pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF; + *pDst = c; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff; Status = 1; } else { @@ -1329,6 +1376,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) { SEGGER_RTT_BUFFER_UP* pRing; unsigned WrOff; unsigned Status; + volatile char* pDst; // // Prepare // @@ -1337,7 +1385,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) { // // Get "to-host" ring buffer. // - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1357,7 +1405,9 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) { // Output byte if free space is available // if (WrOff != pRing->RdOff) { - pRing->pBuffer[pRing->WrOff] = c; + pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF; + *pDst = c; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses pRing->WrOff = WrOff; Status = 1; } else { @@ -1367,7 +1417,6 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) { // Finish up. // SEGGER_RTT_UNLOCK(); - // return Status; } @@ -1404,7 +1453,7 @@ int SEGGER_RTT_GetKey(void) { * SEGGER_RTT_WaitKey * * Function description -* Waits until at least one character is available in the SEGGER RTT buffer. +* Waits until at least one character is avaible in the SEGGER RTT buffer. * Once a character is available, it is read and this function returns. * * Return value @@ -1438,12 +1487,14 @@ int SEGGER_RTT_WaitKey(void) { * (1) This function is only specified for accesses to RTT buffer 0 */ int SEGGER_RTT_HasKey(void) { + SEGGER_RTT_BUFFER_DOWN* pRing; unsigned RdOff; int r; INIT(); - RdOff = _SEGGER_RTT.aDown[0].RdOff; - if (RdOff != _SEGGER_RTT.aDown[0].WrOff) { + pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + RdOff = pRing->RdOff; + if (RdOff != pRing->WrOff) { r = 1; } else { r = 0; @@ -1467,7 +1518,7 @@ unsigned SEGGER_RTT_HasData(unsigned BufferIndex) { SEGGER_RTT_BUFFER_DOWN* pRing; unsigned v; - pRing = &_SEGGER_RTT.aDown[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly v = pRing->WrOff; return v - pRing->RdOff; } @@ -1488,7 +1539,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) { SEGGER_RTT_BUFFER_UP* pRing; unsigned v; - pRing = &_SEGGER_RTT.aUp[BufferIndex]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly v = pRing->RdOff; return pRing->WrOff - v; } @@ -1507,6 +1558,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) { * pBuffer Pointer to a buffer to be used. * BufferSize Size of the buffer. * Flags Operating modes. Define behavior if buffer is full (not enough space for entire message). +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 - O.K. Buffer Index @@ -1514,23 +1566,26 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) { */ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) { int BufferIndex; + volatile SEGGER_RTT_CB* pRTTCB; INIT(); SEGGER_RTT_LOCK(); + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly BufferIndex = 0; do { - if (_SEGGER_RTT.aDown[BufferIndex].pBuffer == NULL) { + if (pRTTCB->aDown[BufferIndex].pBuffer == NULL) { break; } BufferIndex++; - } while (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers); - if (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers) { - _SEGGER_RTT.aDown[BufferIndex].sName = sName; - _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer; - _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize; - _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u; - _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u; - _SEGGER_RTT.aDown[BufferIndex].Flags = Flags; + } while (BufferIndex < pRTTCB->MaxNumDownBuffers); + if (BufferIndex < pRTTCB->MaxNumDownBuffers) { + pRTTCB->aDown[BufferIndex].sName = sName; + pRTTCB->aDown[BufferIndex].pBuffer = (char*)pBuffer; + pRTTCB->aDown[BufferIndex].SizeOfBuffer = BufferSize; + pRTTCB->aDown[BufferIndex].RdOff = 0u; + pRTTCB->aDown[BufferIndex].WrOff = 0u; + pRTTCB->aDown[BufferIndex].Flags = Flags; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses } else { BufferIndex = -1; } @@ -1552,6 +1607,7 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer * pBuffer Pointer to a buffer to be used. * BufferSize Size of the buffer. * Flags Operating modes. Define behavior if buffer is full (not enough space for entire message). +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 - O.K. Buffer Index @@ -1559,23 +1615,26 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer */ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) { int BufferIndex; + volatile SEGGER_RTT_CB* pRTTCB; INIT(); SEGGER_RTT_LOCK(); + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly BufferIndex = 0; do { - if (_SEGGER_RTT.aUp[BufferIndex].pBuffer == NULL) { + if (pRTTCB->aUp[BufferIndex].pBuffer == NULL) { break; } BufferIndex++; - } while (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers); - if (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers) { - _SEGGER_RTT.aUp[BufferIndex].sName = sName; - _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer; - _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize; - _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u; - _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u; - _SEGGER_RTT.aUp[BufferIndex].Flags = Flags; + } while (BufferIndex < pRTTCB->MaxNumUpBuffers); + if (BufferIndex < pRTTCB->MaxNumUpBuffers) { + pRTTCB->aUp[BufferIndex].sName = sName; + pRTTCB->aUp[BufferIndex].pBuffer = (char*)pBuffer; + pRTTCB->aUp[BufferIndex].SizeOfBuffer = BufferSize; + pRTTCB->aUp[BufferIndex].RdOff = 0u; + pRTTCB->aUp[BufferIndex].WrOff = 0u; + pRTTCB->aUp[BufferIndex].Flags = Flags; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses } else { BufferIndex = -1; } @@ -1598,6 +1657,7 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi * pBuffer Pointer to a buffer to be used. * BufferSize Size of the buffer. * Flags Operating modes. Define behavior if buffer is full (not enough space for entire message). +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 - O.K. @@ -1610,18 +1670,22 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi */ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); - if (BufferIndex > 0u) { - _SEGGER_RTT.aUp[BufferIndex].sName = sName; - _SEGGER_RTT.aUp[BufferIndex].pBuffer = (char*)pBuffer; - _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize; - _SEGGER_RTT.aUp[BufferIndex].RdOff = 0u; - _SEGGER_RTT.aUp[BufferIndex].WrOff = 0u; + pUp = &pRTTCB->aUp[BufferIndex]; + if (BufferIndex) { + pUp->sName = sName; + pUp->pBuffer = (char*)pBuffer; + pUp->SizeOfBuffer = BufferSize; + pUp->RdOff = 0u; + pUp->WrOff = 0u; } - _SEGGER_RTT.aUp[BufferIndex].Flags = Flags; + pUp->Flags = Flags; SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1645,6 +1709,7 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu * pBuffer Pointer to a buffer to be used. * BufferSize Size of the buffer. * Flags Operating modes. Define behavior if buffer is full (not enough space for entire message). +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 O.K. @@ -1657,18 +1722,23 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu */ int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); - if (BufferIndex > 0u) { - _SEGGER_RTT.aDown[BufferIndex].sName = sName; - _SEGGER_RTT.aDown[BufferIndex].pBuffer = (char*)pBuffer; - _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize; - _SEGGER_RTT.aDown[BufferIndex].RdOff = 0u; - _SEGGER_RTT.aDown[BufferIndex].WrOff = 0u; + pDown = &pRTTCB->aDown[BufferIndex]; + if (BufferIndex) { + pDown->sName = sName; + pDown->pBuffer = (char*)pBuffer; + pDown->SizeOfBuffer = BufferSize; + pDown->RdOff = 0u; + pDown->WrOff = 0u; } - _SEGGER_RTT.aDown[BufferIndex].Flags = Flags; + pDown->Flags = Flags; + RTT__DMB(); // Force data write to be complete before writing the , in case CPU is allowed to change the order of memory accesses SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1695,11 +1765,15 @@ int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* p */ int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); - _SEGGER_RTT.aUp[BufferIndex].sName = sName; + pUp = &pRTTCB->aUp[BufferIndex]; + pUp->sName = sName; SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1726,11 +1800,15 @@ int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) { */ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); - _SEGGER_RTT.aDown[BufferIndex].sName = sName; + pDown = &pRTTCB->aDown[BufferIndex]; + pDown->sName = sName; SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1750,6 +1828,7 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) { * Parameters * BufferIndex Index of the buffer. * Flags Flags to set for the buffer. +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 O.K. @@ -1757,11 +1836,15 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) { */ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); - _SEGGER_RTT.aUp[BufferIndex].Flags = Flags; + pUp = &pRTTCB->aUp[BufferIndex]; + pUp->Flags = Flags; SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1781,6 +1864,7 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) { * Parameters * BufferIndex Index of the buffer to renamed. * Flags Flags to set for the buffer. +* Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. * * Return value * >= 0 O.K. @@ -1788,11 +1872,15 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) { */ int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) { int r; + volatile SEGGER_RTT_CB* pRTTCB; + volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) { + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); - _SEGGER_RTT.aDown[BufferIndex].Flags = Flags; + pDown = &pRTTCB->aDown[BufferIndex]; + pDown->Flags = Flags; SEGGER_RTT_UNLOCK(); r = 0; } else { @@ -1827,21 +1915,23 @@ void SEGGER_RTT_Init (void) { * Return value * >= 0 O.K. * < 0 Error (e.g. if RTT is configured for non-blocking mode and there was no space in the buffer to set the new terminal Id) +* +* Notes +* (1) Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed */ int SEGGER_RTT_SetTerminal (unsigned char TerminalId) { unsigned char ac[2]; SEGGER_RTT_BUFFER_UP* pRing; unsigned Avail; int r; - // + INIT(); - // r = 0; ac[0] = 0xFFu; if (TerminalId < sizeof(_aTerminalId)) { // We only support a certain number of channels ac[1] = _aTerminalId[TerminalId]; - pRing = &_SEGGER_RTT.aUp[0]; // Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed - SEGGER_RTT_LOCK(); // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + SEGGER_RTT_LOCK(); // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) { _ActiveTerminal = TerminalId; _WriteBlocking(pRing, (const char*)ac, 2u); @@ -1892,7 +1982,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) { // // Get "to-host" ring buffer. // - pRing = &_SEGGER_RTT.aUp[0]; + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Need to be able to change terminal, write data, change back. // Compute the fixed and variable sizes. @@ -1966,8 +2056,11 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) { * Return value * Number of bytes that are free in the selected up buffer. */ -unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex){ - return _GetAvailWriteSpace(&_SEGGER_RTT.aUp[BufferIndex]); +unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex) { + SEGGER_RTT_BUFFER_UP* pRing; + + pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + return _GetAvailWriteSpace(pRing); } @@ -1988,16 +2081,18 @@ unsigned SEGGER_RTT_GetBytesInBuffer(unsigned BufferIndex) { unsigned RdOff; unsigned WrOff; unsigned r; + volatile SEGGER_RTT_CB* pRTTCB; // // Avoid warnings regarding volatile access order. It's not a problem // in this case, but dampen compiler enthusiasm. // - RdOff = _SEGGER_RTT.aUp[BufferIndex].RdOff; - WrOff = _SEGGER_RTT.aUp[BufferIndex].WrOff; + pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + RdOff = pRTTCB->aUp[BufferIndex].RdOff; + WrOff = pRTTCB->aUp[BufferIndex].WrOff; if (RdOff <= WrOff) { r = WrOff - RdOff; } else { - r = _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer - (WrOff - RdOff); + r = pRTTCB->aUp[BufferIndex].SizeOfBuffer - (WrOff - RdOff); } return r; } diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h index 07eb4f39e..a3161f694 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h @@ -46,16 +46,14 @@ File : SEGGER_RTT.h Purpose : Implementation of SEGGER real-time transfer which allows real-time communication on targets which support debugger memory accesses while the CPU is running. -Revision: $Rev: 17697 $ +Revision: $Rev: 25842 $ ---------------------------------------------------------------------- */ #ifndef SEGGER_RTT_H #define SEGGER_RTT_H -#include "SEGGER_RTT_Conf.h" - - +#include "../Config/SEGGER_RTT_Conf.h" /********************************************************************* * @@ -63,46 +61,168 @@ Revision: $Rev: 17697 $ * ********************************************************************** */ + #ifndef RTT_USE_ASM - #if (defined __SES_ARM) // SEGGER Embedded Studio + // + // Some cores support out-of-order memory accesses (reordering of memory accesses in the core) + // For such cores, we need to define a memory barrier to guarantee the order of certain accesses to the RTT ring buffers. + // Needed for: + // Cortex-M7 (ARMv7-M) + // Cortex-M23 (ARM-v8M) + // Cortex-M33 (ARM-v8M) + // Cortex-A/R (ARM-v7A/R) + // + // We do not explicitly check for "Embedded Studio" as the compiler in use determines what we support. + // You can use an external toolchain like IAR inside ES. So there is no point in checking for "Embedded Studio" + // + #if (defined __CROSSWORKS_ARM) // Rowley Crossworks #define _CC_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __CROSSWORKS_ARM) // Rowley Crossworks - #define _CC_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __GNUC__) // GCC - #define _CC_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __clang__) // Clang compiler - #define _CC_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __IASMARM__) // IAR assembler - #define _CC_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __ICCARM__) // IAR compiler - #define _CC_HAS_RTT_ASM_SUPPORT 1 - #else - #define _CC_HAS_RTT_ASM_SUPPORT 0 - #endif - #if (defined __ARM_ARCH_7M__) // Cortex-M3/4 - #define _CORE_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __ARM_ARCH_7EM__) // Cortex-M7 - #define _CORE_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 - #define _CORE_HAS_RTT_ASM_SUPPORT 1 - #elif (defined __ARM7M__) // IAR Cortex-M3/4 - #if (__CORE__ == __ARM7M__) + #if (defined __ARM_ARCH_7M__) // Cortex-M3 #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 + #define _CORE_HAS_RTT_ASM_SUPPORT 0 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); #else #define _CORE_HAS_RTT_ASM_SUPPORT 0 #endif - #elif (defined __ARM7EM__) // IAR Cortex-M7 - #if (__CORE__ == __ARM7EM__) + #elif (defined __ARMCC_VERSION) + // + // ARM compiler + // ARM compiler V6.0 and later is clang based. + // Our ASM part is compatible to clang. + // + #if (__ARMCC_VERSION >= 6000000) + #define _CC_HAS_RTT_ASM_SUPPORT 1 + #else + #define _CC_HAS_RTT_ASM_SUPPORT 0 + #endif + #if (defined __ARM_ARCH_6M__) // Cortex-M0 / M1 + #define _CORE_HAS_RTT_ASM_SUPPORT 0 // No ASM support for this architecture + #elif (defined __ARM_ARCH_7M__) // Cortex-M3 #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 + #define _CORE_HAS_RTT_ASM_SUPPORT 0 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); #else #define _CORE_HAS_RTT_ASM_SUPPORT 0 #endif + #elif ((defined __GNUC__) || (defined __clang__)) + // + // GCC / Clang + // + #define _CC_HAS_RTT_ASM_SUPPORT 1 + // ARM 7/9: __ARM_ARCH_5__ / __ARM_ARCH_5E__ / __ARM_ARCH_5T__ / __ARM_ARCH_5T__ / __ARM_ARCH_5TE__ + #if (defined __ARM_ARCH_7M__) // Cortex-M3 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 // Only Cortex-M7 needs a DMB but we cannot distinguish M4 and M7 here... + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 + #define _CORE_HAS_RTT_ASM_SUPPORT 0 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #else + #define _CORE_HAS_RTT_ASM_SUPPORT 0 + #endif + #elif ((defined __IASMARM__) || (defined __ICCARM__)) + // + // IAR assembler/compiler + // + #define _CC_HAS_RTT_ASM_SUPPORT 1 + #if (__VER__ < 6300000) + #define VOLATILE + #else + #define VOLATILE volatile + #endif + #if (defined __ARM7M__) // Needed for old versions that do not know the define yet + #if (__CORE__ == __ARM7M__) // Cortex-M3 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #endif + #endif + #if (defined __ARM7EM__) + #if (__CORE__ == __ARM7EM__) // Cortex-M4/M7 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif + #if (defined __ARM8M_BASELINE__) + #if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23 + #define _CORE_HAS_RTT_ASM_SUPPORT 0 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif + #if (defined __ARM8M_MAINLINE__) + #if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif + #if (defined __ARM8EM_MAINLINE__) + #if (__CORE__ == __ARM8EM_MAINLINE__) // Cortex-??? + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif + #if (defined __ARM7A__) + #if (__CORE__ == __ARM7A__) // Cortex-A 32-bit ARMv7-A + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif + #if (defined __ARM7R__) + #if (__CORE__ == __ARM7R__) // Cortex-R 32-bit ARMv7-R + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() asm VOLATILE ("DMB"); + #endif + #endif +// TBD: __ARM8A__ => Cortex-A 64-bit ARMv8-A +// TBD: __ARM8R__ => Cortex-R 64-bit ARMv8-R #else + // + // Other compilers + // + #define _CC_HAS_RTT_ASM_SUPPORT 0 #define _CORE_HAS_RTT_ASM_SUPPORT 0 #endif // // If IDE and core support the ASM version, enable ASM version by default // + #ifndef _CORE_HAS_RTT_ASM_SUPPORT + #define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores + #endif #if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT) #define RTT_USE_ASM (1) #else @@ -110,6 +230,35 @@ Revision: $Rev: 17697 $ #endif #endif +#ifndef _CORE_NEEDS_DMB + #define _CORE_NEEDS_DMB 0 +#endif + +#ifndef RTT__DMB + #if _CORE_NEEDS_DMB + #error "Don't know how to place inline assembly for DMB" + #else + #define RTT__DMB() + #endif +#endif + +#ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE + #define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here +#endif + +#ifndef SEGGER_RTT_UNCACHED_OFF + #if SEGGER_RTT_CPU_CACHE_LINE_SIZE + #error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #else + #define SEGGER_RTT_UNCACHED_OFF (0) + #endif +#endif +#if RTT_USE_ASM + #if SEGGER_RTT_CPU_CACHE_LINE_SIZE + #error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" + #endif +#endif + #ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file #include #include @@ -121,6 +270,21 @@ Revision: $Rev: 17697 $ ********************************************************************** */ +// +// Determine how much we must pad the control block to make it a multiple of a cache line in size +// Assuming: U8 = 1B +// U16 = 2B +// U32 = 4B +// U8/U16/U32* = 4B +// +#if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache + #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE) +#else + #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes) +#endif +#define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24)) +#define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE) + /********************************************************************* * * Types @@ -138,7 +302,7 @@ typedef struct { unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. unsigned WrOff; // Position of next item to be written by either target. volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host. - unsigned Flags; // Contains configuration flags + unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. } SEGGER_RTT_BUFFER_UP; // @@ -151,7 +315,7 @@ typedef struct { unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host. unsigned RdOff; // Position of next item to be read by target (down-buffer). - unsigned Flags; // Contains configuration flags + unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. } SEGGER_RTT_BUFFER_DOWN; // @@ -165,6 +329,9 @@ typedef struct { int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2) SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target +#if SEGGER_RTT__CB_PADDING + unsigned char aDummy[SEGGER_RTT__CB_PADDING]; +#endif } SEGGER_RTT_CB; /********************************************************************* @@ -214,7 +381,7 @@ unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex); // // Function macro for performance optimization // -#define SEGGER_RTT_HASDATA(n) (_SEGGER_RTT.aDown[n].WrOff - _SEGGER_RTT.aDown[n].RdOff) +#define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) #if RTT_USE_ASM #define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock @@ -231,7 +398,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pDa unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); -#define SEGGER_RTT_HASDATA_UP(n) (_SEGGER_RTT.aUp[n].WrOff - _SEGGER_RTT.aUp[n].RdOff) +#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly /********************************************************************* * diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S index aec372eec..85c79899e 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S @@ -23,6 +23,7 @@ Additional information: * ********************************************************************** */ + #define _CCIAR 0 #define _CCCLANG 1 @@ -182,6 +183,9 @@ _LoopCopyStraight: // memcpy(pRing->pBuffer + WrOf SUBS R2,R2,#+1 BNE _LoopCopyStraight _CSDone: +#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here + DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the in the struct +#endif STR R0,[R6, #+12] // pRing->WrOff = WrOff + NumBytes; MOVS R0,#+1 POP {R4-R7} @@ -214,6 +218,9 @@ _LoopCopyAfterWrapAround: // memcpy(pRing->pBuffer, pData SUBS R2,R2,#+1 BNE _LoopCopyAfterWrapAround _No2ChunkNeeded: +#if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here + DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the in the struct +#endif STR R4,[R6, #+12] // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer MOVS R0,#+1 POP {R4-R7} diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c deleted file mode 100644 index 4c996b408..000000000 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c +++ /dev/null @@ -1,500 +0,0 @@ -/********************************************************************* -* SEGGER Microcontroller GmbH * -* The Embedded Experts * -********************************************************************** -* * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * -* * -* www.segger.com Support: support@segger.com * -* * -********************************************************************** -* * -* SEGGER RTT * Real Time Transfer for embedded targets * -* * -********************************************************************** -* * -* All rights reserved. * -* * -* SEGGER strongly recommends to not make any changes * -* to or modify the source code of this software in order to stay * -* compatible with the RTT protocol and J-Link. * -* * -* Redistribution and use in source and binary forms, with or * -* without modification, are permitted provided that the following * -* condition is met: * -* * -* o Redistributions of source code must retain the above copyright * -* notice, this condition and the following disclaimer. * -* * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * -* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * -* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * -* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * -* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * -* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * -* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * -* DAMAGE. * -* * -********************************************************************** ----------------------------END-OF-HEADER------------------------------ -File : SEGGER_RTT_printf.c -Purpose : Replacement for printf to write formatted data via RTT -Revision: $Rev: 17697 $ ----------------------------------------------------------------------- -*/ -#include "SEGGER_RTT.h" -#include "SEGGER_RTT_Conf.h" - -/********************************************************************* -* -* Defines, configurable -* -********************************************************************** -*/ - -#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE - #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64) -#endif - -#include -#include - - -#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0) -#define FORMAT_FLAG_PAD_ZERO (1u << 1) -#define FORMAT_FLAG_PRINT_SIGN (1u << 2) -#define FORMAT_FLAG_ALTERNATE (1u << 3) - -/********************************************************************* -* -* Types -* -********************************************************************** -*/ - -typedef struct { - char* pBuffer; - unsigned BufferSize; - unsigned Cnt; - - int ReturnValue; - - unsigned RTTBufferIndex; -} SEGGER_RTT_PRINTF_DESC; - -/********************************************************************* -* -* Function prototypes -* -********************************************************************** -*/ - -/********************************************************************* -* -* Static code -* -********************************************************************** -*/ -/********************************************************************* -* -* _StoreChar -*/ -static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) { - unsigned Cnt; - - Cnt = p->Cnt; - if ((Cnt + 1u) <= p->BufferSize) { - *(p->pBuffer + Cnt) = c; - p->Cnt = Cnt + 1u; - p->ReturnValue++; - } - // - // Write part of string, when the buffer is full - // - if (p->Cnt == p->BufferSize) { - if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) { - p->ReturnValue = -1; - } else { - p->Cnt = 0u; - } - } -} - -/********************************************************************* -* -* _PrintUnsigned -*/ -static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) { - static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' }; - unsigned Div; - unsigned Digit; - unsigned Number; - unsigned Width; - char c; - - Number = v; - Digit = 1u; - // - // Get actual field width - // - Width = 1u; - while (Number >= Base) { - Number = (Number / Base); - Width++; - } - if (NumDigits > Width) { - Width = NumDigits; - } - // - // Print leading chars if necessary - // - if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) { - if (FieldWidth != 0u) { - if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) { - c = '0'; - } else { - c = ' '; - } - while ((FieldWidth != 0u) && (Width < FieldWidth)) { - FieldWidth--; - _StoreChar(pBufferDesc, c); - if (pBufferDesc->ReturnValue < 0) { - break; - } - } - } - } - if (pBufferDesc->ReturnValue >= 0) { - // - // Compute Digit. - // Loop until Digit has the value of the highest digit required. - // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100. - // - while (1) { - if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned) - NumDigits--; - } else { - Div = v / Digit; - if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done - break; - } - } - Digit *= Base; - } - // - // Output digits - // - do { - Div = v / Digit; - v -= Div * Digit; - _StoreChar(pBufferDesc, _aV2C[Div]); - if (pBufferDesc->ReturnValue < 0) { - break; - } - Digit /= Base; - } while (Digit); - // - // Print trailing spaces if necessary - // - if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) { - if (FieldWidth != 0u) { - while ((FieldWidth != 0u) && (Width < FieldWidth)) { - FieldWidth--; - _StoreChar(pBufferDesc, ' '); - if (pBufferDesc->ReturnValue < 0) { - break; - } - } - } - } - } -} - -/********************************************************************* -* -* _PrintInt -*/ -static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) { - unsigned Width; - int Number; - - Number = (v < 0) ? -v : v; - - // - // Get actual field width - // - Width = 1u; - while (Number >= (int)Base) { - Number = (Number / (int)Base); - Width++; - } - if (NumDigits > Width) { - Width = NumDigits; - } - if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) { - FieldWidth--; - } - - // - // Print leading spaces if necessary - // - if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) { - if (FieldWidth != 0u) { - while ((FieldWidth != 0u) && (Width < FieldWidth)) { - FieldWidth--; - _StoreChar(pBufferDesc, ' '); - if (pBufferDesc->ReturnValue < 0) { - break; - } - } - } - } - // - // Print sign if necessary - // - if (pBufferDesc->ReturnValue >= 0) { - if (v < 0) { - v = -v; - _StoreChar(pBufferDesc, '-'); - } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) { - _StoreChar(pBufferDesc, '+'); - } else { - - } - if (pBufferDesc->ReturnValue >= 0) { - // - // Print leading zeros if necessary - // - if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) { - if (FieldWidth != 0u) { - while ((FieldWidth != 0u) && (Width < FieldWidth)) { - FieldWidth--; - _StoreChar(pBufferDesc, '0'); - if (pBufferDesc->ReturnValue < 0) { - break; - } - } - } - } - if (pBufferDesc->ReturnValue >= 0) { - // - // Print number without sign - // - _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags); - } - } - } -} - -/********************************************************************* -* -* Public code -* -********************************************************************** -*/ -/********************************************************************* -* -* SEGGER_RTT_vprintf -* -* Function description -* Stores a formatted string in SEGGER RTT control block. -* This data is read by the host. -* -* Parameters -* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal") -* sFormat Pointer to format string -* pParamList Pointer to the list of arguments for the format string -* -* Return values -* >= 0: Number of bytes which have been stored in the "Up"-buffer. -* < 0: Error -*/ -int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) { - char c; - SEGGER_RTT_PRINTF_DESC BufferDesc; - int v; - unsigned NumDigits; - unsigned FormatFlags; - unsigned FieldWidth; - char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE]; - - BufferDesc.pBuffer = acBuffer; - BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE; - BufferDesc.Cnt = 0u; - BufferDesc.RTTBufferIndex = BufferIndex; - BufferDesc.ReturnValue = 0; - - do { - c = *sFormat; - sFormat++; - if (c == 0u) { - break; - } - if (c == '%') { - // - // Filter out flags - // - FormatFlags = 0u; - v = 1; - do { - c = *sFormat; - switch (c) { - case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break; - case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break; - case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break; - case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break; - default: v = 0; break; - } - } while (v); - // - // filter out field with - // - FieldWidth = 0u; - do { - c = *sFormat; - if ((c < '0') || (c > '9')) { - break; - } - sFormat++; - FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0'); - } while (1); - - // - // Filter out precision (number of digits to display) - // - NumDigits = 0u; - c = *sFormat; - if (c == '.') { - sFormat++; - do { - c = *sFormat; - if ((c < '0') || (c > '9')) { - break; - } - sFormat++; - NumDigits = NumDigits * 10u + ((unsigned)c - '0'); - } while (1); - } - // - // Filter out length modifier - // - c = *sFormat; - do { - if ((c == 'l') || (c == 'h')) { - sFormat++; - c = *sFormat; - } else { - break; - } - } while (1); - // - // Handle specifiers - // - switch (c) { - case 'c': { - char c0; - v = va_arg(*pParamList, int); - c0 = (char)v; - _StoreChar(&BufferDesc, c0); - break; - } - case 'd': - v = va_arg(*pParamList, int); - _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags); - break; - case 'u': - v = va_arg(*pParamList, int); - _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags); - break; - case 'x': - case 'X': - v = va_arg(*pParamList, int); - _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags); - break; - case 's': - { - const char * s = va_arg(*pParamList, const char *); - do { - c = *s; - s++; - if (c == '\0') { - break; - } - _StoreChar(&BufferDesc, c); - } while (BufferDesc.ReturnValue >= 0); - } - break; - case 'p': - v = va_arg(*pParamList, int); - _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u); - break; - case '%': - _StoreChar(&BufferDesc, '%'); - break; - default: - break; - } - sFormat++; - } else { - _StoreChar(&BufferDesc, c); - } - } while (BufferDesc.ReturnValue >= 0); - - if (BufferDesc.ReturnValue > 0) { - // - // Write remaining data, if any - // - if (BufferDesc.Cnt != 0u) { - SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt); - } - BufferDesc.ReturnValue += (int)BufferDesc.Cnt; - } - return BufferDesc.ReturnValue; -} - -/********************************************************************* -* -* SEGGER_RTT_printf -* -* Function description -* Stores a formatted string in SEGGER RTT control block. -* This data is read by the host. -* -* Parameters -* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal") -* sFormat Pointer to format string, followed by the arguments for conversion -* -* Return values -* >= 0: Number of bytes which have been stored in the "Up"-buffer. -* < 0: Error -* -* Notes -* (1) Conversion specifications have following syntax: -* %[flags][FieldWidth][.Precision]ConversionSpecifier -* (2) Supported flags: -* -: Left justify within the field width -* +: Always print sign extension for signed conversions -* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision -* Supported conversion specifiers: -* c: Print the argument as one char -* d: Print the argument as a signed integer -* u: Print the argument as an unsigned integer -* x: Print the argument as an hexadecimal integer -* s: Print the string pointed to by the argument -* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.) -*/ -int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) { - int r; - va_list ParamList; - - va_start(ParamList, sFormat); - r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList); - va_end(ParamList); - return r; -} -/*************************** End of file ****************************/ diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c deleted file mode 100644 index 6bf670a02..000000000 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c +++ /dev/null @@ -1,120 +0,0 @@ -/********************************************************************* -* SEGGER Microcontroller GmbH * -* The Embedded Experts * -********************************************************************** -* * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * -* * -* www.segger.com Support: support@segger.com * -* * -********************************************************************** -* * -* SEGGER RTT * Real Time Transfer for embedded targets * -* * -********************************************************************** -* * -* All rights reserved. * -* * -* SEGGER strongly recommends to not make any changes * -* to or modify the source code of this software in order to stay * -* compatible with the RTT protocol and J-Link. * -* * -* Redistribution and use in source and binary forms, with or * -* without modification, are permitted provided that the following * -* condition is met: * -* * -* o Redistributions of source code must retain the above copyright * -* notice, this condition and the following disclaimer. * -* * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * -* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * -* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * -* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * -* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * -* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * -* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * -* DAMAGE. * -* * -********************************************************************** ----------------------------END-OF-HEADER------------------------------ -File : SEGGER_RTT_Syscalls_GCC.c -Purpose : Low-level functions for using printf() via RTT in GCC. - To use RTT for printf output, include this file in your - application. -Revision: $Rev: 17697 $ ----------------------------------------------------------------------- -*/ -#if (defined __GNUC__) && !(defined __SES_ARM) && !(defined __CROSSWORKS_ARM) - -#include // required for _write_r -#include "SEGGER_RTT.h" - - -/********************************************************************* -* -* Types -* -********************************************************************** -*/ -// -// If necessary define the _reent struct -// to match the one passed by the used standard library. -// -struct _reent; - -/********************************************************************* -* -* Function prototypes -* -********************************************************************** -*/ -int _write(int file, char *ptr, int len); -int _write_r(struct _reent *r, int file, const void *ptr, int len); - -/********************************************************************* -* -* Global functions -* -********************************************************************** -*/ - -/********************************************************************* -* -* _write() -* -* Function description -* Low-level write function. -* libc subroutines will use this system routine for output to all files, -* including stdout. -* Write data via RTT. -*/ -int _write(int file, char *ptr, int len) { - (void) file; /* Not used, avoid warning */ - SEGGER_RTT_Write(0, ptr, len); - return len; -} - -/********************************************************************* -* -* _write_r() -* -* Function description -* Low-level reentrant write function. -* libc subroutines will use this system routine for output to all files, -* including stdout. -* Write data via RTT. -*/ -int _write_r(struct _reent *r, int file, const void *ptr, int len) { - (void) file; /* Not used, avoid warning */ - (void) r; /* Not used, avoid warning */ - SEGGER_RTT_Write(0, ptr, len); - return len; -} - -#endif -/****** End Of File *************************************************/ diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c deleted file mode 100644 index 4c76752b3..000000000 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c +++ /dev/null @@ -1,115 +0,0 @@ -/********************************************************************* -* SEGGER Microcontroller GmbH * -* The Embedded Experts * -********************************************************************** -* * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * -* * -* www.segger.com Support: support@segger.com * -* * -********************************************************************** -* * -* SEGGER RTT * Real Time Transfer for embedded targets * -* * -********************************************************************** -* * -* All rights reserved. * -* * -* SEGGER strongly recommends to not make any changes * -* to or modify the source code of this software in order to stay * -* compatible with the RTT protocol and J-Link. * -* * -* Redistribution and use in source and binary forms, with or * -* without modification, are permitted provided that the following * -* condition is met: * -* * -* o Redistributions of source code must retain the above copyright * -* notice, this condition and the following disclaimer. * -* * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * -* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * -* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * -* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * -* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * -* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * -* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * -* DAMAGE. * -* * -********************************************************************** ----------------------------END-OF-HEADER------------------------------ -File : SEGGER_RTT_Syscalls_IAR.c -Purpose : Low-level functions for using printf() via RTT in IAR. - To use RTT for printf output, include this file in your - application and set the Library Configuration to Normal. -Revision: $Rev: 17697 $ ----------------------------------------------------------------------- -*/ -#ifdef __IAR_SYSTEMS_ICC__ - -// -// Since IAR EWARM V8 and EWRX V4, yfuns.h is considered as deprecated and LowLevelIOInterface.h -// shall be used instead. To not break any compatibility with older compiler versions, we have a -// version check in here. -// -#if ((defined __ICCARM__) && (__VER__ >= 8000000)) || ((defined __ICCRX__) && (__VER__ >= 400)) - #include -#else - #include -#endif - -#include "SEGGER_RTT.h" -#pragma module_name = "?__write" - -/********************************************************************* -* -* Function prototypes -* -********************************************************************** -*/ -size_t __write(int handle, const unsigned char * buffer, size_t size); - -/********************************************************************* -* -* Global functions -* -********************************************************************** -*/ -/********************************************************************* -* -* __write() -* -* Function description -* Low-level write function. -* Standard library subroutines will use this system routine -* for output to all files, including stdout. -* Write data via RTT. -*/ -size_t __write(int handle, const unsigned char * buffer, size_t size) { - (void) handle; /* Not used, avoid warning */ - SEGGER_RTT_Write(0, (const char*)buffer, size); - return size; -} - -/********************************************************************* -* -* __write_buffered() -* -* Function description -* Low-level write function. -* Standard library subroutines will use this system routine -* for output to all files, including stdout. -* Write data via RTT. -*/ -size_t __write_buffered(int handle, const unsigned char * buffer, size_t size) { - (void) handle; /* Not used, avoid warning */ - SEGGER_RTT_Write(0, (const char*)buffer, size); - return size; -} - -#endif -/****** End Of File *************************************************/ diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c deleted file mode 100644 index ba9772d3e..000000000 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c +++ /dev/null @@ -1,386 +0,0 @@ -/********************************************************************* -* SEGGER Microcontroller GmbH * -* The Embedded Experts * -********************************************************************** -* * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * -* * -* www.segger.com Support: support@segger.com * -* * -********************************************************************** -* * -* SEGGER RTT * Real Time Transfer for embedded targets * -* * -********************************************************************** -* * -* All rights reserved. * -* * -* SEGGER strongly recommends to not make any changes * -* to or modify the source code of this software in order to stay * -* compatible with the RTT protocol and J-Link. * -* * -* Redistribution and use in source and binary forms, with or * -* without modification, are permitted provided that the following * -* condition is met: * -* * -* o Redistributions of source code must retain the above copyright * -* notice, this condition and the following disclaimer. * -* * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * -* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * -* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * -* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * -* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * -* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * -* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * -* DAMAGE. * -* * -********************************************************************** ----------------------------END-OF-HEADER------------------------------ -File : RTT_Syscalls_KEIL.c -Purpose : Retargeting module for KEIL MDK-CM3. - Low-level functions for using printf() via RTT -Revision: $Rev: 17697 $ ----------------------------------------------------------------------- -*/ -#ifdef __CC_ARM - -#include -#include -#include -#include -#include - -#include "SEGGER_RTT.h" -/********************************************************************* -* -* #pragmas -* -********************************************************************** -*/ -#pragma import(__use_no_semihosting) - -#ifdef _MICROLIB - #pragma import(__use_full_stdio) -#endif - -/********************************************************************* -* -* Defines non-configurable -* -********************************************************************** -*/ - -/* Standard IO device handles - arbitrary, but any real file system handles must be - less than 0x8000. */ -#define STDIN 0x8001 // Standard Input Stream -#define STDOUT 0x8002 // Standard Output Stream -#define STDERR 0x8003 // Standard Error Stream - -/********************************************************************* -* -* Public const -* -********************************************************************** -*/ -#if __ARMCC_VERSION < 5000000 -//const char __stdin_name[] = "STDIN"; -const char __stdout_name[] = "STDOUT"; -const char __stderr_name[] = "STDERR"; -#endif - -/********************************************************************* -* -* Public code -* -********************************************************************** -*/ - -/********************************************************************* -* -* _ttywrch -* -* Function description: -* Outputs a character to the console -* -* Parameters: -* c - character to output -* -*/ -void _ttywrch(int c) { - fputc(c, stdout); // stdout - fflush(stdout); -} - -/********************************************************************* -* -* _sys_open -* -* Function description: -* Opens the device/file in order to do read/write operations -* -* Parameters: -* sName - sName of the device/file to open -* OpenMode - This parameter is currently ignored -* -* Return value: -* != 0 - Handle to the object to open, otherwise -* == 0 -"device" is not handled by this module -* -*/ -FILEHANDLE _sys_open(const char * sName, int OpenMode) { - (void)OpenMode; - // Register standard Input Output devices. - if (strcmp(sName, __stdout_name) == 0) { - return (STDOUT); - } else if (strcmp(sName, __stderr_name) == 0) { - return (STDERR); - } else - return (0); // Not implemented -} - -/********************************************************************* -* -* _sys_close -* -* Function description: -* Closes the handle to the open device/file -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* -* Return value: -* 0 - device/file closed -* -*/ -int _sys_close(FILEHANDLE hFile) { - (void)hFile; - return 0; // Not implemented -} - -/********************************************************************* -* -* _sys_write -* -* Function description: -* Writes the data to an open handle. -* Currently this function only outputs data to the console -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* pBuffer - Pointer to the data that shall be written -* NumBytes - Number of bytes to write -* Mode - The Mode that shall be used -* -* Return value: -* Number of bytes *not* written to the file/device -* -*/ -int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumBytes, int Mode) { - int r = 0; - - (void)Mode; - if (hFile == STDOUT) { - SEGGER_RTT_Write(0, (const char*)pBuffer, NumBytes); - return 0; - } - return r; -} - -/********************************************************************* -* -* _sys_read -* -* Function description: -* Reads data from an open handle. -* Currently this modules does nothing. -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* pBuffer - Pointer to buffer to store the read data -* NumBytes - Number of bytes to read -* Mode - The Mode that shall be used -* -* Return value: -* Number of bytes read from the file/device -* -*/ -int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int Mode) { - (void)hFile; - (void)pBuffer; - (void)NumBytes; - (void)Mode; - return (0); // Not implemented -} - -/********************************************************************* -* -* _sys_istty -* -* Function description: -* This function shall return whether the opened file -* is a console device or not. -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* -* Return value: -* 1 - Device is a console -* 0 - Device is not a console -* -*/ -int _sys_istty(FILEHANDLE hFile) { - if (hFile > 0x8000) { - return (1); - } - return (0); // Not implemented -} - -/********************************************************************* -* -* _sys_seek -* -* Function description: -* Seeks via the file to a specific position -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* Pos - -* -* Return value: -* int - -* -*/ -int _sys_seek(FILEHANDLE hFile, long Pos) { - (void)hFile; - (void)Pos; - return (0); // Not implemented -} - -/********************************************************************* -* -* _sys_ensure -* -* Function description: -* -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* -* Return value: -* int - -* -*/ -int _sys_ensure(FILEHANDLE hFile) { - (void)hFile; - return (-1); // Not implemented -} - -/********************************************************************* -* -* _sys_flen -* -* Function description: -* Returns the length of the opened file handle -* -* Parameters: -* hFile - Handle to a file opened via _sys_open -* -* Return value: -* Length of the file -* -*/ -long _sys_flen(FILEHANDLE hFile) { - (void)hFile; - return (0); // Not implemented -} - -/********************************************************************* -* -* _sys_tmpnam -* -* Function description: -* This function converts the file number fileno for a temporary -* file to a unique filename, for example, tmp0001. -* -* Parameters: -* pBuffer - Pointer to a buffer to store the name -* FileNum - file number to convert -* MaxLen - Size of the buffer -* -* Return value: -* 1 - Error -* 0 - Success -* -*/ -int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) { - (void)pBuffer; - (void)FileNum; - (void)MaxLen; - return (1); // Not implemented -} - -/********************************************************************* -* -* _sys_command_string -* -* Function description: -* This function shall execute a system command. -* -* Parameters: -* cmd - Pointer to the command string -* len - Length of the string -* -* Return value: -* == NULL - Command was not successfully executed -* == sCmd - Command was passed successfully -* -*/ -char * _sys_command_string(char * cmd, int len) { - (void)len; - return cmd; // Not implemented -} - -/********************************************************************* -* -* _sys_exit -* -* Function description: -* This function is called when the application returns from main -* -* Parameters: -* ReturnCode - Return code from the main function -* -* -*/ -void _sys_exit(int ReturnCode) { - (void)ReturnCode; - while (1); // Not implemented -} - -#if __ARMCC_VERSION >= 5000000 -/********************************************************************* -* -* stdout_putchar -* -* Function description: -* Put a character to the stdout -* -* Parameters: -* ch - Character to output -* -* -*/ -int stdout_putchar(int ch) { - (void)ch; - return ch; // Not implemented -} -#endif - -#endif -/*************************** End of file ****************************/ diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c deleted file mode 100644 index 5ce8457e1..000000000 --- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c +++ /dev/null @@ -1,247 +0,0 @@ -/********************************************************************* -* SEGGER Microcontroller GmbH * -* The Embedded Experts * -********************************************************************** -* * -* (c) 1995 - 2019 SEGGER Microcontroller GmbH * -* * -* www.segger.com Support: support@segger.com * -* * -********************************************************************** -* * -* SEGGER RTT * Real Time Transfer for embedded targets * -* * -********************************************************************** -* * -* All rights reserved. * -* * -* SEGGER strongly recommends to not make any changes * -* to or modify the source code of this software in order to stay * -* compatible with the RTT protocol and J-Link. * -* * -* Redistribution and use in source and binary forms, with or * -* without modification, are permitted provided that the following * -* condition is met: * -* * -* o Redistributions of source code must retain the above copyright * -* notice, this condition and the following disclaimer. * -* * -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * -* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * -* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * -* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * -* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * -* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * -* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * -* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * -* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * -* DAMAGE. * -* * -********************************************************************** ----------------------------END-OF-HEADER------------------------------ -File : SEGGER_RTT_Syscalls_SES.c -Purpose : Reimplementation of printf, puts and __getchar using RTT - in SEGGER Embedded Studio. - To use RTT for printf output, include this file in your - application. -Revision: $Rev: 18539 $ ----------------------------------------------------------------------- -*/ -#if (defined __SES_ARM) || (defined __SES_RISCV) || (defined __CROSSWORKS_ARM) - -#include "SEGGER_RTT.h" -#include -#include -#include "limits.h" -#include "__libc.h" -#include "__vfprintf.h" - -/********************************************************************* -* -* Defines, configurable -* -********************************************************************** -*/ -// -// Select string formatting implementation. -// -// RTT printf formatting -// - Configurable stack usage. (SEGGER_RTT_PRINTF_BUFFER_SIZE in SEGGER_RTT_Conf.h) -// - No maximum string length. -// - Limited conversion specifiers and flags. (See SEGGER_RTT_printf.c) -// Standard library printf formatting -// - Configurable formatting capabilities. -// - Full conversion specifier and flag support. -// - Maximum string length has to be known or (slightly) slower character-wise output. -// -// #define PRINTF_USE_SEGGER_RTT_FORMATTING 0 // Use standard library formatting -// #define PRINTF_USE_SEGGER_RTT_FORMATTING 1 // Use RTT formatting -// -#ifndef PRINTF_USE_SEGGER_RTT_FORMATTING - #define PRINTF_USE_SEGGER_RTT_FORMATTING 0 -#endif -// -// If using standard library formatting, -// select maximum output string buffer size or character-wise output. -// -// #define PRINTF_BUFFER_SIZE 0 // Use character-wise output -// #define PRINTF_BUFFER_SIZE 128 // Default maximum string length -// -#ifndef PRINTF_BUFFER_SIZE - #define PRINTF_BUFFER_SIZE 128 -#endif - -#if PRINTF_USE_SEGGER_RTT_FORMATTING // Use SEGGER RTT formatting implementation -/********************************************************************* -* -* Function prototypes -* -********************************************************************** -*/ -int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList); - -/********************************************************************* -* -* Global functions, printf -* -********************************************************************** -*/ -/********************************************************************* -* -* printf() -* -* Function description -* print a formatted string using RTT and SEGGER RTT formatting. -*/ -int printf(const char *fmt,...) { - int n; - va_list args; - - va_start (args, fmt); - n = SEGGER_RTT_vprintf(0, fmt, &args); - va_end(args); - return n; -} - -#elif PRINTF_BUFFER_SIZE == 0 // Use standard library formatting with character-wise output - -/********************************************************************* -* -* Static functions -* -********************************************************************** -*/ -static int _putchar(int x, __printf_tag_ptr ctx) { - (void)ctx; - SEGGER_RTT_Write(0, (char *)&x, 1); - return x; -} - -/********************************************************************* -* -* Global functions, printf -* -********************************************************************** -*/ -/********************************************************************* -* -* printf() -* -* Function description -* print a formatted string character-wise, using RTT and standard -* library formatting. -*/ -int printf(const char *fmt, ...) { - int n; - va_list args; - __printf_t iod; - - va_start(args, fmt); - iod.string = 0; - iod.maxchars = INT_MAX; - iod.output_fn = _putchar; - SEGGER_RTT_LOCK(); - n = __vfprintf(&iod, fmt, args); - SEGGER_RTT_UNLOCK(); - va_end(args); - return n; -} - -#else // Use standard library formatting with static buffer - -/********************************************************************* -* -* Global functions, printf -* -********************************************************************** -*/ -/********************************************************************* -* -* printf() -* -* Function description -* print a formatted string using RTT and standard library formatting. -*/ -int printf(const char *fmt,...) { - int n; - char aBuffer[PRINTF_BUFFER_SIZE]; - va_list args; - - va_start (args, fmt); - n = vsnprintf(aBuffer, sizeof(aBuffer), fmt, args); - if (n > (int)sizeof(aBuffer)) { - SEGGER_RTT_Write(0, aBuffer, sizeof(aBuffer)); - } else if (n > 0) { - SEGGER_RTT_Write(0, aBuffer, n); - } - va_end(args); - return n; -} -#endif - -/********************************************************************* -* -* Global functions -* -********************************************************************** -*/ -/********************************************************************* -* -* puts() -* -* Function description -* print a string using RTT. -*/ -int puts(const char *s) { - return SEGGER_RTT_WriteString(0, s); -} - -/********************************************************************* -* -* __putchar() -* -* Function description -* Write one character via RTT. -*/ -int __putchar(int x, __printf_tag_ptr ctx) { - (void)ctx; - SEGGER_RTT_Write(0, (char *)&x, 1); - return x; -} - -/********************************************************************* -* -* __getchar() -* -* Function description -* Wait for and get a character via RTT. -*/ -int __getchar() { - return SEGGER_RTT_WaitKey(); -} - -#endif -/****** End Of File *************************************************/ From e02eee74777446a5eb5445bef6e047284932e164 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 00:14:22 +0700 Subject: [PATCH 13/94] revert board flash latency to 8 --- hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 2 +- hw/bsp/stm32g4/family.c | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index b1a98ba97..6b00efc8f 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -87,7 +87,7 @@ static inline void board_clock_init(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8); //------------- HSI48 and CRS for USB -------------// RCC_OscInitTypeDef osc_hsi48 = {0}; diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 8b17c0643..5883b74b8 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -62,8 +62,7 @@ void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { } // Enable interrupt - //NVIC_SetPriority(UCPD1_IRQn, 0); -// NVIC_EnableIRQ(UCPD1_IRQn); + NVIC_EnableIRQ(UCPD1_IRQn); } uint8_t pd_rx_buf[262]; @@ -253,7 +252,7 @@ void board_init(void) board_vbus_sense_init(); -#if 0 +#if 1 // USB PD /* PWR register access (for disabling dead battery feature) */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); From 914e82b25dea1a7ec63ea4160a2e6ebb5e59a5db Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 09:36:37 +0700 Subject: [PATCH 14/94] able to receive first PD message --- hw/bsp/stm32g4/family.c | 49 +++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 5883b74b8..6c870ac7a 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -72,7 +72,7 @@ void UCPD1_IRQHandler(void) { uint32_t sr = UCPD1->SR; sr &= UCPD1->IMR; - TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); +// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { uint32_t vstate_cc[2]; @@ -83,6 +83,7 @@ void UCPD1_IRQHandler(void) { uint32_t cr = UCPD1->CR; + // TODO only support SNK for now, required highest voltage for now if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { TU_LOG1("Attach CC1\n"); cr &= ~UCPD_CR_PHYCCSEL; @@ -96,10 +97,12 @@ void UCPD1_IRQHandler(void) { cr &= ~UCPD_CR_PHYRXEN; } - // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | - /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | - UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + if (cr & UCPD_CR_PHYRXEN) { + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | + UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + } // Enable PD RX UCPD1->CR = cr; @@ -108,32 +111,40 @@ void UCPD1_IRQHandler(void) { UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; } + //------------- Receive -------------// if (sr & UCPD_SR_RXORDDET) { - // SOP: Start of Packet - // TODO DMA later - uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; - TU_LOG1_HEX(order_set); + // SOP: Start of Packet. + // uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + + // reset count when received SOP + pd_rx_count = 0; // ack UCPD1->ICR = UCPD_ICR_RXORDDETCF; } - if ( sr & UCPD_SR_RXMSGEND) { + if (sr & UCPD_SR_RXNE) { + // TODO DMA later + do { + pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; + } while (UCPD1->SR & UCPD_SR_RXNE); + } + + if (sr & UCPD_SR_RXMSGEND) { // End of message -// uint32_t payload_size = UCPD1->RX_PAYSZ; -// TU_LOG1_HEX(payload_size); -// -// for(uint32_t i=0; iRXDR; -// -// TU_LOG1("0x%02X ", pd_rx_buf[i]); -// } -// TU_LOG1("\n"); + uint32_t payload_size = UCPD1->RX_PAYSZ; // ack UCPD1->ICR = UCPD_ICR_RXMSGENDCF; } + if (sr & UCPD_SR_RXOVR) { + TU_LOG1("RXOVR\n"); + TU_LOG1_HEX(pd_rx_count); + // ack + UCPD1->ICR = UCPD_ICR_RXOVRCF; + } + // if (sr & UCPD_SR_RXNE) { // uint8_t data = UCPD1->RXDR; // pd_rx_buf[pd_rx_count++] = data; From b893f1d5417adf8cf874d6b2e7946582ca37982a Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 15:10:40 +0700 Subject: [PATCH 15/94] inital support for usb typec and pd example --- examples/typec/power_delivery/CMakeLists.txt | 32 ++++ examples/typec/power_delivery/Makefile | 11 ++ examples/typec/power_delivery/only.txt | 1 + examples/typec/power_delivery/src/main.c | 90 +++++++++ .../typec/power_delivery/src/tusb_config.h | 79 ++++++++ hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 8 +- hw/bsp/stm32g4/family.c | 133 +------------ hw/bsp/stm32g4/family.cmake | 1 + src/CMakeLists.txt | 2 + src/common/tusb_mcu.h | 2 + src/common/tusb_types.h | 91 +++++++-- src/portable/st/typec/typec_stm32.c | 181 ++++++++++++++++++ src/tusb.h | 5 + src/typec/tcd.h | 58 ++++++ src/typec/utcd.c | 48 +++++ src/typec/utcd.h | 54 ++++++ 16 files changed, 651 insertions(+), 145 deletions(-) create mode 100644 examples/typec/power_delivery/CMakeLists.txt create mode 100644 examples/typec/power_delivery/Makefile create mode 100644 examples/typec/power_delivery/only.txt create mode 100644 examples/typec/power_delivery/src/main.c create mode 100644 examples/typec/power_delivery/src/tusb_config.h create mode 100644 src/portable/st/typec/typec_stm32.c create mode 100644 src/typec/tcd.h create mode 100644 src/typec/utcd.c create mode 100644 src/typec/utcd.h diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt new file mode 100644 index 000000000..4ab8d5a65 --- /dev/null +++ b/examples/typec/power_delivery/CMakeLists.txt @@ -0,0 +1,32 @@ +cmake_minimum_required(VERSION 3.17) + +include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake) + +# gets PROJECT name for the example (e.g. -) +family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR}) + +project(${PROJECT} C CXX ASM) + +# Checks this example is valid for the family and initializes the project +family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR}) + +# Espressif has its own cmake build system +if(FAMILY STREQUAL "espressif") + return() +endif() + +add_executable(${PROJECT}) + +# Example source +target_sources(${PROJECT} PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c + ) + +# Example include +target_include_directories(${PROJECT} PUBLIC + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) + +# Configure compilation flags and libraries for the example... see the corresponding function +# in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT}) diff --git a/examples/typec/power_delivery/Makefile b/examples/typec/power_delivery/Makefile new file mode 100644 index 000000000..2a3d854fb --- /dev/null +++ b/examples/typec/power_delivery/Makefile @@ -0,0 +1,11 @@ +include ../../make.mk + +INC += \ + src \ + $(TOP)/hw \ + +# Example source +EXAMPLE_SOURCE += $(wildcard src/*.c) +SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) + +include ../../rules.mk diff --git a/examples/typec/power_delivery/only.txt b/examples/typec/power_delivery/only.txt new file mode 100644 index 000000000..657aeaac5 --- /dev/null +++ b/examples/typec/power_delivery/only.txt @@ -0,0 +1 @@ +mcu:STM32G4 diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c new file mode 100644 index 000000000..9d032b6bb --- /dev/null +++ b/examples/typec/power_delivery/src/main.c @@ -0,0 +1,90 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#include +#include +#include + +#include "bsp/board.h" +#include "tusb.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF PROTOTYPES +//--------------------------------------------------------------------+ + +/* Blink pattern + * - 250 ms : button is not pressed + * - 1000 ms : button is pressed (and hold) + */ +enum { + BLINK_PRESSED = 250, + BLINK_UNPRESSED = 1000 +}; + +static uint32_t blink_interval_ms = BLINK_UNPRESSED; + +void led_blinking_task(void); + +#define HELLO_STR "Hello from TinyUSB\r\n" + +int main(void) +{ + board_init(); + board_led_write(true); + + tuc_init(0, TYPEC_PORT_SNK); + + uint32_t start_ms = 0; + bool led_state = false; + + while (1) { + led_blinking_task(); + +// tuc_task(); + } +} + +#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3 +void app_main(void) +{ + main(); +} +#endif + +//--------------------------------------------------------------------+ +// BLINKING TASK +//--------------------------------------------------------------------+ +void led_blinking_task(void) +{ + static uint32_t start_ms = 0; + static bool led_state = false; + + // Blink every interval ms + if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time + start_ms += blink_interval_ms; + + board_led_write(led_state); + led_state = 1 - led_state; // toggle +} diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h new file mode 100644 index 000000000..deddcbfa4 --- /dev/null +++ b/examples/typec/power_delivery/src/tusb_config.h @@ -0,0 +1,79 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#ifndef _TUSB_CONFIG_H_ +#define _TUSB_CONFIG_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// special example that doesn't enable device or host stack +// This can cause some TinyUSB API missing, this define hack to allow us to fill those API +// to pass the compilation process +#define tud_int_handler(x) + +//-------------------------------------------------------------------- +// COMMON CONFIGURATION +//-------------------------------------------------------------------- + +// defined by compiler flags for flexibility +#ifndef CFG_TUSB_MCU + #error CFG_TUSB_MCU must be defined +#endif + +#ifndef CFG_TUSB_OS + #define CFG_TUSB_OS OPT_OS_NONE +#endif + +#define CFG_TUD_ENABLED 0 +#define CFG_TUH_ENABLED 0 + +// Enable TYPEC stack +#define CFG_TUC_ENABLED 1 + +// CFG_TUSB_DEBUG is defined by compiler in DEBUG build +// #define CFG_TUSB_DEBUG 0 + +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. + * Tinyusb use follows macros to declare transferring memory so that they can be put + * into those specific section. + * e.g + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) + */ +#ifndef CFG_TUSB_MEM_SECTION +#define CFG_TUSB_MEM_SECTION +#endif + +#ifndef CFG_TUSB_MEM_ALIGN +#define CFG_TUSB_MEM_ALIGN __attribute__ ((aligned(4))) +#endif + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_CONFIG_H_ */ diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 6b00efc8f..e61b13170 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -58,7 +58,7 @@ // RCC Clock //--------------------------------------------------------------------+ -// CPU Frequency (Core Clock) is 150MHz +// CPU Frequency (Core Clock) is 170 MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; @@ -74,9 +74,9 @@ static inline void board_clock_init(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; - RCC_OscInitStruct.PLL.PLLN = 75; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLN = 85; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 6c870ac7a..d0601b385 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -30,132 +30,6 @@ #include "bsp/board.h" #include "board.h" - -//--------------------------------------------------------------------+ -// USB PD -//--------------------------------------------------------------------+ - -void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { - (void) port_num; - - // Initialization phase: CFG1 - UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | - (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | - ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); - UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; - - // General programming sequence (with UCPD configured then enabled) - if (port_type == TUSB_TYPEC_PORT_SNK) { - // Enable both CC Phy - UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); - - // Read Voltage State on CC1 & CC2 fore initial state - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - - TU_LOG1_INT(vstate_cc[0]); - TU_LOG1_INT(vstate_cc[1]); - - // Enable CC1 & CC2 Interrupt - UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; - } - - // Enable interrupt - NVIC_EnableIRQ(UCPD1_IRQn); -} - -uint8_t pd_rx_buf[262]; -uint32_t pd_rx_count = 0; - -void UCPD1_IRQHandler(void) { - uint32_t sr = UCPD1->SR; - sr &= UCPD1->IMR; - -// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); - - if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - - TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); - - uint32_t cr = UCPD1->CR; - - // TODO only support SNK for now, required highest voltage for now - if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { - TU_LOG1("Attach CC1\n"); - cr &= ~UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; - } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { - TU_LOG1("Attach CC2\n"); - cr |= UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; - } else { - TU_LOG1("Detach\n"); - cr &= ~UCPD_CR_PHYRXEN; - } - - if (cr & UCPD_CR_PHYRXEN) { - // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | - UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | - UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; - } - - // Enable PD RX - UCPD1->CR = cr; - - // ack - UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; - } - - //------------- Receive -------------// - if (sr & UCPD_SR_RXORDDET) { - // SOP: Start of Packet. - // uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; - - // reset count when received SOP - pd_rx_count = 0; - - // ack - UCPD1->ICR = UCPD_ICR_RXORDDETCF; - } - - if (sr & UCPD_SR_RXNE) { - // TODO DMA later - do { - pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; - } while (UCPD1->SR & UCPD_SR_RXNE); - } - - if (sr & UCPD_SR_RXMSGEND) { - // End of message - uint32_t payload_size = UCPD1->RX_PAYSZ; - - // ack - UCPD1->ICR = UCPD_ICR_RXMSGENDCF; - } - - if (sr & UCPD_SR_RXOVR) { - TU_LOG1("RXOVR\n"); - TU_LOG1_HEX(pd_rx_count); - // ack - UCPD1->ICR = UCPD_ICR_RXOVRCF; - } - -// if (sr & UCPD_SR_RXNE) { -// uint8_t data = UCPD1->RXDR; -// pd_rx_buf[pd_rx_count++] = data; -// TU_LOG1_HEX(data); -// } - -// else { -// TU_LOG_LOCATION(); -// } -} - //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ @@ -174,6 +48,11 @@ void USBWakeUp_IRQHandler(void) tud_int_handler(0); } +// USB PD +void UCPD1_IRQHandler(void) { + tuc_int_handler(0); +} + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ @@ -274,8 +153,6 @@ void board_init(void) // Default CC1/CC2 is PB4/PB6 // PB4 ------> UCPD1_CC2 // PB6 ------> UCPD1_CC1 - - usbpd_init(0, TUSB_TYPEC_PORT_SNK); #endif } diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 2c10a9769..618563f66 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -90,6 +90,7 @@ function(family_configure_example TARGET) target_sources(${TARGET} PUBLIC # TinyUSB Port ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/typec/typec_stm32.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 3dbd72d61..ce4486ecd 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -32,6 +32,8 @@ function(add_tinyusb TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c + # typec + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c ) target_include_directories(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR} diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 48f765674..bb4483f7d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -199,6 +199,8 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32G4) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 + #define TUP_USBIP_TYPEC_STM32 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32G0) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 7b82c51d9..e6b350a40 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -232,16 +232,6 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) -//--------------------------------------------------------------------+ -// TYPE-C -//--------------------------------------------------------------------+ - -typedef enum { - TUSB_TYPEC_PORT_SRC, - TUSB_TYPEC_PORT_SNK, - TUSB_TYPEC_PORT_DRP -} tusb_typec_port_type_t; - //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ @@ -487,9 +477,9 @@ typedef struct TU_ATTR_PACKED uint16_t bcdDFUVersion; } tusb_desc_dfu_functional_t; -/*------------------------------------------------------------------*/ -/* Types - *------------------------------------------------------------------*/ +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ typedef struct TU_ATTR_PACKED{ union { struct TU_ATTR_PACKED { @@ -509,6 +499,81 @@ typedef struct TU_ATTR_PACKED{ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TYPEC_PORT_SRC, + TYPEC_PORT_SNK, + TYPEC_PORT_DRP +} typec_port_type_t; + +typedef enum { + TYPEC_MSG_CTRL_RESERVED = 0, // 0b00000: 0 + TYPEC_MSG_CTRL_GOOD_CRC, // 0b00001: 1 + TYPEC_MSG_CTRL_GO_TO_MIN, // 0b00010: 2 + TYPEC_MSG_CTRL_ACCEPT, // 0b00011: 3 + TYPEC_MSG_CTRL_REJECT, // 0b00100: 4 + TYPEC_MSG_CTRL_PING, // 0b00101: 5 + TYPEC_MSG_CTRL_PS_RDY, // 0b00110: 6 + TYPEC_MSG_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + TYPEC_MSG_CTRL_GET_SINK_CAP, // 0b01000: 8 + TYPEC_MSG_CTRL_DR_SWAP, // 0b01001: 9 + TYPEC_MSG_CTRL_PR_SWAP, // 0b01010: 10 + TYPEC_MSG_CTRL_VCONN_SWAP, // 0b01011: 11 + TYPEC_MSG_CTRL_WAIT, // 0b01100: 12 + TYPEC_MSG_CTRL_SOFT_RESET, // 0b01101: 13 + TYPEC_MSG_CTRL_DATA_RESET, // 0b01110: 14 + TYPEC_MSG_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + TYPEC_MSG_CTRL_NOT_SUPPORTED, // 0b10000: 16 + TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + TYPEC_MSG_CTRL_GET_STATUS, // 0b10010: 18 + TYPEC_MSG_CTRL_FR_SWAP, // 0b10011: 19 + TYPEC_MSG_CTRL_GET_PPS_STATUS, // 0b10100: 20 + TYPEC_MSG_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + TYPEC_MSG_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + TYPEC_MSG_CTRL_REVISION, // 0b11000: 24 +} typec_msg_ctrl_type_t; + +typedef enum { + TYPEC_MSG_DATA_RESERVED = 0, // 0b00000: 0 + TYPEC_MSG_DATA_SOURCE_CAP, // 0b00001: 1 + TYPEC_MSG_DATA_REQUEST, // 0b00010: 2 + TYPEC_MSG_DATA_BIST, // 0b00011: 3 + TYPEC_MSG_DATA_SINK_CAP, // 0b00100: 4 + TYPEC_MSG_DATA_BATTERY_STATUS, // 0b00101: 5 + TYPEC_MSG_DATA_ALERT, // 0b00110: 6 + TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + TYPEC_MSG_DATA_ENTER_USB, // 0b01000: 8 + TYPEC_MSG_DATA_EPR_REQUEST, // 0b01001: 9 + TYPEC_MSG_DATA_EPR_MODE, // 0b01010: 10 + TYPEC_MSG_DATA_SRC_INFO, // 0b01011: 11 + TYPEC_MSG_DATA_REVISION, // 0b01100: 12 + TYPEC_MSG_DATA_RESERVED_13, // 0b01101: 13 + TYPEC_MSG_DATA_RESERVED_14, // 0b01110: 14 + TYPEC_MSG_DATA_VENDOR_DEFINED, // 0b01111: 15 +} typec_msg_data_type_t; + +typedef struct TU_ATTR_PACKED { + uint16_t msg_type : 5; // [0:4] + uint16_t data_role : 1; // [5] SOP only + uint16_t specs_rev : 2; // [6:7] + uint16_t power_role : 1; // [8] SOP only + uint16_t msg_id : 3; // [9:11] + uint16_t n_data_obj : 3; // [12:14] + uint16_t extended : 1; // [15] +} tusb_typec_message_header_t; + +typedef struct TU_ATTR_PACKED { + uint16_t data_size : 9; // [0:8] + uint16_t reserved : 1; // [9] + uint16_t request_chunk : 1; // [10] + uint16_t chunk_number : 4; // [11:14] + uint16_t chunked : 1; // [15] +} tusb_typec_message_header_extended_t; + TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c new file mode 100644 index 000000000..fd029473d --- /dev/null +++ b/src/portable/st/typec/typec_stm32.c @@ -0,0 +1,181 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tusb_option.h" +#include "typec/tcd.h" + +#if CFG_TUC_ENABLED && defined(TUP_USBIP_TYPEC_STM32) + +#include "common/tusb_common.h" + +#include "stm32g4xx.h" + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +uint8_t pd_rx_buf[262]; +uint32_t pd_rx_count = 0; +uint8_t pd_rx_order_set; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { + (void) rhport; + + // Initialization phase: CFG1 + UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | + (0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // General programming sequence (with UCPD configured then enabled) + if (port_type == TYPEC_PORT_SNK) { + // Enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + + // Read Voltage State on CC1 & CC2 fore initial state + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1_INT(vstate_cc[0]); + TU_LOG1_INT(vstate_cc[1]); + + // Enable CC1 & CC2 Interrupt + UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; + } + + return true; +} + +// Enable interrupt +void tcd_int_enable (uint8_t rhport) { + (void) rhport; + NVIC_EnableIRQ(UCPD1_IRQn); +} + +// Disable interrupt +void tcd_int_disable(uint8_t rhport) { + (void) rhport; + NVIC_DisableIRQ(UCPD1_IRQn); +} + +void tcd_int_handler(uint8_t rhport) { + (void) rhport; + + uint32_t sr = UCPD1->SR; + sr &= UCPD1->IMR; + +// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); + + if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + + uint32_t cr = UCPD1->CR; + + // TODO only support SNK for now, required highest voltage for now + if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { + TU_LOG1("Attach CC1\n"); + cr &= ~UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { + TU_LOG1("Attach CC2\n"); + cr |= UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else { + TU_LOG1("Detach\n"); + cr &= ~UCPD_CR_PHYRXEN; + } + + if (cr & UCPD_CR_PHYRXEN) { + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | + UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + } + + // Enable PD RX + UCPD1->CR = cr; + + // ack + UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; + } + + //------------- Receive -------------// + if (sr & UCPD_SR_RXORDDET) { + // SOP: Start of Packet. + pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + + // reset count when received SOP + pd_rx_count = 0; + + // ack + UCPD1->ICR = UCPD_ICR_RXORDDETCF; + } + + if (sr & UCPD_SR_RXNE) { + // TODO DMA later + do { + pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; + } while (UCPD1->SR & UCPD_SR_RXNE); + } + + if (sr & UCPD_SR_RXMSGEND) { + // End of message + + // Skip if CRC failed + if (!(sr & UCPD_SR_RXERR)) { + uint32_t payload_size = UCPD1->RX_PAYSZ; + TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + } + + // ack + UCPD1->ICR = UCPD_ICR_RXMSGENDCF; + } + + if (sr & UCPD_SR_RXOVR) { + TU_LOG1("RXOVR\n"); + TU_LOG1_HEX(pd_rx_count); + // ack + UCPD1->ICR = UCPD_ICR_RXOVRCF; + } + +// if (sr & UCPD_SR_RXNE) { +// uint8_t data = UCPD1->RXDR; +// pd_rx_buf[pd_rx_count++] = data; +// TU_LOG1_HEX(data); +// } + +// else { +// TU_LOG_LOCATION(); +// } +} + +#endif diff --git a/src/tusb.h b/src/tusb.h index b776d7d01..0b87b1969 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -40,6 +40,11 @@ #include "class/hid/hid.h" +//------------- TypeC -------------// +#if CFG_TUC_ENABLED + #include "typec/utcd.h" +#endif + //------------- HOST -------------// #if CFG_TUH_ENABLED #include "host/usbh.h" diff --git a/src/typec/tcd.h b/src/typec/tcd.h new file mode 100644 index 000000000..397c0ac83 --- /dev/null +++ b/src/typec/tcd.h @@ -0,0 +1,58 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_TCD_H_ +#define _TUSB_TCD_H_ + +#include "common/tusb_common.h" +#include "osal/osal.h" +#include "common/tusb_fifo.h" + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +// Initialize controller +bool tcd_init(uint8_t rhport, typec_port_type_t port_type); + +// Enable interrupt +void tcd_int_enable (uint8_t rhport); + +// Disable interrupt +void tcd_int_disable(uint8_t rhport); + +// Interrupt Handler +void tcd_int_handler(uint8_t rhport); + +#endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c new file mode 100644 index 000000000..baa95fbe5 --- /dev/null +++ b/src/typec/utcd.c @@ -0,0 +1,48 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUC_ENABLED + +#include "tcd.h" + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tuc_init(uint8_t rhport, typec_port_type_t port_type) { + TU_ASSERT(tcd_init(rhport, port_type)); + tcd_int_enable(rhport); + return true; +} + +#endif diff --git a/src/typec/utcd.h b/src/typec/utcd.h new file mode 100644 index 000000000..2f9b84fb7 --- /dev/null +++ b/src/typec/utcd.h @@ -0,0 +1,54 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_UTCD_H_ +#define _TUSB_UTCD_H_ + +#include "common/tusb_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// Application API +//--------------------------------------------------------------------+ + +// init typec stack +bool tuc_init(uint8_t rhport, typec_port_type_t port_type); + +#ifndef _TUSB_TCD_H_ +extern void tcd_int_handler(uint8_t rhport); +#endif + +// Interrupt handler, name alias to TCD +#define tuc_int_handler tcd_int_handler + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +#endif From 8bb012e50b39d9ed05c80509e69f9e26d463367c Mon Sep 17 00:00:00 2001 From: Aladdin Bakosh Date: Wed, 7 Jun 2023 12:01:59 +0200 Subject: [PATCH 16/94] fix(RA): static assert RUSB2 register --- src/portable/renesas/rusb2/rusb2_type.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h index d80ecc62e..90ba4f012 100644 --- a/src/portable/renesas/rusb2/rusb2_type.h +++ b/src/portable/renesas/rusb2/rusb2_type.h @@ -1599,6 +1599,7 @@ TU_ATTR_BIT_FIELD_ORDER_END //--------------------------------------------------------------------+ TU_VERIFY_STATIC(sizeof(RUSB2_PIPE_TR_t) == 4, "incorrect size"); +TU_VERIFY_STATIC(sizeof(RUSB2_REG_t) == 1032, "incorrect size"); TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSCFG ) == 0x00000000, "incorrect offset"); TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BUSWAIT ) == 0x00000002, "incorrect offset"); From 9b7dee563e83a548f0d0fb68dd991a868a6427c9 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 7 Jun 2023 18:57:48 +0700 Subject: [PATCH 17/94] able to response with good crc --- examples/typec/power_delivery/src/main.c | 2 +- src/common/tusb_mcu.h | 5 + src/common/tusb_types.h | 112 ++++++++++++---------- src/device/usbd.c | 10 ++ src/host/usbh.c | 2 +- src/portable/st/typec/typec_stm32.c | 113 +++++++++++++++++++---- src/typec/tcd.h | 15 ++- src/typec/utcd.c | 57 +++++++++++- src/typec/utcd.h | 16 +++- 9 files changed, 257 insertions(+), 75 deletions(-) diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c index 9d032b6bb..648345a55 100644 --- a/examples/typec/power_delivery/src/main.c +++ b/examples/typec/power_delivery/src/main.c @@ -54,7 +54,7 @@ int main(void) board_init(); board_led_write(true); - tuc_init(0, TYPEC_PORT_SNK); + tuc_init(0, TUSB_TYPEC_PORT_SNK); uint32_t start_ms = 0; bool led_state = false; diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index bb4483f7d..f89467e75 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -197,12 +197,17 @@ #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) + // Device controller #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 + + // TypeC controller #define TUP_USBIP_TYPEC_STM32 #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_TYPEC_RHPORTS_NUM 1 + #elif TU_CHECK_MCU(OPT_MCU_STM32G0) #define TUP_USBIP_FSDEV #define TUP_USBIP_FSDEV_STM32 diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e6b350a40..c92320e5c 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -504,67 +504,75 @@ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); //--------------------------------------------------------------------+ typedef enum { - TYPEC_PORT_SRC, - TYPEC_PORT_SNK, - TYPEC_PORT_DRP -} typec_port_type_t; + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; typedef enum { - TYPEC_MSG_CTRL_RESERVED = 0, // 0b00000: 0 - TYPEC_MSG_CTRL_GOOD_CRC, // 0b00001: 1 - TYPEC_MSG_CTRL_GO_TO_MIN, // 0b00010: 2 - TYPEC_MSG_CTRL_ACCEPT, // 0b00011: 3 - TYPEC_MSG_CTRL_REJECT, // 0b00100: 4 - TYPEC_MSG_CTRL_PING, // 0b00101: 5 - TYPEC_MSG_CTRL_PS_RDY, // 0b00110: 6 - TYPEC_MSG_CTRL_GET_SOURCE_CAP, // 0b00111: 7 - TYPEC_MSG_CTRL_GET_SINK_CAP, // 0b01000: 8 - TYPEC_MSG_CTRL_DR_SWAP, // 0b01001: 9 - TYPEC_MSG_CTRL_PR_SWAP, // 0b01010: 10 - TYPEC_MSG_CTRL_VCONN_SWAP, // 0b01011: 11 - TYPEC_MSG_CTRL_WAIT, // 0b01100: 12 - TYPEC_MSG_CTRL_SOFT_RESET, // 0b01101: 13 - TYPEC_MSG_CTRL_DATA_RESET, // 0b01110: 14 - TYPEC_MSG_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 - TYPEC_MSG_CTRL_NOT_SUPPORTED, // 0b10000: 16 - TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 - TYPEC_MSG_CTRL_GET_STATUS, // 0b10010: 18 - TYPEC_MSG_CTRL_FR_SWAP, // 0b10011: 19 - TYPEC_MSG_CTRL_GET_PPS_STATUS, // 0b10100: 20 - TYPEC_MSG_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 - TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 - TYPEC_MSG_CTRL_GET_SOURCE_INFO, // 0b10111: 23 - TYPEC_MSG_CTRL_REVISION, // 0b11000: 24 -} typec_msg_ctrl_type_t; + TUSB_PD_CTRL_RESERVED = 0, // 0b00000: 0 + TUSB_PD_CTRL_GOOD_CRC, // 0b00001: 1 + TUSB_PD_CTRL_GO_TO_MIN, // 0b00010: 2 + TUSB_PD_CTRL_ACCEPT, // 0b00011: 3 + TUSB_PD_CTRL_REJECT, // 0b00100: 4 + TUSB_PD_CTRL_PING, // 0b00101: 5 + TUSB_PD_CTRL_PS_RDY, // 0b00110: 6 + TUSB_PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + TUSB_PD_CTRL_GET_SINK_CAP, // 0b01000: 8 + TUSB_PD_CTRL_DR_SWAP, // 0b01001: 9 + TUSB_PD_CTRL_PR_SWAP, // 0b01010: 10 + TUSB_PD_CTRL_VCONN_SWAP, // 0b01011: 11 + TUSB_PD_CTRL_WAIT, // 0b01100: 12 + TUSB_PD_CTRL_SOFT_RESET, // 0b01101: 13 + TUSB_PD_CTRL_DATA_RESET, // 0b01110: 14 + TUSB_PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + TUSB_PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 + TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + TUSB_PD_CTRL_GET_STATUS, // 0b10010: 18 + TUSB_PD_CTRL_FR_SWAP, // 0b10011: 19 + TUSB_PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 + TUSB_PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + TUSB_PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + TUSB_PD_CTRL_REVISION, // 0b11000: 24 +} tusb_pd_ctrl_type_t; typedef enum { - TYPEC_MSG_DATA_RESERVED = 0, // 0b00000: 0 - TYPEC_MSG_DATA_SOURCE_CAP, // 0b00001: 1 - TYPEC_MSG_DATA_REQUEST, // 0b00010: 2 - TYPEC_MSG_DATA_BIST, // 0b00011: 3 - TYPEC_MSG_DATA_SINK_CAP, // 0b00100: 4 - TYPEC_MSG_DATA_BATTERY_STATUS, // 0b00101: 5 - TYPEC_MSG_DATA_ALERT, // 0b00110: 6 - TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7 - TYPEC_MSG_DATA_ENTER_USB, // 0b01000: 8 - TYPEC_MSG_DATA_EPR_REQUEST, // 0b01001: 9 - TYPEC_MSG_DATA_EPR_MODE, // 0b01010: 10 - TYPEC_MSG_DATA_SRC_INFO, // 0b01011: 11 - TYPEC_MSG_DATA_REVISION, // 0b01100: 12 - TYPEC_MSG_DATA_RESERVED_13, // 0b01101: 13 - TYPEC_MSG_DATA_RESERVED_14, // 0b01110: 14 - TYPEC_MSG_DATA_VENDOR_DEFINED, // 0b01111: 15 -} typec_msg_data_type_t; + TUSB_PD_DATA_RESERVED = 0, // 0b00000: 0 + TUSB_PD_DATA_SOURCE_CAP, // 0b00001: 1 + TUSB_PD_DATA_REQUEST, // 0b00010: 2 + TUSB_PD_DATA_BIST, // 0b00011: 3 + TUSB_PD_DATA_SINK_CAP, // 0b00100: 4 + TUSB_PD_DATA_BATTERY_STATUS, // 0b00101: 5 + TUSB_PD_DATA_ALERT, // 0b00110: 6 + TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + TUSB_PD_DATA_ENTER_USB, // 0b01000: 8 + TUSB_PD_DATA_EPR_REQUEST, // 0b01001: 9 + TUSB_PD_DATA_EPR_MODE, // 0b01010: 10 + TUSB_PD_DATA_SRC_INFO, // 0b01011: 11 + TUSB_PD_DATA_REVISION, // 0b01100: 12 + TUSB_PD_DATA_RESERVED_13, // 0b01101: 13 + TUSB_PD_DATA_RESERVED_14, // 0b01110: 14 + TUSB_PD_DATA_VENDOR_DEFINED, // 0b01111: 15 +} tusb_pd_data_type_t; + +enum { + TUSB_PD_REV10 = 0x0, + TUSB_PD_REV20 = 0x1, + TUSB_PD_REV30 = 0x2, +}; typedef struct TU_ATTR_PACKED { uint16_t msg_type : 5; // [0:4] - uint16_t data_role : 1; // [5] SOP only + uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP uint16_t specs_rev : 2; // [6:7] - uint16_t power_role : 1; // [8] SOP only + uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source uint16_t msg_id : 3; // [9:11] uint16_t n_data_obj : 3; // [12:14] uint16_t extended : 1; // [15] -} tusb_typec_message_header_t; +} tusb_pd_header_t; + +TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct"); typedef struct TU_ATTR_PACKED { uint16_t data_size : 9; // [0:8] @@ -572,7 +580,9 @@ typedef struct TU_ATTR_PACKED { uint16_t request_chunk : 1; // [10] uint16_t chunk_number : 4; // [11:14] uint16_t chunked : 1; // [15] -} tusb_typec_message_header_extended_t; +} tusb_pd_header_extended_t; + +TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct"); TU_ATTR_PACKED_END // End of all packed definitions diff --git a/src/device/usbd.c b/src/device/usbd.c index 409a5ec10..44c2530ce 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -252,9 +252,19 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid) drvid -= _app_driver_count; } + // when there is no built-in drivers BUILTIN_DRIVER_COUNT = 0 will cause -Wtype-limits warning +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wtype-limits" +#endif + // Built-in drivers if (drvid < BUILTIN_DRIVER_COUNT) return &_usbd_driver[drvid]; +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + return NULL; } diff --git a/src/host/usbh.c b/src/host/usbh.c index 6159044ab..98e959a12 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -724,7 +724,7 @@ uint8_t* usbh_get_enum_buf(void) void usbh_int_set(bool enabled) { - // TODO all host controller if multiple is used + // TODO all host controller if multiple are used since they shared the same event queue if (enabled) { hcd_int_enable(_usbh_controller); diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index fd029473d..79f37b729 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -29,20 +29,43 @@ #include "common/tusb_common.h" -#include "stm32g4xx.h" - -//--------------------------------------------------------------------+ -// -//--------------------------------------------------------------------+ -uint8_t pd_rx_buf[262]; -uint32_t pd_rx_count = 0; -uint8_t pd_rx_order_set; +#if CFG_TUSB_MCU == OPT_MCU_STM32G4 + #include "stm32g4xx.h" +#else + #error "Unsupported STM32 family" +#endif //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { +#define PHY_SYNC1 0x18u +#define PHY_SYNC2 0x11u +#define PHY_SYNC3 0x06u +#define PHY_RST1 0x07u +#define PHY_RST2 0x19u +#define PHY_EOP 0x0Du + +#define PHY_ORDERED_SET_SOP (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC2<<15u)) // SOP Ordered set coding +#define PHY_ORDERED_SET_SOP_P (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC3<<15u)) // SOP' Ordered set coding +#define PHY_ORDERED_SET_SOP_PP (PHY_SYNC1 | (PHY_SYNC3<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC3<<15u)) // SOP'' Ordered set coding +#define PHY_ORDERED_SET_HARD_RESET (PHY_RST1 | (PHY_RST1<<5u) | (PHY_RST1<<10u) | (PHY_RST2<<15u )) // Hard Reset Ordered set coding +#define PHY_ORDERED_SET_CABLE_RESET (PHY_RST1 | (PHY_SYNC1<<5u) | (PHY_RST1<<10u) | (PHY_SYNC3<<15u)) // Cable Reset Ordered set coding +#define PHY_ORDERED_SET_SOP_P_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_RST2<<10u) | (PHY_SYNC3<<15u)) // SOP' Debug Ordered set coding +#define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding + + +static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4); +static uint32_t rx_count = 0; + +static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4); +static uint32_t tx_count; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { (void) rhport; // Initialization phase: CFG1 @@ -52,7 +75,7 @@ bool tcd_init(uint8_t rhport, typec_port_type_t port_type) { UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; // General programming sequence (with UCPD configured then enabled) - if (port_type == TYPEC_PORT_SNK) { + if (port_type == TUSB_TYPEC_PORT_SNK) { // Enable both CC Phy UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); @@ -83,6 +106,19 @@ void tcd_int_disable(uint8_t rhport) { NVIC_DisableIRQ(UCPD1_IRQn); } +bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { + (void) rhport; + + return true; +} + +bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { + (void) rhport; + (void) buffer; + (void) total_bytes; + return false; +} + void tcd_int_handler(uint8_t rhport) { (void) rhport; @@ -116,7 +152,7 @@ void tcd_int_handler(uint8_t rhport) { if (cr & UCPD_CR_PHYRXEN) { // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD1->IMR |= UCPD_IMR_TXISIE | UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; } @@ -128,13 +164,13 @@ void tcd_int_handler(uint8_t rhport) { UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; } - //------------- Receive -------------// + //------------- RX -------------// if (sr & UCPD_SR_RXORDDET) { // SOP: Start of Packet. - pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; // reset count when received SOP - pd_rx_count = 0; + rx_count = 0; // ack UCPD1->ICR = UCPD_ICR_RXORDDETCF; @@ -143,17 +179,38 @@ void tcd_int_handler(uint8_t rhport) { if (sr & UCPD_SR_RXNE) { // TODO DMA later do { - pd_rx_buf[pd_rx_count++] = UCPD1->RXDR; + rx_buf[rx_count++] = UCPD1->RXDR; } while (UCPD1->SR & UCPD_SR_RXNE); + + // no ack needed } + // End of message if (sr & UCPD_SR_RXMSGEND) { - // End of message // Skip if CRC failed if (!(sr & UCPD_SR_RXERR)) { uint32_t payload_size = UCPD1->RX_PAYSZ; - TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + // TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); + + tusb_pd_header_t const* rx_header = (tusb_pd_header_t const*) rx_buf; + (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) { + .msg_type = TUSB_PD_CTRL_GOOD_CRC, + .data_role = 0, // UFP + .specs_rev = TUSB_PD_REV30, + .power_role = 0, // Sink + .msg_id = rx_header->msg_id, + .n_data_obj = 0, + .extended = 0 + }; + tx_count = 0; + + // response with good crc + UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; + UCPD1->TX_PAYSZ = 2; + UCPD1->CR |= UCPD_CR_TXSEND; // will trigger TXIS interrupt + + // notify stack after good crc ? } // ack @@ -162,11 +219,31 @@ void tcd_int_handler(uint8_t rhport) { if (sr & UCPD_SR_RXOVR) { TU_LOG1("RXOVR\n"); - TU_LOG1_HEX(pd_rx_count); + TU_LOG1_HEX(rx_count); // ack UCPD1->ICR = UCPD_ICR_RXOVRCF; } + //------------- TX -------------// + if (sr & UCPD_SR_TXIS) { + // TU_LOG1("TXIS\n"); + + // TODO DMA later + do { + UCPD1->TXDR = tx_buf[tx_count++]; + } while (UCPD1->SR & UCPD_SR_TXIS); + + // no ack needed + } + + if (sr & UCPD_SR_TXMSGSENT) { + // all byte sent + TU_LOG1("TXMSGSENT\n"); + + // ack + UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; + } + // if (sr & UCPD_SR_RXNE) { // uint8_t data = UCPD1->RXDR; // pd_rx_buf[pd_rx_count++] = data; diff --git a/src/typec/tcd.h b/src/typec/tcd.h index 397c0ac83..e823bf8d7 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -38,13 +38,19 @@ extern "C" { //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +typedef struct { + uint8_t rhport; + uint8_t event_id; + + +} tcd_event_t;; //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ // Initialize controller -bool tcd_init(uint8_t rhport, typec_port_type_t port_type); +bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type); // Enable interrupt void tcd_int_enable (uint8_t rhport); @@ -55,4 +61,11 @@ void tcd_int_disable(uint8_t rhport); // Interrupt Handler void tcd_int_handler(uint8_t rhport); +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); +bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index baa95fbe5..b5f9965fe 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -29,20 +29,75 @@ #if CFG_TUC_ENABLED #include "tcd.h" +#include "utcd.h" //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +// Debug level of USBD +#define UTCD_DEBUG 2 +#define TU_LOG_UTCD(...) TU_LOG(UTCD_DEBUG, __VA_ARGS__) + +// Event queue +// utcd_int_set() is used as mutex in OS NONE config +void utcd_int_set(bool enabled); +OSAL_QUEUE_DEF(utcd_int_set, utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); +tu_static osal_queue_t utcd_q; + +// if stack is initialized +static bool utcd_inited = false; + +// if port is initialized +static bool port_inited[TUP_TYPEC_RHPORTS_NUM]; //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +bool tuc_inited(uint8_t rhport) { + return utcd_inited && port_inited[rhport]; +} + +bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { + // Initialize stack + if (!utcd_inited) { + tu_memclr(port_inited, sizeof(port_inited)); + + utcd_q = osal_queue_create(&utcd_qdef); + TU_ASSERT(utcd_q != NULL); + + utcd_inited = true; + } + + // skip if port already initialized + if ( port_inited[rhport] ) { + return true; + } + + TU_LOG_UTCD("UTCD init on port %u\r\n", rhport); -bool tuc_init(uint8_t rhport, typec_port_type_t port_type) { TU_ASSERT(tcd_init(rhport, port_type)); tcd_int_enable(rhport); + + port_inited[rhport] = true; return true; } + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ +void utcd_int_set(bool enabled) { + // Disable all controllers since they shared the same event queue + for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) { + if ( port_inited[p] ) { + if (enabled) { + tcd_int_enable(p); + }else { + tcd_int_disable(p); + } + } + } +} + #endif diff --git a/src/typec/utcd.h b/src/typec/utcd.h index 2f9b84fb7..06a62ef23 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -33,12 +33,24 @@ extern "C" { #endif +//--------------------------------------------------------------------+ +// TypeC Configuration +//--------------------------------------------------------------------+ + +#ifndef CFG_TUC_TASK_QUEUE_SZ +#define CFG_TUC_TASK_QUEUE_SZ 16 +#endif + + //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ -// init typec stack -bool tuc_init(uint8_t rhport, typec_port_type_t port_type); +// Init typec stack on a port +bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type); + +// Check if typec port is initialized +bool tuc_inited(uint8_t rhport); #ifndef _TUSB_TCD_H_ extern void tcd_int_handler(uint8_t rhport); From 0493983a8ff7d068bd1ef94bcea92846cbe4157e Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Wed, 7 Jun 2023 14:46:14 -0500 Subject: [PATCH 18/94] movement of TOP in c0ecf8b5 broke RP2040 SDK build --- hw/bsp/family_support.cmake | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index fdcd9a983..d80b54ef8 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -4,6 +4,7 @@ include(CMakePrintHelpers) # TOP is path to root directory set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..") +get_filename_component(TOP ${TOP} ABSOLUTE) # Default to gcc if (NOT DEFINED TOOLCHAIN) From 7fd0a17bc3eb1e992865c851c3d24484131fa284 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Jun 2023 09:11:29 +0700 Subject: [PATCH 19/94] default CFG_TUC_ENABLED to 0 --- src/tusb_option.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/tusb_option.h b/src/tusb_option.h index 948c9edf3..427d19719 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -483,6 +483,14 @@ #endif +//--------------------------------------------------------------------+ +// TypeC Options (Default) +//--------------------------------------------------------------------+ + +#ifndef CFG_TUC_ENABLED +#define CFG_TUC_ENABLED 0 +#endif + //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------ From fc761953b323b7565c42254fcfbb248520d83e0e Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Jun 2023 09:34:15 +0700 Subject: [PATCH 20/94] define tuc_int_handler() to empty if TUC not enabled --- src/tusb_option.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/tusb_option.h b/src/tusb_option.h index 427d19719..bb669e693 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -489,6 +489,8 @@ #ifndef CFG_TUC_ENABLED #define CFG_TUC_ENABLED 0 + +#define tuc_int_handler(_p) #endif //------------------------------------------------------------------ From 9c2a8490afadd47d5847793a806e2dce51565868 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Jun 2023 13:37:37 +0700 Subject: [PATCH 21/94] dma rx works well --- .../boards/b_g474e_dpow1/cubemx/board.ioc | 194 ++++++++++++++++++ hw/bsp/stm32g4/family.c | 7 +- src/portable/st/typec/typec_stm32.c | 80 +++++++- 3 files changed, 267 insertions(+), 14 deletions(-) create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc new file mode 100644 index 000000000..6ce126f84 --- /dev/null +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc @@ -0,0 +1,194 @@ +#MicroXplorer Configuration settings - do not modify +CAD.formats= +CAD.pinconfig= +CAD.provider= +Dma.Request0=UCPD1_RX +Dma.Request1=UCPD1_TX +Dma.RequestsNb=2 +Dma.UCPD1_RX.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.UCPD1_RX.0.EventEnable=DISABLE +Dma.UCPD1_RX.0.Instance=DMA1_Channel1 +Dma.UCPD1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.UCPD1_RX.0.MemInc=DMA_MINC_ENABLE +Dma.UCPD1_RX.0.Mode=DMA_NORMAL +Dma.UCPD1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.UCPD1_RX.0.PeriphInc=DMA_PINC_DISABLE +Dma.UCPD1_RX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.UCPD1_RX.0.Priority=DMA_PRIORITY_HIGH +Dma.UCPD1_RX.0.RequestNumber=1 +Dma.UCPD1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.UCPD1_RX.0.SignalID=NONE +Dma.UCPD1_RX.0.SyncEnable=DISABLE +Dma.UCPD1_RX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.UCPD1_RX.0.SyncRequestNumber=1 +Dma.UCPD1_RX.0.SyncSignalID=NONE +Dma.UCPD1_TX.1.Direction=DMA_MEMORY_TO_PERIPH +Dma.UCPD1_TX.1.EventEnable=DISABLE +Dma.UCPD1_TX.1.Instance=DMA1_Channel2 +Dma.UCPD1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.UCPD1_TX.1.MemInc=DMA_MINC_ENABLE +Dma.UCPD1_TX.1.Mode=DMA_NORMAL +Dma.UCPD1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.UCPD1_TX.1.PeriphInc=DMA_PINC_DISABLE +Dma.UCPD1_TX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.UCPD1_TX.1.Priority=DMA_PRIORITY_HIGH +Dma.UCPD1_TX.1.RequestNumber=1 +Dma.UCPD1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.UCPD1_TX.1.SignalID=NONE +Dma.UCPD1_TX.1.SyncEnable=DISABLE +Dma.UCPD1_TX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.UCPD1_TX.1.SyncRequestNumber=1 +Dma.UCPD1_TX.1.SyncSignalID=NONE +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=true +Mcu.CPN=STM32G474RET3 +Mcu.Family=STM32G4 +Mcu.IP0=DMA +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SYS +Mcu.IP4=UCPD1 +Mcu.IP5=USART3 +Mcu.IPNb=6 +Mcu.Name=STM32G474R(B-C-E)Tx +Mcu.Package=LQFP64 +Mcu.Pin0=PC10 +Mcu.Pin1=PC11 +Mcu.Pin2=PB4 +Mcu.Pin3=PB6 +Mcu.Pin4=VP_SYS_VS_Systick +Mcu.Pin5=VP_SYS_VS_DBSignals +Mcu.PinsNb=6 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32G474RETx +MxCube.Version=6.8.1 +MxDb.Version=DB.6.0.81 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false +NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true +NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false +PB4.Mode=Sink_AllSignals +PB4.Signal=UCPD1_CC2 +PB6.Mode=Sink_AllSignals +PB6.Signal=UCPD1_CC1 +PC10.GPIOParameters=GPIO_PuPd +PC10.GPIO_PuPd=GPIO_PULLUP +PC10.Mode=Asynchronous +PC10.Signal=USART3_TX +PC11.GPIOParameters=GPIO_PuPd +PC11.GPIO_PuPd=GPIO_PULLUP +PC11.Mode=Asynchronous +PC11.Signal=USART3_RX +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32G474RETx +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.1 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=2 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=board.ioc +ProjectManager.ProjectName=board +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=Makefile +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_UCPD1_Init-UCPD1-false-LL-true +RCC.ADC12Freq_Value=150000000 +RCC.ADC345Freq_Value=150000000 +RCC.AHBFreq_Value=150000000 +RCC.APB1Freq_Value=150000000 +RCC.APB1TimFreq_Value=150000000 +RCC.APB2Freq_Value=150000000 +RCC.APB2TimFreq_Value=150000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=150000000 +RCC.EXTERNAL_CLOCK_VALUE=12288000 +RCC.FCLKCortexFreq_Value=150000000 +RCC.FDCANFreq_Value=150000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=150000000 +RCC.HRTIM1Freq_Value=150000000 +RCC.HSE_VALUE=24000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=150000000 +RCC.I2C2Freq_Value=150000000 +RCC.I2C3Freq_Value=150000000 +RCC.I2C4Freq_Value=150000000 +RCC.I2SFreq_Value=150000000 +RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.LPTIM1Freq_Value=150000000 +RCC.LPUART1Freq_Value=150000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSE_VALUE=32768 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=16000000 +RCC.PLLM=RCC_PLLM_DIV4 +RCC.PLLN=75 +RCC.PLLPoutputFreq_Value=150000000 +RCC.PLLQ=RCC_PLLQ_DIV4 +RCC.PLLQoutputFreq_Value=75000000 +RCC.PLLRCLKFreq_Value=150000000 +RCC.PWRFreq_Value=150000000 +RCC.QSPIFreq_Value=150000000 +RCC.RNGFreq_Value=75000000 +RCC.SAI1Freq_Value=150000000 +RCC.SYSCLKFreq_VALUE=150000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=150000000 +RCC.UART5Freq_Value=150000000 +RCC.USART1Freq_Value=150000000 +RCC.USART2Freq_Value=150000000 +RCC.USART3Freq_Value=150000000 +RCC.USBFreq_Value=75000000 +RCC.VCOInputFreq_Value=4000000 +RCC.VCOOutputFreq_Value=300000000 +USART3.AutoBaudRateEnableParam=UART_ADVFEATURE_AUTOBAUDRATE_DISABLE +USART3.BaudRate=115200 +USART3.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR +USART3.DataInvertParam=ADVFEATURE_DATAINV_DISABLE +USART3.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,OneBitSampling,AutoBaudRateEnableParam,TxPinLevelInvertParam,RxPinLevelInvertParam,DataInvertParam,SwapParam,OverrunDisableParam,DMADisableonRxErrorParam,MSBFirstParam,VirtualMode-Asynchronous +USART3.MSBFirstParam=ADVFEATURE_MSBFIRST_DISABLE +USART3.Mode=MODE_TX_RX +USART3.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE +USART3.OverSampling=UART_OVERSAMPLING_16 +USART3.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE +USART3.Parity=PARITY_ODD +USART3.RxPinLevelInvertParam=ADVFEATURE_RXINV_DISABLE +USART3.StopBits=STOPBITS_1 +USART3.SwapParam=ADVFEATURE_SWAP_DISABLE +USART3.TxPinLevelInvertParam=ADVFEATURE_TXINV_DISABLE +USART3.VirtualMode-Asynchronous=VM_ASYNC +USART3.WordLength=WORDLENGTH_8B +VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals +VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=custom diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index d0601b385..5fa6e3dbb 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -144,15 +144,16 @@ void board_init(void) #if 1 // USB PD + // Default CC1/CC2 is PB4/PB6 /* PWR register access (for disabling dead battery feature) */ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); __HAL_RCC_UCPD1_CLK_ENABLE(); - // Default CC1/CC2 is PB4/PB6 - // PB4 ------> UCPD1_CC2 - // PB6 ------> UCPD1_CC1 + // Enable DMA clock + __HAL_RCC_DMAMUX1_CLK_ENABLE(); + __HAL_RCC_DMA1_CLK_ENABLE(); #endif } diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 79f37b729..c96dd0902 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -31,6 +31,7 @@ #if CFG_TUSB_MCU == OPT_MCU_STM32G4 #include "stm32g4xx.h" + #include "stm32g4xx_hal_dma.h" #else #error "Unsupported STM32 family" #endif @@ -61,13 +62,46 @@ static uint32_t rx_count = 0; static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4); static uint32_t tx_count; +#define CFG_TUC_STM32_DMA_RX { DMA1_Channel1 } +//#define CFG_TUC_STM32_DMA_TX { DMA1_Channel2 } + +#ifdef CFG_TUC_STM32_DMA_RX +static DMA_Channel_TypeDef* dma_rx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_RX; + +TU_ATTR_ALWAYS_INLINE static inline +void dma_rx_start(uint8_t rhport) +{ + DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport]; + + dma_rx_ch->CMAR = (uint32_t) rx_buf; + dma_rx_ch->CNDTR = sizeof(rx_buf); + dma_rx_ch->CCR |= DMA_CCR_EN; +} +#endif + +#ifdef CFG_TUC_STM32_DMA_TX +static DMA_Channel_TypeDef* dma_tx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_TX; +#endif + //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +#include "stm32g4xx_ll_dma.h" bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { (void) rhport; +#ifdef CFG_TUC_STM32_DMA_RX + // Init DMA + DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport]; + + // Peripheral -> Memory, Memory inc, 8-bit, High priority + dma_rx_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1; + dma_rx_ch->CPAR = (uint32_t) &UCPD1->RXDR; + + LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX); +#endif + // Initialization phase: CFG1 UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | @@ -77,7 +111,7 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // General programming sequence (with UCPD configured then enabled) if (port_type == TUSB_TYPEC_PORT_SNK) { // Enable both CC Phy - UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1; // Read Voltage State on CC1 & CC2 fore initial state uint32_t vstate_cc[2]; @@ -135,30 +169,48 @@ void tcd_int_handler(uint8_t rhport) { TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); uint32_t cr = UCPD1->CR; + uint32_t cfg1 = UCPD1->CFG1; // TODO only support SNK for now, required highest voltage for now + // Enable PHY on correct CC and disable Rd on other CC if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { TU_LOG1("Attach CC1\n"); - cr &= ~UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; + + cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE); + cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0; } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { TU_LOG1("Attach CC2\n"); - cr |= UCPD_CR_PHYCCSEL; - cr |= UCPD_CR_PHYRXEN; + cr &= ~UCPD_CR_CCENABLE; + cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1); } else { TU_LOG1("Detach\n"); cr &= ~UCPD_CR_PHYRXEN; + cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1; } if (cr & UCPD_CR_PHYRXEN) { // Enable Interrupt - UCPD1->IMR |= UCPD_IMR_TXISIE | UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | - UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | - UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + uint32_t imr = UCPD1->IMR; + imr |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE | + UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE; + + #ifdef CFG_TUC_STM32_DMA_RX + cfg1 |= UCPD_CFG1_RXDMAEN; + dma_rx_start(rhport); + #else + imr |= UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE; + #endif + + #ifndef CFG_TUC_STM32_DMA_TX + imr |= UCPD_IMR_TXISIE; + #endif + + UCPD1->IMR = imr; } - // Enable PD RX UCPD1->CR = cr; + UCPD1->CFG1 = cfg1; // ack UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; @@ -176,6 +228,7 @@ void tcd_int_handler(uint8_t rhport) { UCPD1->ICR = UCPD_ICR_RXORDDETCF; } +#ifndef CFG_TUC_STM32_DMA_RX if (sr & UCPD_SR_RXNE) { // TODO DMA later do { @@ -184,8 +237,9 @@ void tcd_int_handler(uint8_t rhport) { // no ack needed } +#endif - // End of message + // Received full message if (sr & UCPD_SR_RXMSGEND) { // Skip if CRC failed @@ -213,13 +267,17 @@ void tcd_int_handler(uint8_t rhport) { // notify stack after good crc ? } + #ifdef CFG_TUC_STM32_DMA_RX + // prepare next receive + dma_rx_start(rhport); + #endif + // ack UCPD1->ICR = UCPD_ICR_RXMSGENDCF; } if (sr & UCPD_SR_RXOVR) { TU_LOG1("RXOVR\n"); - TU_LOG1_HEX(rx_count); // ack UCPD1->ICR = UCPD_ICR_RXOVRCF; } From 8181d470e5bbb01f873d8fa11e8e1293cb76703f Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Jun 2023 18:55:54 +0700 Subject: [PATCH 22/94] enable DMA for both pd rx, tx --- src/portable/st/typec/typec_stm32.c | 205 +++++++++++++++------------- 1 file changed, 107 insertions(+), 98 deletions(-) diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index c96dd0902..a898cda47 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -31,7 +31,7 @@ #if CFG_TUSB_MCU == OPT_MCU_STM32G4 #include "stm32g4xx.h" - #include "stm32g4xx_hal_dma.h" + #include "stm32g4xx_ll_dma.h" // for UCLP REQID #else #error "Unsupported STM32 family" #endif @@ -40,6 +40,12 @@ // //--------------------------------------------------------------------+ +enum { + IMR_ATTACHED = UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE | + UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE +}; + #define PHY_SYNC1 0x18u #define PHY_SYNC2 0x11u #define PHY_SYNC3 0x06u @@ -57,55 +63,101 @@ static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4); -static uint32_t rx_count = 0; - static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4); -static uint32_t tx_count; +static uint32_t tx_index; -#define CFG_TUC_STM32_DMA_RX { DMA1_Channel1 } -//#define CFG_TUC_STM32_DMA_TX { DMA1_Channel2 } +// address of DMA channel rx, tx for each port +#define CFG_TUC_STM32_DMA { { DMA1_Channel1_BASE, DMA1_Channel2_BASE } } -#ifdef CFG_TUC_STM32_DMA_RX -static DMA_Channel_TypeDef* dma_rx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_RX; +//--------------------------------------------------------------------+ +// DMA +//--------------------------------------------------------------------+ -TU_ATTR_ALWAYS_INLINE static inline -void dma_rx_start(uint8_t rhport) -{ - DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport]; +static const uint32_t dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA; - dma_rx_ch->CMAR = (uint32_t) rx_buf; - dma_rx_ch->CNDTR = sizeof(rx_buf); - dma_rx_ch->CCR |= DMA_CCR_EN; +TU_ATTR_ALWAYS_INLINE static inline uint32_t dma_get_addr(uint8_t rhport, bool is_rx) { + return dma_addr_arr[rhport][is_rx ? 0 : 1]; } -#endif -#ifdef CFG_TUC_STM32_DMA_TX -static DMA_Channel_TypeDef* dma_tx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_TX; -#endif +static void dma_init(uint8_t rhport, bool is_rx) { + uint32_t dma_addr = dma_get_addr(rhport, is_rx); + DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_addr; + uint32_t req_id; + + if (is_rx) { + // Peripheral -> Memory, Memory inc, 8-bit, High priority + dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1; + dma_ch->CPAR = (uint32_t) &UCPD1->RXDR; + + req_id = LL_DMAMUX_REQ_UCPD1_RX; + } else { + // Memory -> Peripheral, Memory inc, 8-bit, High priority + dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_DIR; + dma_ch->CPAR = (uint32_t) &UCPD1->TXDR; + + req_id = LL_DMAMUX_REQ_UCPD1_TX; + } + + // find and set up mux channel TODO support mcu with multiple DMAMUXs + enum { + CH_DIFF = DMA1_Channel2_BASE - DMA1_Channel1_BASE + }; + uint32_t mux_ch_num; + + #ifdef DMA2_BASE + if (dma_addr > DMA2_BASE) { + mux_ch_num = 8 * ((dma_addr - DMA2_Channel1_BASE) / CH_DIFF); + } else + #endif + { + mux_ch_num = (dma_addr - DMA1_Channel1_BASE) / CH_DIFF; + } + + DMAMUX_Channel_TypeDef* mux_ch = DMAMUX1_Channel0 + mux_ch_num; + + uint32_t mux_ccr = mux_ch->CCR & ~(DMAMUX_CxCR_DMAREQ_ID); + mux_ccr |= req_id; + mux_ch->CCR = mux_ccr; +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_start(uint8_t rhport, bool is_rx, void const* buf, uint16_t len) { + DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx); + + dma_ch->CMAR = (uint32_t) buf; + dma_ch->CNDTR = len; + dma_ch->CCR |= DMA_CCR_EN; +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) { + DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx); + dma_ch->CCR &= ~DMA_CCR_EN; +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_rx_start(uint8_t rhport) { + dma_start(rhport, true, rx_buf, sizeof(rx_buf)); +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { + UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; + UCPD1->TX_PAYSZ = len; + dma_start(rhport, false, buf, len); +} //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -#include "stm32g4xx_ll_dma.h" + bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { (void) rhport; -#ifdef CFG_TUC_STM32_DMA_RX - // Init DMA - DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport]; - - // Peripheral -> Memory, Memory inc, 8-bit, High priority - dma_rx_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1; - dma_rx_ch->CPAR = (uint32_t) &UCPD1->RXDR; - - LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX); -#endif + // Init DMA for RX, TX + dma_init(rhport, true); + dma_init(rhport, false); // Initialization phase: CFG1 UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | - (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | - (0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos); UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; // General programming sequence (with UCPD configured then enabled) @@ -118,8 +170,7 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG1_INT(vstate_cc[0]); - TU_LOG1_INT(vstate_cc[1]); + TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", vstate_cc[0], vstate_cc[1]); // Enable CC1 & CC2 Interrupt UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; @@ -142,7 +193,8 @@ void tcd_int_disable(uint8_t rhport) { bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { (void) rhport; - + (void) buffer; + (void) total_bytes; return true; } @@ -159,8 +211,6 @@ void tcd_int_handler(uint8_t rhport) { uint32_t sr = UCPD1->SR; sr &= UCPD1->IMR; -// TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); - if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { uint32_t vstate_cc[2]; vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; @@ -169,7 +219,6 @@ void tcd_int_handler(uint8_t rhport) { TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); uint32_t cr = UCPD1->CR; - uint32_t cfg1 = UCPD1->CFG1; // TODO only support SNK for now, required highest voltage for now // Enable PHY on correct CC and disable Rd on other CC @@ -189,28 +238,18 @@ void tcd_int_handler(uint8_t rhport) { } if (cr & UCPD_CR_PHYRXEN) { - // Enable Interrupt - uint32_t imr = UCPD1->IMR; - imr |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | - UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE | - UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE; + // Attached + UCPD1->IMR |= IMR_ATTACHED; + UCPD1->CFG1 |= UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN; - #ifdef CFG_TUC_STM32_DMA_RX - cfg1 |= UCPD_CFG1_RXDMAEN; dma_rx_start(rhport); - #else - imr |= UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE; - #endif - - #ifndef CFG_TUC_STM32_DMA_TX - imr |= UCPD_IMR_TXISIE; - #endif - - UCPD1->IMR = imr; + }else { + // Detached + UCPD1->CFG1 &= ~(UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN); + UCPD1->IMR &= ~IMR_ATTACHED; } UCPD1->CR = cr; - UCPD1->CFG1 = cfg1; // ack UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; @@ -221,27 +260,15 @@ void tcd_int_handler(uint8_t rhport) { // SOP: Start of Packet. // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; - // reset count when received SOP - rx_count = 0; - // ack UCPD1->ICR = UCPD_ICR_RXORDDETCF; } -#ifndef CFG_TUC_STM32_DMA_RX - if (sr & UCPD_SR_RXNE) { - // TODO DMA later - do { - rx_buf[rx_count++] = UCPD1->RXDR; - } while (UCPD1->SR & UCPD_SR_RXNE); - - // no ack needed - } -#endif - // Received full message if (sr & UCPD_SR_RXMSGEND) { + dma_stop(rhport, true); + // Skip if CRC failed if (!(sr & UCPD_SR_RXERR)) { uint32_t payload_size = UCPD1->RX_PAYSZ; @@ -251,26 +278,23 @@ void tcd_int_handler(uint8_t rhport) { (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) { .msg_type = TUSB_PD_CTRL_GOOD_CRC, .data_role = 0, // UFP - .specs_rev = TUSB_PD_REV30, + .specs_rev = TUSB_PD_REV20, .power_role = 0, // Sink .msg_id = rx_header->msg_id, .n_data_obj = 0, .extended = 0 }; - tx_count = 0; // response with good crc - UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; - UCPD1->TX_PAYSZ = 2; - UCPD1->CR |= UCPD_CR_TXSEND; // will trigger TXIS interrupt + dma_tx_start(rhport, tx_buf, 2); - // notify stack after good crc ? + UCPD1->CR |= UCPD_CR_TXSEND; + + // notify stack } - #ifdef CFG_TUC_STM32_DMA_RX // prepare next receive dma_rx_start(rhport); - #endif // ack UCPD1->ICR = UCPD_ICR_RXMSGENDCF; @@ -283,34 +307,19 @@ void tcd_int_handler(uint8_t rhport) { } //------------- TX -------------// - if (sr & UCPD_SR_TXIS) { - // TU_LOG1("TXIS\n"); - - // TODO DMA later - do { - UCPD1->TXDR = tx_buf[tx_count++]; - } while (UCPD1->SR & UCPD_SR_TXIS); - - // no ack needed - } - if (sr & UCPD_SR_TXMSGSENT) { // all byte sent - TU_LOG1("TXMSGSENT\n"); + dma_stop(rhport, false); // ack UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; } -// if (sr & UCPD_SR_RXNE) { -// uint8_t data = UCPD1->RXDR; -// pd_rx_buf[pd_rx_count++] = data; -// TU_LOG1_HEX(data); -// } - -// else { -// TU_LOG_LOCATION(); -// } + if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) { + TU_LOG1("TX Error\n"); + dma_stop(rhport, false); + UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; + } } #endif From 08338069805a4e1b5bdf6d3bac0b694d6b10f20e Mon Sep 17 00:00:00 2001 From: Eugene Kliuchnikov Date: Thu, 8 Jun 2023 15:38:30 +0200 Subject: [PATCH 23/94] Fix typos --- .../device/audio_test_multi_rate/src/usb_descriptors.h | 2 +- examples/device/uac2_headset/src/usb_descriptors.h | 4 ++-- src/class/video/video.h | 4 ++-- src/device/usbd.h | 10 +++++----- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h index 8d8a03e49..8381e31f5 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h @@ -60,7 +60,7 @@ #define TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESCRIPTOR(_itfnum, _stridx, _epin) \ /* Standard Interface Association Descriptor (IAD) */\ - TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ + TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ /* Standard AC Interface Descriptor(4.7.1) */\ TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\ /* Class-Specific AC Interface Header Descriptor(4.7.2) */\ diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h index 457e69882..d7e170162 100644 --- a/examples/device/uac2_headset/src/usb_descriptors.h +++ b/examples/device/uac2_headset/src/usb_descriptors.h @@ -57,7 +57,7 @@ enum + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\ /* Interface 1, Alternate 0 */\ + TUD_AUDIO_DESC_STD_AS_INT_LEN\ - /* Interface 1, Alternate 0 */\ + /* Interface 1, Alternate 1 */\ + TUD_AUDIO_DESC_STD_AS_INT_LEN\ + TUD_AUDIO_DESC_CS_AS_INT_LEN\ + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\ @@ -86,7 +86,7 @@ enum #define TUD_AUDIO_HEADSET_STEREO_DESCRIPTOR(_stridx, _epout, _epin) \ /* Standard Interface Association Descriptor (IAD) */\ - TUD_AUDIO_DESC_IAD(/*_firstitfs*/ ITF_NUM_AUDIO_CONTROL, /*_nitfs*/ 3, /*_stridx*/ 0x00),\ + TUD_AUDIO_DESC_IAD(/*_firstitf*/ ITF_NUM_AUDIO_CONTROL, /*_nitfs*/ ITF_NUM_TOTAL, /*_stridx*/ 0x00),\ /* Standard AC Interface Descriptor(4.7.1) */\ TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\ /* Class-Specific AC Interface Header Descriptor(4.7.2) */\ diff --git a/src/class/video/video.h b/src/class/video/video.h index c0088c4f6..d9880c291 100644 --- a/src/class/video/video.h +++ b/src/class/video/video.h @@ -448,9 +448,9 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c #define TUD_VIDEO_GUID_M420 0x4D,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71 #define TUD_VIDEO_GUID_I420 0x49,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71 -#define TUD_VIDEO_DESC_IAD(_firstitfs, _nitfs, _stridx) \ +#define TUD_VIDEO_DESC_IAD(_firstitf, _nitfs, _stridx) \ TUD_VIDEO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, \ - _firstitfs, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \ + _firstitf, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \ VIDEO_ITF_PROTOCOL_UNDEFINED, _stridx #define TUD_VIDEO_DESC_STD_VC(_itfnum, _nEPs, _stridx) \ diff --git a/src/device/usbd.h b/src/device/usbd.h index 255e5a844..b11c1a09d 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -347,8 +347,8 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb /* Standard Interface Association Descriptor (IAD) */ #define TUD_AUDIO_DESC_IAD_LEN 8 -#define TUD_AUDIO_DESC_IAD(_firstitfs, _nitfs, _stridx) \ - TUD_AUDIO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, _firstitfs, _nitfs, TUSB_CLASS_AUDIO, AUDIO_FUNCTION_SUBCLASS_UNDEFINED, AUDIO_FUNC_PROTOCOL_CODE_V2, _stridx +#define TUD_AUDIO_DESC_IAD(_firstitf, _nitfs, _stridx) \ + TUD_AUDIO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, _firstitf, _nitfs, TUSB_CLASS_AUDIO, AUDIO_FUNCTION_SUBCLASS_UNDEFINED, AUDIO_FUNC_PROTOCOL_CODE_V2, _stridx /* Standard AC Interface Descriptor(4.7.1) */ #define TUD_AUDIO_DESC_STD_AC_LEN 9 @@ -443,7 +443,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb #define TUD_AUDIO_MIC_ONE_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \ /* Standard Interface Association Descriptor (IAD) */\ - TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ + TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ /* Standard AC Interface Descriptor(4.7.1) */\ TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\ /* Class-Specific AC Interface Header Descriptor(4.7.2) */\ @@ -492,7 +492,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb #define TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \ /* Standard Interface Association Descriptor (IAD) */\ - TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ + TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ /* Standard AC Interface Descriptor(4.7.1) */\ TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\ /* Class-Specific AC Interface Header Descriptor(4.7.2) */\ @@ -540,7 +540,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb #define TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \ /* Standard Interface Association Descriptor (IAD) */\ - TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ + TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\ /* Standard AC Interface Descriptor(4.7.1) */\ TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\ /* Class-Specific AC Interface Header Descriptor(4.7.2) */\ From 912802456b568e4b666a9205c3799da79f87ef69 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 9 Jun 2023 18:15:28 +0700 Subject: [PATCH 24/94] move protocol message to stack, disable battery in PWR's CR3 there is still issue with CC1/CC2 pull down resistor and vstate is not correct. --- hw/bsp/stm32g4/family.c | 8 +- src/device/dcd.h | 1 + src/portable/st/typec/typec_stm32.c | 113 ++++++++++++++-------------- src/typec/tcd.h | 52 +++++++++++++ src/typec/utcd.c | 61 +++++++++++---- src/typec/utcd.h | 2 +- 6 files changed, 162 insertions(+), 75 deletions(-) diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 5fa6e3dbb..d77183357 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -145,13 +145,13 @@ void board_init(void) #if 1 // USB PD // Default CC1/CC2 is PB4/PB6 - /* PWR register access (for disabling dead battery feature) */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); - LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); + // Enable pwr for disabling dead battery feature in Power's CR3 + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_RCC_CRC_CLK_ENABLE(); __HAL_RCC_UCPD1_CLK_ENABLE(); - // Enable DMA clock + // Enable DMA for USB PD __HAL_RCC_DMAMUX1_CLK_ENABLE(); __HAL_RCC_DMA1_CLK_ENABLE(); #endif diff --git a/src/device/dcd.h b/src/device/dcd.h index f82b8633d..4e9cfd5d5 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -189,6 +189,7 @@ TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t l // Configure and enable an ISO endpoint according to descriptor TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc); + //--------------------------------------------------------------------+ // Event API (implemented by stack) //--------------------------------------------------------------------+ diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index a898cda47..1dba54492 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -31,7 +31,7 @@ #if CFG_TUSB_MCU == OPT_MCU_STM32G4 #include "stm32g4xx.h" - #include "stm32g4xx_ll_dma.h" // for UCLP REQID + #include "stm32g4xx_ll_dma.h" // for UCPD REQID #else #error "Unsupported STM32 family" #endif @@ -62,9 +62,17 @@ enum { #define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding -static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4); -static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4); -static uint32_t tx_index; +static uint8_t const* _rx_buf; + +static tusb_pd_header_t _good_crc = { + .msg_type = TUSB_PD_CTRL_GOOD_CRC, + .data_role = 0, // UFP + .specs_rev = TUSB_PD_REV20, + .power_role = 0, // Sink + .msg_id = 0, + .n_data_obj = 0, + .extended = 0 +}; // address of DMA channel rx, tx for each port #define CFG_TUC_STM32_DMA { { DMA1_Channel1_BASE, DMA1_Channel2_BASE } } @@ -73,10 +81,10 @@ static uint32_t tx_index; // DMA //--------------------------------------------------------------------+ -static const uint32_t dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA; +static const uint32_t _dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA; TU_ATTR_ALWAYS_INLINE static inline uint32_t dma_get_addr(uint8_t rhport, bool is_rx) { - return dma_addr_arr[rhport][is_rx ? 0 : 1]; + return _dma_addr_arr[rhport][is_rx ? 0 : 1]; } static void dma_init(uint8_t rhport, bool is_rx) { @@ -133,10 +141,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) { dma_ch->CCR &= ~DMA_CCR_EN; } -TU_ATTR_ALWAYS_INLINE static inline void dma_rx_start(uint8_t rhport) { - dma_start(rhport, true, rx_buf, sizeof(rx_buf)); -} - TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; UCPD1->TX_PAYSZ = len; @@ -147,7 +151,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const // //--------------------------------------------------------------------+ - bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { (void) rhport; @@ -155,27 +158,30 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { dma_init(rhport, true); dma_init(rhport, false); - // Initialization phase: CFG1 + // Initialization phase: CFG1, detect all SOPs UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos); UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; // General programming sequence (with UCPD configured then enabled) if (port_type == TUSB_TYPEC_PORT_SNK) { - // Enable both CC Phy - UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1; + // Set analog mode enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1); // Read Voltage State on CC1 & CC2 fore initial state - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + uint32_t v_cc[2]; + v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", vstate_cc[0], vstate_cc[1]); + TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", v_cc[0], v_cc[1]); // Enable CC1 & CC2 Interrupt UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; } + // Disable dead battery in PWR's CR3 + PWR->CR3 |= PWR_CR3_UCPD_DBDIS; + return true; } @@ -192,9 +198,8 @@ void tcd_int_disable(uint8_t rhport) { } bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { - (void) rhport; - (void) buffer; - (void) total_bytes; + _rx_buf = buffer; + dma_start(rhport, true, buffer, total_bytes); return true; } @@ -212,27 +217,28 @@ void tcd_int_handler(uint8_t rhport) { sr &= UCPD1->IMR; if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { - uint32_t vstate_cc[2]; - vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; - vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + uint32_t v_cc[2]; + v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + TU_LOG3("VState CC1 = %u, CC2 = %u\n", v_cc[0], v_cc[1]); uint32_t cr = UCPD1->CR; // TODO only support SNK for now, required highest voltage for now - // Enable PHY on correct CC and disable Rd on other CC - if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { - TU_LOG1("Attach CC1\n"); - + // Enable PHY on active CC and disable Rd on other CC + // FIXME somehow CC2 is vstate is not correct, always 1 even not attached. + // on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something. + if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) { + TU_LOG3("Attach CC1\n"); cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE); cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0; - } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { - TU_LOG1("Attach CC2\n"); + } else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) { + TU_LOG3("Attach CC2\n"); cr &= ~UCPD_CR_CCENABLE; cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1); } else { - TU_LOG1("Detach\n"); + TU_LOG3("Detach\n"); cr &= ~UCPD_CR_PHYRXEN; cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1; } @@ -241,14 +247,15 @@ void tcd_int_handler(uint8_t rhport) { // Attached UCPD1->IMR |= IMR_ATTACHED; UCPD1->CFG1 |= UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN; - - dma_rx_start(rhport); }else { // Detached UCPD1->CFG1 &= ~(UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN); UCPD1->IMR &= ~IMR_ATTACHED; } + // notify stack + tcd_event_cc_changed(rhport, v_cc[0], v_cc[1], true); + UCPD1->CR = cr; // ack @@ -258,6 +265,7 @@ void tcd_int_handler(uint8_t rhport) { //------------- RX -------------// if (sr & UCPD_SR_RXORDDET) { // SOP: Start of Packet. + TU_LOG3("SOP\n"); // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; // ack @@ -266,48 +274,39 @@ void tcd_int_handler(uint8_t rhport) { // Received full message if (sr & UCPD_SR_RXMSGEND) { - + TU_LOG3("RX MSG END\n"); dma_stop(rhport, true); - // Skip if CRC failed + uint8_t result; + if (!(sr & UCPD_SR_RXERR)) { - uint32_t payload_size = UCPD1->RX_PAYSZ; - // TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count); - - tusb_pd_header_t const* rx_header = (tusb_pd_header_t const*) rx_buf; - (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) { - .msg_type = TUSB_PD_CTRL_GOOD_CRC, - .data_role = 0, // UFP - .specs_rev = TUSB_PD_REV20, - .power_role = 0, // Sink - .msg_id = rx_header->msg_id, - .n_data_obj = 0, - .extended = 0 - }; - // response with good crc - dma_tx_start(rhport, tx_buf, 2); - + _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id; + dma_tx_start(rhport, &_good_crc, 2); UCPD1->CR |= UCPD_CR_TXSEND; - // notify stack + result = XFER_RESULT_SUCCESS; + }else { + // CRC failed + result = XFER_RESULT_FAILED; } - // prepare next receive - dma_rx_start(rhport); + // notify stack + tcd_event_rx_complete(rhport, UCPD1->RX_PAYSZ, result, true); // ack UCPD1->ICR = UCPD_ICR_RXMSGENDCF; } if (sr & UCPD_SR_RXOVR) { - TU_LOG1("RXOVR\n"); + TU_LOG3("RXOVR\n"); // ack UCPD1->ICR = UCPD_ICR_RXOVRCF; } //------------- TX -------------// if (sr & UCPD_SR_TXMSGSENT) { + TU_LOG3("TX MSG SENT\n"); // all byte sent dma_stop(rhport, false); @@ -316,7 +315,7 @@ void tcd_int_handler(uint8_t rhport) { } if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) { - TU_LOG1("TX Error\n"); + TU_LOG3("TX Error\n"); dma_stop(rhport, false); UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; } diff --git a/src/typec/tcd.h b/src/typec/tcd.h index e823bf8d7..41dceaa74 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -38,10 +38,28 @@ extern "C" { //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ + +enum { + TCD_EVENT_INVALID = 0, + TCD_EVENT_CC_CHANGED, + TCD_EVENT_RX_COMPLETE, +}; + + typedef struct { uint8_t rhport; uint8_t event_id; + union { + struct { + uint8_t cc_state[2]; + } cc_changed; + + struct { + uint16_t xferred_bytes; + uint8_t result; + } rx_complete; + }; } tcd_event_t;; @@ -68,4 +86,38 @@ void tcd_int_handler(uint8_t rhport); bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); +//--------------------------------------------------------------------+ +// Event API (implemented by stack) +// Called by TCD to notify stack +//--------------------------------------------------------------------+ + +extern void tcd_event_handler(tcd_event_t const * event, bool in_isr); + +TU_ATTR_ALWAYS_INLINE static inline +void tcd_event_cc_changed(uint8_t rhport, uint8_t cc1, uint8_t cc2, bool in_isr) { + tcd_event_t event = { + .rhport = rhport, + .event_id = TCD_EVENT_CC_CHANGED, + .cc_changed = { + .cc_state = {cc1, cc2 } + } + }; + + tcd_event_handler(&event, in_isr); +} + +TU_ATTR_ALWAYS_INLINE static inline +void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) { + tcd_event_t event = { + .rhport = rhport, + .event_id = TCD_EVENT_RX_COMPLETE, + .rx_complete = { + .xferred_bytes = xferred_bytes, + .result = result + } + }; + + tcd_event_handler(&event, in_isr); +} + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index b5f9965fe..fb69b01e8 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -42,35 +42,38 @@ // Event queue // utcd_int_set() is used as mutex in OS NONE config void utcd_int_set(bool enabled); -OSAL_QUEUE_DEF(utcd_int_set, utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); -tu_static osal_queue_t utcd_q; +OSAL_QUEUE_DEF(utcd_int_set, _utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); +tu_static osal_queue_t _utcd_q; // if stack is initialized -static bool utcd_inited = false; +static bool _utcd_inited = false; // if port is initialized -static bool port_inited[TUP_TYPEC_RHPORTS_NUM]; +static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; + +// Max possible PD size is 262 bytes +static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4); //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ bool tuc_inited(uint8_t rhport) { - return utcd_inited && port_inited[rhport]; + return _utcd_inited && _port_inited[rhport]; } bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // Initialize stack - if (!utcd_inited) { - tu_memclr(port_inited, sizeof(port_inited)); + if (!_utcd_inited) { + tu_memclr(_port_inited, sizeof(_port_inited)); - utcd_q = osal_queue_create(&utcd_qdef); - TU_ASSERT(utcd_q != NULL); + _utcd_q = osal_queue_create(&_utcd_qdef); + TU_ASSERT(_utcd_q != NULL); - utcd_inited = true; + _utcd_inited = true; } // skip if port already initialized - if ( port_inited[rhport] ) { + if ( _port_inited[rhport] ) { return true; } @@ -79,10 +82,42 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { TU_ASSERT(tcd_init(rhport, port_type)); tcd_int_enable(rhport); - port_inited[rhport] = true; + _port_inited[rhport] = true; return true; } +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +//bool parse_message(uint8_t const * data, uint16_t len, pd_msg_t * msg) { +// // TODO +// (void) data; +// (void) len; +// (void) msg; +// return false; +//} + +void tcd_event_handler(tcd_event_t const * event, bool in_isr) { + (void) in_isr; + switch(event->event_id) { + case TCD_EVENT_CC_CHANGED: + if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) { + // Attach + tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + }else { + // Detach + } + break; + + case TCD_EVENT_RX_COMPLETE: + // TODO process message here in ISR, move to thread later + + // start new rx + tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + break; + } +} //--------------------------------------------------------------------+ // @@ -90,7 +125,7 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { void utcd_int_set(bool enabled) { // Disable all controllers since they shared the same event queue for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) { - if ( port_inited[p] ) { + if ( _port_inited[p] ) { if (enabled) { tcd_int_enable(p); }else { diff --git a/src/typec/utcd.h b/src/typec/utcd.h index 06a62ef23..75ff6f1db 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -38,7 +38,7 @@ extern "C" { //--------------------------------------------------------------------+ #ifndef CFG_TUC_TASK_QUEUE_SZ -#define CFG_TUC_TASK_QUEUE_SZ 16 +#define CFG_TUC_TASK_QUEUE_SZ 8 #endif From bb4fb0543bab21e68748b359ec7d59e74cac1445 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 9 Jun 2023 19:38:50 +0700 Subject: [PATCH 25/94] able to parse SOURCE_CAP message from dfp --- src/typec/utcd.c | 56 ++++++++++++++++++++++++++++++++++++++------ src/typec/utcd.h | 60 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 109 insertions(+), 7 deletions(-) diff --git a/src/typec/utcd.c b/src/typec/utcd.c index fb69b01e8..abbe8b43e 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -90,13 +90,50 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // //--------------------------------------------------------------------+ -//bool parse_message(uint8_t const * data, uint16_t len, pd_msg_t * msg) { -// // TODO -// (void) data; -// (void) len; -// (void) msg; -// return false; -//} +bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { + (void) rhport; + uint8_t const* p_end = buf + len; + tusb_pd_header_t const* header = (tusb_pd_header_t const*) buf; + uint8_t const * ptr = buf + sizeof(tusb_pd_header_t); + + if (header->n_data_obj == 0) { + // control message + } else { + // data message + switch (header->msg_type) { + case TUSB_PD_DATA_SOURCE_CAP: { + for(size_t i=0; in_data_obj; i++) { + TU_VERIFY(ptr < p_end); + uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr)); + + switch ((pdo >> 30) & 0x03ul) { + case PD_PDO_TYPE_FIXED: { + pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo; + TU_LOG3("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10); + break; + } + + case PD_PDO_TYPE_BATTERY: + break; + + case PD_PDO_TYPE_VARIABLE: + break; + + case PD_PDO_TYPE_APDO: + break; + } + + ptr += 4; + } + break; + } + + default: break; + } + } + + return true; +} void tcd_event_handler(tcd_event_t const * event, bool in_isr) { (void) in_isr; @@ -112,10 +149,15 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { case TCD_EVENT_RX_COMPLETE: // TODO process message here in ISR, move to thread later + if (event->rx_complete.result == XFER_RESULT_SUCCESS) { + parse_message(event->rhport, _rx_buf, event->rx_complete.xferred_bytes); + } // start new rx tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); break; + + default: break; } } diff --git a/src/typec/utcd.h b/src/typec/utcd.h index 75ff6f1db..dbc909592 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -41,6 +41,66 @@ extern "C" { #define CFG_TUC_TASK_QUEUE_SZ 8 #endif +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +// All table references are from USBPD Specification rev3.1 version 1.8 +enum { + PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax + PD_PDO_TYPE_BATTERY, + PD_PDO_TYPE_VARIABLE, // non-battery + PD_PDO_TYPE_APDO, // Augmented Power Data Object +}; + +// Fixed Power Data Object (PDO) table 6-9 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit + uint32_t current_peak : 2; // [21..20] Peak current + uint32_t reserved : 1; // [22] Reserved + uint32_t epr_mode_capable : 1; // [23] epr_mode_capable + uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported + uint32_t dual_role_data : 1; // [25] Dual Role Data + uint32_t usb_comm_capable : 1; // [26] USB Communications Capable + uint32_t unconstrained_power : 1; // [27] Unconstrained Power + uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported + uint32_t dual_role_power : 1; // [29] Dual Role Power + uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED +} pd_pdo_fixed_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size"); + +// Battery Power Data Object (PDO) table 6-12 +typedef struct TU_ATTR_PACKED { + uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY +} pd_pdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size"); + +// Variable Power Data Object (PDO) table 6-11 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE +} pd_pdo_variable_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size"); + +// Augmented Power Data Object (PDO) table 6-13 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit + uint32_t reserved1 : 1; // [7] Reserved + uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit + uint32_t reserved2 : 1; // [16] Reserved + uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit + uint32_t reserved3 : 2; // [26..25] Reserved + uint32_t pps_power_limited : 1; // [27] PPS Power Limited + uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply + uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO +} pd_pdo_apdo_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); //--------------------------------------------------------------------+ // Application API From debde4cc97cb7c6c13d62d0e3bbe195c80bfec9f Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 12:14:55 +0700 Subject: [PATCH 26/94] response with request safe5v, get passed PS_READY --- src/common/tusb_types.h | 10 ++++ src/portable/st/typec/typec_stm32.c | 78 +++++++++++++++++++++++------ src/typec/tcd.h | 17 ++++++- src/typec/utcd.c | 59 ++++++++++++++++++++++ src/typec/utcd.h | 34 ++++++++++++- 5 files changed, 180 insertions(+), 18 deletions(-) diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index c92320e5c..cad633ee4 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -562,6 +562,16 @@ enum { TUSB_PD_REV30 = 0x2, }; +enum { + TUSB_PD_DATA_ROLE_UFP = 0x0, + TUSB_PD_DATA_ROLE_DFP = 0x1, +}; + +enum { + TUSB_PD_POWER_ROLE_SINK = 0x0, + TUSB_PD_POWER_ROLE_SOURCE = 0x1, +}; + typedef struct TU_ATTR_PACKED { uint16_t msg_type : 5; // [0:4] uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 1dba54492..9b3b21707 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -63,6 +63,9 @@ enum { static uint8_t const* _rx_buf; +static uint8_t const* _tx_pending_buf; +static uint16_t _tx_pending_bytes; +static uint16_t _tx_xferring_bytes; static tusb_pd_header_t _good_crc = { .msg_type = TUSB_PD_CTRL_GOOD_CRC, @@ -141,10 +144,21 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) { dma_ch->CCR &= ~DMA_CCR_EN; } +TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) { + DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx); + return dma_ch->CCR & DMA_CCR_EN; +} + + TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; UCPD1->TX_PAYSZ = len; dma_start(rhport, false, buf, len); + UCPD1->CR |= UCPD_CR_TXSEND; +} + +TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) { + dma_stop(rhport, false); } //--------------------------------------------------------------------+ @@ -203,11 +217,23 @@ bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { return true; } -bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { +bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) { (void) rhport; - (void) buffer; - (void) total_bytes; - return false; + + if (dma_enabled(rhport, false)) { + // DMA is busy, probably sending GoodCRC, save as pending TX + _tx_pending_buf = buffer; + _tx_pending_bytes = total_bytes; + }else { + // DMA is free, start sending + _tx_pending_buf = NULL; + _tx_pending_bytes = 0; + + _tx_xferring_bytes = total_bytes; + dma_tx_start(rhport, buffer, total_bytes); + } + + return true; } void tcd_int_handler(uint8_t rhport) { @@ -275,6 +301,8 @@ void tcd_int_handler(uint8_t rhport) { // Received full message if (sr & UCPD_SR_RXMSGEND) { TU_LOG3("RX MSG END\n"); + + // stop TX dma_stop(rhport, true); uint8_t result; @@ -283,7 +311,6 @@ void tcd_int_handler(uint8_t rhport) { // response with good crc _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id; dma_tx_start(rhport, &_good_crc, 2); - UCPD1->CR |= UCPD_CR_TXSEND; result = XFER_RESULT_SUCCESS; }else { @@ -305,19 +332,38 @@ void tcd_int_handler(uint8_t rhport) { } //------------- TX -------------// - if (sr & UCPD_SR_TXMSGSENT) { - TU_LOG3("TX MSG SENT\n"); - // all byte sent - dma_stop(rhport, false); + // All tx events: complete and error + if (sr & (UCPD_SR_TXMSGSENT | (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND))) { + // force TX stop + dma_tx_stop(rhport); - // ack - UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; - } + uint16_t const xferred_bytes = _tx_xferring_bytes - UCPD1->TX_PAYSZ; + uint8_t result; - if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) { - TU_LOG3("TX Error\n"); - dma_stop(rhport, false); - UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; + if ( sr & UCPD_SR_TXMSGSENT ) { + TU_LOG3("TX MSG SENT\n"); + result = XFER_RESULT_SUCCESS; + // ack + UCPD1->ICR = UCPD_ICR_TXMSGSENTCF; + }else { + TU_LOG3("TX Error\n"); + result = XFER_RESULT_FAILED; + // ack + UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND; + } + + // start pending TX if any + if (_tx_pending_buf && _tx_pending_bytes ) { + // Start the pending TX + dma_tx_start(rhport, _tx_pending_buf, _tx_pending_bytes); + + // clear pending + _tx_pending_buf = NULL; + _tx_pending_bytes = 0; + } + + // notify stack + tcd_event_tx_complete(rhport, xferred_bytes, result, true); } } diff --git a/src/typec/tcd.h b/src/typec/tcd.h index 41dceaa74..b131d6ba9 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -43,6 +43,7 @@ enum { TCD_EVENT_INVALID = 0, TCD_EVENT_CC_CHANGED, TCD_EVENT_RX_COMPLETE, + TCD_EVENT_TX_COMPLETE, }; @@ -84,7 +85,7 @@ void tcd_int_handler(uint8_t rhport); //--------------------------------------------------------------------+ bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); -bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); +bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); //--------------------------------------------------------------------+ // Event API (implemented by stack) @@ -120,4 +121,18 @@ void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_handler(&event, in_isr); } +TU_ATTR_ALWAYS_INLINE static inline +void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) { + tcd_event_t event = { + .rhport = rhport, + .event_id = TCD_EVENT_TX_COMPLETE, + .rx_complete = { + .xferred_bytes = xferred_bytes, + .result = result + } + }; + + tcd_event_handler(&event, in_isr); +} + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index abbe8b43e..09031e5c9 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -53,6 +53,7 @@ static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; // Max possible PD size is 262 bytes static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4); +static uint8_t _tx_buf[100] TU_ATTR_ALIGNED(4); //--------------------------------------------------------------------+ // @@ -90,6 +91,19 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // //--------------------------------------------------------------------+ +bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) { + // copy header + memcpy(_tx_buf, header, sizeof(tusb_pd_header_t)); + + // copy data objcet if available + uint16_t const n_data_obj = header->n_data_obj; + if (n_data_obj > 0) { + memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4); + } + + return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4); +} + bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { (void) rhport; uint8_t const* p_end = buf + len; @@ -98,10 +112,28 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { if (header->n_data_obj == 0) { // control message + switch (header->msg_type) { + case TUSB_PD_CTRL_GOOD_CRC: + break; + + case TUSB_PD_CTRL_ACCEPT: + break; + + case TUSB_PD_CTRL_REJECT: + break; + + case TUSB_PD_CTRL_PS_RDY: + break; + + default: break; + } } else { // data message switch (header->msg_type) { case TUSB_PD_DATA_SOURCE_CAP: { + // Examine source capability and select a suitable PDO (starting from 1 with safe5v) + uint8_t obj_pos = 1; + for(size_t i=0; in_data_obj; i++) { TU_VERIFY(ptr < p_end); uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr)); @@ -125,6 +157,33 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { ptr += 4; } + + // Send request with selected PDO position as response to Source Cap + pd_rdo_fixed_variable_t rdo = { + .current_extremum_10ma = 50, // max 500mA + .current_operate_10ma = 30, // 300mA + .reserved = 0, + .epr_mode_capable = 0, + .unchunked_ext_msg_support = 0, + .no_usb_suspend = 0, + .usb_comm_capable = 1, + .capability_mismatch = 0, + .give_back_flag = 0, // exteremum is max + .object_position = obj_pos, + }; + + tusb_pd_header_t const req_header = { + .msg_type = TUSB_PD_DATA_REQUEST, + .data_role = TUSB_PD_DATA_ROLE_UFP, + .specs_rev = TUSB_PD_REV20, + .power_role = TUSB_PD_POWER_ROLE_SINK, + .msg_id = 0, + .n_data_obj = 1, + .extended = 0, + }; + + utcd_msg_send(rhport, &req_header, &rdo); + break; } diff --git a/src/typec/utcd.h b/src/typec/utcd.h index dbc909592..bb1523253 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -42,7 +42,7 @@ extern "C" { #endif //--------------------------------------------------------------------+ -// +// Source Capability //--------------------------------------------------------------------+ // All table references are from USBPD Specification rev3.1 version 1.8 @@ -102,6 +102,38 @@ typedef struct TU_ATTR_PACKED { } pd_pdo_apdo_t; TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); +//--------------------------------------------------------------------+ +// Request +//--------------------------------------------------------------------+ + +typedef struct TU_ATTR_PACKED { + uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit + uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_fixed_variable_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); + +typedef struct TU_ATTR_PACKED { + uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit + uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); + //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ From c28503060c0c3cb09d8e2ce63d1b0009affbdf72 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 14:57:50 +0700 Subject: [PATCH 27/94] ad pd_types.h --- src/common/tusb_types.h | 96 +---------- src/portable/st/typec/typec_stm32.c | 13 +- src/typec/pd_types.h | 237 ++++++++++++++++++++++++++++ src/typec/tcd.h | 10 +- src/typec/utcd.c | 38 ++--- src/typec/utcd.h | 101 +----------- 6 files changed, 278 insertions(+), 217 deletions(-) create mode 100644 src/typec/pd_types.h diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index cad633ee4..fab680989 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -480,6 +480,7 @@ typedef struct TU_ATTR_PACKED //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ + typedef struct TU_ATTR_PACKED{ union { struct TU_ATTR_PACKED { @@ -499,101 +500,6 @@ typedef struct TU_ATTR_PACKED{ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct"); -//--------------------------------------------------------------------+ -// TYPE-C -//--------------------------------------------------------------------+ - -typedef enum { - TUSB_TYPEC_PORT_SRC, - TUSB_TYPEC_PORT_SNK, - TUSB_TYPEC_PORT_DRP -} tusb_typec_port_type_t; - -typedef enum { - TUSB_PD_CTRL_RESERVED = 0, // 0b00000: 0 - TUSB_PD_CTRL_GOOD_CRC, // 0b00001: 1 - TUSB_PD_CTRL_GO_TO_MIN, // 0b00010: 2 - TUSB_PD_CTRL_ACCEPT, // 0b00011: 3 - TUSB_PD_CTRL_REJECT, // 0b00100: 4 - TUSB_PD_CTRL_PING, // 0b00101: 5 - TUSB_PD_CTRL_PS_RDY, // 0b00110: 6 - TUSB_PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 - TUSB_PD_CTRL_GET_SINK_CAP, // 0b01000: 8 - TUSB_PD_CTRL_DR_SWAP, // 0b01001: 9 - TUSB_PD_CTRL_PR_SWAP, // 0b01010: 10 - TUSB_PD_CTRL_VCONN_SWAP, // 0b01011: 11 - TUSB_PD_CTRL_WAIT, // 0b01100: 12 - TUSB_PD_CTRL_SOFT_RESET, // 0b01101: 13 - TUSB_PD_CTRL_DATA_RESET, // 0b01110: 14 - TUSB_PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 - TUSB_PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 - TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 - TUSB_PD_CTRL_GET_STATUS, // 0b10010: 18 - TUSB_PD_CTRL_FR_SWAP, // 0b10011: 19 - TUSB_PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 - TUSB_PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 - TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 - TUSB_PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 - TUSB_PD_CTRL_REVISION, // 0b11000: 24 -} tusb_pd_ctrl_type_t; - -typedef enum { - TUSB_PD_DATA_RESERVED = 0, // 0b00000: 0 - TUSB_PD_DATA_SOURCE_CAP, // 0b00001: 1 - TUSB_PD_DATA_REQUEST, // 0b00010: 2 - TUSB_PD_DATA_BIST, // 0b00011: 3 - TUSB_PD_DATA_SINK_CAP, // 0b00100: 4 - TUSB_PD_DATA_BATTERY_STATUS, // 0b00101: 5 - TUSB_PD_DATA_ALERT, // 0b00110: 6 - TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 - TUSB_PD_DATA_ENTER_USB, // 0b01000: 8 - TUSB_PD_DATA_EPR_REQUEST, // 0b01001: 9 - TUSB_PD_DATA_EPR_MODE, // 0b01010: 10 - TUSB_PD_DATA_SRC_INFO, // 0b01011: 11 - TUSB_PD_DATA_REVISION, // 0b01100: 12 - TUSB_PD_DATA_RESERVED_13, // 0b01101: 13 - TUSB_PD_DATA_RESERVED_14, // 0b01110: 14 - TUSB_PD_DATA_VENDOR_DEFINED, // 0b01111: 15 -} tusb_pd_data_type_t; - -enum { - TUSB_PD_REV10 = 0x0, - TUSB_PD_REV20 = 0x1, - TUSB_PD_REV30 = 0x2, -}; - -enum { - TUSB_PD_DATA_ROLE_UFP = 0x0, - TUSB_PD_DATA_ROLE_DFP = 0x1, -}; - -enum { - TUSB_PD_POWER_ROLE_SINK = 0x0, - TUSB_PD_POWER_ROLE_SOURCE = 0x1, -}; - -typedef struct TU_ATTR_PACKED { - uint16_t msg_type : 5; // [0:4] - uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP - uint16_t specs_rev : 2; // [6:7] - uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source - uint16_t msg_id : 3; // [9:11] - uint16_t n_data_obj : 3; // [12:14] - uint16_t extended : 1; // [15] -} tusb_pd_header_t; - -TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct"); - -typedef struct TU_ATTR_PACKED { - uint16_t data_size : 9; // [0:8] - uint16_t reserved : 1; // [9] - uint16_t request_chunk : 1; // [10] - uint16_t chunk_number : 4; // [11:14] - uint16_t chunked : 1; // [15] -} tusb_pd_header_extended_t; - -TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct"); - TU_ATTR_PACKED_END // End of all packed definitions TU_ATTR_BIT_FIELD_ORDER_END diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 9b3b21707..b09dc5bae 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -67,10 +67,10 @@ static uint8_t const* _tx_pending_buf; static uint16_t _tx_pending_bytes; static uint16_t _tx_xferring_bytes; -static tusb_pd_header_t _good_crc = { - .msg_type = TUSB_PD_CTRL_GOOD_CRC, +static pd_header_t _good_crc = { + .msg_type = PD_CTRL_GOOD_CRC, .data_role = 0, // UFP - .specs_rev = TUSB_PD_REV20, + .specs_rev = PD_REV_20, .power_role = 0, // Sink .msg_id = 0, .n_data_obj = 0, @@ -149,7 +149,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) return dma_ch->CCR & DMA_CCR_EN; } - TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) { UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP; UCPD1->TX_PAYSZ = len; @@ -165,7 +164,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) { // //--------------------------------------------------------------------+ -bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) { +bool tcd_init(uint8_t rhport, uint32_t port_type) { (void) rhport; // Init DMA for RX, TX @@ -211,7 +210,7 @@ void tcd_int_disable(uint8_t rhport) { NVIC_DisableIRQ(UCPD1_IRQn); } -bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { +bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) { _rx_buf = buffer; dma_start(rhport, true, buffer, total_bytes); return true; @@ -309,7 +308,7 @@ void tcd_int_handler(uint8_t rhport) { if (!(sr & UCPD_SR_RXERR)) { // response with good crc - _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id; + _good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id; dma_tx_start(rhport, &_good_crc, 2); result = XFER_RESULT_SUCCESS; diff --git a/src/typec/pd_types.h b/src/typec/pd_types.h new file mode 100644 index 000000000..1b2968f65 --- /dev/null +++ b/src/typec/pd_types.h @@ -0,0 +1,237 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _TUSB_PD_TYPES_H_ +#define _TUSB_PD_TYPES_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "common/tusb_compiler.h" + +// Start of all packed definitions for compiler without per-type packed +TU_ATTR_PACKED_BEGIN +TU_ATTR_BIT_FIELD_ORDER_BEGIN + +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; + +enum { + PD_CTRL_RESERVED = 0, // 0b00000: 0 + PD_CTRL_GOOD_CRC, // 0b00001: 1 + PD_CTRL_GO_TO_MIN, // 0b00010: 2 + PD_CTRL_ACCEPT, // 0b00011: 3 + PD_CTRL_REJECT, // 0b00100: 4 + PD_CTRL_PING, // 0b00101: 5 + PD_CTRL_PS_READY, // 0b00110: 6 + PD_CTRL_GET_SOURCE_CAP, // 0b00111: 7 + PD_CTRL_GET_SINK_CAP, // 0b01000: 8 + PD_CTRL_DR_SWAP, // 0b01001: 9 + PD_CTRL_PR_SWAP, // 0b01010: 10 + PD_CTRL_VCONN_SWAP, // 0b01011: 11 + PD_CTRL_WAIT, // 0b01100: 12 + PD_CTRL_SOFT_RESET, // 0b01101: 13 + PD_CTRL_DATA_RESET, // 0b01110: 14 + PD_CTRL_DATA_RESET_COMPLETE, // 0b01111: 15 + PD_CTRL_NOT_SUPPORTED, // 0b10000: 16 + PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17 + PD_CTRL_GET_STATUS, // 0b10010: 18 + PD_CTRL_FR_SWAP, // 0b10011: 19 + PD_CTRL_GET_PPS_STATUS, // 0b10100: 20 + PD_CTRL_GET_COUNTRY_CODES, // 0b10101: 21 + PD_CTRL_GET_SINK_CAP_EXTENDED, // 0b10110: 22 + PD_CTRL_GET_SOURCE_INFO, // 0b10111: 23 + PD_CTRL_REVISION, // 0b11000: 24 +}; + +enum { + PD_DATA_RESERVED = 0, // 0b00000: 0 + PD_DATA_SOURCE_CAP, // 0b00001: 1 + PD_DATA_REQUEST, // 0b00010: 2 + PD_DATA_BIST, // 0b00011: 3 + PD_DATA_SINK_CAP, // 0b00100: 4 + PD_DATA_BATTERY_STATUS, // 0b00101: 5 + PD_DATA_ALERT, // 0b00110: 6 + PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7 + PD_DATA_ENTER_USB, // 0b01000: 8 + PD_DATA_EPR_REQUEST, // 0b01001: 9 + PD_DATA_EPR_MODE, // 0b01010: 10 + PD_DATA_SRC_INFO, // 0b01011: 11 + PD_DATA_REVISION, // 0b01100: 12 + PD_DATA_RESERVED_13, // 0b01101: 13 + PD_DATA_RESERVED_14, // 0b01110: 14 + PD_DATA_VENDOR_DEFINED, // 0b01111: 15 +}; + +enum { + PD_REV_10 = 0x0, + PD_REV_20 = 0x1, + PD_REV_30 = 0x2, +}; + +enum { + PD_DATA_ROLE_UFP = 0x0, + PD_DATA_ROLE_DFP = 0x1, +}; + +enum { + PD_POWER_ROLE_SINK = 0x0, + PD_POWER_ROLE_SOURCE = 0x1, +}; + +typedef struct TU_ATTR_PACKED { + uint16_t msg_type : 5; // [0:4] + uint16_t data_role : 1; // [5] SOP only: 0 UFP, 1 DFP + uint16_t specs_rev : 2; // [6:7] + uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source + uint16_t msg_id : 3; // [9:11] + uint16_t n_data_obj : 3; // [12:14] + uint16_t extended : 1; // [15] +} pd_header_t; +TU_VERIFY_STATIC(sizeof(pd_header_t) == 2, "size is not correct"); + +typedef struct TU_ATTR_PACKED { + uint16_t data_size : 9; // [0:8] + uint16_t reserved : 1; // [9] + uint16_t request_chunk : 1; // [10] + uint16_t chunk_number : 4; // [11:14] + uint16_t chunked : 1; // [15] +} pd_header_extended_t; +TU_VERIFY_STATIC(sizeof(pd_header_extended_t) == 2, "size is not correct"); + +//--------------------------------------------------------------------+ +// Source Capability +//--------------------------------------------------------------------+ + +// All table references are from USBPD Specification rev3.1 version 1.8 +enum { + PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax + PD_PDO_TYPE_BATTERY, + PD_PDO_TYPE_VARIABLE, // non-battery + PD_PDO_TYPE_APDO, // Augmented Power Data Object +}; + +// Fixed Power Data Object (PDO) table 6-9 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit + uint32_t current_peak : 2; // [21..20] Peak current + uint32_t reserved : 1; // [22] Reserved + uint32_t epr_mode_capable : 1; // [23] epr_mode_capable + uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported + uint32_t dual_role_data : 1; // [25] Dual Role Data + uint32_t usb_comm_capable : 1; // [26] USB Communications Capable + uint32_t unconstrained_power : 1; // [27] Unconstrained Power + uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported + uint32_t dual_role_power : 1; // [29] Dual Role Power + uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED +} pd_pdo_fixed_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size"); + +// Battery Power Data Object (PDO) table 6-12 +typedef struct TU_ATTR_PACKED { + uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY +} pd_pdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size"); + +// Variable Power Data Object (PDO) table 6-11 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit + uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit + uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit + uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE +} pd_pdo_variable_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size"); + +// Augmented Power Data Object (PDO) table 6-13 +typedef struct TU_ATTR_PACKED { + uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit + uint32_t reserved1 : 1; // [7] Reserved + uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit + uint32_t reserved2 : 1; // [16] Reserved + uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit + uint32_t reserved3 : 2; // [26..25] Reserved + uint32_t pps_power_limited : 1; // [27] PPS Power Limited + uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply + uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO +} pd_pdo_apdo_t; +TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); + +//--------------------------------------------------------------------+ +// Request +//--------------------------------------------------------------------+ + +typedef struct TU_ATTR_PACKED { + uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit + uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_fixed_variable_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); + +typedef struct TU_ATTR_PACKED { + uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit + uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit + uint32_t reserved : 2; // [21..20] Reserved + uint32_t epr_mode_capable : 1; // [22] EPR mode capable + uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported + uint32_t no_usb_suspend : 1; // [24] No USB Suspend + uint32_t usb_comm_capable : 1; // [25] USB Communications Capable + uint32_t capability_mismatch : 1; // [26] Capability Mismatch + uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min + uint32_t object_position : 4; // [31..28] Object Position +} pd_rdo_battery_t; +TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); + + +TU_ATTR_PACKED_END // End of all packed definitions +TU_ATTR_BIT_FIELD_ORDER_END + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/src/typec/tcd.h b/src/typec/tcd.h index b131d6ba9..ee73943bd 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -28,6 +28,8 @@ #define _TUSB_TCD_H_ #include "common/tusb_common.h" +#include "pd_types.h" + #include "osal/osal.h" #include "common/tusb_fifo.h" @@ -69,7 +71,7 @@ typedef struct { //--------------------------------------------------------------------+ // Initialize controller -bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type); +bool tcd_init(uint8_t rhport, uint32_t port_type); // Enable interrupt void tcd_int_enable (uint8_t rhport); @@ -84,7 +86,7 @@ void tcd_int_handler(uint8_t rhport); // //--------------------------------------------------------------------+ -bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); +bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes); bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes); //--------------------------------------------------------------------+ @@ -135,4 +137,8 @@ void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_handler(&event, in_isr); } +#ifdef __cplusplus +} +#endif + #endif diff --git a/src/typec/utcd.c b/src/typec/utcd.c index 09031e5c9..439fe89b9 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -62,7 +62,7 @@ bool tuc_inited(uint8_t rhport) { return _utcd_inited && _port_inited[rhport]; } -bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { +bool tuc_init(uint8_t rhport, uint32_t port_type) { // Initialize stack if (!_utcd_inited) { tu_memclr(_port_inited, sizeof(_port_inited)); @@ -91,38 +91,38 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) { // //--------------------------------------------------------------------+ -bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) { +bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) { // copy header - memcpy(_tx_buf, header, sizeof(tusb_pd_header_t)); + memcpy(_tx_buf, header, sizeof(pd_header_t)); // copy data objcet if available uint16_t const n_data_obj = header->n_data_obj; if (n_data_obj > 0) { - memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4); + memcpy(_tx_buf + sizeof(pd_header_t), data, n_data_obj * 4); } - return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4); + return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4); } bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { (void) rhport; uint8_t const* p_end = buf + len; - tusb_pd_header_t const* header = (tusb_pd_header_t const*) buf; - uint8_t const * ptr = buf + sizeof(tusb_pd_header_t); + pd_header_t const* header = (pd_header_t const*) buf; + uint8_t const * ptr = buf + sizeof(pd_header_t); if (header->n_data_obj == 0) { // control message switch (header->msg_type) { - case TUSB_PD_CTRL_GOOD_CRC: + case PD_CTRL_GOOD_CRC: break; - case TUSB_PD_CTRL_ACCEPT: + case PD_CTRL_ACCEPT: break; - case TUSB_PD_CTRL_REJECT: + case PD_CTRL_REJECT: break; - case TUSB_PD_CTRL_PS_RDY: + case PD_CTRL_PS_READY: break; default: break; @@ -130,7 +130,7 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { } else { // data message switch (header->msg_type) { - case TUSB_PD_DATA_SOURCE_CAP: { + case PD_DATA_SOURCE_CAP: { // Examine source capability and select a suitable PDO (starting from 1 with safe5v) uint8_t obj_pos = 1; @@ -172,11 +172,11 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { .object_position = obj_pos, }; - tusb_pd_header_t const req_header = { - .msg_type = TUSB_PD_DATA_REQUEST, - .data_role = TUSB_PD_DATA_ROLE_UFP, - .specs_rev = TUSB_PD_REV20, - .power_role = TUSB_PD_POWER_ROLE_SINK, + pd_header_t const req_header = { + .msg_type = PD_DATA_REQUEST, + .data_role = PD_DATA_ROLE_UFP, + .specs_rev = PD_REV_20, + .power_role = PD_POWER_ROLE_SINK, .msg_id = 0, .n_data_obj = 1, .extended = 0, @@ -200,7 +200,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { case TCD_EVENT_CC_CHANGED: if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) { // Attach - tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); }else { // Detach } @@ -213,7 +213,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { } // start new rx - tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf)); + tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); break; default: break; diff --git a/src/typec/utcd.h b/src/typec/utcd.h index bb1523253..740e477ac 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -28,6 +28,7 @@ #define _TUSB_UTCD_H_ #include "common/tusb_common.h" +#include "pd_types.h" #ifdef __cplusplus extern "C" { @@ -41,105 +42,12 @@ extern "C" { #define CFG_TUC_TASK_QUEUE_SZ 8 #endif -//--------------------------------------------------------------------+ -// Source Capability -//--------------------------------------------------------------------+ - -// All table references are from USBPD Specification rev3.1 version 1.8 -enum { - PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax - PD_PDO_TYPE_BATTERY, - PD_PDO_TYPE_VARIABLE, // non-battery - PD_PDO_TYPE_APDO, // Augmented Power Data Object -}; - -// Fixed Power Data Object (PDO) table 6-9 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit - uint32_t voltage_50mv : 10; // [19..10] Voltage in 50mV unit - uint32_t current_peak : 2; // [21..20] Peak current - uint32_t reserved : 1; // [22] Reserved - uint32_t epr_mode_capable : 1; // [23] epr_mode_capable - uint32_t unchunked_ext_msg_support : 1; // [24] UnChunked Extended Message Supported - uint32_t dual_role_data : 1; // [25] Dual Role Data - uint32_t usb_comm_capable : 1; // [26] USB Communications Capable - uint32_t unconstrained_power : 1; // [27] Unconstrained Power - uint32_t usb_suspend_supported : 1; // [28] USB Suspend Supported - uint32_t dual_role_power : 1; // [29] Dual Role Power - uint32_t type : 2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED -} pd_pdo_fixed_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size"); - -// Battery Power Data Object (PDO) table 6-12 -typedef struct TU_ATTR_PACKED { - uint32_t power_max_250mw : 10; // [9..0] Max allowable power in 250mW unit - uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit - uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit - uint32_t type : 2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY -} pd_pdo_battery_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size"); - -// Variable Power Data Object (PDO) table 6-11 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_10ma : 10; // [9..0] Max current in 10mA unit - uint32_t voltage_min_50mv : 10; // [19..10] Minimum voltage in 50mV unit - uint32_t voltage_max_50mv : 10; // [29..20] Maximum voltage in 50mV unit - uint32_t type : 2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE -} pd_pdo_variable_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size"); - -// Augmented Power Data Object (PDO) table 6-13 -typedef struct TU_ATTR_PACKED { - uint32_t current_max_50ma : 7; // [6..0] Max current in 50mA unit - uint32_t reserved1 : 1; // [7] Reserved - uint32_t voltage_min_100mv : 8; // [15..8] Minimum Voltage in 100mV unit - uint32_t reserved2 : 1; // [16] Reserved - uint32_t voltage_max_100mv : 8; // [24..17] Maximum Voltage in 100mV unit - uint32_t reserved3 : 2; // [26..25] Reserved - uint32_t pps_power_limited : 1; // [27] PPS Power Limited - uint32_t spr_programmable : 2; // [29..28] SPR Programmable Power Supply - uint32_t type : 2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO -} pd_pdo_apdo_t; -TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size"); - -//--------------------------------------------------------------------+ -// Request -//--------------------------------------------------------------------+ - -typedef struct TU_ATTR_PACKED { - uint32_t current_extremum_10ma : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit - uint32_t current_operate_10ma : 10; // [19..10] Operating current in 10mA unit - uint32_t reserved : 2; // [21..20] Reserved - uint32_t epr_mode_capable : 1; // [22] EPR mode capable - uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported - uint32_t no_usb_suspend : 1; // [24] No USB Suspend - uint32_t usb_comm_capable : 1; // [25] USB Communications Capable - uint32_t capability_mismatch : 1; // [26] Capability Mismatch - uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min - uint32_t object_position : 4; // [31..28] Object Position -} pd_rdo_fixed_variable_t; -TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size"); - -typedef struct TU_ATTR_PACKED { - uint32_t power_extremum_250mw : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit - uint32_t power_operate_250mw : 10; // [19..10] Operating power in 250mW unit - uint32_t reserved : 2; // [21..20] Reserved - uint32_t epr_mode_capable : 1; // [22] EPR mode capable - uint32_t unchunked_ext_msg_support : 1; // [23] UnChunked Extended Message Supported - uint32_t no_usb_suspend : 1; // [24] No USB Suspend - uint32_t usb_comm_capable : 1; // [25] USB Communications Capable - uint32_t capability_mismatch : 1; // [26] Capability Mismatch - uint32_t give_back_flag : 1; // [27] GiveBack Flag: 0 = Max, 1 = Min - uint32_t object_position : 4; // [31..28] Object Position -} pd_rdo_battery_t; -TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size"); - //--------------------------------------------------------------------+ // Application API //--------------------------------------------------------------------+ // Init typec stack on a port -bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type); +bool tuc_init(uint8_t rhport, uint32_t port_type); // Check if typec port is initialized bool tuc_inited(uint8_t rhport); @@ -155,4 +63,9 @@ extern void tcd_int_handler(uint8_t rhport); // //--------------------------------------------------------------------+ + +#ifdef __cplusplus +} +#endif + #endif From 6941a5af81b53cd0df52632d403cccdb7d22cf30 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 16:42:27 +0700 Subject: [PATCH 28/94] wrap up initial PD support for G4 --- examples/typec/power_delivery/src/main.c | 90 +++++++++++- src/typec/tcd.h | 15 +- src/typec/utcd.c | 180 ++++++++++------------- src/typec/utcd.h | 20 +++ 4 files changed, 196 insertions(+), 109 deletions(-) diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c index 648345a55..42665ed1b 100644 --- a/examples/typec/power_delivery/src/main.c +++ b/examples/typec/power_delivery/src/main.c @@ -62,7 +62,8 @@ int main(void) while (1) { led_blinking_task(); -// tuc_task(); + // tinyusb typec task + tuc_task(); } } @@ -73,6 +74,93 @@ void app_main(void) } #endif +//--------------------------------------------------------------------+ +// TypeC PD callbacks +//--------------------------------------------------------------------+ + +bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end) { + switch (header->msg_type) { + case PD_DATA_SOURCE_CAP: { + printf("PD Source Capabilities\r\n"); + // Examine source capability and select a suitable PDO (starting from 1 with safe5v) + uint8_t obj_pos = 1; + + for(size_t i=0; in_data_obj; i++) { + TU_VERIFY(dobj < p_end); + uint32_t const pdo = tu_le32toh(tu_unaligned_read32(dobj)); + + switch ((pdo >> 30) & 0x03ul) { + case PD_PDO_TYPE_FIXED: { + pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo; + printf("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10); + break; + } + + case PD_PDO_TYPE_BATTERY: + break; + + case PD_PDO_TYPE_VARIABLE: + break; + + case PD_PDO_TYPE_APDO: + break; + } + + dobj += 4; + } + + //------------- Response with selected PDO -------------// + // Be careful and make sure your board can withstand the selected PDO voltage other than safe5v e.g 12v or 20v + + // Send request with selected PDO position as response to Source Cap + pd_rdo_fixed_variable_t rdo = { + .current_extremum_10ma = 50, // max 500mA + .current_operate_10ma = 30, // 300mA + .reserved = 0, + .epr_mode_capable = 0, + .unchunked_ext_msg_support = 0, + .no_usb_suspend = 0, + .usb_comm_capable = 1, + .capability_mismatch = 0, + .give_back_flag = 0, // exteremum is max + .object_position = obj_pos, + }; + + tuc_msg_request(rhport, &rdo); + + break; + } + + default: break; + } + + return true; +} + +bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header) { + switch (header->msg_type) { + case PD_CTRL_ACCEPT: + printf("PD Request Accepted\r\n"); + // preparing for power transition + break; + + case PD_CTRL_REJECT: + printf("PD Request Rejected\r\n"); + // try to negotiate further power + break; + + case PD_CTRL_PS_READY: + printf("PD Power Ready\r\n"); + // Source is ready to supply power + break; + + default: + break; + } + + return true; +} + //--------------------------------------------------------------------+ // BLINKING TASK //--------------------------------------------------------------------+ diff --git a/src/typec/tcd.h b/src/typec/tcd.h index ee73943bd..86499c951 100644 --- a/src/typec/tcd.h +++ b/src/typec/tcd.h @@ -48,8 +48,7 @@ enum { TCD_EVENT_TX_COMPLETE, }; - -typedef struct { +typedef struct TU_ATTR_PACKED { uint8_t rhport; uint8_t event_id; @@ -58,10 +57,10 @@ typedef struct { uint8_t cc_state[2]; } cc_changed; - struct { - uint16_t xferred_bytes; - uint8_t result; - } rx_complete; + struct TU_ATTR_PACKED { + uint16_t result : 2; + uint16_t xferred_bytes : 14; + } xfer_complete; }; } tcd_event_t;; @@ -114,7 +113,7 @@ void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_t event = { .rhport = rhport, .event_id = TCD_EVENT_RX_COMPLETE, - .rx_complete = { + .xfer_complete = { .xferred_bytes = xferred_bytes, .result = result } @@ -128,7 +127,7 @@ void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul tcd_event_t event = { .rhport = rhport, .event_id = TCD_EVENT_TX_COMPLETE, - .rx_complete = { + .xfer_complete = { .xferred_bytes = xferred_bytes, .result = result } diff --git a/src/typec/utcd.c b/src/typec/utcd.c index 439fe89b9..831df1fe8 100644 --- a/src/typec/utcd.c +++ b/src/typec/utcd.c @@ -52,8 +52,12 @@ static bool _utcd_inited = false; static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; // Max possible PD size is 262 bytes -static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4); -static uint8_t _tx_buf[100] TU_ATTR_ALIGNED(4); +static uint8_t _rx_buf[64] TU_ATTR_ALIGNED(4); +static uint8_t _tx_buf[64] TU_ATTR_ALIGNED(4); + +bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data); +bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end); +bool parse_msg_control(uint8_t rhport, pd_header_t const* header); //--------------------------------------------------------------------+ // @@ -79,6 +83,7 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) { } TU_LOG_UTCD("UTCD init on port %u\r\n", rhport); + TU_LOG_INT(UTCD_DEBUG, sizeof(tcd_event_t)); TU_ASSERT(tcd_init(rhport, port_type)); tcd_int_enable(rhport); @@ -87,6 +92,65 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) { return true; } +void tuc_task_ext(uint32_t timeout_ms, bool in_isr) { + (void) in_isr; // not implemented yet + + // Skip if stack is not initialized + if (!_utcd_inited) return; + + // Loop until there is no more events in the queue + while (1) { + tcd_event_t event; + if (!osal_queue_receive(_utcd_q, &event, timeout_ms)) return; + + switch (event.event_id) { + case TCD_EVENT_CC_CHANGED: + break; + + case TCD_EVENT_RX_COMPLETE: + // TODO process message here in ISR, move to thread later + if (event.xfer_complete.result == XFER_RESULT_SUCCESS) { + pd_header_t const* header = (pd_header_t const*) _rx_buf; + + if (header->n_data_obj == 0) { + parse_msg_control(event.rhport, header); + + }else { + uint8_t const* p_end = _rx_buf + event.xfer_complete.xferred_bytes; + uint8_t const * dobj = _rx_buf + sizeof(pd_header_t); + + parse_msg_data(event.rhport, header, dobj, p_end); + } + } + + // prepare for next message + tcd_msg_receive(event.rhport, _rx_buf, sizeof(_rx_buf)); + break; + + case TCD_EVENT_TX_COMPLETE: + break; + + default: break; + } + } +} + +bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end) { + if (tuc_pd_data_received_cb) { + tuc_pd_data_received_cb(rhport, header, dobj, p_end); + } + + return true; +} + +bool parse_msg_control(uint8_t rhport, pd_header_t const* header) { + if (tuc_pd_control_received_cb) { + tuc_pd_control_received_cb(rhport, header); + } + + return true; +} + //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ @@ -104,94 +168,18 @@ bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4); } -bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) { - (void) rhport; - uint8_t const* p_end = buf + len; - pd_header_t const* header = (pd_header_t const*) buf; - uint8_t const * ptr = buf + sizeof(pd_header_t); +bool tuc_msg_request(uint8_t rhport, void const* rdo) { + pd_header_t const header = { + .msg_type = PD_DATA_REQUEST, + .data_role = PD_DATA_ROLE_UFP, + .specs_rev = PD_REV_30, + .power_role = PD_POWER_ROLE_SINK, + .msg_id = 0, + .n_data_obj = 1, + .extended = 0, + }; - if (header->n_data_obj == 0) { - // control message - switch (header->msg_type) { - case PD_CTRL_GOOD_CRC: - break; - - case PD_CTRL_ACCEPT: - break; - - case PD_CTRL_REJECT: - break; - - case PD_CTRL_PS_READY: - break; - - default: break; - } - } else { - // data message - switch (header->msg_type) { - case PD_DATA_SOURCE_CAP: { - // Examine source capability and select a suitable PDO (starting from 1 with safe5v) - uint8_t obj_pos = 1; - - for(size_t i=0; in_data_obj; i++) { - TU_VERIFY(ptr < p_end); - uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr)); - - switch ((pdo >> 30) & 0x03ul) { - case PD_PDO_TYPE_FIXED: { - pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo; - TU_LOG3("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10); - break; - } - - case PD_PDO_TYPE_BATTERY: - break; - - case PD_PDO_TYPE_VARIABLE: - break; - - case PD_PDO_TYPE_APDO: - break; - } - - ptr += 4; - } - - // Send request with selected PDO position as response to Source Cap - pd_rdo_fixed_variable_t rdo = { - .current_extremum_10ma = 50, // max 500mA - .current_operate_10ma = 30, // 300mA - .reserved = 0, - .epr_mode_capable = 0, - .unchunked_ext_msg_support = 0, - .no_usb_suspend = 0, - .usb_comm_capable = 1, - .capability_mismatch = 0, - .give_back_flag = 0, // exteremum is max - .object_position = obj_pos, - }; - - pd_header_t const req_header = { - .msg_type = PD_DATA_REQUEST, - .data_role = PD_DATA_ROLE_UFP, - .specs_rev = PD_REV_20, - .power_role = PD_POWER_ROLE_SINK, - .msg_id = 0, - .n_data_obj = 1, - .extended = 0, - }; - - utcd_msg_send(rhport, &req_header, &rdo); - - break; - } - - default: break; - } - } - - return true; + return utcd_msg_send(rhport, &header, rdo); } void tcd_event_handler(tcd_event_t const * event, bool in_isr) { @@ -199,25 +187,17 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { switch(event->event_id) { case TCD_EVENT_CC_CHANGED: if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) { - // Attach + // Attach, start receiving tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); }else { // Detach } break; - case TCD_EVENT_RX_COMPLETE: - // TODO process message here in ISR, move to thread later - if (event->rx_complete.result == XFER_RESULT_SUCCESS) { - parse_message(event->rhport, _rx_buf, event->rx_complete.xferred_bytes); - } - - // start new rx - tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf)); - break; - default: break; } + + osal_queue_send(_utcd_q, event, in_isr); } //--------------------------------------------------------------------+ diff --git a/src/typec/utcd.h b/src/typec/utcd.h index 740e477ac..9fbff9bc6 100644 --- a/src/typec/utcd.h +++ b/src/typec/utcd.h @@ -52,6 +52,17 @@ bool tuc_init(uint8_t rhport, uint32_t port_type); // Check if typec port is initialized bool tuc_inited(uint8_t rhport); +// Task function should be called in main/rtos loop, extended version of tud_task() +// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever +// - in_isr: if function is called in ISR +void tuc_task_ext(uint32_t timeout_ms, bool in_isr); + +// Task function should be called in main/rtos loop +TU_ATTR_ALWAYS_INLINE static inline +void tuc_task (void) { + tuc_task_ext(UINT32_MAX, false); +} + #ifndef _TUSB_TCD_H_ extern void tcd_int_handler(uint8_t rhport); #endif @@ -59,10 +70,19 @@ extern void tcd_int_handler(uint8_t rhport); // Interrupt handler, name alias to TCD #define tuc_int_handler tcd_int_handler +//--------------------------------------------------------------------+ +// Callbacks +//--------------------------------------------------------------------+ + +TU_ATTR_WEAK bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end); +TU_ATTR_WEAK bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header); + //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ +bool tuc_msg_request(uint8_t rhport, void const* rdo); + #ifdef __cplusplus } From 7a1179a4e1dbf238e8cce203aa92c38c0cb055b7 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 17:01:54 +0700 Subject: [PATCH 29/94] tested with 9V request --- examples/typec/power_delivery/src/main.c | 27 +++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c index 42665ed1b..342a2235f 100644 --- a/examples/typec/power_delivery/src/main.c +++ b/examples/typec/power_delivery/src/main.c @@ -34,6 +34,13 @@ // MACRO CONSTANT TYPEDEF PROTOTYPES //--------------------------------------------------------------------+ +// Voltage and current for selecting PDO +// DANGEROUS: Please make sure your board can withstand the voltage and current +// defined here. Otherwise, you may damage your board, smoke can come out +#define VOLTAGE_MAX_MV 5000 // maximum voltage in mV +#define CURRENT_MAX_MA 500 // maximum current in mA +#define CURRENT_OPERATING_MA 100 // operating current in mA + /* Blink pattern * - 250 ms : button is not pressed * - 1000 ms : button is pressed (and hold) @@ -83,7 +90,7 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t case PD_DATA_SOURCE_CAP: { printf("PD Source Capabilities\r\n"); // Examine source capability and select a suitable PDO (starting from 1 with safe5v) - uint8_t obj_pos = 1; + uint8_t selected_pos = 1; for(size_t i=0; in_data_obj; i++) { TU_VERIFY(dobj < p_end); @@ -92,7 +99,15 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t switch ((pdo >> 30) & 0x03ul) { case PD_PDO_TYPE_FIXED: { pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo; - printf("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10); + uint32_t const voltage_mv = fixed->voltage_50mv*50; + uint32_t const current_ma = fixed->current_max_10ma*10; + printf("[Fixed] %lu mV %lu mA\r\n", voltage_mv, current_ma); + + if (voltage_mv <= VOLTAGE_MAX_MV && current_ma >= CURRENT_MAX_MA) { + // Found a suitable PDO + selected_pos = i+1; + } + break; } @@ -110,7 +125,10 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t } //------------- Response with selected PDO -------------// - // Be careful and make sure your board can withstand the selected PDO voltage other than safe5v e.g 12v or 20v + // Be careful and make sure your board can withstand the selected PDO + // voltage other than safe5v e.g 12v or 20v + + printf("Selected PDO %u\r\n", selected_pos); // Send request with selected PDO position as response to Source Cap pd_rdo_fixed_variable_t rdo = { @@ -123,9 +141,8 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t .usb_comm_capable = 1, .capability_mismatch = 0, .give_back_flag = 0, // exteremum is max - .object_position = obj_pos, + .object_position = selected_pos, }; - tuc_msg_request(rhport, &rdo); break; From d2d486dced7f92e8cab65f87be79b7e60d211ad2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 17:06:04 +0700 Subject: [PATCH 30/94] update docs --- README.rst | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/README.rst b/README.rst index 425cfa0e3..2c9119fef 100644 --- a/README.rst +++ b/README.rst @@ -20,8 +20,8 @@ Please take a look at the online `documentation `__. ├── docs # Documentation ├── examples # Sample with Makefile build support ├── hw - │   ├── bsp # Supported boards source files - │   └── mcu # Low level mcu core & peripheral drivers + │ ├── bsp # Supported boards source files + │ └── mcu # Low level mcu core & peripheral drivers ├── lib # Sources from 3rd party such as freeRTOS, fatfs ... ├── src # All sources files for TinyUSB stack itself. ├── test # Unit tests for the stack @@ -89,6 +89,13 @@ Host Stack - Mass Storage Class (MSC) - Hub with multiple-level support +TypeC PD Stack +============== + +- Power Delivery 3.0 (PD3.0) with USB Type-C support (WIP) +- Super early stage, only for testing purpose +- Only support STM32 G4 + OS Abstraction layer ==================== From 41801c2a6bd146033f5ff00e54983de46ab414b9 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 12 Jun 2023 17:12:25 +0700 Subject: [PATCH 31/94] add typec example to cmake --- examples/CMakeLists.txt | 1 + examples/typec/CMakeLists.txt | 9 +++++++++ 2 files changed, 10 insertions(+) create mode 100644 examples/typec/CMakeLists.txt diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt index 91c9fb098..c603d0c22 100644 --- a/examples/CMakeLists.txt +++ b/examples/CMakeLists.txt @@ -8,3 +8,4 @@ project(tinyusb_examples C CXX ASM) add_subdirectory(device) add_subdirectory(dual) add_subdirectory(host) +add_subdirectory(typec) diff --git a/examples/typec/CMakeLists.txt b/examples/typec/CMakeLists.txt new file mode 100644 index 000000000..c7641494e --- /dev/null +++ b/examples/typec/CMakeLists.txt @@ -0,0 +1,9 @@ +cmake_minimum_required(VERSION 3.17) + +include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake) + +project(tinyusb_host_examples C CXX ASM) +family_initialize_project(tinyusb_host_examples ${CMAKE_CURRENT_LIST_DIR}) + +# family_add_subdirectory will filter what to actually add based on selected FAMILY +family_add_subdirectory(power_delivery) From 9593ab7acc528814faf86c652b2a22209938128d Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Jun 2023 16:40:29 +0700 Subject: [PATCH 32/94] fix usbh issue when device genreate multiple attach/detach/attach when plugging in --- src/host/usbh.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/host/usbh.c b/src/host/usbh.c index 98e959a12..f3e9d3858 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -411,7 +411,14 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) if ( _dev0.enumerating ) { TU_LOG_USBH("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport); + + bool is_empty = osal_queue_empty(_usbh_q); osal_queue_send(_usbh_q, &event, in_isr); + + if (is_empty) { + // Exit if this is the only event in the queue, otherwise we may loop forever + return; + } }else { TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport); @@ -1461,7 +1468,10 @@ static bool enum_new_device(hcd_event_t* event) hcd_port_reset_end( _dev0.rhport); // device unplugged while delaying - if ( !hcd_port_connect_status(_dev0.rhport) ) return true; + if ( !hcd_port_connect_status(_dev0.rhport) ) { + enum_full_complete(); + return true; + } _dev0.speed = hcd_port_speed_get(_dev0.rhport ); TU_LOG_USBH("%s Speed\r\n", tu_str_speed[_dev0.speed]); From a88d7c7c7472b07f641772bff45e7804584f9ccd Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Jun 2023 17:47:28 +0700 Subject: [PATCH 33/94] ide setting --- .idea/cmake.xml | 14 ++++++++------ .idea/runConfigurations/rp2040.xml | 2 +- .idea/runConfigurations/rt1010_jlink.xml | 2 +- .idea/runConfigurations/rt1060_jlink.xml | 2 +- .idea/runConfigurations/stm32g474_jlink.xml | 2 +- 5 files changed, 12 insertions(+), 10 deletions(-) diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 871968dfb..3c016ccff 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -3,11 +3,9 @@ - + - - - + @@ -17,7 +15,7 @@ - + @@ -29,12 +27,16 @@ + + + - + + \ No newline at end of file diff --git a/.idea/runConfigurations/rp2040.xml b/.idea/runConfigurations/rp2040.xml index 0d1484b25..9b6111900 100644 --- a/.idea/runConfigurations/rp2040.xml +++ b/.idea/runConfigurations/rp2040.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml index 70cfeea53..e660a46ae 100644 --- a/.idea/runConfigurations/rt1010_jlink.xml +++ b/.idea/runConfigurations/rt1010_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml index eabadaf59..b9a47a2ce 100644 --- a/.idea/runConfigurations/rt1060_jlink.xml +++ b/.idea/runConfigurations/rt1060_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml index 45a755da4..c33829833 100644 --- a/.idea/runConfigurations/stm32g474_jlink.xml +++ b/.idea/runConfigurations/stm32g474_jlink.xml @@ -1,5 +1,5 @@ - + From 05969d2a58d426e5948df5dc0479e2ad8dfd02a9 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jun 2023 11:07:58 +0700 Subject: [PATCH 34/94] rename typec driver --- src/CMakeLists.txt | 2 +- src/tusb.h | 2 +- src/typec/{utcd.c => usbc.c} | 44 ++++++++++++++++++------------------ src/typec/{utcd.h => usbc.h} | 0 4 files changed, 24 insertions(+), 24 deletions(-) rename src/typec/{utcd.c => usbc.c} (85%) rename src/typec/{utcd.h => usbc.h} (100%) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index ce4486ecd..b99c7be6e 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -33,7 +33,7 @@ function(add_tinyusb TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c # typec - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/usbc.c ) target_include_directories(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR} diff --git a/src/tusb.h b/src/tusb.h index 0b87b1969..37a521fa8 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -42,7 +42,7 @@ //------------- TypeC -------------// #if CFG_TUC_ENABLED - #include "typec/utcd.h" + #include "typec/usbc.h" #endif //------------- HOST -------------// diff --git a/src/typec/utcd.c b/src/typec/usbc.c similarity index 85% rename from src/typec/utcd.c rename to src/typec/usbc.c index 831df1fe8..fdf2a0cd6 100644 --- a/src/typec/utcd.c +++ b/src/typec/usbc.c @@ -29,24 +29,24 @@ #if CFG_TUC_ENABLED #include "tcd.h" -#include "utcd.h" +#include "usbc.h" //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ // Debug level of USBD -#define UTCD_DEBUG 2 -#define TU_LOG_UTCD(...) TU_LOG(UTCD_DEBUG, __VA_ARGS__) +#define USBC_DEBUG 2 +#define TU_LOG_USBC(...) TU_LOG(USBC_DEBUG, __VA_ARGS__) // Event queue -// utcd_int_set() is used as mutex in OS NONE config -void utcd_int_set(bool enabled); -OSAL_QUEUE_DEF(utcd_int_set, _utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); -tu_static osal_queue_t _utcd_q; +// usbc_int_set() is used as mutex in OS NONE config +void usbc_int_set(bool enabled); +OSAL_QUEUE_DEF(usbc_int_set, _usbc_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t); +tu_static osal_queue_t _usbc_q; // if stack is initialized -static bool _utcd_inited = false; +static bool _usbc_inited = false; // if port is initialized static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; @@ -55,7 +55,7 @@ static bool _port_inited[TUP_TYPEC_RHPORTS_NUM]; static uint8_t _rx_buf[64] TU_ATTR_ALIGNED(4); static uint8_t _tx_buf[64] TU_ATTR_ALIGNED(4); -bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data); +bool usbc_msg_send(uint8_t rhport, pd_header_t const* header, void const* data); bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end); bool parse_msg_control(uint8_t rhport, pd_header_t const* header); @@ -63,18 +63,18 @@ bool parse_msg_control(uint8_t rhport, pd_header_t const* header); // //--------------------------------------------------------------------+ bool tuc_inited(uint8_t rhport) { - return _utcd_inited && _port_inited[rhport]; + return _usbc_inited && _port_inited[rhport]; } bool tuc_init(uint8_t rhport, uint32_t port_type) { // Initialize stack - if (!_utcd_inited) { + if (!_usbc_inited) { tu_memclr(_port_inited, sizeof(_port_inited)); - _utcd_q = osal_queue_create(&_utcd_qdef); - TU_ASSERT(_utcd_q != NULL); + _usbc_q = osal_queue_create(&_usbc_qdef); + TU_ASSERT(_usbc_q != NULL); - _utcd_inited = true; + _usbc_inited = true; } // skip if port already initialized @@ -82,8 +82,8 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) { return true; } - TU_LOG_UTCD("UTCD init on port %u\r\n", rhport); - TU_LOG_INT(UTCD_DEBUG, sizeof(tcd_event_t)); + TU_LOG_USBC("USBC init on port %u\r\n", rhport); + TU_LOG_INT(USBC_DEBUG, sizeof(tcd_event_t)); TU_ASSERT(tcd_init(rhport, port_type)); tcd_int_enable(rhport); @@ -96,12 +96,12 @@ void tuc_task_ext(uint32_t timeout_ms, bool in_isr) { (void) in_isr; // not implemented yet // Skip if stack is not initialized - if (!_utcd_inited) return; + if (!_usbc_inited) return; // Loop until there is no more events in the queue while (1) { tcd_event_t event; - if (!osal_queue_receive(_utcd_q, &event, timeout_ms)) return; + if (!osal_queue_receive(_usbc_q, &event, timeout_ms)) return; switch (event.event_id) { case TCD_EVENT_CC_CHANGED: @@ -155,7 +155,7 @@ bool parse_msg_control(uint8_t rhport, pd_header_t const* header) { // //--------------------------------------------------------------------+ -bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) { +bool usbc_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) { // copy header memcpy(_tx_buf, header, sizeof(pd_header_t)); @@ -179,7 +179,7 @@ bool tuc_msg_request(uint8_t rhport, void const* rdo) { .extended = 0, }; - return utcd_msg_send(rhport, &header, rdo); + return usbc_msg_send(rhport, &header, rdo); } void tcd_event_handler(tcd_event_t const * event, bool in_isr) { @@ -197,13 +197,13 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) { default: break; } - osal_queue_send(_utcd_q, event, in_isr); + osal_queue_send(_usbc_q, event, in_isr); } //--------------------------------------------------------------------+ // //--------------------------------------------------------------------+ -void utcd_int_set(bool enabled) { +void usbc_int_set(bool enabled) { // Disable all controllers since they shared the same event queue for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) { if ( _port_inited[p] ) { diff --git a/src/typec/utcd.h b/src/typec/usbc.h similarity index 100% rename from src/typec/utcd.h rename to src/typec/usbc.h From 8b8b9690ad8c546a8310c942ea926f654562f97c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jun 2023 12:01:21 +0700 Subject: [PATCH 35/94] update segger rtt to fix cast align --- hw/bsp/mcx/boards/mcxn947brk/board.cmake | 1 + hw/bsp/mcx/boards/mcxn947brk/board.mk | 6 +- hw/bsp/mcx/family.cmake | 2 +- lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 50 +-- lib/SEGGER_RTT/RTT/SEGGER_RTT.h | 17 +- lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c | 500 +++++++++++++++++++++++ 6 files changed, 545 insertions(+), 31 deletions(-) create mode 100644 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake index 7a210628f..650f10967 100644 --- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake +++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake @@ -10,6 +10,7 @@ function(update_board TARGET) CPU_MCXN947VDF_cm33_core0 # port 1 is highspeed BOARD_TUD_RHPORT=1 + BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED ) target_sources(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.mk b/hw/bsp/mcx/boards/mcxn947brk/board.mk index 69f47b8a8..aaad5e73e 100644 --- a/hw/bsp/mcx/boards/mcxn947brk/board.mk +++ b/hw/bsp/mcx/boards/mcxn947brk/board.mk @@ -4,8 +4,8 @@ PORT ?= 1 CFLAGS += -DCPU_MCXN947VDF_cm33_core0 -JLINK_DEVICE = LPC55S69 -PYOCD_TARGET = LPC55S69 +JLINK_DEVICE = MCXN947_M33_0 +PYOCD_TARGET = MCXN947 # flash using pyocd -flash: flash-pyocd +flash: flash-jlink diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 1dbf6f8f7..1c85b51f8 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -14,7 +14,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) -set(FAMILY_MCUS LPC55XX CACHE INTERNAL "") +set(FAMILY_MCUS MCXN9 CACHE INTERNAL "") # enable LTO if supported include(CheckIPOSupported) diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c index 895085ba2..730a5cfb3 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c @@ -306,7 +306,7 @@ static unsigned char _ActiveTerminal; #define INIT() \ do { \ volatile SEGGER_RTT_CB* pRTTCBInit; \ - pRTTCBInit = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \ + pRTTCBInit = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \ if (pRTTCBInit->acID[0] != 'S') { \ _DoInit(); \ } \ @@ -319,7 +319,7 @@ static void _DoInit(void) { // // Initialize control block // - p = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly + p = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly memset((SEGGER_RTT_CB*)p, 0, sizeof(_SEGGER_RTT)); // Make sure that the RTT CB is always zero initialized. p->MaxNumUpBuffers = SEGGER_RTT_MAX_NUM_UP_BUFFERS; p->MaxNumDownBuffers = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS; @@ -581,7 +581,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign volatile char* pSrc; INIT(); - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly pBuffer = (unsigned char*)pData; RdOff = pRing->RdOff; WrOff = pRing->WrOff; @@ -673,7 +673,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe volatile char* pSrc; // INIT(); - pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly pBuffer = (unsigned char*)pData; RdOff = pRing->RdOff; WrOff = pRing->WrOff; @@ -840,7 +840,7 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff // Get "to-host" ring buffer and copy some elements into local variables. // pData = (const char *)pBuffer; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Check if we will overwrite data and need to adjust the RdOff. // @@ -1033,7 +1033,7 @@ unsigned SEGGER_RTT_WriteDownBufferNoLock(unsigned BufferIndex, const void* pBuf // It is save to cast that to a "to-host" buffer. Up and Down buffer differ in volatility of offsets that might be modified by J-Link. // pData = (const char *)pBuffer; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // How we output depends upon the mode... // @@ -1107,7 +1107,7 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig // Get "to-host" ring buffer. // pData = (const char *)pBuffer; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // How we output depends upon the mode... // @@ -1271,7 +1271,7 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) { // // Get "to-host" ring buffer. // - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1326,7 +1326,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) { // // Get "to-host" ring buffer. // - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1385,7 +1385,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) { // // Get "to-host" ring buffer. // - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Get write position and handle wrap-around if necessary // @@ -1492,7 +1492,7 @@ int SEGGER_RTT_HasKey(void) { int r; INIT(); - pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly RdOff = pRing->RdOff; if (RdOff != pRing->WrOff) { r = 1; @@ -1518,7 +1518,7 @@ unsigned SEGGER_RTT_HasData(unsigned BufferIndex) { SEGGER_RTT_BUFFER_DOWN* pRing; unsigned v; - pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly v = pRing->WrOff; return v - pRing->RdOff; } @@ -1539,7 +1539,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) { SEGGER_RTT_BUFFER_UP* pRing; unsigned v; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly v = pRing->RdOff; return pRing->WrOff - v; } @@ -1570,7 +1570,7 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer INIT(); SEGGER_RTT_LOCK(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly BufferIndex = 0; do { if (pRTTCB->aDown[BufferIndex].pBuffer == NULL) { @@ -1619,7 +1619,7 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi INIT(); SEGGER_RTT_LOCK(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly BufferIndex = 0; do { if (pRTTCB->aUp[BufferIndex].pBuffer == NULL) { @@ -1674,7 +1674,7 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); pUp = &pRTTCB->aUp[BufferIndex]; @@ -1726,7 +1726,7 @@ int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* p volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); pDown = &pRTTCB->aDown[BufferIndex]; @@ -1769,7 +1769,7 @@ int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) { volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); pUp = &pRTTCB->aUp[BufferIndex]; @@ -1804,7 +1804,7 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) { volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); pDown = &pRTTCB->aDown[BufferIndex]; @@ -1840,7 +1840,7 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) { volatile SEGGER_RTT_BUFFER_UP* pUp; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) { SEGGER_RTT_LOCK(); pUp = &pRTTCB->aUp[BufferIndex]; @@ -1876,7 +1876,7 @@ int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) { volatile SEGGER_RTT_BUFFER_DOWN* pDown; INIT(); - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) { SEGGER_RTT_LOCK(); pDown = &pRTTCB->aDown[BufferIndex]; @@ -1930,7 +1930,7 @@ int SEGGER_RTT_SetTerminal (unsigned char TerminalId) { ac[0] = 0xFFu; if (TerminalId < sizeof(_aTerminalId)) { // We only support a certain number of channels ac[1] = _aTerminalId[TerminalId]; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly SEGGER_RTT_LOCK(); // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) { _ActiveTerminal = TerminalId; @@ -1982,7 +1982,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) { // // Get "to-host" ring buffer. // - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly // // Need to be able to change terminal, write data, change back. // Compute the fixed and variable sizes. @@ -2059,7 +2059,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) { unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex) { SEGGER_RTT_BUFFER_UP* pRing; - pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF); // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly return _GetAvailWriteSpace(pRing); } @@ -2086,7 +2086,7 @@ unsigned SEGGER_RTT_GetBytesInBuffer(unsigned BufferIndex) { // Avoid warnings regarding volatile access order. It's not a problem // in this case, but dampen compiler enthusiasm. // - pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly + pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly RdOff = pRTTCB->aUp[BufferIndex].RdOff; WrOff = pRTTCB->aUp[BufferIndex].WrOff; if (RdOff <= WrOff) { diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h index a3161f694..87f2841a5 100644 --- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h @@ -91,6 +91,10 @@ Revision: $Rev: 25842 $ #define _CORE_HAS_RTT_ASM_SUPPORT 1 #define _CORE_NEEDS_DMB 1 #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined(__ARM_ARCH_8_1M_MAIN__)) // Cortex-M85 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); #else #define _CORE_HAS_RTT_ASM_SUPPORT 0 #endif @@ -121,6 +125,10 @@ Revision: $Rev: 25842 $ #define _CORE_HAS_RTT_ASM_SUPPORT 1 #define _CORE_NEEDS_DMB 1 #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8_1M_MAIN__) // Cortex-M85 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R #define _CORE_NEEDS_DMB 1 #define RTT__DMB() __asm volatile ("dmb\n" : : :); @@ -147,6 +155,10 @@ Revision: $Rev: 25842 $ #define _CORE_HAS_RTT_ASM_SUPPORT 1 #define _CORE_NEEDS_DMB 1 #define RTT__DMB() __asm volatile ("dmb\n" : : :); + #elif (defined __ARM_ARCH_8_1M_MAIN__) // Cortex-M85 + #define _CORE_HAS_RTT_ASM_SUPPORT 1 + #define _CORE_NEEDS_DMB 1 + #define RTT__DMB() __asm volatile ("dmb\n" : : :); #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R #define _CORE_NEEDS_DMB 1 #define RTT__DMB() __asm volatile ("dmb\n" : : :); @@ -262,6 +274,7 @@ Revision: $Rev: 25842 $ #ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file #include #include +#include /********************************************************************* * @@ -381,7 +394,7 @@ unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex); // // Function macro for performance optimization // -#define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) +#define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) #if RTT_USE_ASM #define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock @@ -398,7 +411,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pDa unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); -#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly +#define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly /********************************************************************* * diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c new file mode 100644 index 000000000..4c996b408 --- /dev/null +++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c @@ -0,0 +1,500 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* condition is met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this condition and the following disclaimer. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_printf.c +Purpose : Replacement for printf to write formatted data via RTT +Revision: $Rev: 17697 $ +---------------------------------------------------------------------- +*/ +#include "SEGGER_RTT.h" +#include "SEGGER_RTT_Conf.h" + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE + #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64) +#endif + +#include +#include + + +#define FORMAT_FLAG_LEFT_JUSTIFY (1u << 0) +#define FORMAT_FLAG_PAD_ZERO (1u << 1) +#define FORMAT_FLAG_PRINT_SIGN (1u << 2) +#define FORMAT_FLAG_ALTERNATE (1u << 3) + +/********************************************************************* +* +* Types +* +********************************************************************** +*/ + +typedef struct { + char* pBuffer; + unsigned BufferSize; + unsigned Cnt; + + int ReturnValue; + + unsigned RTTBufferIndex; +} SEGGER_RTT_PRINTF_DESC; + +/********************************************************************* +* +* Function prototypes +* +********************************************************************** +*/ + +/********************************************************************* +* +* Static code +* +********************************************************************** +*/ +/********************************************************************* +* +* _StoreChar +*/ +static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) { + unsigned Cnt; + + Cnt = p->Cnt; + if ((Cnt + 1u) <= p->BufferSize) { + *(p->pBuffer + Cnt) = c; + p->Cnt = Cnt + 1u; + p->ReturnValue++; + } + // + // Write part of string, when the buffer is full + // + if (p->Cnt == p->BufferSize) { + if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) { + p->ReturnValue = -1; + } else { + p->Cnt = 0u; + } + } +} + +/********************************************************************* +* +* _PrintUnsigned +*/ +static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) { + static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' }; + unsigned Div; + unsigned Digit; + unsigned Number; + unsigned Width; + char c; + + Number = v; + Digit = 1u; + // + // Get actual field width + // + Width = 1u; + while (Number >= Base) { + Number = (Number / Base); + Width++; + } + if (NumDigits > Width) { + Width = NumDigits; + } + // + // Print leading chars if necessary + // + if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) { + if (FieldWidth != 0u) { + if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) { + c = '0'; + } else { + c = ' '; + } + while ((FieldWidth != 0u) && (Width < FieldWidth)) { + FieldWidth--; + _StoreChar(pBufferDesc, c); + if (pBufferDesc->ReturnValue < 0) { + break; + } + } + } + } + if (pBufferDesc->ReturnValue >= 0) { + // + // Compute Digit. + // Loop until Digit has the value of the highest digit required. + // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100. + // + while (1) { + if (NumDigits > 1u) { // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned) + NumDigits--; + } else { + Div = v / Digit; + if (Div < Base) { // Is our divider big enough to extract the highest digit from value? => Done + break; + } + } + Digit *= Base; + } + // + // Output digits + // + do { + Div = v / Digit; + v -= Div * Digit; + _StoreChar(pBufferDesc, _aV2C[Div]); + if (pBufferDesc->ReturnValue < 0) { + break; + } + Digit /= Base; + } while (Digit); + // + // Print trailing spaces if necessary + // + if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) { + if (FieldWidth != 0u) { + while ((FieldWidth != 0u) && (Width < FieldWidth)) { + FieldWidth--; + _StoreChar(pBufferDesc, ' '); + if (pBufferDesc->ReturnValue < 0) { + break; + } + } + } + } + } +} + +/********************************************************************* +* +* _PrintInt +*/ +static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) { + unsigned Width; + int Number; + + Number = (v < 0) ? -v : v; + + // + // Get actual field width + // + Width = 1u; + while (Number >= (int)Base) { + Number = (Number / (int)Base); + Width++; + } + if (NumDigits > Width) { + Width = NumDigits; + } + if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) { + FieldWidth--; + } + + // + // Print leading spaces if necessary + // + if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) { + if (FieldWidth != 0u) { + while ((FieldWidth != 0u) && (Width < FieldWidth)) { + FieldWidth--; + _StoreChar(pBufferDesc, ' '); + if (pBufferDesc->ReturnValue < 0) { + break; + } + } + } + } + // + // Print sign if necessary + // + if (pBufferDesc->ReturnValue >= 0) { + if (v < 0) { + v = -v; + _StoreChar(pBufferDesc, '-'); + } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) { + _StoreChar(pBufferDesc, '+'); + } else { + + } + if (pBufferDesc->ReturnValue >= 0) { + // + // Print leading zeros if necessary + // + if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) { + if (FieldWidth != 0u) { + while ((FieldWidth != 0u) && (Width < FieldWidth)) { + FieldWidth--; + _StoreChar(pBufferDesc, '0'); + if (pBufferDesc->ReturnValue < 0) { + break; + } + } + } + } + if (pBufferDesc->ReturnValue >= 0) { + // + // Print number without sign + // + _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags); + } + } + } +} + +/********************************************************************* +* +* Public code +* +********************************************************************** +*/ +/********************************************************************* +* +* SEGGER_RTT_vprintf +* +* Function description +* Stores a formatted string in SEGGER RTT control block. +* This data is read by the host. +* +* Parameters +* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal") +* sFormat Pointer to format string +* pParamList Pointer to the list of arguments for the format string +* +* Return values +* >= 0: Number of bytes which have been stored in the "Up"-buffer. +* < 0: Error +*/ +int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) { + char c; + SEGGER_RTT_PRINTF_DESC BufferDesc; + int v; + unsigned NumDigits; + unsigned FormatFlags; + unsigned FieldWidth; + char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE]; + + BufferDesc.pBuffer = acBuffer; + BufferDesc.BufferSize = SEGGER_RTT_PRINTF_BUFFER_SIZE; + BufferDesc.Cnt = 0u; + BufferDesc.RTTBufferIndex = BufferIndex; + BufferDesc.ReturnValue = 0; + + do { + c = *sFormat; + sFormat++; + if (c == 0u) { + break; + } + if (c == '%') { + // + // Filter out flags + // + FormatFlags = 0u; + v = 1; + do { + c = *sFormat; + switch (c) { + case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break; + case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO; sFormat++; break; + case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN; sFormat++; break; + case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE; sFormat++; break; + default: v = 0; break; + } + } while (v); + // + // filter out field with + // + FieldWidth = 0u; + do { + c = *sFormat; + if ((c < '0') || (c > '9')) { + break; + } + sFormat++; + FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0'); + } while (1); + + // + // Filter out precision (number of digits to display) + // + NumDigits = 0u; + c = *sFormat; + if (c == '.') { + sFormat++; + do { + c = *sFormat; + if ((c < '0') || (c > '9')) { + break; + } + sFormat++; + NumDigits = NumDigits * 10u + ((unsigned)c - '0'); + } while (1); + } + // + // Filter out length modifier + // + c = *sFormat; + do { + if ((c == 'l') || (c == 'h')) { + sFormat++; + c = *sFormat; + } else { + break; + } + } while (1); + // + // Handle specifiers + // + switch (c) { + case 'c': { + char c0; + v = va_arg(*pParamList, int); + c0 = (char)v; + _StoreChar(&BufferDesc, c0); + break; + } + case 'd': + v = va_arg(*pParamList, int); + _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags); + break; + case 'u': + v = va_arg(*pParamList, int); + _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags); + break; + case 'x': + case 'X': + v = va_arg(*pParamList, int); + _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags); + break; + case 's': + { + const char * s = va_arg(*pParamList, const char *); + do { + c = *s; + s++; + if (c == '\0') { + break; + } + _StoreChar(&BufferDesc, c); + } while (BufferDesc.ReturnValue >= 0); + } + break; + case 'p': + v = va_arg(*pParamList, int); + _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u); + break; + case '%': + _StoreChar(&BufferDesc, '%'); + break; + default: + break; + } + sFormat++; + } else { + _StoreChar(&BufferDesc, c); + } + } while (BufferDesc.ReturnValue >= 0); + + if (BufferDesc.ReturnValue > 0) { + // + // Write remaining data, if any + // + if (BufferDesc.Cnt != 0u) { + SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt); + } + BufferDesc.ReturnValue += (int)BufferDesc.Cnt; + } + return BufferDesc.ReturnValue; +} + +/********************************************************************* +* +* SEGGER_RTT_printf +* +* Function description +* Stores a formatted string in SEGGER RTT control block. +* This data is read by the host. +* +* Parameters +* BufferIndex Index of "Up"-buffer to be used. (e.g. 0 for "Terminal") +* sFormat Pointer to format string, followed by the arguments for conversion +* +* Return values +* >= 0: Number of bytes which have been stored in the "Up"-buffer. +* < 0: Error +* +* Notes +* (1) Conversion specifications have following syntax: +* %[flags][FieldWidth][.Precision]ConversionSpecifier +* (2) Supported flags: +* -: Left justify within the field width +* +: Always print sign extension for signed conversions +* 0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision +* Supported conversion specifiers: +* c: Print the argument as one char +* d: Print the argument as a signed integer +* u: Print the argument as an unsigned integer +* x: Print the argument as an hexadecimal integer +* s: Print the string pointed to by the argument +* p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.) +*/ +int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) { + int r; + va_list ParamList; + + va_start(ParamList, sFormat); + r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList); + va_end(ParamList); + return r; +} +/*************************** End of file ****************************/ From 31a66eb5bcd09ee62d3a28069ae6a5e7d6e2ec08 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jun 2023 15:33:57 +0700 Subject: [PATCH 36/94] mcx neeed helps to locate rtt control block --- .idea/runConfigurations/mcx947_jlink.xml | 10 ++++++++++ hw/bsp/mcx/mcx.jlinkscript | 5 +++++ 2 files changed, 15 insertions(+) create mode 100644 .idea/runConfigurations/mcx947_jlink.xml create mode 100644 hw/bsp/mcx/mcx.jlinkscript diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml new file mode 100644 index 000000000..71616ab70 --- /dev/null +++ b/.idea/runConfigurations/mcx947_jlink.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/hw/bsp/mcx/mcx.jlinkscript b/hw/bsp/mcx/mcx.jlinkscript new file mode 100644 index 000000000..fd8bcffef --- /dev/null +++ b/hw/bsp/mcx/mcx.jlinkscript @@ -0,0 +1,5 @@ +int SetupTarget(void) { + JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000"); + + return 0; +} From bce282186e811a7eefcee52c4a4fb3ca107001e4 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 14 Jun 2023 22:36:44 +0700 Subject: [PATCH 37/94] update kinetis kl to use mcx-sdk, also add cmake support note: cdc_msc_freertos built but does not seems to work with kl --- .../FreeRTOSConfig/FreeRTOSConfig.h | 166 ++++++++ .../kinetis_kl/boards/frdm_kl25z/board.cmake | 18 + hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h | 58 +++ hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk | 7 +- .../boards/frdm_kl25z/clock_config.c | 307 ++++++++++++++ .../boards/frdm_kl25z/clock_config.h | 130 ++++++ .../frdm_kl25z/frdm_kl25z.c => family.c} | 41 +- hw/bsp/kinetis_kl/family.cmake | 126 ++++++ hw/bsp/kinetis_kl/family.mk | 24 +- hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld | 253 ++++++++++++ hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S | 383 ++++++++++++++++++ tools/get_deps.py | 3 - tools/get_family_deps.py | 21 - 13 files changed, 1464 insertions(+), 73 deletions(-) create mode 100644 hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.cmake create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h rename hw/bsp/kinetis_kl/{boards/frdm_kl25z/frdm_kl25z.c => family.c} (74%) create mode 100644 hw/bsp/kinetis_kl/family.cmake create mode 100644 hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld create mode 100644 hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S delete mode 100644 tools/get_family_deps.py diff --git a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..960bb23e1 --- /dev/null +++ b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,166 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ +// FIXME cause redundant-decls warnings +extern uint32_t SystemCoreClock; +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 2 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv)); +} + +/******************************************************************************* + ********************** Configuration BOARD_BootClockRUN *********************** + ******************************************************************************/ +/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL ***************************** +!!Configuration +name: BOARD_BootClockRUN +outputs: +- {id: Bus_clock.outFreq, value: 24 MHz} +- {id: Core_clock.outFreq, value: 48 MHz, locked: true, accuracy: '0.001'} +- {id: ERCLK32K.outFreq, value: 1 kHz} +- {id: Flash_clock.outFreq, value: 24 MHz} +- {id: LPO_clock.outFreq, value: 1 kHz} +- {id: MCGIRCLK.outFreq, value: 32.768 kHz} +- {id: OSCERCLK.outFreq, value: 8 MHz} +- {id: PLLFLLCLK.outFreq, value: 48 MHz} +- {id: System_clock.outFreq, value: 48 MHz} +settings: +- {id: MCGMode, value: PEE} +- {id: MCG.FCRDIV.scale, value: '1', locked: true} +- {id: MCG.FRDIV.scale, value: '32'} +- {id: MCG.IREFS.sel, value: MCG.FRDIV} +- {id: MCG.PLLS.sel, value: MCG.PLL} +- {id: MCG.PRDIV.scale, value: '2', locked: true} +- {id: MCG.VDIV.scale, value: '24', locked: true} +- {id: MCG_C1_IRCLKEN_CFG, value: Enabled} +- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower} +- {id: MCG_C2_RANGE0_CFG, value: High} +- {id: MCG_C2_RANGE0_FRDIV_CFG, value: High} +- {id: OSC0_CR_ERCLKEN_CFG, value: Enabled} +- {id: OSC_CR_ERCLKEN_CFG, value: Enabled} +- {id: SIM.CLKOUTSEL.sel, value: SIM.OUTDIV4} +- {id: SIM.OSC32KSEL.sel, value: PMC.LPOCLK} +- {id: SIM.OUTDIV1.scale, value: '2'} +- {id: SIM.PLLFLLSEL.sel, value: SIM.MCGPLLCLK_DIV2} +- {id: SIM.TPMSRCSEL.sel, value: SIM.PLLFLLSEL} +- {id: SIM.UART0SRCSEL.sel, value: SIM.PLLFLLSEL} +- {id: SIM.USBSRCSEL.sel, value: SIM.PLLFLLSEL} +sources: +- {id: OSC.OSC.outFreq, value: 8 MHz, enabled: true} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/ + +/******************************************************************************* + * Variables for BOARD_BootClockRUN configuration + ******************************************************************************/ +const mcg_config_t mcgConfig_BOARD_BootClockRUN = + { + .mcgMode = kMCG_ModePEE, /* PEE - PLL Engaged External */ + .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ + .ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */ + .fcrdiv = 0x0U, /* Fast IRC divider: divided by 1 */ + .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */ + .drs = kMCG_DrsLow, /* Low frequency range */ + .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */ + .pll0Config = + { + .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */ + .prdiv = 0x1U, /* PLL Reference divider: divided by 2 */ + .vdiv = 0x0U, /* VCO divider: multiplied by 24 */ + }, + }; +const sim_clock_config_t simConfig_BOARD_BootClockRUN = + { + .pllFllSel = SIM_PLLFLLSEL_MCGPLLCLK_CLK, /* PLLFLL select: MCGPLLCLK clock */ + .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ + .clkdiv1 = 0x10010000U, /* SIM_CLKDIV1 - OUTDIV1: /2, OUTDIV4: /2 */ + }; +const osc_config_t oscConfig_BOARD_BootClockRUN = + { + .freq = 8000000U, /* Oscillator frequency: 8000000Hz */ + .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */ + .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */ + .oscerConfig = + { + .enableMode = kOSC_ErClkEnable, /* Enable external reference clock, disable external reference clock in STOP mode */ + } + }; + +/******************************************************************************* + * Code for BOARD_BootClockRUN configuration + ******************************************************************************/ +void BOARD_BootClockRUN(void) +{ + /* Set the system clock dividers in SIM to safe value. */ + CLOCK_SetSimSafeDivs(); + /* Initializes OSC0 according to board configuration. */ + CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN); + CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq); + /* Configure FLL external reference divider (FRDIV). */ + CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv); + /* Set MCG to PEE mode. */ + CLOCK_BootToPeeMode(kMCG_OscselOsc, + kMCG_PllClkSelPll0, + &mcgConfig_BOARD_BootClockRUN.pll0Config); + /* Configure the Internal Reference clock (MCGIRCLK). */ + CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode, + mcgConfig_BOARD_BootClockRUN.ircs, + mcgConfig_BOARD_BootClockRUN.fcrdiv); + /* Set the clock configuration in SIM module. */ + CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN); + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; +} + +/******************************************************************************* + ********************* Configuration BOARD_BootClockVLPR *********************** + ******************************************************************************/ +/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL ***************************** +!!Configuration +name: BOARD_BootClockVLPR +outputs: +- {id: Bus_clock.outFreq, value: 800 kHz} +- {id: Core_clock.outFreq, value: 4 MHz} +- {id: ERCLK32K.outFreq, value: 1 kHz} +- {id: Flash_clock.outFreq, value: 800 kHz} +- {id: LPO_clock.outFreq, value: 1 kHz} +- {id: MCGIRCLK.outFreq, value: 4 MHz} +- {id: System_clock.outFreq, value: 4 MHz} +settings: +- {id: MCGMode, value: BLPI} +- {id: powerMode, value: VLPR} +- {id: MCG.CLKS.sel, value: MCG.IRCS} +- {id: MCG.FCRDIV.scale, value: '1', locked: true} +- {id: MCG.FRDIV.scale, value: '32'} +- {id: MCG.IRCS.sel, value: MCG.FCRDIV} +- {id: MCG_C1_IRCLKEN_CFG, value: Enabled} +- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower} +- {id: MCG_C2_RANGE0_CFG, value: High} +- {id: MCG_C2_RANGE0_FRDIV_CFG, value: High} +- {id: SIM.OSC32KSEL.sel, value: PMC.LPOCLK} +- {id: SIM.OUTDIV4.scale, value: '5'} +sources: +- {id: OSC.OSC.outFreq, value: 8 MHz} + * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/ + +/******************************************************************************* + * Variables for BOARD_BootClockVLPR configuration + ******************************************************************************/ +const mcg_config_t mcgConfig_BOARD_BootClockVLPR = + { + .mcgMode = kMCG_ModeBLPI, /* BLPI - Bypassed Low Power Internal */ + .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */ + .ircs = kMCG_IrcFast, /* Fast internal reference clock selected */ + .fcrdiv = 0x0U, /* Fast IRC divider: divided by 1 */ + .frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */ + .drs = kMCG_DrsLow, /* Low frequency range */ + .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */ + .pll0Config = + { + .enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */ + .prdiv = 0x0U, /* PLL Reference divider: divided by 1 */ + .vdiv = 0x0U, /* VCO divider: multiplied by 24 */ + }, + }; +const sim_clock_config_t simConfig_BOARD_BootClockVLPR = + { + .pllFllSel = SIM_PLLFLLSEL_MCGFLLCLK_CLK, /* PLLFLL select: MCGFLLCLK clock */ + .er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */ + .clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /5 */ + }; +const osc_config_t oscConfig_BOARD_BootClockVLPR = + { + .freq = 0U, /* Oscillator frequency: 0Hz */ + .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */ + .workMode = kOSC_ModeOscLowPower, /* Oscillator low power */ + .oscerConfig = + { + .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */ + } + }; + +/******************************************************************************* + * Code for BOARD_BootClockVLPR configuration + ******************************************************************************/ +void BOARD_BootClockVLPR(void) +{ + /* Set the system clock dividers in SIM to safe value. */ + CLOCK_SetSimSafeDivs(); + /* Set MCG to BLPI mode. */ + CLOCK_BootToBlpiMode(mcgConfig_BOARD_BootClockVLPR.fcrdiv, + mcgConfig_BOARD_BootClockVLPR.ircs, + mcgConfig_BOARD_BootClockVLPR.irclkEnableMode); + /* Set the clock configuration in SIM module. */ + CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR); + /* Set VLPR power mode. */ + SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll); +#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI) + SMC_SetPowerModeVlpr(SMC, false); +#else + SMC_SetPowerModeVlpr(SMC); +#endif + while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr) + { + } + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK; +} diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h new file mode 100644 index 000000000..1033d4e55 --- /dev/null +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2015, Freescale Semiconductor, Inc. + * Copyright 2016-2017 NXP + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _CLOCK_CONFIG_H_ +#define _CLOCK_CONFIG_H_ + +#include "fsl_common.h" + +/******************************************************************************* + * Definitions +******************************************************************************/ + +/******************************************************************************* + ************************ BOARD_InitBootClocks function ************************ + ******************************************************************************/ + +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes default configuration of clocks. + * + */ +void BOARD_InitBootClocks(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#define BOARD_XTAL0_CLK_HZ 8000000U /*!< Board xtal0 frequency in Hz */ + +/******************************************************************************* + ********************** Configuration BOARD_BootClockRUN *********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockRUN configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */ + +/*! @brief MCG set for BOARD_BootClockRUN configuration. + */ +extern const mcg_config_t mcgConfig_BOARD_BootClockRUN; +/*! @brief SIM module set for BOARD_BootClockRUN configuration. + */ +extern const sim_clock_config_t simConfig_BOARD_BootClockRUN; +/*! @brief OSC set for BOARD_BootClockRUN configuration. + */ +extern const osc_config_t oscConfig_BOARD_BootClockRUN; + +/******************************************************************************* + * API for BOARD_BootClockRUN configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockRUN(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +/******************************************************************************* + ********************* Configuration BOARD_BootClockVLPR *********************** + ******************************************************************************/ +/******************************************************************************* + * Definitions for BOARD_BootClockVLPR configuration + ******************************************************************************/ +#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK 4000000U /*!< Core clock frequency: 4000000Hz */ + +/*! @brief MCG set for BOARD_BootClockVLPR configuration. + */ +extern const mcg_config_t mcgConfig_BOARD_BootClockVLPR; +/*! @brief SIM module set for BOARD_BootClockVLPR configuration. + */ +extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR; +/*! @brief OSC set for BOARD_BootClockVLPR configuration. + */ +extern const osc_config_t oscConfig_BOARD_BootClockVLPR; + +/******************************************************************************* + * API for BOARD_BootClockVLPR configuration + ******************************************************************************/ +#if defined(__cplusplus) +extern "C" { +#endif /* __cplusplus*/ + +/*! + * @brief This function executes configuration of clocks. + * + */ +void BOARD_BootClockVLPR(void); + +#if defined(__cplusplus) +} +#endif /* __cplusplus*/ + +#endif /* _CLOCK_CONFIG_H_ */ diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis_kl/family.c similarity index 74% rename from hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c rename to hw/bsp/kinetis_kl/family.c index 46f85f6a5..8914078d5 100644 --- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c +++ b/hw/bsp/kinetis_kl/family.c @@ -21,11 +21,10 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. */ -#include "../board.h" +#include "bsp/board.h" +#include "board.h" #include "fsl_device_registers.h" #include "fsl_gpio.h" #include "fsl_port.h" @@ -47,38 +46,6 @@ void USB0_IRQHandler(void) #endif } -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ -// LED -#define LED_PINMUX IOMUXC_GPIO_AD_B0_09_GPIO1_IO09 -#define LED_PORT GPIOB -#define LED_PIN_CLOCK kCLOCK_PortB -#define LED_PIN_PORT PORTB -#define LED_PIN 19U -#define LED_PIN_FUNCTION kPORT_MuxAsGpio -#define LED_STATE_ON 0 - -// Button -#define BUTTON_PORT GPIOC -#define BUTTON_PIN_CLOCK kCLOCK_PortC -#define BUTTON_PIN_PORT PORTC -#define BUTTON_PIN 9U -#define BUTTON_PIN_FUNCTION kPORT_MuxAsGpio -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_PORT UART0 -#define UART_PIN_CLOCK kCLOCK_PortA -#define UART_PIN_PORT PORTA -#define UART_PIN_RX 1u -#define UART_PIN_TX 2u -#define UART_PIN_FUNCTION kPORT_MuxAlt2 -#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!< UART0 receive data source select: UART0_RX pin */ -#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART0 transmit data source select: UART0_TX pin */ - -const uint8_t dcd_data[] = { 0x00 }; - void board_init(void) { BOARD_BootClockRUN(); @@ -139,13 +106,13 @@ void board_init(void) void board_led_write(bool state) { - GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); + GPIO_PinWrite(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); } uint32_t board_button_read(void) { #if defined(BUTTON_PORT) && defined(BUTTON_PIN) - return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN); + return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_PORT, BUTTON_PIN); #endif return 0; } diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake new file mode 100644 index 000000000..77b932b8e --- /dev/null +++ b/hw/bsp/kinetis_kl/family.cmake @@ -0,0 +1,126 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk) +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${SDK_DIR}/drivers/gpio/fsl_gpio.c + ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c + ${SDK_DIR}/drivers/uart/fsl_uart.c + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c + ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMSIS_DIR}/CMSIS/Core/Include + ${SDK_DIR}/devices/${MCU_VARIANT} + ${SDK_DIR}/devices/${MCU_VARIANT}/drivers + ${SDK_DIR}/drivers/common + ${SDK_DIR}/drivers/gpio + ${SDK_DIR}/drivers/lpsci + ${SDK_DIR}/drivers/port + ${SDK_DIR}/drivers/smc + ${SDK_DIR}/drivers/uart + ) + + update_board(${BOARD_TARGET}) + + # LD_FILE and STARTUP_FILE can be defined in board.cmake + + target_sources(${BOARD_TARGET} PUBLIC + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # TinyUSB Port + ${TOP}/src/portable/nxp/khci/dcd_khci.c + ${TOP}/src/portable/nxp/khci/hcd_khci.c + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB + family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) + #family_flash_nxplink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk index e805d6dae..2bed6b486 100644 --- a/hw/bsp/kinetis_kl/family.mk +++ b/hw/bsp/kinetis_kl/family.mk @@ -1,5 +1,5 @@ -SDK_DIR = hw/mcu/nxp/nxp_sdk -DEPS_SUBMODULES += $(SDK_DIR) +SDK_DIR = hw/mcu/nxp/mcux-sdk +DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 MCU_DIR = $(SDK_DIR)/devices/$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk @@ -18,20 +18,22 @@ SRC_C += \ src/portable/nxp/khci/dcd_khci.c \ src/portable/nxp/khci/hcd_khci.c \ $(MCU_DIR)/system_$(MCU).c \ - $(MCU_DIR)/project_template/clock_config.c \ $(MCU_DIR)/drivers/fsl_clock.c \ - $(MCU_DIR)/drivers/fsl_gpio.c \ - $(MCU_DIR)/drivers/fsl_lpsci.c \ - $(MCU_DIR)/drivers/fsl_uart.c + $(SDK_DIR)/drivers/gpio/fsl_gpio.c \ + $(SDK_DIR)/drivers/lpsci/fsl_lpsci.c \ + $(SDK_DIR)/drivers/uart/fsl_uart.c \ INC += \ $(TOP)/$(BOARD_PATH) \ - $(TOP)/$(SDK_DIR)/CMSIS/Include \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(MCU_DIR) \ - $(TOP)/$(MCU_DIR)/project_template \ - $(TOP)/$(MCU_DIR)/drivers - -SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S + $(TOP)/$(MCU_DIR)/drivers \ + $(TOP)/$(SDK_DIR)/drivers/common \ + $(TOP)/$(SDK_DIR)/drivers/gpio \ + $(TOP)/$(SDK_DIR)/drivers/lpsci \ + $(TOP)/$(SDK_DIR)/drivers/port \ + $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/uart \ # For freeRTOS port source FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld b/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld new file mode 100644 index 000000000..b38aa827c --- /dev/null +++ b/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld @@ -0,0 +1,253 @@ +/* +** ################################################################### +** Processors: MKL25Z128VFM4 +** MKL25Z128VFT4 +** MKL25Z128VLH4 +** MKL25Z128VLK4 +** +** Compiler: GNU C Compiler +** Reference manual: KL25P80M48SF0RM, Rev.3, Sep 2012 +** Version: rev. 2.5, 2015-02-19 +** Build: b170214 +** +** Abstract: +** Linker file for the GNU C Compiler +** +** Copyright 2016 Freescale Semiconductor, Inc. +** Copyright 2016-2017 NXP +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** +** o Redistributions of source code must retain the above copyright notice, this list +** of conditions and the following disclaimer. +** +** o Redistributions in binary form must reproduce the above copyright notice, this +** list of conditions and the following disclaimer in the documentation and/or +** other materials provided with the distribution. +** +** o Neither the name of the copyright holder nor the names of its +** contributors may be used to endorse or promote products derived from this +** software without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR +** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON +** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +** http: www.nxp.com +** mail: support@nxp.com +** +** ################################################################### +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; +STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; +M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0; + +/* Specify the memory areas */ +MEMORY +{ + m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000200 + m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010 + m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x0001FBF0 + m_data (RW) : ORIGIN = 0x1FFFF000, LENGTH = 0x00004000 +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into internal flash */ + .interrupts : + { + __VECTOR_TABLE = .; + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > m_interrupts + + .flash_config : + { + . = ALIGN(4); + KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */ + . = ALIGN(4); + } > m_flash_config + + /* The program code and other data goes into internal flash */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + KEEP (*(.init)) + KEEP (*(.fini)) + . = ALIGN(4); + } > m_text + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > m_text + + .ARM : + { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } > m_text + + .ctors : + { + __CTOR_LIST__ = .; + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + } > m_text + + .dtors : + { + __DTOR_LIST__ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + } > m_text + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > m_text + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } > m_text + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > m_text + + __etext = .; /* define a global symbol at end of code */ + __DATA_ROM = .; /* Symbol is used by startup for data initialization */ + + /* reserve MTB memory at the beginning of m_data */ + .mtb : /* MTB buffer address as defined by the hardware */ + { + . = ALIGN(8); + _mtb_start = .; + KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */ + . = ALIGN(8); + _mtb_end = .; + } > m_data + + .interrupts_ram : + { + . = ALIGN(4); + __VECTOR_RAM__ = .; + __interrupts_ram_start__ = .; /* Create a global symbol at data start */ + *(.m_interrupts_ram) /* This is a user defined section */ + . += M_VECTOR_RAM_SIZE; + . = ALIGN(4); + __interrupts_ram_end__ = .; /* Define a global symbol at data end */ + } > m_data + + __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts); + __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0; + + .data : AT(__DATA_ROM) + { + . = ALIGN(4); + __DATA_RAM = .; + __data_start__ = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*(.jcr*)) + . = ALIGN(4); + __data_end__ = .; /* define a global symbol at data end */ + } > m_data + + __DATA_END = __DATA_ROM + (__data_end__ - __data_start__); + text_end = ORIGIN(m_text) + LENGTH(m_text); + ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") + + /* Uninitialized data section */ + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + . = ALIGN(4); + __START_BSS = .; + __bss_start__ = .; + *(.bss) + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + __END_BSS = .; + } > m_data + + .heap : + { + . = ALIGN(8); + __end__ = .; + PROVIDE(end = .); + __HeapBase = .; + . += HEAP_SIZE; + __HeapLimit = .; + __heap_limit = .; /* Add for _sbrk */ + } > m_data + + .stack : + { + . = ALIGN(8); + . += STACK_SIZE; + } > m_data + + /* Initializes stack on the end of block */ + __StackTop = ORIGIN(m_data) + LENGTH(m_data); + __StackLimit = __StackTop - STACK_SIZE; + PROVIDE(__stack = __StackTop); + + .ARM.attributes 0 : { *(.ARM.attributes) } + + ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap") +} diff --git a/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S b/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S new file mode 100644 index 000000000..dc1438f3a --- /dev/null +++ b/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S @@ -0,0 +1,383 @@ +/* ---------------------------------------------------------------------------------------*/ +/* @file: startup_MKL25Z4.s */ +/* @purpose: CMSIS Cortex-M0P Core Device Startup File */ +/* MKL25Z4 */ +/* @version: 2.5 */ +/* @date: 2015-2-19 */ +/* @build: b170112 */ +/* ---------------------------------------------------------------------------------------*/ +/* */ +/* Copyright (c) 1997 - 2016, Freescale Semiconductor, Inc. */ +/* Copyright 2016 - 2017 NXP */ +/* Redistribution and use in source and binary forms, with or without modification, */ +/* are permitted provided that the following conditions are met: */ +/* */ +/* o Redistributions of source code must retain the above copyright notice, this list */ +/* of conditions and the following disclaimer. */ +/* */ +/* o Redistributions in binary form must reproduce the above copyright notice, this */ +/* list of conditions and the following disclaimer in the documentation and/or */ +/* other materials provided with the distribution. */ +/* */ +/* o Neither the name of the copyright holder nor the names of its */ +/* contributors may be used to endorse or promote products derived from this */ +/* software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND */ +/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */ +/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */ +/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR */ +/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ +/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; */ +/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON */ +/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ +/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/*****************************************************************************/ +/* Version: GCC for ARM Embedded Processors */ +/*****************************************************************************/ + .syntax unified + .arch armv6-m + + .section .isr_vector, "a" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler*/ + .long HardFault_Handler /* Hard Fault Handler*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long SVC_Handler /* SVCall Handler*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long PendSV_Handler /* PendSV Handler*/ + .long SysTick_Handler /* SysTick Handler*/ + + /* External Interrupts*/ + .long DMA0_IRQHandler /* DMA channel 0 transfer complete*/ + .long DMA1_IRQHandler /* DMA channel 1 transfer complete*/ + .long DMA2_IRQHandler /* DMA channel 2 transfer complete*/ + .long DMA3_IRQHandler /* DMA channel 3 transfer complete*/ + .long Reserved20_IRQHandler /* Reserved interrupt*/ + .long FTFA_IRQHandler /* Command complete and read collision*/ + .long LVD_LVW_IRQHandler /* Low-voltage detect, low-voltage warning*/ + .long LLWU_IRQHandler /* Low leakage wakeup Unit*/ + .long I2C0_IRQHandler /* I2C0 interrupt*/ + .long I2C1_IRQHandler /* I2C1 interrupt*/ + .long SPI0_IRQHandler /* SPI0 single interrupt vector for all sources*/ + .long SPI1_IRQHandler /* SPI1 single interrupt vector for all sources*/ + .long UART0_IRQHandler /* UART0 status and error*/ + .long UART1_IRQHandler /* UART1 status and error*/ + .long UART2_IRQHandler /* UART2 status and error*/ + .long ADC0_IRQHandler /* ADC0 interrupt*/ + .long CMP0_IRQHandler /* CMP0 interrupt*/ + .long TPM0_IRQHandler /* TPM0 single interrupt vector for all sources*/ + .long TPM1_IRQHandler /* TPM1 single interrupt vector for all sources*/ + .long TPM2_IRQHandler /* TPM2 single interrupt vector for all sources*/ + .long RTC_IRQHandler /* RTC alarm*/ + .long RTC_Seconds_IRQHandler /* RTC seconds*/ + .long PIT_IRQHandler /* PIT interrupt*/ + .long Reserved39_IRQHandler /* Reserved interrupt*/ + .long USB0_IRQHandler /* USB0 interrupt*/ + .long DAC0_IRQHandler /* DAC0 interrupt*/ + .long TSI0_IRQHandler /* TSI0 interrupt*/ + .long MCG_IRQHandler /* MCG interrupt*/ + .long LPTMR0_IRQHandler /* LPTMR0 interrupt*/ + .long Reserved45_IRQHandler /* Reserved interrupt*/ + .long PORTA_IRQHandler /* PORTA Pin detect*/ + .long PORTD_IRQHandler /* PORTD Pin detect*/ + + .size __isr_vector, . - __isr_vector + +/* Flash Configuration */ + .section .FlashConfig, "a" + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFE + + .text + .thumb + +/* Reset Handler */ + + .thumb_func + .align 2 + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i /* Mask interrupts */ + .equ VTOR, 0xE000ED08 + ldr r0, =VTOR + ldr r1, =__isr_vector + str r1, [r0] + ldr r2, [r1] + msr msp, r2 +#ifndef __NO_SYSTEM_INIT + ldr r0,=SystemInit + blx r0 +#endif +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + + subs r3, r2 + ble .LC0 + +.LC1: + subs r3, 4 + ldr r0, [r1,r3] + str r0, [r2,r3] + bgt .LC1 +.LC0: + +#ifdef __STARTUP_CLEAR_BSS +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * Loop to zero out BSS section, which uses following symbols + * in linker script: + * __bss_start__: start of BSS section. Must align to 4 + * __bss_end__: end of BSS section. Must align to 4 + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + subs r2, r1 + ble .LC3 + + movs r0, 0 +.LC2: + str r0, [r1, r2] + subs r2, 4 + bge .LC2 +.LC3: +#endif + cpsie i /* Unmask interrupts */ +#ifndef __START +#define __START _start +#endif +#ifndef __ATOLLIC__ + ldr r0,=__START + blx r0 +#else + ldr r0,=__libc_init_array + blx r0 + ldr r0,=main + bx r0 +#endif + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + ldr r0, =DefaultISR + bx r0 + .size DefaultISR, . - DefaultISR + + .align 1 + .thumb_func + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + ldr r0,=NMI_Handler + bx r0 + .size NMI_Handler, . - NMI_Handler + + .align 1 + .thumb_func + .weak HardFault_Handler + .type HardFault_Handler, %function +HardFault_Handler: + ldr r0,=HardFault_Handler + bx r0 + .size HardFault_Handler, . - HardFault_Handler + + .align 1 + .thumb_func + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + ldr r0,=SVC_Handler + bx r0 + .size SVC_Handler, . - SVC_Handler + + .align 1 + .thumb_func + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + ldr r0,=PendSV_Handler + bx r0 + .size PendSV_Handler, . - PendSV_Handler + + .align 1 + .thumb_func + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + ldr r0,=SysTick_Handler + bx r0 + .size SysTick_Handler, . - SysTick_Handler + + .align 1 + .thumb_func + .weak DMA0_IRQHandler + .type DMA0_IRQHandler, %function +DMA0_IRQHandler: + ldr r0,=DMA0_DriverIRQHandler + bx r0 + .size DMA0_IRQHandler, . - DMA0_IRQHandler + + .align 1 + .thumb_func + .weak DMA1_IRQHandler + .type DMA1_IRQHandler, %function +DMA1_IRQHandler: + ldr r0,=DMA1_DriverIRQHandler + bx r0 + .size DMA1_IRQHandler, . - DMA1_IRQHandler + + .align 1 + .thumb_func + .weak DMA2_IRQHandler + .type DMA2_IRQHandler, %function +DMA2_IRQHandler: + ldr r0,=DMA2_DriverIRQHandler + bx r0 + .size DMA2_IRQHandler, . - DMA2_IRQHandler + + .align 1 + .thumb_func + .weak DMA3_IRQHandler + .type DMA3_IRQHandler, %function +DMA3_IRQHandler: + ldr r0,=DMA3_DriverIRQHandler + bx r0 + .size DMA3_IRQHandler, . - DMA3_IRQHandler + + .align 1 + .thumb_func + .weak I2C0_IRQHandler + .type I2C0_IRQHandler, %function +I2C0_IRQHandler: + ldr r0,=I2C0_DriverIRQHandler + bx r0 + .size I2C0_IRQHandler, . - I2C0_IRQHandler + + .align 1 + .thumb_func + .weak I2C1_IRQHandler + .type I2C1_IRQHandler, %function +I2C1_IRQHandler: + ldr r0,=I2C1_DriverIRQHandler + bx r0 + .size I2C1_IRQHandler, . - I2C1_IRQHandler + + .align 1 + .thumb_func + .weak SPI0_IRQHandler + .type SPI0_IRQHandler, %function +SPI0_IRQHandler: + ldr r0,=SPI0_DriverIRQHandler + bx r0 + .size SPI0_IRQHandler, . - SPI0_IRQHandler + + .align 1 + .thumb_func + .weak SPI1_IRQHandler + .type SPI1_IRQHandler, %function +SPI1_IRQHandler: + ldr r0,=SPI1_DriverIRQHandler + bx r0 + .size SPI1_IRQHandler, . - SPI1_IRQHandler + + .align 1 + .thumb_func + .weak UART0_IRQHandler + .type UART0_IRQHandler, %function +UART0_IRQHandler: + ldr r0,=UART0_DriverIRQHandler + bx r0 + .size UART0_IRQHandler, . - UART0_IRQHandler + + .align 1 + .thumb_func + .weak UART1_IRQHandler + .type UART1_IRQHandler, %function +UART1_IRQHandler: + ldr r0,=UART1_DriverIRQHandler + bx r0 + .size UART1_IRQHandler, . - UART1_IRQHandler + + .align 1 + .thumb_func + .weak UART2_IRQHandler + .type UART2_IRQHandler, %function +UART2_IRQHandler: + ldr r0,=UART2_DriverIRQHandler + bx r0 + .size UART2_IRQHandler, . - UART2_IRQHandler + + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, DefaultISR + .endm + +/* Exception Handlers */ + def_irq_handler DMA0_DriverIRQHandler + def_irq_handler DMA1_DriverIRQHandler + def_irq_handler DMA2_DriverIRQHandler + def_irq_handler DMA3_DriverIRQHandler + def_irq_handler Reserved20_IRQHandler + def_irq_handler FTFA_IRQHandler + def_irq_handler LVD_LVW_IRQHandler + def_irq_handler LLWU_IRQHandler + def_irq_handler I2C0_DriverIRQHandler + def_irq_handler I2C1_DriverIRQHandler + def_irq_handler SPI0_DriverIRQHandler + def_irq_handler SPI1_DriverIRQHandler + def_irq_handler UART0_DriverIRQHandler + def_irq_handler UART1_DriverIRQHandler + def_irq_handler UART2_DriverIRQHandler + def_irq_handler ADC0_IRQHandler + def_irq_handler CMP0_IRQHandler + def_irq_handler TPM0_IRQHandler + def_irq_handler TPM1_IRQHandler + def_irq_handler TPM2_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler RTC_Seconds_IRQHandler + def_irq_handler PIT_IRQHandler + def_irq_handler Reserved39_IRQHandler + def_irq_handler USB0_IRQHandler + def_irq_handler DAC0_IRQHandler + def_irq_handler TSI0_IRQHandler + def_irq_handler MCG_IRQHandler + def_irq_handler LPTMR0_IRQHandler + def_irq_handler Reserved45_IRQHandler + def_irq_handler PORTA_IRQHandler + def_irq_handler PORTD_IRQHandler + + .end diff --git a/tools/get_deps.py b/tools/get_deps.py index b4739e940..7e798cf9e 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -53,9 +53,6 @@ deps_optional = { 'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git', '950819b7de9b32f92c3edf396bc5ffb8d66e7009', 'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'], - 'hw/mcu/nxp/nxp_sdk': ['https://github.com/hathach/nxp_sdk.git', - '845c8fc49b6fb660f06a5c45225494eacb06f00c', - 'kinetis_kl'], 'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', 'c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'rp2040'], diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py deleted file mode 100644 index 071d7b756..000000000 --- a/tools/get_family_deps.py +++ /dev/null @@ -1,21 +0,0 @@ -import sys -import subprocess -import os - -# TOP is tinyusb root dir -TOP = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) - -def get_family_dep(family): - for entry in os.scandir("{}/hw/bsp/{}/boards".format(TOP, family)): - if entry.is_dir(): - result = subprocess.run("make -C {}/examples/device/board_test BOARD={} get-deps".format(TOP, entry.name), - shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) - print(result.stdout.decode("utf-8")) - return result.returncode - - -status = 0 -for d in sys.argv[1:]: - status += get_family_dep(d) - -sys.exit(status) From d70403f1f496f5853251f83392ffe80130255489 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Jun 2023 13:06:27 +0700 Subject: [PATCH 38/94] refactor khci to chipidea fs driver for device (host is not yet) --- .idea/cmake.xml | 3 +- .idea/runConfigurations/mcx947_jlink.xml | 2 +- .idea/runConfigurations/rt1010_jlink.xml | 2 +- .idea/runConfigurations/rt1060_jlink.xml | 2 +- hw/bsp/kinetis_kl/family.cmake | 2 +- hw/bsp/mcx/boards/mcxn947brk/board.cmake | 8 +- hw/bsp/mcx/family.c | 27 +- hw/bsp/mcx/family.cmake | 4 +- hw/bsp/mcx/family.mk | 19 +- src/common/tusb_mcu.h | 6 +- src/portable/chipidea/ci_fs/ci_fs_kinetis.h | 51 ++ src/portable/chipidea/ci_fs/ci_fs_mcx.h | 47 ++ src/portable/chipidea/ci_fs/ci_fs_type.h | 118 +++++ src/portable/chipidea/ci_fs/dcd_ci_fs.c | 555 ++++++++++++++++++++ 14 files changed, 805 insertions(+), 41 deletions(-) create mode 100644 src/portable/chipidea/ci_fs/ci_fs_kinetis.h create mode 100644 src/portable/chipidea/ci_fs/ci_fs_mcx.h create mode 100644 src/portable/chipidea/ci_fs/ci_fs_type.h create mode 100644 src/portable/chipidea/ci_fs/dcd_ci_fs.c diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 3c016ccff..c9024715c 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,7 +2,7 @@ - + @@ -37,6 +37,7 @@ + \ No newline at end of file diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml index 71616ab70..27661bec5 100644 --- a/.idea/runConfigurations/mcx947_jlink.xml +++ b/.idea/runConfigurations/mcx947_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml index e660a46ae..68ebb8885 100644 --- a/.idea/runConfigurations/rt1010_jlink.xml +++ b/.idea/runConfigurations/rt1010_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml index b9a47a2ce..014a4d1b1 100644 --- a/.idea/runConfigurations/rt1060_jlink.xml +++ b/.idea/runConfigurations/rt1060_jlink.xml @@ -1,5 +1,5 @@ - + diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 77b932b8e..f491b3dee 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -88,7 +88,7 @@ function(family_configure_example TARGET) # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC # TinyUSB Port - ${TOP}/src/portable/nxp/khci/dcd_khci.c + ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c ${TOP}/src/portable/nxp/khci/hcd_khci.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake index 650f10967..8c3280743 100644 --- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake +++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake @@ -5,12 +5,14 @@ set(JLINK_DEVICE MCXN947_M33_0) set(PYOCD_TARGET MCXN947) set(NXPLINK_DEVICE MCXN947:MCXN947) +set(PORT 1) + function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC CPU_MCXN947VDF_cm33_core0 - # port 1 is highspeed - BOARD_TUD_RHPORT=1 - BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + BOARD_TUD_RHPORT=${PORT} + # port 0 is fullspeed, port 1 is highspeed + BOARD_TUD_MAX_SPEED=$ ) target_sources(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c index 36d2f2d0a..4344ffc4e 100644 --- a/hw/bsp/mcx/family.c +++ b/hw/bsp/mcx/family.c @@ -66,6 +66,7 @@ void board_init(void) { BOARD_InitPins(); BOARD_InitBootClocks(); + CLOCK_SetupExtClocking(XTAL0_CLK_HZ); // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); @@ -122,31 +123,13 @@ void board_init(void) // USB VBUS /* PORT0 PIN22 configured as USB0_VBUS */ - CLOCK_SetupExtClocking(XTAL0_CLK_HZ); - #if PORT_SUPPORT_DEVICE(0) // Port0 is Full Speed - /* Turn on USB0 Phy */ - POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); - - /* reset the IP to make sure it's in reset state. */ - RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn); - RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn); - RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn); - - // Enable USB Clock Adjustments to trim the FRO for the full speed controller - ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK; - CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); - CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); - - /*According to reference manual, device mode setting has to be set by access usb host register */ - CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock - USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; - CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock - - /* enable USB Device clock */ - CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); + CLOCK_AttachClk(kCLK_48M_to_USB0); + CLOCK_EnableClock(kCLOCK_Usb0Ram); + CLOCK_EnableClock(kCLOCK_Usb0Fs); + CLOCK_EnableUsbfsClock(); #endif #if PORT_SUPPORT_DEVICE(1) diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 1c85b51f8..7c5feaecf 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -88,8 +88,8 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS + ${TOP}/src/portable/chipidea/$ # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk index 2cd4c2448..2722c2038 100644 --- a/hw/bsp/mcx/family.mk +++ b/hw/bsp/mcx/family.mk @@ -16,21 +16,24 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \ -DBOARD_TUD_RHPORT=$(PORT) \ -ifeq ($(PORT), 1) - $(info "PORT1 High Speed") - CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED -else - $(info "PORT0 Full Speed") -endif - # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration # All source paths should be relative to the top level. LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld +# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS +ifeq ($(PORT), 1) + $(info "PORT1 High Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c +else + $(info "PORT0 Full Speed") + CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c +endif + SRC_C += \ - src/portable/chipidea/ci_hs/dcd_ci_hs.c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \ $(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index f89467e75..485d6168d 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -79,7 +79,11 @@ #define TUP_RHPORT_HIGHSPEED 1 #elif TU_CHECK_MCU(OPT_MCU_MCXN9) - // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS + // USB0 is chipidea FS + #define TUP_USBIP_CHIPIDEA_FS + #define TUP_USBIP_CHIPIDEA_FS_MCX + + // USB1 is chipidea HS #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_fs/ci_fs_kinetis.h b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h new file mode 100644 index 000000000..cd21af1c7 --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h @@ -0,0 +1,51 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_KINETIS_H +#define _CI_FS_KINETIS_H + +#include "fsl_device_registers.h" + +//static const ci_fs_controller_t _ci_controller[] = { +// {.reg_base = USB0_BASE, .irqnum = USB0_IRQn} +//}; + +#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) +#define CI_REG CI_FS_REG(0) + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_IRQn); +} + +#endif diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcx.h b/src/portable/chipidea/ci_fs/ci_fs_mcx.h new file mode 100644 index 000000000..3bfcd398e --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_mcx.h @@ -0,0 +1,47 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_MCX_H +#define _CI_FS_MCX_H + +#include "fsl_device_registers.h" + +#define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE) +#define CI_REG CI_FS_REG(0) + +void dcd_int_enable(uint8_t rhport) +{ + (void) rhport; + NVIC_EnableIRQ(USB0_FS_IRQn); +} + +void dcd_int_disable(uint8_t rhport) +{ + (void) rhport; + NVIC_DisableIRQ(USB0_FS_IRQn); +} + +#endif diff --git a/src/portable/chipidea/ci_fs/ci_fs_type.h b/src/portable/chipidea/ci_fs/ci_fs_type.h new file mode 100644 index 000000000..5a5e53fb0 --- /dev/null +++ b/src/portable/chipidea/ci_fs/ci_fs_type.h @@ -0,0 +1,118 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _CI_FS_TYPE_H +#define _CI_FS_TYPE_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +// Note: some MCUs can only access these registers in 8-bit mode +// align 4 is used to get rid of reserved fields +#define _va32 volatile TU_ATTR_ALIGNED(4) + +typedef struct { + _va32 uint8_t PER_ID; // [00] Peripheral ID register + _va32 uint8_t ID_COMP; // [04] Peripheral ID complement register + _va32 uint8_t REV; // [08] Peripheral revision register + _va32 uint8_t ADD_INFO; // [0C] Peripheral additional info register + _va32 uint8_t OTG_ISTAT; // [10] OTG Interrupt Status Register + _va32 uint8_t OTG_ICTRL; // [14] OTG Interrupt Control Register + _va32 uint8_t OTG_STAT; // [18] OTG Status Register + _va32 uint8_t OTG_CTRL; // [1C] OTG Control register + uint32_t reserved_20[24]; // [20] + _va32 uint8_t INT_STAT; // [80] Interrupt status register + _va32 uint8_t INT_EN; // [84] Interrupt enable register + _va32 uint8_t ERR_STAT; // [88] Error interrupt status register + _va32 uint8_t ERR_ENB; // [8C] Error interrupt enable register + _va32 uint8_t STAT; // [90] Status register + _va32 uint8_t CTL; // [94] Control register + _va32 uint8_t ADDR; // [98] Address register + _va32 uint8_t BDT_PAGE1; // [9C] BDT page register 1 + _va32 uint8_t FRM_NUML; // [A0] Frame number register + _va32 uint8_t FRM_NUMH; // [A4] Frame number register + _va32 uint8_t TOKEN; // [A8] Token register + _va32 uint8_t SOF_THLD; // [AC] SOF threshold register + _va32 uint8_t BDT_PAGE2; // [B0] BDT page register 2 + _va32 uint8_t BDT_PAGE3; // [B4] BDT page register 3 + + uint32_t reserved_b8; // [B8] + uint32_t reserved_bc; // [BC] + + struct { + _va32 uint8_t CTL; + }EP[16]; // [C0] Endpoint control register + + //----- Following is only found available in NXP Kinetis + _va32 uint8_t USBCTRL; // [100] USB Control register, + _va32 uint8_t OBSERVE; // [104] USB OTG Observe register, + _va32 uint8_t CONTROL; // [108] USB OTG Control register, + _va32 uint8_t USBTRC0; // [10C] USB Transceiver Control Register 0, + uint32_t reserved_110; // [110] + _va32 uint8_t USBFRMADJUST; // [114] Frame Adjust Register, + + //----- Following is only found available in NXP MCX + uint32_t reserved_118[3]; // [118] + _va32 uint8_t KEEP_ALIVE_CTRL; // [124] Keep Alive Mode Control, + _va32 uint8_t KEEP_ALIVE_WKCTRL; // [128] Keep Alive Mode Wakeup Control, + _va32 uint8_t MISCCTRL; // [12C] Miscellaneous Control, + _va32 uint8_t STALL_IL_DIS; // [130] Peripheral Mode Stall Disable for Endpoints[ 7..0] IN + _va32 uint8_t STALL_IH_DIS; // [134] Peripheral Mode Stall Disable for Endpoints[15..8] IN + _va32 uint8_t STALL_OL_DIS; // [138] Peripheral Mode Stall Disable for Endpoints[ 7..0] OUT + _va32 uint8_t STALL_OH_DIS; // [13C] Peripheral Mode Stall Disable for Endpoints[15..8] OUT + _va32 uint8_t CLK_RECOVER_CTRL; // [140] USB Clock Recovery Control, + _va32 uint8_t CLK_RECOVER_IRC_EN; // [144] FIRC Oscillator Enable, + uint32_t reserved_148[3]; // [148] + _va32 uint8_t CLK_RECOVER_INT_EN; // [154] Clock Recovery Combined Interrupt Enable, + uint32_t reserved_158; // [158] + _va32 uint8_t CLK_RECOVER_INT_STATUS; // [15C] Clock Recovery Separated Interrupt Status, +} ci_fs_regs_t; + +TU_VERIFY_STATIC(sizeof(ci_fs_regs_t) == 0x160, "Size is not correct"); + +typedef struct +{ + uint32_t reg_base; + uint32_t irqnum; +} ci_fs_controller_t; + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c new file mode 100644 index 000000000..37265df8b --- /dev/null +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -0,0 +1,555 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020 Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS) + +#include "device/dcd.h" +#include "ci_fs_type.h" + +#if defined(TUP_USBIP_CHIPIDEA_FS_KINETIS) + #include "ci_fs_kinetis.h" +#elif defined(TUP_USBIP_CHIPIDEA_FS_MCX) + #include "ci_fs_mcx.h" +#else + #error "MCU is not supported" +#endif + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ + +enum { + TOK_PID_OUT = 0x1u, + TOK_PID_IN = 0x9u, + TOK_PID_SETUP = 0xDu, +}; + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t head; + struct { + union { + struct { + uint16_t : 2; + __IO uint16_t tok_pid : 4; + uint16_t data : 1; + __IO uint16_t own : 1; + uint16_t : 8; + }; + struct { + uint16_t : 2; + uint16_t bdt_stall : 1; + uint16_t dts : 1; + uint16_t ninc : 1; + uint16_t keep : 1; + uint16_t : 10; + }; + }; + __IO uint16_t bc : 10; + uint16_t : 6; + }; + }; + uint8_t *addr; +}buffer_descriptor_t; + +TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" ); + +typedef struct TU_ATTR_PACKED +{ + union { + uint32_t state; + struct { + uint32_t max_packet_size :11; + uint32_t : 5; + uint32_t odd : 1; + uint32_t :15; + }; + }; + uint16_t length; + uint16_t remaining; +}endpoint_state_t; + +TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" ); + +typedef struct +{ + union { + /* [#EP][OUT,IN][EVEN,ODD] */ + buffer_descriptor_t bdt[16][2][2]; + uint16_t bda[512]; + }; + TU_ATTR_ALIGNED(4) union { + endpoint_state_t endpoint[16][2]; + endpoint_state_t endpoint_unified[16 * 2]; + }; + uint8_t setup_packet[8]; + uint8_t addr; +}dcd_data_t; + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +// BDT(Buffer Descriptor Table) must be 256-byte aligned +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd; + +TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" ); + +static void prepare_next_setup_packet(uint8_t rhport) +{ + const unsigned out_odd = _dcd.endpoint[0][0].odd; + const unsigned in_odd = _dcd.endpoint[0][1].odd; + TU_ASSERT(0 == _dcd.bdt[0][0][out_odd].own, ); + + _dcd.bdt[0][0][out_odd].data = 0; + _dcd.bdt[0][0][out_odd ^ 1].data = 1; + _dcd.bdt[0][1][in_odd].data = 1; + _dcd.bdt[0][1][in_odd ^ 1].data = 0; + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT), + _dcd.setup_packet, sizeof(_dcd.setup_packet)); +} + +static void process_stall(uint8_t rhport) +{ + for (int i = 0; i < 16; ++i) { + uint32_t const ep_ctl = CI_REG->EP[i].CTL; + + if (ep_ctl & USB_ENDPT_EPSTALL_MASK) { + // prepare next setup if endpoint0 + if ( i == 0 ) prepare_next_setup_packet(rhport); + + // clear stall bit + CI_REG->EP[i].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK; + } + } +} + +static void process_tokdne(uint8_t rhport) +{ + const unsigned s = CI_REG->STAT; + CI_REG->INT_STAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */ + + uint8_t const epnum = (s >> USB_STAT_ENDP_SHIFT); + uint8_t const dir = (s & USB_STAT_TX_MASK) >> USB_STAT_TX_SHIFT; + unsigned const odd = (s & USB_STAT_ODD_MASK) ? 1 : 0; + + buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s]; + endpoint_state_t *ep = &_dcd.endpoint_unified[s >> 3]; + + /* fetch pid before discarded by the next steps */ + const unsigned pid = bd->tok_pid; + + /* reset values for a next transfer */ + bd->bdt_stall = 0; + bd->dts = 1; + bd->ninc = 0; + bd->keep = 0; + /* update the odd variable to prepare for the next transfer */ + ep->odd = odd ^ 1; + if (pid == TOK_PID_SETUP) { + dcd_event_setup_received(rhport, bd->addr, true); + CI_REG->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK; + return; + } + + const unsigned bc = bd->bc; + const unsigned remaining = ep->remaining - bc; + if (remaining && bc == ep->max_packet_size) { + /* continue the transferring consecutive data */ + ep->remaining = remaining; + const int next_remaining = remaining - ep->max_packet_size; + if (next_remaining > 0) { + /* prepare to the after next transfer */ + bd->addr += ep->max_packet_size * 2; + bd->bc = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining; + __DSB(); + bd->own = 1; /* the own bit must set after addr */ + } + return; + } + const unsigned length = ep->length; + dcd_event_xfer_complete(rhport, + tu_edpt_addr(epnum, dir), + length - remaining, XFER_RESULT_SUCCESS, true); + if (0 == epnum && 0 == length) { + /* After completion a ZLP of control transfer, + * it prepares for the next steup transfer. */ + if (_dcd.addr) { + /* When the transfer was the SetAddress, + * the device address should be updated here. */ + CI_REG->ADDR = _dcd.addr; + _dcd.addr = 0; + } + prepare_next_setup_packet(rhport); + } +} + +static void process_bus_reset(uint8_t rhport) +{ + CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; + CI_REG->CTL |= USB_CTL_ODDRST_MASK; + CI_REG->ADDR = 0; + CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | USB_INTEN_SLEEPEN_MASK | + USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK; + + CI_REG->EP[0].CTL = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK; + for (unsigned i = 1; i < 16; ++i) { + CI_REG->EP[i].CTL = 0; + } + buffer_descriptor_t *bd = _dcd.bdt[0][0]; + for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + const endpoint_state_t ep0 = { + .max_packet_size = CFG_TUD_ENDPOINT0_SIZE, + .odd = 0, + .length = 0, + .remaining = 0, + }; + _dcd.endpoint[0][0] = ep0; + _dcd.endpoint[0][1] = ep0; + tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0])); + _dcd.addr = 0; + prepare_next_setup_packet(rhport); + CI_REG->CTL &= ~USB_CTL_ODDRST_MASK; + dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true); +} + +static void process_bus_sleep(uint8_t rhport) +{ + // Enable resume & disable suspend interrupt + const unsigned inten = CI_REG->INT_EN; + + CI_REG->INT_EN = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK; + CI_REG->USBTRC0 |= USB_USBTRC0_USBRESMEN_MASK; + CI_REG->USBCTRL |= USB_USBCTRL_SUSP_MASK; + + dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); +} + +static void process_bus_resume(uint8_t rhport) +{ + // Enable suspend & disable resume interrupt + const unsigned inten = CI_REG->INT_EN; + + CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; // will also clear USB_USBTRC0_USB_RESUME_INT_MASK + CI_REG->USBTRC0 &= ~USB_USBTRC0_USBRESMEN_MASK; + CI_REG->INT_EN = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK; + + dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); +} + +/*------------------------------------------------------------------*/ +/* Device API + *------------------------------------------------------------------*/ +void dcd_init(uint8_t rhport) +{ + (void) rhport; + + CI_REG->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; + while (CI_REG->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + + tu_memclr(&_dcd, sizeof(_dcd)); + CI_REG->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ + CI_REG->BDT_PAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8); + CI_REG->BDT_PAGE2 = (uint8_t)((uintptr_t)_dcd.bdt >> 16); + CI_REG->BDT_PAGE3 = (uint8_t)((uintptr_t)_dcd.bdt >> 24); + + CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK; + + dcd_connect(rhport); + // NVIC_ClearPendingIRQ(USB0_IRQn); +} + +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{ + _dcd.addr = dev_addr & 0x7F; + /* Response with status first before changing device address */ + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); +} + +void dcd_remote_wakeup(uint8_t rhport) +{ + (void) rhport; + + CI_REG->CTL |= USB_CTL_RESUME_MASK; + + unsigned cnt = SystemCoreClock / 1000; + while (cnt--) __NOP(); + + CI_REG->CTL &= ~USB_CTL_RESUME_MASK; +} + +void dcd_connect(uint8_t rhport) +{ + (void) rhport; + CI_REG->USBCTRL = 0; + CI_REG->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK; + CI_REG->CTL |= USB_CTL_USBENSOFEN_MASK; +} + +void dcd_disconnect(uint8_t rhport) +{ + (void) rhport; + CI_REG->CTL = 0; + CI_REG->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK; +} + +void dcd_sof_enable(uint8_t rhport, bool en) +{ + (void) rhport; + (void) en; + + // TODO implement later +} + +//--------------------------------------------------------------------+ +// Endpoint API +//--------------------------------------------------------------------+ +bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + + const unsigned ep_addr = ep_desc->bEndpointAddress; + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned xfer = ep_desc->bmAttributes.xfer; + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + const unsigned odd = ep->odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + + /* No support for control transfer */ + TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL)); + + ep->max_packet_size = tu_edpt_packet_size(ep_desc); + unsigned val = USB_ENDPT_EPCTLDIS_MASK; + val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0; + val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; + CI_REG->EP[epn].CTL |= val; + + if (xfer != TUSB_XFER_ISOCHRONOUS) { + bd[odd].dts = 1; + bd[odd].data = 0; + bd[odd ^ 1].dts = 1; + bd[odd ^ 1].data = 1; + } + + return true; +} + +void dcd_edpt_close_all(uint8_t rhport) +{ + dcd_int_disable(rhport); + + for (unsigned i = 1; i < 16; ++i) { + CI_REG->EP[i].CTL = 0; + } + + dcd_int_enable(rhport); + + buffer_descriptor_t *bd = _dcd.bdt[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) { + bd->head = 0; + } + + endpoint_state_t *ep = &_dcd.endpoint[1][0]; + for (unsigned i = 2; i < sizeof(_dcd.endpoint)/sizeof(*ep); ++i, ++ep) { + /* Clear except the odd */ + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + } +} + +void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + const unsigned msk = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK; + + dcd_int_disable(rhport); + + CI_REG->EP[epn].CTL &= ~msk; + ep->max_packet_size = 0; + ep->length = 0; + ep->remaining = 0; + bd[0].head = 0; + bd[1].head = 0; + + dcd_int_enable(rhport); +} + +bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) +{ + const unsigned epn = tu_edpt_number(ep_addr); + const unsigned dir = tu_edpt_dir(ep_addr); + endpoint_state_t *ep = &_dcd.endpoint[epn][dir]; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd]; + TU_ASSERT(0 == bd->own); + + dcd_int_disable(rhport); + + ep->length = total_bytes; + ep->remaining = total_bytes; + + const unsigned mps = ep->max_packet_size; + if (total_bytes > mps) { + buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1; + /* When total_bytes is greater than the max packet size, + * it prepares to the next transfer to avoid NAK in advance. */ + next->bc = total_bytes >= 2 * mps ? mps: total_bytes - mps; + next->addr = buffer + mps; + next->own = 1; + } + bd->bc = total_bytes >= mps ? mps: total_bytes; + bd->addr = buffer; + __DSB(); + bd->own = 1; /* This bit must be set last */ + + dcd_int_enable(rhport); + + return true; +} + +void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) +{ + (void) rhport; + const unsigned epn = tu_edpt_number(ep_addr); + + if (0 == epn) { + CI_REG->EP[epn].CTL |= USB_ENDPT_EPSTALL_MASK; + } else { + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][odd]; + TU_ASSERT(0 == bd->own,); + + dcd_int_disable(rhport); + + bd->bdt_stall = 1; + __DSB(); + bd->own = 1; /* This bit must be set last */ + + dcd_int_enable(rhport); + } +} + +void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) +{ + const unsigned epn = tu_edpt_number(ep_addr); + TU_VERIFY(epn,); + const unsigned dir = tu_edpt_dir(ep_addr); + const unsigned odd = _dcd.endpoint[epn][dir].odd; + buffer_descriptor_t *bd = _dcd.bdt[epn][dir]; + TU_VERIFY(bd[odd].own,); + + dcd_int_disable(rhport); + + bd[odd].own = 0; + __DSB(); + + // clear stall + bd[odd].bdt_stall = 0; + + // Reset data toggle + bd[odd ].data = 0; + bd[odd ^ 1].data = 1; + + // We already cleared this in ISR, but just clear it here to be safe + const uint32_t ep_ctl = CI_REG->EP[epn].CTL; + if (ep_ctl & USB_ENDPT_EPSTALL_MASK) { + CI_REG->EP[epn].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK; + } + + dcd_int_enable(rhport); +} + +//--------------------------------------------------------------------+ +// ISR +//--------------------------------------------------------------------+ +void dcd_int_handler(uint8_t rhport) +{ + uint32_t is = CI_REG->INT_STAT; + uint32_t msk = CI_REG->INT_EN; + + // clear non-enabled interrupts + CI_REG->INT_STAT = is & ~msk; + is &= msk; + + if (is & USB_ISTAT_ERROR_MASK) { + /* TODO: */ + uint32_t es = CI_REG->ERR_STAT; + CI_REG->ERR_STAT = es; + CI_REG->INT_STAT = is; /* discard any pending events */ + } + + if (is & USB_ISTAT_USBRST_MASK) { + CI_REG->INT_STAT = is; /* discard any pending events */ + process_bus_reset(rhport); + } + + if (is & USB_ISTAT_SLEEP_MASK) { + // TU_LOG2("Suspend: "); TU_LOG2_HEX(is); + + // Note Host usually has extra delay after bus reset (without SOF), which could falsely + // detected as Sleep event. Though usbd has debouncing logic so we are good + CI_REG->INT_STAT = USB_ISTAT_SLEEP_MASK; + process_bus_sleep(rhport); + } + +#if 0 // ISTAT_RESUME never trigger, probably for host mode ? + if (is & USB_ISTAT_RESUME_MASK) { + // TU_LOG2("ISTAT Resume: "); TU_LOG2_HEX(is); + KHCI->ISTAT = USB_ISTAT_RESUME_MASK; + process_bus_resume(rhport); + } +#endif + + if (CI_REG->USBTRC0 & USB_USBTRC0_USB_RESUME_INT_MASK) { + // TU_LOG2("USBTRC0 Resume: "); TU_LOG2_HEX(is); TU_LOG2_HEX(KHCI->USBTRC0); + process_bus_resume(rhport); + } + + if (is & USB_ISTAT_SOFTOK_MASK) { + CI_REG->INT_STAT = USB_ISTAT_SOFTOK_MASK; + dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); + } + + if (is & USB_ISTAT_STALL_MASK) { + CI_REG->INT_STAT = USB_ISTAT_STALL_MASK; + process_stall(rhport); + } + + if (is & USB_ISTAT_TOKDNE_MASK) { + process_tokdne(rhport); + } +} + +#endif From 1a37777f59936cba0523bb4790ef657bbf17b870 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 15 Jun 2023 13:11:21 +0700 Subject: [PATCH 39/94] fix ci with win/mac --- .github/workflows/build_win_mac.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml index 45fc62f78..cb879a705 100644 --- a/.github/workflows/build_win_mac.yml +++ b/.github/workflows/build_win_mac.yml @@ -48,7 +48,7 @@ jobs: uses: actions/checkout@v3 - name: Get Dependencies - run: python3 tools/get_family_deps.py stm32f4 + run: python3 tools/get_deps.py stm32f4 - name: Build run: python3 tools/build_family.py stm32f4 stm32f411disco From 96f7cd09dc2c8cd62afc5bb4b325ade45332e0ba Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 10:45:59 +0700 Subject: [PATCH 40/94] remove legacy transdimension driver --- .../transdimension/common_transdimension.h | 136 ---- .../nxp/transdimension/dcd_transdimension.c | 672 ------------------ .../nxp/transdimension/hcd_transdimension.c | 119 ---- 3 files changed, 927 deletions(-) delete mode 100644 src/portable/nxp/transdimension/common_transdimension.h delete mode 100644 src/portable/nxp/transdimension/dcd_transdimension.c delete mode 100644 src/portable/nxp/transdimension/hcd_transdimension.c diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h deleted file mode 100644 index 95ae1903e..000000000 --- a/src/portable/nxp/transdimension/common_transdimension.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef COMMON_TRANSDIMENSION_H_ -#define COMMON_TRANSDIMENSION_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// USBCMD -enum { - USBCMD_RUN_STOP = TU_BIT(0), - USBCMD_RESET = TU_BIT(1), - USBCMD_SETUP_TRIPWIRE = TU_BIT(13), - USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD -// Interrupt Threshold bit 23:16 -}; - -// PORTSC1 -#define PORTSC1_PORT_SPEED_POS 26 - -enum { - PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), - PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), - PORTSC1_SUSPEND = TU_BIT(7), - PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), - PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) -}; - -// OTGSC -enum { - OTGSC_VBUS_DISCHARGE = TU_BIT(0), - OTGSC_VBUS_CHARGE = TU_BIT(1), -// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), - OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode - OTGSC_DATA_PULSING = TU_BIT(4), - OTGSC_ID_PULLUP = TU_BIT(5), -// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), -// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), - OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device - OTGSC_A_VBUS_VALID = TU_BIT(9), - OTGSC_A_SESSION_VALID = TU_BIT(10), - OTGSC_B_SESSION_VALID = TU_BIT(11), - OTGSC_B_SESSION_END = TU_BIT(12), - OTGSC_1MS_TOGGLE = TU_BIT(13), - OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), -}; - -// USBMode -enum { - USBMODE_CM_DEVICE = 2, - USBMODE_CM_HOST = 3, - - USBMODE_SLOM = TU_BIT(3), - USBMODE_SDIS = TU_BIT(4), - - USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode -}; - -// Device Registers -typedef struct -{ - //------------- ID + HW Parameter Registers-------------// - __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX - - //------------- Capability Registers-------------// - __I uint8_t CAPLENGTH; ///< Capability Registers Length - __I uint8_t TU_RESERVED[1]; - __I uint16_t HCIVERSION; ///< Host Controller Interface Version - - __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters - __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters - __I uint32_t TU_RESERVED[5]; - - __I uint16_t DCIVERSION; ///< Device Controller Interface Version - __I uint8_t TU_RESERVED[2]; - - __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters - __I uint32_t TU_RESERVED[6]; - - //------------- Operational Registers -------------// - __IO uint32_t USBCMD; ///< USB Command Register - __IO uint32_t USBSTS; ///< USB Status Register - __IO uint32_t USBINTR; ///< Interrupt Enable Register - __IO uint32_t FRINDEX; ///< USB Frame Index - __I uint32_t TU_RESERVED; - __IO uint32_t DEVICEADDR; ///< Device Address - __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address - __I uint32_t TU_RESERVED; - __IO uint32_t BURSTSIZE; ///< Programmable Burst Size - __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning - uint32_t TU_RESERVED[4]; - __IO uint32_t ENDPTNAK; ///< Endpoint NAK - __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable - __I uint32_t TU_RESERVED; - __IO uint32_t PORTSC1; ///< Port Status & Control - __I uint32_t TU_RESERVED[7]; - __IO uint32_t OTGSC; ///< On-The-Go Status & control - __IO uint32_t USBMODE; ///< USB Device Mode - __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status - __IO uint32_t ENDPTPRIME; ///< Endpoint Prime - __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush - __I uint32_t ENDPTSTAT; ///< Endpoint Status - __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete - __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 -} dcd_registers_t, hcd_registers_t; - -#ifdef __cplusplus - } -#endif - -#endif /* COMMON_TRANSDIMENSION_H_ */ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c deleted file mode 100644 index 983d7cfcf..000000000 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ /dev/null @@ -1,672 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if CFG_TUD_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) - -#warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT - #include "fsl_device_registers.h" - #define INCLUDE_FSL_DEVICE_REGISTERS -#else - // LPCOpen for 18xx & 43xx - #include "chip.h" -#endif - -#include "common/tusb_common.h" -#include "device/dcd.h" -#include "common_transdimension.h" - -#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 - #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr -#else - #define CleanInvalidateDCache_by_Addr(_addr, _dsize) -#endif - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -// ENDPTCTRL -enum { - ENDPTCTRL_STALL = TU_BIT(0), - ENDPTCTRL_TOGGLE_INHIBIT = TU_BIT(5), // used for test only - ENDPTCTRL_TOGGLE_RESET = TU_BIT(6), - ENDPTCTRL_ENABLE = TU_BIT(7) -}; - -enum { - ENDPTCTRL_TYPE_POS = 2, // Endpoint type is 2-bit field -}; - -// USBSTS, USBINTR -enum { - INTR_USB = TU_BIT(0), - INTR_ERROR = TU_BIT(1), - INTR_PORT_CHANGE = TU_BIT(2), - INTR_RESET = TU_BIT(6), - INTR_SOF = TU_BIT(7), - INTR_SUSPEND = TU_BIT(8), - INTR_NAK = TU_BIT(16) -}; - -// Queue Transfer Descriptor -typedef struct -{ - // Word 0: Next QTD Pointer - uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed - - // Word 1: qTQ Token - uint32_t : 3 ; - volatile uint32_t xact_err : 1 ; - uint32_t : 1 ; - volatile uint32_t buffer_err : 1 ; - volatile uint32_t halted : 1 ; - volatile uint32_t active : 1 ; - uint32_t : 2 ; - uint32_t iso_mult_override : 2 ; ///< This field can be used for transmit ISOs to override the MULT field in the dQH. This field must be zero for all packet types that are not transmit-ISO. - uint32_t : 3 ; - uint32_t int_on_complete : 1 ; - volatile uint32_t total_bytes : 15 ; - uint32_t : 1 ; - - // Word 2-6: Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page - uint32_t buffer[5]; ///< buffer1 has frame_n for TODO Isochronous - - //--------------------------------------------------------------------+ - // TD is 32 bytes aligned but occupies only 28 bytes - // Therefore there are 4 bytes padding that we can use. - //--------------------------------------------------------------------+ - uint16_t expected_bytes; - uint8_t reserved[2]; -} dcd_qtd_t; - -TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct"); - -// Queue Head -typedef struct -{ - // Word 0: Capabilities and Characteristics - uint32_t : 15 ; ///< Number of packets executed per transaction descriptor 00 - Execute N transactions as demonstrated by the USB variable length protocol where N is computed using Max_packet_length and the Total_bytes field in the dTD. 01 - Execute one transaction 10 - Execute two transactions 11 - Execute three transactions Remark: Non-isochronous endpoints must set MULT = 00. Remark: Isochronous endpoints must set MULT = 01, 10, or 11 as needed. - uint32_t int_on_setup : 1 ; ///< Interrupt on setup This bit is used on control type endpoints to indicate if USBINT is set in response to a setup being received. - uint32_t max_packet_size : 11 ; ///< Endpoint's wMaxPacketSize - uint32_t : 2 ; - uint32_t zero_length_termination : 1 ; ///< This bit is used for non-isochronous endpoints to indicate when a zero-length packet is received to terminate transfers in case the total transfer length is “multiple”. 0 - Enable zero-length packet to terminate transfers equal to a multiple of Max_packet_length (default). 1 - Disable zero-length packet on transfers that are equal in length to a multiple Max_packet_length. - uint32_t iso_mult : 2 ; ///< - - // Word 1: Current qTD Pointer - volatile uint32_t qtd_addr; - - // Word 2-9: Transfer Overlay - volatile dcd_qtd_t qtd_overlay; - - // Word 10-11: Setup request (control OUT only) - volatile tusb_control_request_t setup_request; - - //--------------------------------------------------------------------+ - // QHD is 64 bytes aligned but occupies only 48 bytes - // Therefore there are 16 bytes padding that we can use. - //--------------------------------------------------------------------+ - tu_fifo_t * ff; - uint8_t reserved[12]; -} dcd_qhd_t; - -TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct"); - -//--------------------------------------------------------------------+ -// Variables -//--------------------------------------------------------------------+ - -typedef struct -{ - dcd_registers_t* regs; // registers - const IRQn_Type irqnum; // IRQ number - const uint8_t ep_count; // Max bi-directional Endpoints -}dcd_controller_t; - -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT - static const dcd_controller_t _dcd_controller[] = - { - // RT1010 and RT1020 only has 1 USB controller - #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs = (dcd_registers_t*) USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 } - #else - { .regs = (dcd_registers_t*) USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 }, - { .regs = (dcd_registers_t*) USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 } - #endif - }; - -#else - static const dcd_controller_t _dcd_controller[] = - { - { .regs = (dcd_registers_t*) LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 }, - { .regs = (dcd_registers_t*) LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 } - }; -#endif - -#define QTD_NEXT_INVALID 0x01 - -typedef struct { - // Must be at 2K alignment - // Each endpoint with direction (IN/OUT) occupies a queue head - // for portability, TinyUSB only queue 1 TD for each Qhd - dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); -}dcd_data_t; - -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) -static dcd_data_t _dcd_data; - -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ - -/// follows LPC43xx User Manual 23.10.3 -static void bus_reset(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // The reset value for all endpoint types is the control endpoint. If one endpoint - // direction is enabled and the paired endpoint of opposite direction is disabled, then the - // endpoint type of the unused direction must be changed from the control type to any other - // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior - // for the data PID tracking on the active endpoint. - for( uint8_t i=1; i < _dcd_controller[rhport].ep_count; i++) - { - dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS)); - } - - //------------- Clear All Registers -------------// - dcd_reg->ENDPTNAK = dcd_reg->ENDPTNAK; - dcd_reg->ENDPTNAKEN = 0; - dcd_reg->USBSTS = dcd_reg->USBSTS; - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; - dcd_reg->ENDPTCOMPLETE = dcd_reg->ENDPTCOMPLETE; - - while (dcd_reg->ENDPTPRIME) {} - dcd_reg->ENDPTFLUSH = 0xFFFFFFFF; - while (dcd_reg->ENDPTFLUSH) {} - - // read reset bit in portsc - - //------------- Queue Head & Queue TD -------------// - tu_memclr(&_dcd_data, sizeof(dcd_data_t)); - - //------------- Set up Control Endpoints (0 OUT, 1 IN) -------------// - _dcd_data.qhd[0][0].zero_length_termination = _dcd_data.qhd[0][1].zero_length_termination = 1; - _dcd_data.qhd[0][0].max_packet_size = _dcd_data.qhd[0][1].max_packet_size = CFG_TUD_ENDPOINT0_SIZE; - _dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID; - - _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only -} - -void dcd_init(uint8_t rhport) -{ - tu_memclr(&_dcd_data, sizeof(dcd_data_t)); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // Reset controller - dcd_reg->USBCMD |= USBCMD_RESET; - while( dcd_reg->USBCMD & USBCMD_RESET ) {} - - // Set mode to device, must be set immediately after reset - dcd_reg->USBMODE = USBMODE_CM_DEVICE; - dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION; - -#if !TUD_OPT_HIGH_SPEED - dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED; -#endif - - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment - dcd_reg->USBSTS = dcd_reg->USBSTS; - dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_SUSPEND; - - dcd_reg->USBCMD &= ~0x00FF0000; // Interrupt Threshold Interval = 0 - dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect -} - -void dcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(_dcd_controller[rhport].irqnum); -} - -void dcd_set_address(uint8_t rhport, uint8_t dev_addr) -{ - // Response with status first before changing device address - dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->DEVICEADDR = (dev_addr << 25) | TU_BIT(24); -} - -void dcd_remote_wakeup(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->PORTSC1 |= PORTSC1_FORCE_PORT_RESUME; -} - -void dcd_connect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->USBCMD |= USBCMD_RUN_STOP; -} - -void dcd_disconnect(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->USBCMD &= ~USBCMD_RUN_STOP; -} - -void dcd_sof_enable(uint8_t rhport, bool en) -{ - (void) rhport; - (void) en; - - // TODO implement later -} - -//--------------------------------------------------------------------+ -// HELPER -//--------------------------------------------------------------------+ - -static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes) -{ - // Force the CPU to flush the buffer. We increase the size by 31 because the call aligns the - // address to 32-byte boundaries. Buffer must be word aligned - CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31); - - tu_memclr(p_qtd, sizeof(dcd_qtd_t)); - - p_qtd->next = QTD_NEXT_INVALID; - p_qtd->active = 1; - p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes; - p_qtd->int_on_complete = true; - - if (data_ptr != NULL) - { - p_qtd->buffer[0] = (uint32_t) data_ptr; - - uint32_t const bufend = p_qtd->buffer[0] + total_bytes; - for(uint8_t i=1; i<5; i++) - { - uint32_t const next_page = tu_align4k( p_qtd->buffer[i-1] ) + 4096; - if ( bufend <= next_page ) break; - - p_qtd->buffer[i] = next_page; - - // TODO page[1] FRAME_N for ISO transfer - } - } -} - -//--------------------------------------------------------------------+ -// DCD Endpoint Port -//--------------------------------------------------------------------+ -void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0); - - // flush to abort any primed buffer - dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0)); -} - -void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - // data toggle also need to be reset - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 ); - dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir ? 16 : 0)); -} - -bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) -{ - uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress); - uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress); - - // Must not exceed max endpoint number - TU_ASSERT( epnum < _dcd_controller[rhport].ep_count ); - - //------------- Prepare Queue Head -------------// - dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; - tu_memclr(p_qhd, sizeof(dcd_qhd_t)); - - p_qhd->zero_length_termination = 1; - p_qhd->max_packet_size = tu_edpt_packet_size(p_endpoint_desc); - if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) - { - p_qhd->iso_mult = 1; - } - - p_qhd->qtd_overlay.next = QTD_NEXT_INVALID; - - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - // Enable EP Control - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET; - - if ( dir == TUSB_DIR_OUT ) - { - dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0xFFFF0000u) | epctrl; - }else - { - dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0x0000FFFFu) | (epctrl << 16); - } - - return true; -} - -void dcd_edpt_close_all (uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - // Disable all non-control endpoints - for( uint8_t epnum=1; epnum < _dcd_controller[rhport].ep_count; epnum++) - { - _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1; - _dcd_data.qhd[epnum][TUSB_DIR_IN ].qtd_overlay.halted = 1; - - dcd_reg->ENDPTFLUSH = TU_BIT(epnum) | TU_BIT(epnum+16); - dcd_reg->ENDPTCTRL[epnum] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS)); - } -} - -void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - _dcd_data.qhd[epnum][dir].qtd_overlay.halted = 1; - - // Flush EP - uint32_t const flush_mask = TU_BIT(epnum + (dir ? 16 : 0)); - dcd_reg->ENDPTFLUSH = flush_mask; - while(dcd_reg->ENDPTFLUSH & flush_mask); - - // Clear EP enable - dcd_reg->ENDPTCTRL[epnum] &=~(ENDPTCTRL_ENABLE << (dir ? 16 : 0)); -} - -static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir]; - dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir]; - - p_qhd->qtd_overlay.halted = false; // clear any previous error - p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd - - // flush cache - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - if ( epnum == 0 ) - { - // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism - // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out - while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {} - } - - // start transfer - dcd_reg->ENDPTPRIME = TU_BIT(epnum + (dir ? 16 : 0)); -} - -bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir]; - dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir]; - - // Prepare qtd - qtd_init(p_qtd, buffer, total_bytes); - - // Start qhd transfer - p_qhd->ff = NULL; - qhd_start_xfer(rhport, epnum, dir); - - return true; -} - -// fifo has to be aligned to 4k boundary -bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; - dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir]; - - tu_fifo_buffer_info_t fifo_info; - - if (dir) - { - tu_fifo_get_read_info(ff, &fifo_info); - } else - { - tu_fifo_get_write_info(ff, &fifo_info); - } - - if ( fifo_info.len_lin >= total_bytes ) - { - // Linear length is enough for this transfer - qtd_init(p_qtd, fifo_info.ptr_lin, total_bytes); - } - else - { - // linear part is not enough - - // prepare TD up to linear length - qtd_init(p_qtd, fifo_info.ptr_lin, fifo_info.len_lin); - - if ( !tu_offset4k((uint32_t) fifo_info.ptr_wrap) && !tu_offset4k(tu_fifo_depth(ff)) ) - { - // If buffer is aligned to 4K & buffer size is multiple of 4K - // We can make use of buffer page array to also combine the linear + wrapped length - p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes; - - for(uint8_t i = 1, page = 0; i < 5; i++) - { - // pick up buffer array where linear ends - if (p_qtd->buffer[i] == 0) - { - p_qtd->buffer[i] = (uint32_t) fifo_info.ptr_wrap + 4096 * page; - page++; - } - } - - CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31); - } - else - { - // TODO we may need to carry the wrapped length after the linear part complete - // for now only transfer up to linear part - } - } - - // Start qhd transfer - p_qhd->ff = ff; - qhd_start_xfer(rhport, epnum, dir); - - return true; -} - -//--------------------------------------------------------------------+ -// ISR -//--------------------------------------------------------------------+ - -static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir) -{ - dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir]; - dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir]; - - uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED : - ( p_qtd->xact_err || p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS; - - if ( result != XFER_RESULT_SUCCESS ) - { - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - // flush to abort error buffer - dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0)); - } - - uint16_t const xferred_bytes = p_qtd->expected_bytes - p_qtd->total_bytes; - - if (p_qhd->ff) - { - if (dir == TUSB_DIR_IN) - { - tu_fifo_advance_read_pointer(p_qhd->ff, xferred_bytes); - } else - { - tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes); - } - } - - // only number of bytes in the IOC qtd - dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true); -} - -void dcd_int_handler(uint8_t rhport) -{ - dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs; - - uint32_t const int_enable = dcd_reg->USBINTR; - uint32_t const int_status = dcd_reg->USBSTS & int_enable; - dcd_reg->USBSTS = int_status; // Acknowledge handled interrupt - - // disabled interrupt sources - if (int_status == 0) return; - - // Set if the port controller enters the full or high-speed operational state. - // either from Bus Reset or Suspended state - if (int_status & INTR_PORT_CHANGE) - { - // TU_LOG2("PortChange %08lx\r\n", dcd_reg->PORTSC1); - - // Reset interrupt is not enabled, we manually check if Port Change is due - // to connection / disconnection - if ( dcd_reg->USBSTS & INTR_RESET ) - { - dcd_reg->USBSTS = INTR_RESET; - - if (dcd_reg->PORTSC1 & PORTSC1_CURRENT_CONNECT_STATUS) - { - uint32_t const speed = (dcd_reg->PORTSC1 & PORTSC1_PORT_SPEED) >> PORTSC1_PORT_SPEED_POS; - bus_reset(rhport); - dcd_event_bus_reset(rhport, (tusb_speed_t) speed, true); - }else - { - dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true); - } - } - else - { - // Triggered by resuming from suspended state - if ( !(dcd_reg->PORTSC1 & PORTSC1_SUSPEND) ) - { - dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true); - } - } - } - - if (int_status & INTR_SUSPEND) - { - // TU_LOG2("Suspend %08lx\r\n", dcd_reg->PORTSC1); - - if (dcd_reg->PORTSC1 & PORTSC1_SUSPEND) - { - // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration. - // Skip suspend event if we are not addressed - if ((dcd_reg->DEVICEADDR >> 25) & 0x0f) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true); - } - } - } - - if (int_status & INTR_USB) - { - // Make sure we read the latest version of _dcd_data. - CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t)); - - uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE; - dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge - - if (dcd_reg->ENDPTSETUPSTAT) - { - //------------- Set up Received -------------// - // 23.10.10.2 Operational model for setup transfers - dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT; - - dcd_event_setup_received(rhport, (uint8_t*)(uintptr_t) &_dcd_data.qhd[0][0].setup_request, true); - } - - // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set - // nothing to do, we will submit xfer as error to usbd - // if (int_status & INTR_ERROR) { } - - if ( edpt_complete ) - { - for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++) - { - if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT); - if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); - } - } - } - - if (int_status & INTR_SOF) - { - dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true); - } -} - -#endif diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c deleted file mode 100644 index 0b3e9e4ef..000000000 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -// NXP Trans-Dimension USB IP implement EHCI for host functionality - -#if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) - -#warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly" - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT - #include "fsl_device_registers.h" -#else - // LPCOpen for 18xx & 43xx - #include "chip.h" -#endif - -#include "common/tusb_common.h" -#include "common_transdimension.h" -#include "portable/ehci/ehci_api.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -// TODO can be merged with dcd_controller_t -typedef struct -{ - uint32_t regs_base; // registers base - const IRQn_Type irqnum; // IRQ number -}hcd_controller_t; - -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT - static const hcd_controller_t _hcd_controller[] = - { - // RT1010 and RT1020 only has 1 USB controller - #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn } - #else - { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn }, - { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn } - #endif - }; - -#else - static const hcd_controller_t _hcd_controller[] = - { - { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn }, - { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn } - }; -#endif - -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ - -bool hcd_init(uint8_t rhport) -{ - hcd_registers_t* hcd_reg = (hcd_registers_t*) _hcd_controller[rhport].regs_base; - - // Reset controller - hcd_reg->USBCMD |= USBCMD_RESET; - while( hcd_reg->USBCMD & USBCMD_RESET ) {} - - // Set mode to device, must be set immediately after reset -#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX - // LPC18XX/43XX need to set VBUS Power Select to HIGH - // RHPORT1 is fullspeed only (need external PHY for Highspeed) - hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT; - if (rhport == 1) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; -#else - hcd_reg->USBMODE = USBMODE_CM_HOST; -#endif - - // FIXME force full speed, still have issue with Highspeed enumeration - hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; - - return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD); -} - -void hcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); -} - -void hcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(_hcd_controller[rhport].irqnum); -} - -#endif From 8af8869d3bcb1504835ead4ba472cd922d997e8d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 11:26:38 +0700 Subject: [PATCH 41/94] renam OPT_MCU_MIMXRT to OPT_MCU_MIMXRT1XXX fix build util with makefile --- examples/host/bare_api/only.txt | 2 +- examples/host/cdc_msc_hid/only.txt | 2 +- examples/host/hid_controller/only.txt | 2 +- examples/host/msc_file_explorer/only.txt | 2 +- hw/bsp/board_mcu.h | 2 +- hw/bsp/f1c100s/README.md | 2 +- hw/bsp/imxrt/family.cmake | 4 ++-- hw/bsp/imxrt/family.mk | 2 +- src/class/audio/audio_device.c | 4 ++-- src/common/tusb_mcu.h | 2 +- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 2 +- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 5 ++--- src/tusb_option.h | 6 +++--- tools/build_utils.py | 7 +------ 14 files changed, 19 insertions(+), 25 deletions(-) diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/bare_api/only.txt +++ b/examples/host/bare_api/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/cdc_msc_hid/only.txt +++ b/examples/host/cdc_msc_hid/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/hid_controller/only.txt +++ b/examples/host/hid_controller/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt index fa9c14857..45da6c3f2 100644 --- a/examples/host/msc_file_explorer/only.txt +++ b/examples/host/msc_file_explorer/only.txt @@ -3,7 +3,7 @@ mcu:LPC177X_8X mcu:LPC18XX mcu:LPC40XX mcu:LPC43XX -mcu:MIMXRT +mcu:MIMXRT1XXX mcu:MIMXRT10XX mcu:MIMXRT11XX mcu:RP2040 diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index edae4c645..ce2f919bf 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -116,7 +116,7 @@ #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI // no header needed -#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT +#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NUC120 diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md index f7a863c34..86d454f8e 100644 --- a/hw/bsp/f1c100s/README.md +++ b/hw/bsp/f1c100s/README.md @@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re ## TODO -* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?) +* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX` high speed MCU check in examples (maybe we should extract the logic?) diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index f687fe833..c2c067141 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -14,7 +14,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor") set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) -set(FAMILY_MCUS MIMXRT CACHE INTERNAL "") +set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "") # enable LTO if supported include(CheckIPOSupported) @@ -119,7 +119,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB - family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT) + family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index 0c297f060..c3a69e7c5 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -13,7 +13,7 @@ CFLAGS += \ -D__ARMVFP__=0 -D__ARMFPV5__=0\ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ - -DCFG_TUSB_MCU=OPT_MCU_MIMXRT + -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c index f487fe60e..e5dbe988a 100644 --- a/src/class/audio/audio_device.c +++ b/src/class/audio/audio_device.c @@ -66,7 +66,7 @@ // Use ring buffer if it's available, some MCUs need extra RAM requirements #ifndef TUD_AUDIO_PREFER_RING_BUFFER - #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT + #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #define TUD_AUDIO_PREFER_RING_BUFFER 0 #else #define TUD_AUDIO_PREFER_RING_BUFFER 1 @@ -85,7 +85,7 @@ CFG_TUSB_MCU == OPT_MCU_RX72N || \ CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX || \ CFG_TUSB_MCU == OPT_MCU_MSP432E4 #if TUD_AUDIO_PREFER_RING_BUFFER #define USE_LINEAR_BUFFER 0 diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 485d6168d..56525725e 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -90,7 +90,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_MIMXRT) +#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX) #define TUP_USBIP_CHIPIDEA_HS #define TUP_USBIP_EHCI diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 850c82e43..588e761a9 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -31,7 +31,7 @@ #include "device/dcd.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" void dcd_dcache_clean(void* addr, uint32_t data_size) { diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 8c27abbf6..0f095147d 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -28,8 +28,7 @@ // Chipidea Highspeed USB IP implement EHCI for host functionality -#if CFG_TUH_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI) //--------------------------------------------------------------------+ // INCLUDE @@ -39,7 +38,7 @@ #include "portable/ehci/ehci_api.h" #include "ci_hs_type.h" -#if CFG_TUSB_MCU == OPT_MCU_MIMXRT +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" void hcd_dcache_clean(void* addr, uint32_t data_size) { diff --git a/src/tusb_option.h b/src/tusb_option.h index bb669e693..43e67cf64 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -97,9 +97,9 @@ #define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config // NXP iMX RT -#define OPT_MCU_MIMXRT 700 ///< NXP iMX RT Series -#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT ///< RT10xx -#define OPT_MCU_MIMXRT11XX OPT_MCU_MIMXRT ///< RT11xx +#define OPT_MCU_MIMXRT1XXX 700 ///< NXP iMX RT1xxx Series +#define OPT_MCU_MIMXRT10XX OPT_MCU_MIMXRT1XXX ///< RT10xx +#define OPT_MCU_MIMXRT11XX OPT_MCU_MIMXRT1XXX ///< RT11xx // Nuvoton #define OPT_MCU_NUC121 800 diff --git a/tools/build_utils.py b/tools/build_utils.py index 6f907729b..5d735bc17 100644 --- a/tools/build_utils.py +++ b/tools/build_utils.py @@ -30,13 +30,8 @@ def skip_example(example, board): family_dir = board_dir.parent.parent family = family_dir.name - # family CMake - family_mk = family_dir / "family.cmake" - # family.mk - if not family_mk.exists(): - family_mk = family_dir / "family.mk" - + family_mk = family_dir / "family.mk" mk_contents = family_mk.read_text() # Find the mcu, first in family mk then board mk From 65d6acdbfaea84c3274e359acd5e5474f04e8851 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 12:02:42 +0700 Subject: [PATCH 42/94] fix build warnings --- hw/bsp/family_support.cmake | 2 ++ hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h | 11 +++++----- hw/bsp/imxrt/family.cmake | 12 ++++++---- src/device/dcd.h | 6 ++--- src/host/hcd.h | 6 ++--- src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 23 +++++++++++--------- src/portable/chipidea/ci_hs/dcd_ci_hs.c | 12 +++++----- src/portable/chipidea/ci_hs/hcd_ci_hs.c | 6 ++--- src/portable/ehci/ehci.c | 8 +++---- 9 files changed, 47 insertions(+), 39 deletions(-) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index dfc2095e5..02040c4ed 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -177,6 +177,8 @@ function(family_add_freertos TARGET) target_include_directories(freertos_config INTERFACE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig ) + # add board definition to freertos_config mostly for SystemCoreClock + target_link_libraries(freertos_config INTERFACE board_${BOARD}) endif() # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable diff --git a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h index c1928fbcd..f95927069 100644 --- a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h @@ -44,15 +44,14 @@ // skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "fsl_device_registers.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index c2c067141..fc90b7e80 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -103,10 +103,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c - ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c - ${TOP}/src/portable/ehci/ehci.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -121,6 +117,14 @@ function(family_configure_example TARGET) # Add TinyUSB family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) + # Add TinyUSB Port source + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c + ${TOP}/src/portable/ehci/ehci.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/src/device/dcd.h b/src/device/dcd.h index 4e9cfd5d5..18a708347 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -108,15 +108,15 @@ typedef struct TU_ATTR_ALIGNED(4) // clean/flush data cache: write cache -> memory. // Required before an DMA TX transfer to make sure data is in memory -void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void dcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // invalidate data cache: mark cache as invalid, next read will read from memory // Required BOTH before and after an DMA RX transfer -void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void dcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // clean and invalidate data cache // Required before an DMA transfer where memory is both read/write by DMA -void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; //--------------------------------------------------------------------+ // Controller API diff --git a/src/host/hcd.h b/src/host/hcd.h index 5a3b0a087..3355c18b2 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -110,15 +110,15 @@ typedef struct // clean/flush data cache: write cache -> memory. // Required before an DMA TX transfer to make sure data is in memory -void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // invalidate data cache: mark cache as invalid, next read will read from memory // Required BOTH before and after an DMA RX transfer -void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; // clean and invalidate data cache // Required before an DMA transfer where memory is both read/write by DMA -void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; +void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; //--------------------------------------------------------------------+ // Controller API diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h index ceff893bd..c14f00431 100644 --- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h +++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h @@ -64,25 +64,28 @@ static const ci_hs_controller_t _ci_controller[] = #define CI_HCD_INT_DISABLE(_p) NVIC_DisableIRQ(_ci_controller[_p].irqnum) //------------- DCache -------------// -TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uint32_t addr) { +TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) { return !(0x20000000 <= addr && addr < 0x20100000); } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void* addr, uint32_t data_size) { - if (imxrt_is_cache_mem((uint32_t) addr)) { - SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size); +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) { + const uintptr_t addr32 = (uintptr_t) addr; + if (imxrt_is_cache_mem(addr32)) { + SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void* addr, uint32_t data_size) { - if (imxrt_is_cache_mem((uint32_t) addr)) { - SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size); +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) { + const uintptr_t addr32 = (uintptr_t) addr; + if (imxrt_is_cache_mem(addr32)) { + SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size); } } -TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void* addr, uint32_t data_size) { - if (imxrt_is_cache_mem((uint32_t) addr)) { - SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size); +TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) { + const uintptr_t addr32 = (uintptr_t) addr; + if (imxrt_is_cache_mem(addr32)) { + SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size); } } diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 588e761a9..f50550d33 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -34,15 +34,15 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" - void dcd_dcache_clean(void* addr, uint32_t data_size) { + void dcd_dcache_clean(void const* addr, uint32_t data_size) { imxrt_dcache_clean(addr, data_size); } - void dcd_dcache_invalidate(void* addr, uint32_t data_size) { + void dcd_dcache_invalidate(void const* addr, uint32_t data_size) { imxrt_dcache_invalidate(addr, data_size); } - void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { imxrt_dcache_clean_invalidate(addr, data_size); } @@ -58,15 +58,15 @@ #error "Unsupported MCUs" #endif - TU_ATTR_WEAK void dcd_dcache_clean(void* addr, uint32_t data_size) { + TU_ATTR_WEAK void dcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } - TU_ATTR_WEAK void dcd_dcache_invalidate(void* addr, uint32_t data_size) { + TU_ATTR_WEAK void dcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } - TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } #endif diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c index 0f095147d..56167b8f6 100644 --- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -41,15 +41,15 @@ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX #include "ci_hs_imxrt.h" - void hcd_dcache_clean(void* addr, uint32_t data_size) { + void hcd_dcache_clean(void const* addr, uint32_t data_size) { imxrt_dcache_clean(addr, data_size); } - void hcd_dcache_invalidate(void* addr, uint32_t data_size) { + void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { imxrt_dcache_invalidate(addr, data_size); } - void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { + void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { imxrt_dcache_clean_invalidate(addr, data_size); } diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index 2b25eee9d..38711e382 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -162,15 +162,15 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes) static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t const *p_link); -TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) { +TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } -TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) { +TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } -TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) { +TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; } @@ -461,7 +461,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet qtd_init(td, setup_packet, 8); td->pid = EHCI_PID_SETUP; - hcd_dcache_clean((void *) setup_packet, 8); + hcd_dcache_clean(setup_packet, 8); // attach TD to QHD -> start transferring qhd_attach_qtd(qhd, td); From a7f330fa94b7a39858f6d770737451b51f061c25 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 14:17:25 +0700 Subject: [PATCH 43/94] fix build, update freertos config for cmake --- examples/device/net_lwip_webserver/skip.txt | 2 +- hw/bsp/family_support.cmake | 8 ++------ hw/bsp/imxrt/family.cmake | 4 +--- .../FreeRTOSConfig/FreeRTOSConfig.h | 11 +++++----- .../boards/frdm_kl25z/clock_config.c | 2 +- hw/bsp/kinetis_kl/family.cmake | 10 ++++++---- hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/lpc18/family.cmake | 12 ++++++----- hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/lpc55/family.cmake | 20 ++++++------------- hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/mcx/family.cmake | 9 ++++++--- hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/nrf/boards/pca10095/board.cmake | 2 +- hw/bsp/nrf/family.cmake | 10 +++++++--- .../stm32g0/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/stm32g0/family.cmake | 11 +++++----- .../stm32g4/FreeRTOSConfig/FreeRTOSConfig.h | 13 ++++++------ hw/bsp/stm32g4/family.cmake | 10 ++++++---- src/portable/nordic/nrf5x/dcd_nrf5x.c | 14 +++++++++++++ src/portable/st/typec/typec_stm32.c | 4 ++-- 21 files changed, 107 insertions(+), 100 deletions(-) diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt index 77c7ec63a..e3a726a2b 100644 --- a/examples/device/net_lwip_webserver/skip.txt +++ b/examples/device/net_lwip_webserver/skip.txt @@ -4,7 +4,7 @@ mcu:MSP430x5xx mcu:NUC121 mcu:SAMD11 mcu:STM32L0 -mcu:MKL25ZXX +mcu:KINETIS_KL family:broadcom_64bit family:broadcom_32bit board:curiosity_nano diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 02040c4ed..0132ef629 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -192,12 +192,8 @@ function(family_add_freertos TARGET) CFG_TUSB_OS=OPT_OS_FREERTOS ) # link tinyusb with freeRTOS kernel - target_link_libraries(${TARGET}-tinyusb PUBLIC - freertos_kernel - ) - target_link_libraries(${TARGET} PUBLIC - freertos_kernel - ) + target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel) + target_link_libraries(${TARGET} PUBLIC freertos_kernel) endfunction() diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index fc90b7e80..4a9842cf9 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -114,10 +114,8 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) - - # Add TinyUSB Port source target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c diff --git a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h index 960bb23e1..a46af1759 100644 --- a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h @@ -44,15 +44,14 @@ // skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "fsl_device_registers.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c index 1ba35e0dc..deabe25aa 100644 --- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c +++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c @@ -83,7 +83,7 @@ board: FRDM-KL25Z * Variables ******************************************************************************/ /* System clock frequency. */ -extern uint32_t SystemCoreClock; +//extern uint32_t SystemCoreClock; /******************************************************************************* * Code diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index f491b3dee..5d4165185 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -87,9 +87,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c - ${TOP}/src/portable/nxp/khci/hcd_khci.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -101,8 +98,13 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c + ${TOP}/src/portable/nxp/khci/hcd_khci.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h index 323c1a0a4..1b3c64e0b 100644 --- a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "chip.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 0 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake index bcdec9c01..4e6e2b56d 100644 --- a/hw/bsp/lpc18/family.cmake +++ b/hw/bsp/lpc18/family.cmake @@ -79,10 +79,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c - ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c - ${TOP}/src/portable/ehci/ehci.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -94,8 +90,14 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c + ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c + ${TOP}/src/portable/ehci/ehci.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h index 421106f08..b1cef793e 100644 --- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "fsl_device_registers.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index 22a09ce10..43fbe8638 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -16,16 +16,6 @@ set(FAMILY_MCUS LPC55XX CACHE INTERNAL "") # include board specific include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) -#------------------------------------ -# freertos -#------------------------------------ -if (NOT TARGET freertos_config) - add_library(freertos_config INTERFACE) - target_include_directories(freertos_config SYSTEM INTERFACE - ${CMAKE_CURRENT_LIST_DIR}/FreeRTOSConfig - ) -endif() - #------------------------------------ # BOARD_TARGET @@ -106,8 +96,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -121,15 +109,19 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) # Flashing family_flash_jlink(${TARGET}) - family_flash_nxplink(${TARGET}) + #family_flash_nxplink(${TARGET}) #family_flash_pyocd(${TARGET}) endfunction() diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h index 421106f08..b1cef793e 100644 --- a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "fsl_device_registers.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 7c5feaecf..83f44222b 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -88,8 +88,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS - ${TOP}/src/portable/chipidea/$ # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -101,8 +99,13 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_MCXN9) + target_sources(${TARGET}-tinyusb PUBLIC + # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS + ${TOP}/src/portable/chipidea/$ + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h index 421106f08..a56f243ea 100644 --- a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "nrf.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 1 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake index 1eb8ad4f1..1e72243c9 100644 --- a/hw/bsp/nrf/boards/pca10095/board.cmake +++ b/hw/bsp/nrf/boards/pca10095/board.cmake @@ -6,7 +6,7 @@ function(update_board TARGET) NRF5340_XXAA NRF5340_XXAA_APPLICATION ) - target_sources(${TARGET} PUBLIC + target_sources(${TARGET} PRIVATE ${NRFX_DIR}/drivers/src/nrfx_usbreg.c ) endfunction() diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 7faeaf6cb..88670b50b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -100,8 +100,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -113,8 +111,14 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_NRF5X) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h index 1758efcf2..c8736f6d1 100644 --- a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "stm32g0xx.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 0 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake index 988033070..1381eaa5f 100644 --- a/hw/bsp/stm32g0/family.cmake +++ b/hw/bsp/stm32g0/family.cmake @@ -59,8 +59,6 @@ function(add_board_target BOARD_TARGET) update_board(${BOARD_TARGET}) - cmake_print_variables(CMAKE_C_COMPILER_ID) - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") target_link_options(${BOARD_TARGET} PUBLIC "LINKER:--script=${LD_FILE_GNU}" @@ -90,8 +88,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -103,8 +99,13 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_STM32G0) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/typec/typec_stm32.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h index 7974434d3..95fcbb08a 100644 --- a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h @@ -42,17 +42,16 @@ * See http://www.freertos.org/a00110.html. *----------------------------------------------------------*/ -// IAR assembler have limited preprocessor support and it only need following macros: +// skip if included from IAR assembler #ifndef __IASMARM__ -// FIXME cause redundant-decls warnings -extern uint32_t SystemCoreClock; + #include "stm32g4xx.h" #endif /* Cortex M23/M33 port configuration. */ -#define configENABLE_MPU 0 -#define configENABLE_FPU 0 -#define configENABLE_TRUSTZONE 0 -#define configMINIMAL_SECURE_STACK_SIZE (1024) +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 618563f66..45525c744 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -88,9 +88,6 @@ function(family_configure_example TARGET) #---------- Port Specific ---------- # These files are built for each example since it depends on example's tusb_config.h target_sources(${TARGET} PUBLIC - # TinyUSB Port - ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c - ${TOP}/src/portable/st/typec/typec_stm32.c # BSP ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c @@ -102,8 +99,13 @@ function(family_configure_example TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - # Add TinyUSB + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_STM32G4) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/typec/typec_stm32.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index eee5686f4..acc967bb3 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -29,10 +29,24 @@ #if CFG_TUD_ENABLED && CFG_TUSB_MCU == OPT_MCU_NRF5X #include + +// Suppress warning caused by nrfx driver +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wcast-qual" +#pragma GCC diagnostic ignored "-Wcast-align" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + #include "nrf.h" #include "nrf_clock.h" #include "nrf_power.h" #include "nrfx_usbd_errata.h" + +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + #include "device/dcd.h" // TODO remove later diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index b09dc5bae..231da5450 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -186,7 +186,7 @@ bool tcd_init(uint8_t rhport, uint32_t port_type) { v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", v_cc[0], v_cc[1]); + TU_LOG1("Initial VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]); // Enable CC1 & CC2 Interrupt UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; @@ -246,7 +246,7 @@ void tcd_int_handler(uint8_t rhport) { v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG3("VState CC1 = %u, CC2 = %u\n", v_cc[0], v_cc[1]); + TU_LOG3("VState CC1 = %lu, CC2 = %lu\n", v_cc[0], v_cc[1]); uint32_t cr = UCPD1->CR; From e754795d3adec4bc3a66a4131d0662d87acb4893 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 15:29:34 +0700 Subject: [PATCH 44/94] fix build warnings --- .github/workflows/build_iar.yml | 2 +- .../device/audio_test_multi_rate/src/main.c | 2 +- .../host/msc_file_explorer/CMakeLists.txt | 7 +++++ examples/rules.mk | 1 + examples/typec/power_delivery/src/main.c | 4 +-- hw/bsp/family_support.cmake | 29 +++++++++++++++++++ hw/bsp/imxrt/family.c | 11 +++++++ hw/bsp/lpc55/family.cmake | 1 + hw/bsp/nrf/family.c | 14 +++++++++ hw/bsp/stm32g4/family.mk | 1 + src/portable/st/typec/typec_stm32.c | 9 ++++-- tools/cmake/toolchain/arm_gcc.cmake | 26 ----------------- tools/cmake/toolchain/arm_iar.cmake | 3 -- 13 files changed, 73 insertions(+), 37 deletions(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 83e81164a..7e42a66f8 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -32,7 +32,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g4 stm32h7 stm32l4' + - 'stm32f0 stm32f1 stm32f7 stm32h7 stm32l4' steps: - name: Clean workspace run: | diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c index 4dd53dd34..078e783eb 100644 --- a/examples/device/audio_test_multi_rate/src/main.c +++ b/examples/device/audio_test_multi_rate/src/main.c @@ -268,7 +268,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * sampFreq = (uint32_t)((audio_control_cur_4_t *)pBuff)->bCur; - TU_LOG2("Clock set current freq: %d\r\n", sampFreq); + TU_LOG2("Clock set current freq: %lu\r\n", sampFreq); return true; break; diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt index 2d5600059..327d1218a 100644 --- a/examples/host/msc_file_explorer/CMakeLists.txt +++ b/examples/host/msc_file_explorer/CMakeLists.txt @@ -21,6 +21,13 @@ target_sources(${PROJECT} PUBLIC ${TOP}/lib/fatfs/source/ffunicode.c ) +# Suppress warnings on fatfs +set_source_files_properties( + ${TOP}/lib/fatfs/source/ff.c + PROPERTIES + COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual" +) + # Example include target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src diff --git a/examples/rules.mk b/examples/rules.mk index f6422092a..5727ab7e3 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -28,6 +28,7 @@ SRC_C += \ src/common/tusb_fifo.c \ src/device/usbd.c \ src/device/usbd_control.c \ + src/typec/usbc.c \ src/class/audio/audio_device.c \ src/class/cdc/cdc_device.c \ src/class/dfu/dfu_device.c \ diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c index 342a2235f..08590aa74 100644 --- a/examples/typec/power_delivery/src/main.c +++ b/examples/typec/power_delivery/src/main.c @@ -63,9 +63,6 @@ int main(void) tuc_init(0, TUSB_TYPEC_PORT_SNK); - uint32_t start_ms = 0; - bool led_state = false; - while (1) { led_blinking_task(); @@ -155,6 +152,7 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t } bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header) { + (void) rhport; switch (header->msg_type) { case PD_CTRL_ACCEPT: printf("PD Request Accepted\r\n"); diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 0132ef629..ec36df5c8 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -19,6 +19,33 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) message(FATAL_ERROR "Family '${FAMILY}' is not known/supported") endif() +set(WARNING_FLAGS_GNU + -Wall + -Wextra + -Werror + -Wfatal-errors + -Wdouble-promotion + -Wstrict-prototypes + -Wstrict-overflow + -Werror-implicit-function-declaration + -Wfloat-equal + -Wundef + -Wshadow + -Wwrite-strings + -Wsign-compare + -Wmissing-format-attribute + -Wunreachable-code + -Wcast-align + -Wcast-function-type + -Wcast-qual + -Wnull-dereference + -Wuninitialized + -Wunused + -Wreturn-type + -Wredundant-decls + ) + +set(WARNINGS_FLAGS_IAR "") function(family_filter RESULT DIR) get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) @@ -121,6 +148,8 @@ function(family_configure_common TARGET) COMMAND ${CMAKE_SIZE} $ ) + target_compile_options(${TARGET} PUBLIC ${WARNING_FLAGS_${CMAKE_C_COMPILER_ID}}) + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") # Generate map file target_link_options(${TARGET} PUBLIC diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index 46adabf0a..735fbdb9b 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -26,12 +26,23 @@ #include "bsp/board.h" #include "board.h" + +// Suppress warning caused by mcu driver +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + #include "fsl_device_registers.h" #include "fsl_gpio.h" #include "fsl_iomuxc.h" #include "fsl_clock.h" #include "fsl_lpuart.h" +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + #include "clock_config.h" #if defined(BOARD_TUD_RHPORT) && CFG_TUD_ENABLED diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index 43fbe8638..9f6b1f63d 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -102,6 +102,7 @@ function(family_configure_example TARGET) # external driver ${TOP}/lib/sct_neopixel/sct_neopixel.c ) + target_include_directories(${TARGET} PUBLIC # family, hw, board ${CMAKE_CURRENT_FUNCTION_LIST_DIR} diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 157b2bf21..6a559ada6 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -27,6 +27,15 @@ #include "bsp/board.h" #include "board.h" +// Suppress warning caused by mcu driver +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wcast-qual" +#pragma GCC diagnostic ignored "-Wcast-align" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wundef" +#endif + #include "nrfx.h" #include "hal/nrf_gpio.h" #include "drivers/include/nrfx_power.h" @@ -37,6 +46,11 @@ #include "nrf_soc.h" #endif +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + + //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk index 5ed84422d..a4b644245 100644 --- a/hw/bsp/stm32g4/family.mk +++ b/hw/bsp/stm32g4/family.mk @@ -36,6 +36,7 @@ IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4 SRC_C += \ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \ + src/portable/st/typec/typec_stm32.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c index 231da5450..bf8b660f0 100644 --- a/src/portable/st/typec/typec_stm32.c +++ b/src/portable/st/typec/typec_stm32.c @@ -183,9 +183,9 @@ bool tcd_init(uint8_t rhport, uint32_t port_type) { // Read Voltage State on CC1 & CC2 fore initial state uint32_t v_cc[2]; + (void) v_cc; v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; - TU_LOG1("Initial VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]); // Enable CC1 & CC2 Interrupt @@ -308,8 +308,11 @@ void tcd_int_handler(uint8_t rhport) { if (!(sr & UCPD_SR_RXERR)) { // response with good crc - _good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id; - dma_tx_start(rhport, &_good_crc, 2); + // TODO move this to usbc stack + if (_rx_buf) { + _good_crc.msg_id = ((pd_header_t const *) _rx_buf)->msg_id; + dma_tx_start(rhport, &_good_crc, 2); + } result = XFER_RESULT_SUCCESS; }else { diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake index 6dd1e7002..cefa9d2ce 100644 --- a/tools/cmake/toolchain/arm_gcc.cmake +++ b/tools/cmake/toolchain/arm_gcc.cmake @@ -35,32 +35,6 @@ set(TOOLCHAIN_EXE_LINKER_FLAGS -Wl,--cref ) -set(TOOLCHAIN_WARNING_FLAGS - -Wall - -Wextra - -Werror - -Wfatal-errors - -Wdouble-promotion - -Wstrict-prototypes - -Wstrict-overflow - -Werror-implicit-function-declaration - -Wfloat-equal - -Wundef - -Wshadow - -Wwrite-strings - -Wsign-compare - -Wmissing-format-attribute - -Wunreachable-code - -Wcast-align - -Wcast-function-type - -Wcast-qual - -Wnull-dereference - -Wuninitialized - -Wunused - -Wreturn-type - -Wredundant-decls - ) - include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake) # try_compile is cmake test compiling its own example, diff --git a/tools/cmake/toolchain/arm_iar.cmake b/tools/cmake/toolchain/arm_iar.cmake index dfbe55e0d..a487e5b9f 100644 --- a/tools/cmake/toolchain/arm_iar.cmake +++ b/tools/cmake/toolchain/arm_iar.cmake @@ -28,7 +28,4 @@ list(APPEND TOOLCHAIN_COMMON_FLAGS list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS ) -list(APPEND TOOLCHAIN_WARNING_FLAGS - ) - include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake) From 1419091923e7b524b920afb2dabdf323c3b6a44d Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 16:47:32 +0700 Subject: [PATCH 45/94] update h7 to cmake, and move iar build to cmake --- .github/workflows/build_iar.yml | 4 +- hw/bsp/imxrt/family.mk | 14 +- .../stm32h7/FreeRTOSConfig/FreeRTOSConfig.h | 165 +++++++++++++++++ hw/bsp/stm32h7/boards/daisyseed/board.cmake | 19 ++ .../boards/stm32h723nucleo/board.cmake | 18 ++ .../stm32h7/boards/stm32h723nucleo/board.mk | 2 +- .../stm32h7/boards/stm32h743eval/board.cmake | 18 ++ hw/bsp/stm32h7/boards/stm32h743eval/board.mk | 2 +- .../boards/stm32h743nucleo/board.cmake | 18 ++ .../stm32h7/boards/stm32h743nucleo/board.mk | 2 +- .../stm32h743nucleo/stm32h743xx_flash.ld | 171 ----------------- .../stm32h7/boards/stm32h745disco/board.cmake | 19 ++ .../STM32H743IITX_FLASH.ld | 173 ------------------ .../boards/waveshare_openh743i/board.cmake | 23 +++ .../boards/waveshare_openh743i/board.mk | 2 +- hw/bsp/stm32h7/family.cmake | 130 +++++++++++++ hw/bsp/stm32h7/family.mk | 6 +- .../stm32h723xx_flash.ld | 0 .../stm32h743xx_flash.ld | 0 19 files changed, 424 insertions(+), 362 deletions(-) create mode 100644 hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/stm32h7/boards/daisyseed/board.cmake create mode 100644 hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/board.cmake create mode 100644 hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake delete mode 100644 hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld create mode 100644 hw/bsp/stm32h7/boards/stm32h745disco/board.cmake delete mode 100644 hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld create mode 100644 hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake create mode 100644 hw/bsp/stm32h7/family.cmake rename hw/bsp/stm32h7/{boards/stm32h723nucleo => linker}/stm32h723xx_flash.ld (100%) rename hw/bsp/stm32h7/{boards/stm32h743eval => linker}/stm32h743xx_flash.ld (100%) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 7e42a66f8..08149e201 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -32,7 +32,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32f0 stm32f1 stm32f7 stm32h7 stm32l4' + - 'stm32f0 stm32f1 stm32f7 stm32l4' steps: - name: Clean workspace run: | @@ -58,7 +58,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32g0 stm32g4' + - 'stm32g0 stm32g4 stm32h7' steps: - name: Clean workspace run: | diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index c3a69e7c5..d0bb5be17 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -4,13 +4,12 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m7 +include $(TOP)/tools/make/cpu/$(CPU_CORE).mk + CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m7 \ - -mfloat-abi=hard \ - -mfpu=fpv5-d16 \ - -D__ARMVFP__=0 -D__ARMFPV5__=0\ + -D__ARMVFP__=0 \ + -D__ARMFPV5__=0 \ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX @@ -58,9 +57,6 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 - # UF2 generation, iMXRT need to strip to text only before conversion APPLICATION_ADDR = 0x6000C000 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf diff --git a/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..6881385a8 --- /dev/null +++ b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "stm32h7xx.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 4 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - /* Constant data goes into FLASH */ - .rodata : - { - . = ALIGN(4); - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } >FLASH - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >DTCMRAM AT> FLASH - - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss section */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >DTCMRAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(8); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(8); - } >DTCMRAM - - - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake new file mode 100644 index 000000000..46744df49 --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake @@ -0,0 +1,19 @@ +set(MCU_VARIANT stm32h745xx) +set(JLINK_DEVICE stm32h745xi_m7) + +set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld) +set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf) + +set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) +set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32H745xx + HSE_VALUE=25000000 + CORE_CM7 + # default to PORT 0 + BOARD_TUD_RHPORT=0 + BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + ) +endfunction() diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld deleted file mode 100644 index 697a1a1df..000000000 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld +++ /dev/null @@ -1,173 +0,0 @@ -/* -****************************************************************************** -** -** File : LinkerScript.ld -** -** Author : STM32CubeIDE -** -** Abstract : Linker script for STM32H7 series -** 2048Kbytes FLASH and 192Kbytes RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Distribution: The file is distributed as is, without any warranty -** of any kind. -** -***************************************************************************** -** @attention -** -** Copyright (c) 2019 STMicroelectronics. -** All rights reserved. -** -** This software component is licensed by ST under BSD 3-Clause license, -** the "License"; You may not use this file except in compliance with the -** License. You may obtain a copy of the License at: -** opensource.org/licenses/BSD-3-Clause -** -**************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x20020000; /* end of RAM */ -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0x2000 ; /* required amount of heap */ -_Min_Stack_Size = 0x2000 ; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K - RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K - RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K - ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - /* Constant data goes into FLASH */ - .rodata : - { - . = ALIGN(4); - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } >FLASH - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT(.fini_array.*))) - KEEP (*(.fini_array*)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - *(.RamFunc) /* .RamFunc sections */ - *(.RamFunc*) /* .RamFunc* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM AT> FLASH - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss section */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(8); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(8); - } >RAM - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake new file mode 100644 index 000000000..033d3a9f2 --- /dev/null +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake @@ -0,0 +1,23 @@ +set(MCU_VARIANT stm32h743xx) +set(JLINK_DEVICE stm32h743xi) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) +set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + +set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) +set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32H743xx + HSE_VALUE=8000000 + HAL_TIM_MODULE_ENABLED + # default to PORT 1 High Speed + BOARD_TUD_RHPORT=1 + BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + ) + target_sources(${TARGET} PUBLIC + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_tim.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_tim_ex.c + ) +endfunction() diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk index e8202d9fc..9997faff9 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk @@ -11,7 +11,7 @@ SRC_C += \ # GCC GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32H743IITX_FLASH.ld +GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld # IAR IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake new file mode 100644 index 000000000..f04a768a5 --- /dev/null +++ b/hw/bsp/stm32h7/family.cmake @@ -0,0 +1,130 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY h7) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32H7 CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_STM32H7) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + family_flash_jlink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index 8042248a8..c11240207 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -53,13 +53,13 @@ SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c INC += \ $(TOP)/$(BOARD_PATH) \ diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/stm32h723xx_flash.ld b/hw/bsp/stm32h7/linker/stm32h723xx_flash.ld similarity index 100% rename from hw/bsp/stm32h7/boards/stm32h723nucleo/stm32h723xx_flash.ld rename to hw/bsp/stm32h7/linker/stm32h723xx_flash.ld diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/linker/stm32h743xx_flash.ld similarity index 100% rename from hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld rename to hw/bsp/stm32h7/linker/stm32h743xx_flash.ld From 268ce0287f25eb73c2f0dbe5180981e09d84ec47 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 16 Jun 2023 19:39:03 +0700 Subject: [PATCH 46/94] correct cmake iar build --- .github/workflows/build_iar.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 08149e201..48d66240e 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -73,4 +73,4 @@ jobs: run: python3 tools/get_deps.py ${{ matrix.family }} - name: Build - run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iccarm + run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar From 7dc6829519afd3aa30523950efaa2438b6b6dbe9 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 19 Jun 2023 16:33:47 +0700 Subject: [PATCH 47/94] enable etm trace support for h743 eval --- hw/bsp/family_support.cmake | 5 + hw/bsp/stm32h7/boards/stm32h743eval/board.h | 57 +- .../stm32h743eval/cubemx/stm32h743eval.ioc | 1125 +++++++++++++++++ .../stm32h743eval/ozone/h743eval.jdebug | 249 ++++ hw/bsp/stm32h7/family.c | 26 + 5 files changed, 1443 insertions(+), 19 deletions(-) create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index ec36df5c8..73e674c18 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -166,6 +166,11 @@ function(family_configure_common TARGET) endif () endif () + # ETM Trace + if (TRACE_ETM STREQUAL "1") + target_compile_definitions(${TARGET} PUBLIC TRACE_ETM) + endif () + endfunction() diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h index 666bec9a1..7e3c015c8 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h @@ -85,41 +85,60 @@ static inline void board_stm32h7_clock_init(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - /* PLL1 for System Clock */ + // PLL1 for System Clock +#ifdef TRACE_ETM + // From H743 eval board manual + // - ETM can only work at 50 MHz clock by default because ETM signals are shared with other peripherals. If better + // performance of ETM is required (84 MHz/98 MHz), R217, R230, R231, R234, R236, SB2, SB5, SB8, SB11, + // SB42, SB57 must be removed to reduce the stub on ETM signals. In this configuration SAI and PDM are not + // functional and NOR Flash and the address of SRAM are limited on A18. + // - ETM trace function would be abnormal as SAI_SDB share the same pins with TRACE_D0, and TRACE_D0 + // would be forced high by SAI_SDB. When using ETM trace it is necessary to set ADCDAT1 pin (SAI_SDB signal + // of the STM32) of audio codec WM8994ECS/R (U22) by software to be tri-state. + + // Since Trace CLK = PLL1 / 3 --> max PLL1 clock is 150Mhz + RCC_OscInitStruct.PLL.PLLM = 2; + RCC_OscInitStruct.PLL.PLLN = 24; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 4; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLFRACN = 0; +#else + // Set PLL1 to 400Mhz RCC_OscInitStruct.PLL.PLLM = 5; RCC_OscInitStruct.PLL.PLLN = 160; - RCC_OscInitStruct.PLL.PLLFRACN = 0; RCC_OscInitStruct.PLL.PLLP = 2; RCC_OscInitStruct.PLL.PLLR = 2; RCC_OscInitStruct.PLL.PLLQ = 4; - +#endif RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM; RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; HAL_RCC_OscConfig(&RCC_OscInitStruct); - /* PLL3 for USB Clock */ - PeriphClkInitStruct.PLL3.PLL3M = 25; - PeriphClkInitStruct.PLL3.PLL3N = 336; - PeriphClkInitStruct.PLL3.PLL3FRACN = 0; - PeriphClkInitStruct.PLL3.PLL3P = 2; - PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3Q = 7; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; - HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - - /* Select PLL as system clock source and configure bus clocks dividers */ - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \ - RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1); + /* Select PLL as system clock source and configure bus clocks dividers */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | + RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; - RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + + /* PLL3 for USB Clock */ + PeriphClkInitStruct.PLL3.PLL3M = 25; + PeriphClkInitStruct.PLL3.PLL3N = 336; + PeriphClkInitStruct.PLL3.PLL3FRACN = 0; + PeriphClkInitStruct.PLL3.PLL3P = 2; + PeriphClkInitStruct.PLL3.PLL3Q = 7; + PeriphClkInitStruct.PLL3.PLL3R = 2; + + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); /*activate CSI clock mondatory for I/O Compensation Cell*/ __HAL_RCC_CSI_ENABLE() ; diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc new file mode 100644 index 000000000..1cc2cc8fa --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc @@ -0,0 +1,1125 @@ +#MicroXplorer Configuration settings - do not modify +CAD.formats=[] +CAD.pinconfig=Project naming +CAD.provider= +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +Mcu.CPN=STM32H743XIH6 +Mcu.Family=STM32H7 +Mcu.IP0=CORTEX_M7 +Mcu.IP1=DEBUG +Mcu.IP2=NVIC +Mcu.IP3=RCC +Mcu.IP4=SYS +Mcu.IP5=USB_OTG_FS +Mcu.IP6=USB_OTG_HS +Mcu.IPNb=7 +Mcu.Name=STM32H743XIHx +Mcu.Package=TFBGA240 +Mcu.Pin0=PI6 +Mcu.Pin1=PI5 +Mcu.Pin10=PA15 (JTDI) +Mcu.Pin100=PC1 +Mcu.Pin101=PC2 +Mcu.Pin102=PC3 +Mcu.Pin103=PJ9 +Mcu.Pin104=PH2 +Mcu.Pin105=PA2 +Mcu.Pin106=PA1 +Mcu.Pin107=PJ0 +Mcu.Pin108=PE10 +Mcu.Pin109=PJ8 +Mcu.Pin11=PI1 +Mcu.Pin110=PJ7 +Mcu.Pin111=PJ6 +Mcu.Pin112=PH3 +Mcu.Pin113=PH4 +Mcu.Pin114=PH5 +Mcu.Pin115=PI15 +Mcu.Pin116=PJ1 +Mcu.Pin117=PF13 +Mcu.Pin118=PF14 +Mcu.Pin119=PE9 +Mcu.Pin12=PI0 +Mcu.Pin120=PE11 +Mcu.Pin121=PB10 +Mcu.Pin122=PB11 +Mcu.Pin123=PH10 +Mcu.Pin124=PH11 +Mcu.Pin125=PD15 +Mcu.Pin126=PD14 +Mcu.Pin127=PA6 +Mcu.Pin128=PA7 +Mcu.Pin129=PB2 +Mcu.Pin13=PI7 +Mcu.Pin130=PF12 +Mcu.Pin131=PF15 +Mcu.Pin132=PE12 +Mcu.Pin133=PE15 +Mcu.Pin134=PJ5 +Mcu.Pin135=PH9 +Mcu.Pin136=PH12 +Mcu.Pin137=PD11 +Mcu.Pin138=PD12 +Mcu.Pin139=PD13 +Mcu.Pin14=PE1 +Mcu.Pin140=PA0_C +Mcu.Pin141=PA5 +Mcu.Pin142=PC4 +Mcu.Pin143=PB1 +Mcu.Pin144=PJ2 +Mcu.Pin145=PF11 +Mcu.Pin146=PG0 +Mcu.Pin147=PE8 +Mcu.Pin148=PE13 +Mcu.Pin149=PH6 +Mcu.Pin15=PB6 +Mcu.Pin150=PH8 +Mcu.Pin151=PB12 +Mcu.Pin152=PB15 +Mcu.Pin153=PD10 +Mcu.Pin154=PD9 +Mcu.Pin155=PA3 +Mcu.Pin156=PA4 +Mcu.Pin157=PC5 +Mcu.Pin158=PB0 +Mcu.Pin159=PJ3 +Mcu.Pin16=PB4 (NJTRST) +Mcu.Pin160=PJ4 +Mcu.Pin161=PG1 +Mcu.Pin162=PE7 +Mcu.Pin163=PE14 +Mcu.Pin164=PH7 +Mcu.Pin165=PB13 +Mcu.Pin166=PB14 +Mcu.Pin167=PD8 +Mcu.Pin168=VP_SYS_VS_Systick +Mcu.Pin17=PK4 +Mcu.Pin18=PG11 +Mcu.Pin19=PJ15 +Mcu.Pin2=PI4 +Mcu.Pin20=PD6 +Mcu.Pin21=PD3 +Mcu.Pin22=PC11 +Mcu.Pin23=PA14 (JTCK/SWCLK) +Mcu.Pin24=PI2 +Mcu.Pin25=PH15 +Mcu.Pin26=PH14 +Mcu.Pin27=PC15-OSC32_OUT (OSC32_OUT) +Mcu.Pin28=PC14-OSC32_IN (OSC32_IN) +Mcu.Pin29=PE2 +Mcu.Pin3=PB5 +Mcu.Pin30=PE0 +Mcu.Pin31=PB7 +Mcu.Pin32=PB3 (JTDO/TRACESWO) +Mcu.Pin33=PK6 +Mcu.Pin34=PK3 +Mcu.Pin35=PG12 +Mcu.Pin36=PD7 +Mcu.Pin37=PC12 +Mcu.Pin38=PI3 +Mcu.Pin39=PA13 (JTMS/SWDIO) +Mcu.Pin4=PK5 +Mcu.Pin40=PE5 +Mcu.Pin41=PE4 +Mcu.Pin42=PE3 +Mcu.Pin43=PB9 +Mcu.Pin44=PB8 +Mcu.Pin45=PG15 +Mcu.Pin46=PK7 +Mcu.Pin47=PG14 +Mcu.Pin48=PG13 +Mcu.Pin49=PJ14 +Mcu.Pin5=PG10 +Mcu.Pin50=PJ12 +Mcu.Pin51=PD2 +Mcu.Pin52=PD0 +Mcu.Pin53=PA10 +Mcu.Pin54=PA9 +Mcu.Pin55=PH13 +Mcu.Pin56=PI9 +Mcu.Pin57=PC13 +Mcu.Pin58=PI8 +Mcu.Pin59=PE6 +Mcu.Pin6=PG9 +Mcu.Pin60=PJ13 +Mcu.Pin61=PD1 +Mcu.Pin62=PC8 +Mcu.Pin63=PC9 +Mcu.Pin64=PA8 +Mcu.Pin65=PA12 +Mcu.Pin66=PA11 +Mcu.Pin67=PI10 +Mcu.Pin68=PI11 +Mcu.Pin69=PC7 +Mcu.Pin7=PD5 +Mcu.Pin70=PC6 +Mcu.Pin71=PG8 +Mcu.Pin72=PG7 +Mcu.Pin73=PF2 +Mcu.Pin74=PF1 +Mcu.Pin75=PF0 +Mcu.Pin76=PG5 +Mcu.Pin77=PG6 +Mcu.Pin78=PI12 +Mcu.Pin79=PI13 +Mcu.Pin8=PD4 +Mcu.Pin80=PI14 +Mcu.Pin81=PF3 +Mcu.Pin82=PG4 +Mcu.Pin83=PG3 +Mcu.Pin84=PG2 +Mcu.Pin85=PK2 +Mcu.Pin86=PH1-OSC_OUT (PH1) +Mcu.Pin87=PH0-OSC_IN (PH0) +Mcu.Pin88=PF5 +Mcu.Pin89=PF4 +Mcu.Pin9=PC10 +Mcu.Pin90=PK0 +Mcu.Pin91=PK1 +Mcu.Pin92=PF6 +Mcu.Pin93=PF7 +Mcu.Pin94=PF8 +Mcu.Pin95=PJ11 +Mcu.Pin96=PC0 +Mcu.Pin97=PF10 +Mcu.Pin98=PF9 +Mcu.Pin99=PJ10 +Mcu.PinsNb=169 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32H743XIHx +MxCube.Version=6.8.1 +MxDb.Version=DB.6.0.81 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false +PA0_C.GPIOParameters=GPIO_Label +PA0_C.GPIO_Label=Potentiometer +PA0_C.Locked=true +PA0_C.Signal=ADCx_INN1 +PA1.GPIOParameters=GPIO_Label +PA1.GPIO_Label=RMII_REF_CLK [LAN8742A_REFCLK0] +PA1.Locked=true +PA1.Signal=ETH_REF_CLK +PA10.GPIOParameters=GPIO_Label +PA10.GPIO_Label=USB_FS1_ID +PA10.Locked=true +PA10.Signal=USB_OTG_FS_ID +PA11.GPIOParameters=GPIO_Label +PA11.GPIO_Label=USB_FS1_DM +PA11.Locked=true +PA11.Mode=Device_Only +PA11.Signal=USB_OTG_FS_DM +PA12.GPIOParameters=GPIO_Label +PA12.GPIO_Label=USB_FS1_DP +PA12.Locked=true +PA12.Mode=Device_Only +PA12.Signal=USB_OTG_FS_DP +PA13\ (JTMS/SWDIO).Locked=true +PA13\ (JTMS/SWDIO).Mode=Trace_Synchro_4bits_SW +PA13\ (JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO +PA14\ (JTCK/SWCLK).Locked=true +PA14\ (JTCK/SWCLK).Mode=Trace_Synchro_4bits_SW +PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK +PA15\ (JTDI).GPIOParameters=GPIO_Label +PA15\ (JTDI).GPIO_Label=TDI +PA15\ (JTDI).Locked=true +PA15\ (JTDI).Signal=DEBUG_JTDI +PA2.GPIOParameters=GPIO_Label +PA2.GPIO_Label=ETH_MDIO [LAN8742A_MDIO] +PA2.Locked=true +PA2.Signal=ETH_MDIO +PA3.GPIOParameters=GPIO_Label +PA3.GPIO_Label=ULPI_D0 [USB3320C_D0] +PA3.Locked=true +PA3.Mode=Device_HS +PA3.Signal=USB_OTG_HS_ULPI_D0 +PA4.GPIOParameters=GPIO_Label +PA4.GPIO_Label=LED3_RGB [LD3_Red] +PA4.Locked=true +PA4.Signal=GPIO_Output +PA5.GPIOParameters=GPIO_Label +PA5.GPIO_Label=ULPI_CK [USB3320C_CLKOUT] +PA5.Locked=true +PA5.Mode=Device_HS +PA5.Signal=USB_OTG_HS_ULPI_CK +PA6.GPIOParameters=GPIO_Label +PA6.GPIO_Label=LCD_BL_CTRL +PA6.Locked=true +PA6.Signal=GPIO_Output +PA7.GPIOParameters=GPIO_Label +PA7.GPIO_Label=RMII_CRS_DV [LAN8742A_CRS_DV] +PA7.Locked=true +PA7.Signal=ETH_CRS_DV +PA8.GPIOParameters=GPIO_Label +PA8.GPIO_Label=MCO +PA8.Locked=true +PA8.Signal=RCC_MCO_1 +PA9.GPIOParameters=GPIO_Label +PA9.GPIO_Label=VBUS_FS1 +PA9.Locked=true +PA9.Signal=USB_OTG_FS_VBUS +PB0.GPIOParameters=GPIO_Label +PB0.GPIO_Label=ULPI_D1 [USB3320C_D1] +PB0.Locked=true +PB0.Mode=Device_HS +PB0.Signal=USB_OTG_HS_ULPI_D1 +PB1.GPIOParameters=GPIO_Label +PB1.GPIO_Label=ULPI_D2 [USB3320C_D2] +PB1.Locked=true +PB1.Mode=Device_HS +PB1.Signal=USB_OTG_HS_ULPI_D2 +PB10.GPIOParameters=GPIO_Label +PB10.GPIO_Label=ULPI_D3 [USB3320C_D3] +PB10.Locked=true +PB10.Mode=Device_HS +PB10.Signal=USB_OTG_HS_ULPI_D3 +PB11.GPIOParameters=GPIO_Label +PB11.GPIO_Label=ULPI_D4 [USB3320C_D4] +PB11.Locked=true +PB11.Mode=Device_HS +PB11.Signal=USB_OTG_HS_ULPI_D4 +PB12.GPIOParameters=GPIO_Label +PB12.GPIO_Label=ULPI_D5 [USB3320C_D5] +PB12.Locked=true +PB12.Mode=Device_HS +PB12.Signal=USB_OTG_HS_ULPI_D5 +PB13.GPIOParameters=GPIO_Label +PB13.GPIO_Label=ULPI_D6 [USB3320C_D6] +PB13.Locked=true +PB13.Mode=Device_HS +PB13.Signal=USB_OTG_HS_ULPI_D6 +PB14.GPIOParameters=GPIO_Label +PB14.GPIO_Label=RS232_TX [ST3241EBPR_T2IN] +PB14.Locked=true +PB14.Signal=USART1_TX +PB15.GPIOParameters=GPIO_Label +PB15.GPIO_Label=RS_232RX [ST3241EBPR_R3OUT] +PB15.Locked=true +PB15.Signal=USART1_RX +PB2.GPIOParameters=GPIO_Label +PB2.GPIO_Label=QSPI_CLK [MT25TL01GHBA8ESF_CLK_1] +PB2.Locked=true +PB2.Signal=QUADSPI_CLK +PB3\ (JTDO/TRACESWO).Locked=true +PB3\ (JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO +PB4\ (NJTRST).GPIOParameters=GPIO_Label +PB4\ (NJTRST).GPIO_Label=TRST +PB4\ (NJTRST).Locked=true +PB4\ (NJTRST).Signal=DEBUG_JTRST +PB5.GPIOParameters=GPIO_Label +PB5.GPIO_Label=ULPI_D7 [USB3320C_D7] +PB5.Locked=true +PB5.Mode=Device_HS +PB5.Signal=USB_OTG_HS_ULPI_D7 +PB6.GPIOParameters=GPIO_Label +PB6.GPIO_Label=I2C1_SCL [STM32L152CCT6_I2C_SCL] +PB6.Locked=true +PB6.Signal=I2C1_SCL +PB7.GPIOParameters=GPIO_Label +PB7.GPIO_Label=I2C1_SDA [STM32L152CCT6_I2C_SDA] +PB7.Locked=true +PB7.Signal=I2C1_SDA +PB8.GPIOParameters=GPIO_Label +PB8.GPIO_Label=SDIO1_CKIN +PB8.Locked=true +PB8.Signal=SDMMC1_CKIN +PB9.GPIOParameters=GPIO_Label +PB9.GPIO_Label=SDIO1_CDIR +PB9.Locked=true +PB9.Signal=SDMMC1_CDIR +PC0.GPIOParameters=GPIO_Label +PC0.GPIO_Label=ULPI_STP [USB3320C_STP] +PC0.Locked=true +PC0.Mode=Device_HS +PC0.Signal=USB_OTG_HS_ULPI_STP +PC1.GPIOParameters=GPIO_Label +PC1.GPIO_Label=RMII_MDC [LAN8742A_MDC] +PC1.Locked=true +PC1.Signal=ETH_MDC +PC10.GPIOParameters=GPIO_Label +PC10.GPIO_Label=SDIO1_D2 +PC10.Locked=true +PC10.Signal=SDMMC1_D2 +PC11.GPIOParameters=GPIO_Label +PC11.GPIO_Label=SDIO1_D3 +PC11.Locked=true +PC11.Signal=SDMMC1_D3 +PC12.GPIOParameters=GPIO_Label +PC12.GPIO_Label=SDIO1_CLK +PC12.Locked=true +PC12.Signal=SDMMC1_CK +PC13.GPIOParameters=GPIO_Label +PC13.GPIO_Label=TAMPER_KEY [B1] +PC13.Locked=true +PC13.Signal=RTC_TAMP1 +PC14-OSC32_IN\ (OSC32_IN).Locked=true +PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN +PC15-OSC32_OUT\ (OSC32_OUT).Locked=true +PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT +PC2.GPIOParameters=GPIO_Label +PC2.GPIO_Label=DFSDM_CLK +PC2.Locked=true +PC2.Signal=S_CKOUTDFSDM1 +PC3.GPIOParameters=GPIO_Label +PC3.GPIO_Label=DFSM_DAT1 +PC3.Locked=true +PC3.Signal=S_DATAIN1DFSDM1 +PC4.GPIOParameters=GPIO_Label +PC4.GPIO_Label=RMII_RXD0 [LAN8742A_RXD0] +PC4.Locked=true +PC4.Signal=ETH_RXD0 +PC5.GPIOParameters=GPIO_Label +PC5.GPIO_Label=RMII_RXD1 [LAN8742A_RXD1] +PC5.Locked=true +PC5.Signal=ETH_RXD1 +PC6.GPIOParameters=GPIO_Label +PC6.GPIO_Label=SDIO1_D0DIR +PC6.Locked=true +PC6.Signal=SDMMC1_D0DIR +PC7.Locked=true +PC7.Signal=DEBUG_TRGIO +PC8.GPIOParameters=GPIO_Label +PC8.GPIO_Label=SDIO1_D0 +PC8.Locked=true +PC8.Signal=SDMMC1_D0 +PC9.GPIOParameters=GPIO_Label +PC9.GPIO_Label=SDIO1_D1 +PC9.Locked=true +PC9.Signal=SDMMC1_D1 +PD0.GPIOParameters=GPIO_Label +PD0.GPIO_Label=D2 [IS42S32800G_DQ2] +PD0.Locked=true +PD0.Signal=FMC_D2_DA2 +PD1.GPIOParameters=GPIO_Label +PD1.GPIO_Label=D3 [IS42S32800G_DQ3] +PD1.Locked=true +PD1.Signal=FMC_D3_DA3 +PD10.GPIOParameters=GPIO_Label +PD10.GPIO_Label=D15 [IS42S32800G_DQ15] +PD10.Locked=true +PD10.Signal=FMC_D15_DA15 +PD11.GPIOParameters=GPIO_Label +PD11.GPIO_Label=A16 [PC28F128M29EWLA_A16] +PD11.Locked=true +PD11.Signal=FMC_A16_CLE +PD12.GPIOParameters=GPIO_Label +PD12.GPIO_Label=A17 [PC28F128M29EWLA_A17] +PD12.Locked=true +PD12.Signal=FMC_A17_ALE +PD13.GPIOParameters=GPIO_Label +PD13.GPIO_Label=A18 [PC28F128M29EWLA_A18] +PD13.Locked=true +PD13.Signal=FMC_A18 +PD14.GPIOParameters=GPIO_Label +PD14.GPIO_Label=D0 [IS42S32800G_DQ0] +PD14.Locked=true +PD14.Signal=FMC_D0_DA0 +PD15.GPIOParameters=GPIO_Label +PD15.GPIO_Label=D1 [IS42S32800G_DQ1] +PD15.Locked=true +PD15.Signal=FMC_D1_DA1 +PD2.GPIOParameters=GPIO_Label +PD2.GPIO_Label=SDIO1_CMD +PD2.Locked=true +PD2.Signal=SDMMC1_CMD +PD3.GPIOParameters=GPIO_Label +PD3.GPIO_Label=FDCAN1_STBY [MCP2562FD_STBY] +PD3.Locked=true +PD3.Signal=GPIO_Output +PD4.GPIOParameters=GPIO_Label +PD4.GPIO_Label=FMC_NOE [IS61WV102416BLL_OE] +PD4.Locked=true +PD4.Signal=FMC_NOE +PD5.GPIOParameters=GPIO_Label +PD5.GPIO_Label=FMC_NWE [IS61WV102416BLL_WE] +PD5.Locked=true +PD5.Signal=FMC_NWE +PD6.GPIOParameters=GPIO_Label +PD6.GPIO_Label=FMC_NWAIT [PC28F128M29EWLA_RB] +PD6.Locked=true +PD6.Signal=FMC_NWAIT +PD7.GPIOParameters=GPIO_Label +PD7.GPIO_Label=FMC_NE1 [PC28F128M29EWLA_E] +PD7.Locked=true +PD7.Signal=FMC_NE1 +PD8.GPIOParameters=GPIO_Label +PD8.GPIO_Label=D13 [IS42S32800G_DQ13] +PD8.Locked=true +PD8.Signal=FMC_D13_DA13 +PD9.GPIOParameters=GPIO_Label +PD9.GPIO_Label=D14 [IS42S32800G_DQ14] +PD9.Locked=true +PD9.Signal=FMC_D14_DA14 +PE0.GPIOParameters=GPIO_Label +PE0.GPIO_Label=FMC_NBL0 [IS42S32800G_DQM0] +PE0.Locked=true +PE0.Signal=FMC_NBL0 +PE1.GPIOParameters=GPIO_Label +PE1.GPIO_Label=FMC_NBL1 [IS42S32800G_DQM1] +PE1.Locked=true +PE1.Signal=FMC_NBL1 +PE10.GPIOParameters=GPIO_Label +PE10.GPIO_Label=D7 [IS42S32800G_DQ7] +PE10.Locked=true +PE10.Signal=FMC_D7_DA7 +PE11.GPIOParameters=GPIO_Label +PE11.GPIO_Label=D8 [IS42S32800G_DQ8] +PE11.Locked=true +PE11.Signal=FMC_D8_DA8 +PE12.GPIOParameters=GPIO_Label +PE12.GPIO_Label=D9 [IS42S32800G_DQ9] +PE12.Locked=true +PE12.Signal=FMC_D9_DA9 +PE13.GPIOParameters=GPIO_Label +PE13.GPIO_Label=D10 [IS42S32800G_DQ10] +PE13.Locked=true +PE13.Signal=FMC_D10_DA10 +PE14.GPIOParameters=GPIO_Label +PE14.GPIO_Label=D11 [IS42S32800G_DQ11] +PE14.Locked=true +PE14.Signal=FMC_D11_DA11 +PE15.GPIOParameters=GPIO_Label +PE15.GPIO_Label=D12 [IS42S32800G_DQ12] +PE15.Locked=true +PE15.Signal=FMC_D12_DA12 +PE2.Locked=true +PE2.Mode=Trace_Synchro_4bits_SW +PE2.Signal=DEBUG_TRACECLK +PE3.Locked=true +PE3.Mode=Trace_Synchro_4bits_SW +PE3.Signal=DEBUG_TRACED0 +PE4.Locked=true +PE4.Mode=Trace_Synchro_4bits_SW +PE4.Signal=DEBUG_TRACED1 +PE5.Locked=true +PE5.Mode=Trace_Synchro_4bits_SW +PE5.Signal=DEBUG_TRACED2 +PE6.Locked=true +PE6.Mode=Trace_Synchro_4bits_SW +PE6.Signal=DEBUG_TRACED3 +PE7.GPIOParameters=GPIO_Label +PE7.GPIO_Label=D4 [IS42S32800G_DQ4] +PE7.Locked=true +PE7.Signal=FMC_D4_DA4 +PE8.GPIOParameters=GPIO_Label +PE8.GPIO_Label=D5 [IS42S32800G_DQ5] +PE8.Locked=true +PE8.Signal=FMC_D5_DA5 +PE9.GPIOParameters=GPIO_Label +PE9.GPIO_Label=D6 [IS42S32800G_DQ6] +PE9.Locked=true +PE9.Signal=FMC_D6_DA6 +PF0.GPIOParameters=GPIO_Label +PF0.GPIO_Label=A0 [PC28F128M29EWLA_A0] +PF0.Locked=true +PF0.Signal=FMC_A0 +PF1.GPIOParameters=GPIO_Label +PF1.GPIO_Label=A1 [PC28F128M29EWLA_A1] +PF1.Locked=true +PF1.Signal=FMC_A1 +PF10.GPIOParameters=GPIO_Label +PF10.GPIO_Label=LED1_RGB [LD1_Green] +PF10.Locked=true +PF10.Signal=GPIO_Output +PF11.GPIOParameters=GPIO_Label +PF11.GPIO_Label=SNDRAS [IS42S32800G_RAS] +PF11.Locked=true +PF11.Signal=FMC_SDNRAS +PF12.GPIOParameters=GPIO_Label +PF12.GPIO_Label=A6 [PC28F128M29EWLA_A6] +PF12.Locked=true +PF12.Signal=FMC_A6 +PF13.GPIOParameters=GPIO_Label +PF13.GPIO_Label=A7 [PC28F128M29EWLA_A7] +PF13.Locked=true +PF13.Signal=FMC_A7 +PF14.GPIOParameters=GPIO_Label +PF14.GPIO_Label=A8 [PC28F128M29EWLA_A8] +PF14.Locked=true +PF14.Signal=FMC_A8 +PF15.GPIOParameters=GPIO_Label +PF15.GPIO_Label=A9 [PC28F128M29EWLA_A9] +PF15.Locked=true +PF15.Signal=FMC_A9 +PF2.GPIOParameters=GPIO_Label +PF2.GPIO_Label=A2 [PC28F128M29EWLA_A2] +PF2.Locked=true +PF2.Signal=FMC_A2 +PF3.GPIOParameters=GPIO_Label +PF3.GPIO_Label=A3 [PC28F128M29EWLA_A3] +PF3.Locked=true +PF3.Signal=FMC_A3 +PF4.GPIOParameters=GPIO_Label +PF4.GPIO_Label=A4 [PC28F128M29EWLA_A4] +PF4.Locked=true +PF4.Signal=FMC_A4 +PF5.GPIOParameters=GPIO_Label +PF5.GPIO_Label=A5 [PC28F128M29EWLA_A5] +PF5.Locked=true +PF5.Signal=FMC_A5 +PF6.GPIOParameters=GPIO_Label +PF6.GPIO_Label=QSPI_BK1_IO3 [MT25TL01GHBA8ESF_DQ3] +PF6.Locked=true +PF6.Signal=QUADSPI_BK1_IO3 +PF7.GPIOParameters=GPIO_Label +PF7.GPIO_Label=QSPI_BK1_IO2 [MT25TL01GHBA8ESF_DQ2] +PF7.Locked=true +PF7.Signal=QUADSPI_BK1_IO2 +PF8.GPIOParameters=GPIO_Label +PF8.GPIO_Label=QSPI_BK1_IO0 [MT25TL01GHBA8ESF_DQ0] +PF8.Locked=true +PF8.Signal=QUADSPI_BK1_IO0 +PF9.GPIOParameters=GPIO_Label +PF9.GPIO_Label=QSPI_BK1_IO1 [MT25TL01GHBA8ESF_DQ1] +PF9.Locked=true +PF9.Signal=QUADSPI_BK1_IO1 +PG0.GPIOParameters=GPIO_Label +PG0.GPIO_Label=A10 [PC28F128M29EWLA_A10] +PG0.Locked=true +PG0.Signal=FMC_A10 +PG1.GPIOParameters=GPIO_Label +PG1.GPIO_Label=A11 [PC28F128M29EWLA_A11] +PG1.Locked=true +PG1.Signal=FMC_A11 +PG10.GPIOParameters=GPIO_Label +PG10.GPIO_Label=FMC_NE3 [IS61WV102416BLL_CE] +PG10.Locked=true +PG10.Signal=FMC_NE3 +PG11.GPIOParameters=GPIO_Label +PG11.GPIO_Label=RMII_TX_EN [LAN8742A_TXEN] +PG11.Locked=true +PG11.Signal=ETH_TX_EN +PG12.GPIOParameters=GPIO_Label +PG12.GPIO_Label=RMII_TXD1 [LAN8742A_TXD1] +PG12.Locked=true +PG12.Signal=ETH_TXD1 +PG13.GPIOParameters=GPIO_Label +PG13.GPIO_Label=RMII_TXD0 [LAN8742A_TXD0] +PG13.Locked=true +PG13.Signal=ETH_TXD0 +PG14.GPIOParameters=GPIO_Label +PG14.GPIO_Label=QSPI_BK2_IO3 [MT25TL01GHBA8ESF_DQ7] +PG14.Locked=true +PG14.Signal=QUADSPI_BK2_IO3 +PG15.GPIOParameters=GPIO_Label +PG15.GPIO_Label=SDNCAS [IS42S32800G_CAS] +PG15.Locked=true +PG15.Signal=FMC_SDNCAS +PG2.GPIOParameters=GPIO_Label +PG2.GPIO_Label=A12 [PC28F128M29EWLA_A12] +PG2.Locked=true +PG2.Signal=FMC_A12 +PG3.GPIOParameters=GPIO_Label +PG3.GPIO_Label=A13 [PC28F128M29EWLA_A13] +PG3.Locked=true +PG3.Signal=FMC_A13 +PG4.Locked=true +PG4.Signal=FMC_A14_BA0 +PG5.Locked=true +PG5.Signal=FMC_A15_BA1 +PG6.GPIOParameters=GPIO_Label +PG6.GPIO_Label=QSPI_BK1_NCS [MT25TL01GHBA8ESF_CS] +PG6.Locked=true +PG6.Signal=QUADSPI_BK1_NCS +PG7.GPIOParameters=GPIO_Label +PG7.GPIO_Label=SAI1_MCLKA [WM8994ECS_MCLK1] +PG7.Locked=true +PG7.Signal=SAI1_MCLK_A +PG8.GPIOParameters=GPIO_Label +PG8.GPIO_Label=SDCLK [IS42S32800G_CLK] +PG8.Locked=true +PG8.Signal=FMC_SDCLK +PG9.GPIOParameters=GPIO_Label +PG9.GPIO_Label=QSPI_BK2_IO2 [MT25TL01GHBA8ESF_DQ6] +PG9.Locked=true +PG9.Signal=QUADSPI_BK2_IO2 +PH0-OSC_IN\ (PH0).Locked=true +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Locked=true +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PH10.GPIOParameters=GPIO_Label +PH10.GPIO_Label=D18 [IS42S32800G_DQ18] +PH10.Locked=true +PH10.Signal=FMC_D18 +PH11.GPIOParameters=GPIO_Label +PH11.GPIO_Label=D19 [IS42S32800G_DQ19] +PH11.Locked=true +PH11.Signal=FMC_D19 +PH12.GPIOParameters=GPIO_Label +PH12.GPIO_Label=D20 [IS42S32800G_DQ20] +PH12.Locked=true +PH12.Signal=FMC_D20 +PH13.GPIOParameters=GPIO_Label +PH13.GPIO_Label=D21 [IS42S32800G_DQ21] +PH13.Locked=true +PH13.Signal=FMC_D21 +PH14.GPIOParameters=GPIO_Label +PH14.GPIO_Label=D22 [IS42S32800G_DQ22] +PH14.Locked=true +PH14.Signal=FMC_D22 +PH15.GPIOParameters=GPIO_Label +PH15.GPIO_Label=D23 [IS42S32800G_DQ23] +PH15.Locked=true +PH15.Signal=FMC_D23 +PH2.GPIOParameters=GPIO_Label +PH2.GPIO_Label=QSPI_BK2_IO0 [MT25TL01GHBA8ESF_DQ4] +PH2.Locked=true +PH2.Signal=QUADSPI_BK2_IO0 +PH3.GPIOParameters=GPIO_Label +PH3.GPIO_Label=QSPI_BK2_IO1 [MT25TL01GHBA8ESF_DQ5] +PH3.Locked=true +PH3.Signal=QUADSPI_BK2_IO1 +PH4.GPIOParameters=GPIO_Label +PH4.GPIO_Label=ULPI_NXT [USB3320C_NXT] +PH4.Locked=true +PH4.Mode=Device_HS +PH4.Signal=USB_OTG_HS_ULPI_NXT +PH5.GPIOParameters=GPIO_Label +PH5.GPIO_Label=SDNWE [IS42S32800G_WE] +PH5.Locked=true +PH5.Signal=FMC_SDNWE +PH6.GPIOParameters=GPIO_Label +PH6.GPIO_Label=SDNE1 [IS42S32800G_CS] +PH6.Locked=true +PH6.Signal=FMC_SDNE1 +PH7.GPIOParameters=GPIO_Label +PH7.GPIO_Label=SDCKE1 [IS42S32800G_CKE] +PH7.Locked=true +PH7.Signal=FMC_SDCKE1 +PH8.GPIOParameters=GPIO_Label +PH8.GPIO_Label=D16 [IS42S32800G_DQ16] +PH8.Locked=true +PH8.Signal=FMC_D16 +PH9.GPIOParameters=GPIO_Label +PH9.GPIO_Label=D17 [IS42S32800G_DQ17] +PH9.Locked=true +PH9.Signal=FMC_D17 +PI0.GPIOParameters=GPIO_Label +PI0.GPIO_Label=D24 [IS42S32800G_DQ24] +PI0.Locked=true +PI0.Signal=FMC_D24 +PI1.GPIOParameters=GPIO_Label +PI1.GPIO_Label=D25 [IS42S32800G_DQ25] +PI1.Locked=true +PI1.Signal=FMC_D25 +PI10.GPIOParameters=GPIO_Label +PI10.GPIO_Label=D31 [IS42S32800G_DQ31] +PI10.Locked=true +PI10.Signal=FMC_D31 +PI11.GPIOParameters=GPIO_Label +PI11.GPIO_Label=ULPI_DIR [USB3320C_DIR] +PI11.Locked=true +PI11.Mode=Device_HS +PI11.Signal=USB_OTG_HS_ULPI_DIR +PI12.GPIOParameters=GPIO_Label +PI12.GPIO_Label=LCD_HSYNC +PI12.Locked=true +PI12.Signal=LTDC_HSYNC +PI13.GPIOParameters=GPIO_Label +PI13.GPIO_Label=LCD_VSYNC +PI13.Locked=true +PI13.Signal=LTDC_VSYNC +PI14.GPIOParameters=GPIO_Label +PI14.GPIO_Label=LCD_CLK +PI14.Locked=true +PI14.Signal=LTDC_CLK +PI15.GPIOParameters=GPIO_Label +PI15.GPIO_Label=LCD_R0 +PI15.Locked=true +PI15.Signal=LTDC_R0 +PI2.GPIOParameters=GPIO_Label +PI2.GPIO_Label=D26 [IS42S32800G_DQ26] +PI2.Locked=true +PI2.Signal=FMC_D26 +PI3.GPIOParameters=GPIO_Label +PI3.GPIO_Label=D27 [IS42S32800G_DQ27 +PI3.Locked=true +PI3.Signal=FMC_D27 +PI4.GPIOParameters=GPIO_Label +PI4.GPIO_Label=FMC_NBL2 [IS42S32800G_DQM2] +PI4.Locked=true +PI4.Signal=FMC_NBL2 +PI5.GPIOParameters=GPIO_Label +PI5.GPIO_Label=FMC_NBL3 [IS42S32800G_DQM3] +PI5.Locked=true +PI5.Signal=FMC_NBL3 +PI6.GPIOParameters=GPIO_Label +PI6.GPIO_Label=D28 [IS42S32800G_DQ28] +PI6.Locked=true +PI6.Signal=FMC_D28 +PI7.GPIOParameters=GPIO_Label +PI7.GPIO_Label=D29 [IS42S32800G_DQ29] +PI7.Locked=true +PI7.Signal=FMC_D29 +PI8.GPIOParameters=GPIO_Label +PI8.GPIO_Label=MFX_IRQOUT [MFX_V3_IRQOUT] +PI8.Locked=true +PI8.Signal=GPXTI8 +PI9.GPIOParameters=GPIO_Label +PI9.GPIO_Label=D30 [IS42S32800G_DQ30] +PI9.Locked=true +PI9.Signal=FMC_D30 +PJ0.GPIOParameters=GPIO_Label +PJ0.GPIO_Label=LCD_R1 +PJ0.Locked=true +PJ0.Signal=LTDC_R1 +PJ1.GPIOParameters=GPIO_Label +PJ1.GPIO_Label=LCD_R2 +PJ1.Locked=true +PJ1.Signal=LTDC_R2 +PJ10.GPIOParameters=GPIO_Label +PJ10.GPIO_Label=LCd_G3 +PJ10.Locked=true +PJ10.Signal=LTDC_G3 +PJ11.GPIOParameters=GPIO_Label +PJ11.GPIO_Label=LCD_G4 +PJ11.Locked=true +PJ11.Signal=LTDC_G4 +PJ12.Locked=true +PJ12.Signal=DEBUG_TRGOUT +PJ13.GPIOParameters=GPIO_Label +PJ13.GPIO_Label=LCD_B1 +PJ13.Locked=true +PJ13.Signal=LTDC_B1 +PJ14.GPIOParameters=GPIO_Label +PJ14.GPIO_Label=LCD_B2 +PJ14.Locked=true +PJ14.Signal=LTDC_B2 +PJ15.GPIOParameters=GPIO_Label +PJ15.GPIO_Label=LCD_B3 +PJ15.Locked=true +PJ15.Signal=LTDC_B3 +PJ2.GPIOParameters=GPIO_Label +PJ2.GPIO_Label=LCD_R3 +PJ2.Locked=true +PJ2.Signal=LTDC_R3 +PJ3.GPIOParameters=GPIO_Label +PJ3.GPIO_Label=LCD_R4 +PJ3.Locked=true +PJ3.Signal=LTDC_R4 +PJ4.GPIOParameters=GPIO_Label +PJ4.GPIO_Label=LCD_R5 +PJ4.Locked=true +PJ4.Signal=LTDC_R5 +PJ5.GPIOParameters=GPIO_Label +PJ5.GPIO_Label=LCD_R6 +PJ5.Locked=true +PJ5.Signal=LTDC_R6 +PJ6.GPIOParameters=GPIO_Label +PJ6.GPIO_Label=LCD_R7 +PJ6.Locked=true +PJ6.Signal=LTDC_R7 +PJ7.Locked=true +PJ7.Signal=DEBUG_TRGIN +PJ8.GPIOParameters=GPIO_Label +PJ8.GPIO_Label=LCD_G1 +PJ8.Locked=true +PJ8.Signal=LTDC_G1 +PJ9.GPIOParameters=GPIO_Label +PJ9.GPIO_Label=LCD_G2 +PJ9.Locked=true +PJ9.Signal=LTDC_G2 +PK0.GPIOParameters=GPIO_Label +PK0.GPIO_Label=LCD_G5 +PK0.Locked=true +PK0.Signal=LTDC_G5 +PK1.GPIOParameters=GPIO_Label +PK1.GPIO_Label=LCD_G6 +PK1.Locked=true +PK1.Signal=LTDC_G6 +PK2.GPIOParameters=GPIO_Label +PK2.GPIO_Label=LCD_G7 +PK2.Locked=true +PK2.Signal=LTDC_G7 +PK3.GPIOParameters=GPIO_Label +PK3.GPIO_Label=LCD_B4 +PK3.Locked=true +PK3.Signal=LTDC_B4 +PK4.GPIOParameters=GPIO_Label +PK4.GPIO_Label=LCD_B5 +PK4.Locked=true +PK4.Signal=LTDC_B5 +PK5.GPIOParameters=GPIO_Label +PK5.GPIO_Label=LCD_B6 +PK5.Locked=true +PK5.Signal=LTDC_B6 +PK6.GPIOParameters=GPIO_Label +PK6.GPIO_Label=LCD_B7 +PK6.Locked=true +PK6.Signal=LTDC_B7 +PK7.GPIOParameters=GPIO_Label +PK7.GPIO_Label=LCD_DE +PK7.Locked=true +PK7.Signal=LTDC_DE +PinOutPanel.CurrentBGAView=Top +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32H743XIHx +ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=stm32h743eval.ioc +ProjectManager.ProjectName=stm32h743eval +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=Makefile +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,4-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true +RCC.ADCFreq_Value=50390625 +RCC.AHB12Freq_Value=150000000 +RCC.AHB4Freq_Value=150000000 +RCC.APB1Freq_Value=75000000 +RCC.APB2Freq_Value=75000000 +RCC.APB3Freq_Value=75000000 +RCC.APB4Freq_Value=75000000 +RCC.AXIClockFreq_Value=150000000 +RCC.CECFreq_Value=32000 +RCC.CKPERFreq_Value=64000000 +RCC.CortexFreq_Value=150000000 +RCC.CpuClockFreq_Value=150000000 +RCC.D1CPREFreq_Value=150000000 +RCC.D1PPRE=RCC_APB3_DIV2 +RCC.D2PPRE1=RCC_APB1_DIV2 +RCC.D2PPRE2=RCC_APB2_DIV2 +RCC.D3PPRE=RCC_APB4_DIV2 +RCC.DFSDMACLkFreq_Value=75000000 +RCC.DFSDMFreq_Value=75000000 +RCC.DIVM1=2 +RCC.DIVM3=25 +RCC.DIVN1=24 +RCC.DIVN3=336 +RCC.DIVP1Freq_Value=150000000 +RCC.DIVP2Freq_Value=50390625 +RCC.DIVP3Freq_Value=168000000 +RCC.DIVQ1=4 +RCC.DIVQ1Freq_Value=75000000 +RCC.DIVQ2Freq_Value=50390625 +RCC.DIVQ3=7 +RCC.DIVQ3Freq_Value=48000000 +RCC.DIVR1Freq_Value=150000000 +RCC.DIVR2Freq_Value=50390625 +RCC.DIVR3Freq_Value=168000000 +RCC.EnbaleCSS=true +RCC.FDCANFreq_Value=75000000 +RCC.FMCFreq_Value=150000000 +RCC.FamilyName=M +RCC.HCLK3ClockFreq_Value=150000000 +RCC.HCLKFreq_Value=150000000 +RCC.HPREFreq_Value=64000000 +RCC.HRTIMFreq_Value=150000000 +RCC.HSICalibrationValue=32 +RCC.I2C123Freq_Value=75000000 +RCC.I2C4Freq_Value=75000000 +RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM3,DIVN1,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPREFreq_Value,HRTIMFreq_Value,HSICalibrationValue,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value +RCC.LPTIM1Freq_Value=75000000 +RCC.LPTIM2Freq_Value=75000000 +RCC.LPTIM345Freq_Value=75000000 +RCC.LPUART1Freq_Value=75000000 +RCC.LTDCFreq_Value=168000000 +RCC.MCO1PinFreq_Value=64000000 +RCC.MCO2PinFreq_Value=150000000 +RCC.PLL2FRACN=0 +RCC.PLL3FRACN=0 +RCC.PLLFRACN=0 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE1 +RCC.QSPIFreq_Value=150000000 +RCC.RNGFreq_Value=48000000 +RCC.RTCFreq_Value=32000 +RCC.SAI1Freq_Value=75000000 +RCC.SAI23Freq_Value=75000000 +RCC.SAI4AFreq_Value=75000000 +RCC.SAI4BFreq_Value=75000000 +RCC.SDMMCFreq_Value=75000000 +RCC.SPDIFRXFreq_Value=75000000 +RCC.SPI123Freq_Value=75000000 +RCC.SPI45Freq_Value=75000000 +RCC.SPI6Freq_Value=75000000 +RCC.SWPMI1Freq_Value=75000000 +RCC.SYSCLKFreq_VALUE=150000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.Tim1OutputFreq_Value=150000000 +RCC.Tim2OutputFreq_Value=150000000 +RCC.TraceFreq_Value=150000000 +RCC.USART16Freq_Value=75000000 +RCC.USART234578Freq_Value=75000000 +RCC.USBCLockSelection=RCC_USBCLKSOURCE_PLL3 +RCC.USBFreq_Value=48000000 +RCC.VCO1OutputFreq_Value=300000000 +RCC.VCO2OutputFreq_Value=100781250 +RCC.VCO3OutputFreq_Value=336000000 +RCC.VCOInput1Freq_Value=12500000 +RCC.VCOInput2Freq_Value=781250 +RCC.VCOInput3Freq_Value=1000000 +SH.ADCx_INN1.0=ADC1_INN1 +SH.ADCx_INN1.ConfNb=1 +SH.FMC_A0.0=FMC_A0 +SH.FMC_A0.ConfNb=1 +SH.FMC_A1.0=FMC_A1 +SH.FMC_A1.ConfNb=1 +SH.FMC_A10.0=FMC_A10 +SH.FMC_A10.ConfNb=1 +SH.FMC_A11.0=FMC_A11 +SH.FMC_A11.ConfNb=1 +SH.FMC_A12.0=FMC_A12 +SH.FMC_A12.ConfNb=1 +SH.FMC_A13.0=FMC_A13 +SH.FMC_A13.ConfNb=1 +SH.FMC_A14_BA0.0=FMC_BA0 +SH.FMC_A14_BA0.1=FMC_A14 +SH.FMC_A14_BA0.ConfNb=2 +SH.FMC_A15_BA1.0=FMC_BA1 +SH.FMC_A15_BA1.1=FMC_A15 +SH.FMC_A15_BA1.ConfNb=2 +SH.FMC_A16_CLE.0=FMC_A16 +SH.FMC_A16_CLE.ConfNb=1 +SH.FMC_A17_ALE.0=FMC_A17 +SH.FMC_A17_ALE.ConfNb=1 +SH.FMC_A18.0=FMC_A18 +SH.FMC_A18.ConfNb=1 +SH.FMC_A2.0=FMC_A2 +SH.FMC_A2.ConfNb=1 +SH.FMC_A3.0=FMC_A3 +SH.FMC_A3.ConfNb=1 +SH.FMC_A4.0=FMC_A4 +SH.FMC_A4.ConfNb=1 +SH.FMC_A5.0=FMC_A5 +SH.FMC_A5.ConfNb=1 +SH.FMC_A6.0=FMC_A6 +SH.FMC_A6.ConfNb=1 +SH.FMC_A7.0=FMC_A7 +SH.FMC_A7.ConfNb=1 +SH.FMC_A8.0=FMC_A8 +SH.FMC_A8.ConfNb=1 +SH.FMC_A9.0=FMC_A9 +SH.FMC_A9.ConfNb=1 +SH.FMC_D0_DA0.0=FMC_D0 +SH.FMC_D0_DA0.ConfNb=1 +SH.FMC_D10_DA10.0=FMC_D10 +SH.FMC_D10_DA10.ConfNb=1 +SH.FMC_D11_DA11.0=FMC_D11 +SH.FMC_D11_DA11.ConfNb=1 +SH.FMC_D12_DA12.0=FMC_D12 +SH.FMC_D12_DA12.ConfNb=1 +SH.FMC_D13_DA13.0=FMC_D13 +SH.FMC_D13_DA13.ConfNb=1 +SH.FMC_D14_DA14.0=FMC_D14 +SH.FMC_D14_DA14.ConfNb=1 +SH.FMC_D15_DA15.0=FMC_D15 +SH.FMC_D15_DA15.ConfNb=1 +SH.FMC_D16.0=FMC_D16 +SH.FMC_D16.ConfNb=1 +SH.FMC_D17.0=FMC_D17 +SH.FMC_D17.ConfNb=1 +SH.FMC_D18.0=FMC_D18 +SH.FMC_D18.ConfNb=1 +SH.FMC_D19.0=FMC_D19 +SH.FMC_D19.ConfNb=1 +SH.FMC_D1_DA1.0=FMC_D1 +SH.FMC_D1_DA1.ConfNb=1 +SH.FMC_D20.0=FMC_D20 +SH.FMC_D20.ConfNb=1 +SH.FMC_D21.0=FMC_D21 +SH.FMC_D21.ConfNb=1 +SH.FMC_D22.0=FMC_D22 +SH.FMC_D22.ConfNb=1 +SH.FMC_D23.0=FMC_D23 +SH.FMC_D23.ConfNb=1 +SH.FMC_D24.0=FMC_D24 +SH.FMC_D24.ConfNb=1 +SH.FMC_D25.0=FMC_D25 +SH.FMC_D25.ConfNb=1 +SH.FMC_D26.0=FMC_D26 +SH.FMC_D26.ConfNb=1 +SH.FMC_D27.0=FMC_D27 +SH.FMC_D27.ConfNb=1 +SH.FMC_D28.0=FMC_D28 +SH.FMC_D28.ConfNb=1 +SH.FMC_D29.0=FMC_D29 +SH.FMC_D29.ConfNb=1 +SH.FMC_D2_DA2.0=FMC_D2 +SH.FMC_D2_DA2.ConfNb=1 +SH.FMC_D30.0=FMC_D30 +SH.FMC_D30.ConfNb=1 +SH.FMC_D31.0=FMC_D31 +SH.FMC_D31.ConfNb=1 +SH.FMC_D3_DA3.0=FMC_D3 +SH.FMC_D3_DA3.ConfNb=1 +SH.FMC_D4_DA4.0=FMC_D4 +SH.FMC_D4_DA4.ConfNb=1 +SH.FMC_D5_DA5.0=FMC_D5 +SH.FMC_D5_DA5.ConfNb=1 +SH.FMC_D6_DA6.0=FMC_D6 +SH.FMC_D6_DA6.ConfNb=1 +SH.FMC_D7_DA7.0=FMC_D7 +SH.FMC_D7_DA7.ConfNb=1 +SH.FMC_D8_DA8.0=FMC_D8 +SH.FMC_D8_DA8.ConfNb=1 +SH.FMC_D9_DA9.0=FMC_D9 +SH.FMC_D9_DA9.ConfNb=1 +SH.FMC_NBL0.0=FMC_NBL0 +SH.FMC_NBL0.ConfNb=1 +SH.FMC_NBL1.0=FMC_NBL1 +SH.FMC_NBL1.ConfNb=1 +SH.FMC_NBL2.0=FMC_NBL2 +SH.FMC_NBL2.ConfNb=1 +SH.FMC_NBL3.0=FMC_NBL3 +SH.FMC_NBL3.ConfNb=1 +SH.FMC_NOE.0=FMC_NOE +SH.FMC_NOE.ConfNb=1 +SH.FMC_NWAIT.0=FMC_NWAIT +SH.FMC_NWAIT.ConfNb=1 +SH.FMC_NWE.0=FMC_NWE +SH.FMC_NWE.ConfNb=1 +SH.FMC_SDCLK.0=FMC_SDCLK +SH.FMC_SDCLK.ConfNb=1 +SH.FMC_SDNCAS.0=FMC_SDNCAS +SH.FMC_SDNCAS.ConfNb=1 +SH.FMC_SDNRAS.0=FMC_SDNRAS +SH.FMC_SDNRAS.ConfNb=1 +SH.FMC_SDNWE.0=FMC_SDNWE +SH.FMC_SDNWE.ConfNb=1 +SH.GPXTI8.0=GPIO_EXTI8 +SH.GPXTI8.ConfNb=1 +SH.S_CKOUTDFSDM1.0=DFSDM1_CKOUT +SH.S_CKOUTDFSDM1.ConfNb=1 +SH.S_DATAIN1DFSDM1.0=DFSDM1_DATIN1 +SH.S_DATAIN1DFSDM1.ConfNb=1 +USB_OTG_FS.IPParameters=VirtualMode +USB_OTG_FS.VirtualMode=Device_Only +USB_OTG_HS.IPParameters=VirtualMode-Device_HS +USB_OTG_HS.VirtualMode-Device_HS=Device_HS +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=STM32H743I-EVAL2 +boardIOC=true diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug new file mode 100644 index 000000000..093951765 --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug @@ -0,0 +1,249 @@ + +/********************************************************************* +* +* OnProjectLoad +* +* Function description +* Project load routine. Required. +* +********************************************************************** +*/ +void OnProjectLoad (void) { + // + // Dialog-generated settings + // + Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd"); + Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd"); + Project.AddSvdFile ("./STM32H743.svd"); + + Project.SetDevice ("STM32H743XI"); + Project.SetHostIF ("USB", ""); + Project.SetTargetIF ("SWD"); + Project.SetTIFSpeed ("50 MHz"); + + // + // User settings + // + Project.SetTraceSource ("Trace Pins"); + Project.SetTraceTiming (100, 100, 100, 100); + Edit.SysVar (VAR_TRACE_CORE_CLOCK, 150000000); + File.Open ("/home/hathach/code/tinyusb/examples/device/cdc_msc/cmake-build-h743eval/cdc_msc.elf"); +} + +/********************************************************************* +* +* TargetReset +* +* Function description +* Replaces the default target device reset routine. Optional. +* +* Notes +* This example demonstrates the usage when +* debugging a RAM program on a Cortex-M target device +* +********************************************************************** +*/ +//void TargetReset (void) { +// +// unsigned int SP; +// unsigned int PC; +// unsigned int VectorTableAddr; +// +// Exec.Reset(); +// +// VectorTableAddr = Elf.GetBaseAddr(); +// +// if (VectorTableAddr != 0xFFFFFFFF) { +// +// Util.Log("Resetting Program."); +// +// SP = Target.ReadU32(VectorTableAddr); +// Target.SetReg("SP", SP); +// +// PC = Target.ReadU32(VectorTableAddr + 4); +// Target.SetReg("PC", PC); +// } +//} + +/********************************************************************* +* +* BeforeTargetReset +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetReset (void) { +//} + +/********************************************************************* +* +* AfterTargetReset +* +* Function description +* Event handler routine. +* - Sets the PC register to program reset value. +* - Sets the SP register to program reset value on Cortex-M. +* +********************************************************************** +*/ +void AfterTargetReset (void) { + unsigned int SP; + unsigned int PC; + unsigned int VectorTableAddr; + + VectorTableAddr = Elf.GetBaseAddr(); + + if (VectorTableAddr == 0xFFFFFFFF) { + Util.Log("Project file error: failed to get program base"); + } else { + SP = Target.ReadU32(VectorTableAddr); + Target.SetReg("SP", SP); + + PC = Target.ReadU32(VectorTableAddr + 4); + Target.SetReg("PC", PC); + } +} + +/********************************************************************* +* +* DebugStart +* +* Function description +* Replaces the default debug session startup routine. Optional. +* +********************************************************************** +*/ +//void DebugStart (void) { +//} + +/********************************************************************* +* +* TargetConnect +* +* Function description +* Replaces the default target IF connection routine. Optional. +* +********************************************************************** +*/ +//void TargetConnect (void) { +//} + +/********************************************************************* +* +* BeforeTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ + +void BeforeTargetConnect (void) { + // + // Trace pin init is done by J-Link script file as J-Link script files are IDE independent + // + //Project.SetJLinkScript("./ST_STM32H743_Traceconfig.pex"); +} + +/********************************************************************* +* +* AfterTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetConnect (void) { +//} + +/********************************************************************* +* +* TargetDownload +* +* Function description +* Replaces the default program download routine. Optional. +* +********************************************************************** +*/ +//void TargetDownload (void) { +//} + +/********************************************************************* +* +* BeforeTargetDownload +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDownload (void) { +//} + +/********************************************************************* +* +* AfterTargetDownload +* +* Function description +* Event handler routine. +* - Sets the PC register to program reset value. +* - Sets the SP register to program reset value on Cortex-M. +* +********************************************************************** +*/ +void AfterTargetDownload (void) { + unsigned int SP; + unsigned int PC; + unsigned int VectorTableAddr; + + VectorTableAddr = Elf.GetBaseAddr(); + Util.Log("___"); + if (VectorTableAddr == 0xFFFFFFFF) { + Util.Log("Project file error: failed to get program base"); + } else { + SP = Target.ReadU32(VectorTableAddr); + Target.SetReg("SP", SP); + + PC = Target.ReadU32(VectorTableAddr + 4); + Target.SetReg("PC", PC); + } +} + +/********************************************************************* +* +* BeforeTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetHalt +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetHalt (void) { +//} diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 35b2cd55b..7e0469bd8 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -56,6 +56,30 @@ void OTG_HS_IRQHandler(void) UART_HandleTypeDef UartHandle; +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ + +#ifdef TRACE_ETM +void trace_etm_init(void) { + // H7 trace pin is PE2 to PE6 + // __HAL_RCC_GPIOE_CLK_ENABLE(); + + GPIO_InitTypeDef gpio_init; + gpio_init.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6; + gpio_init.Mode = GPIO_MODE_AF_PP; + gpio_init.Pull = GPIO_PULLUP; + gpio_init.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + gpio_init.Alternate = GPIO_AF0_TRACE; + HAL_GPIO_Init(GPIOE, &gpio_init); + + // Enable trace clk, also in D1 and D3 domain + DBGMCU->CR |= DBGMCU_CR_DBG_TRACECKEN | DBGMCU_CR_DBG_CKD1EN | DBGMCU_CR_DBG_CKD3EN; +} +#else + #define etm_trace_init() +#endif + void board_init(void) { board_stm32h7_clock_init(); @@ -74,6 +98,8 @@ void board_init(void) #endif __HAL_RCC_GPIOJ_CLK_ENABLE(); + trace_etm_init(); + // Enable UART Clock UART_CLK_EN(); From 1b658ae109a9d2aa1ac2fc14393cb9d8a64ccd8a Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 20 Jun 2023 12:11:01 +0700 Subject: [PATCH 48/94] add etm trace for mcb1800 clean up other ide setting --- .gitignore | 2 ++ .idea/runConfigurations/kl25.xml | 10 ++++++ .idea/runConfigurations/lpc1857.xml | 10 ++++++ .idea/runConfigurations/mcx947.xml | 10 ++++++ .idea/runConfigurations/mcx947_jlink.xml | 10 ------ .idea/runConfigurations/rt1010.xml | 10 ++++++ .idea/runConfigurations/rt1010_jlink.xml | 10 ------ .idea/runConfigurations/rt1060.xml | 10 ++++++ .idea/runConfigurations/rt1060_jlink.xml | 10 ------ .idea/runConfigurations/stlink.xml | 10 ++++++ .idea/runConfigurations/stm32g474.xml | 10 ++++++ .idea/runConfigurations/stm32g474_jlink.xml | 10 ------ .idea/runConfigurations/stm32h743.xml | 10 ++++++ hw/bsp/lpc18/boards/mcb1800/board.h | 21 ++++++----- .../lpc18/boards/mcb1800/ozone/lpc1857.jdebug | 36 +++++++++++++++++++ hw/bsp/lpc18/family.c | 11 ++++-- .../cubemx/{board.ioc => b_g474e_dpow1.ioc} | 6 ++-- .../stm32h743eval/cubemx/stm32h743eval.ioc | 4 +-- .../{h743eval.jdebug => stm32h743.jdebug} | 14 +++----- 19 files changed, 150 insertions(+), 64 deletions(-) create mode 100644 .idea/runConfigurations/kl25.xml create mode 100644 .idea/runConfigurations/lpc1857.xml create mode 100644 .idea/runConfigurations/mcx947.xml delete mode 100644 .idea/runConfigurations/mcx947_jlink.xml create mode 100644 .idea/runConfigurations/rt1010.xml delete mode 100644 .idea/runConfigurations/rt1010_jlink.xml create mode 100644 .idea/runConfigurations/rt1060.xml delete mode 100644 .idea/runConfigurations/rt1060_jlink.xml create mode 100644 .idea/runConfigurations/stlink.xml create mode 100644 .idea/runConfigurations/stm32g474.xml delete mode 100644 .idea/runConfigurations/stm32g474_jlink.xml create mode 100644 .idea/runConfigurations/stm32h743.xml create mode 100644 hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug rename hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/{board.ioc => b_g474e_dpow1.ioc} (98%) rename hw/bsp/stm32h7/boards/stm32h743eval/ozone/{h743eval.jdebug => stm32h743.jdebug} (96%) diff --git a/.gitignore b/.gitignore index 8f5bb6efd..c665d6c73 100644 --- a/.gitignore +++ b/.gitignore @@ -21,6 +21,8 @@ _build /examples/*/*/ses /examples/*/*/ozone /examples/obsolete +hw/bsp/**/cubemx/*/ +.mxproject # coverity intermediate files cov-int # cppcheck build directories diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml new file mode 100644 index 000000000..8b0cd9e75 --- /dev/null +++ b/.idea/runConfigurations/kl25.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml new file mode 100644 index 000000000..ed7d17ca6 --- /dev/null +++ b/.idea/runConfigurations/lpc1857.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml new file mode 100644 index 000000000..ddd568bcb --- /dev/null +++ b/.idea/runConfigurations/mcx947.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml deleted file mode 100644 index 27661bec5..000000000 --- a/.idea/runConfigurations/mcx947_jlink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml new file mode 100644 index 000000000..98dea28a4 --- /dev/null +++ b/.idea/runConfigurations/rt1010.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml deleted file mode 100644 index 68ebb8885..000000000 --- a/.idea/runConfigurations/rt1010_jlink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml new file mode 100644 index 000000000..ff6ee8d84 --- /dev/null +++ b/.idea/runConfigurations/rt1060.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml deleted file mode 100644 index 014a4d1b1..000000000 --- a/.idea/runConfigurations/rt1060_jlink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml new file mode 100644 index 000000000..b3f6d15f0 --- /dev/null +++ b/.idea/runConfigurations/stlink.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml new file mode 100644 index 000000000..d461cd60e --- /dev/null +++ b/.idea/runConfigurations/stm32g474.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml deleted file mode 100644 index c33829833..000000000 --- a/.idea/runConfigurations/stm32g474_jlink.xml +++ /dev/null @@ -1,10 +0,0 @@ - - - - - - - - - \ No newline at end of file diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml new file mode 100644 index 000000000..c438422ce --- /dev/null +++ b/.idea/runConfigurations/stm32h743.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/hw/bsp/lpc18/boards/mcb1800/board.h b/hw/bsp/lpc18/boards/mcb1800/board.h index 6111da975..f10500d79 100644 --- a/hw/bsp/lpc18/boards/mcb1800/board.h +++ b/hw/bsp/lpc18/boards/mcb1800/board.h @@ -41,10 +41,8 @@ #define UART_DEV LPC_USART3 -static inline void board_lpc18_pinmux(void) -{ - const PINMUX_GRP_T pinmuxing[] = - { +static inline void board_lpc18_pinmux(void) { + const PINMUX_GRP_T pinmuxing[] = { // LEDs { 0xD, 10, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4) }, { 0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN) }, @@ -67,13 +65,21 @@ static inline void board_lpc18_pinmux(void) { 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 }, // P9_5 USB1_VBUS_EN, USB1 VBus function { 0x2, 5, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION + + // ETM Trace + #ifdef TRACE_ETM + { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + #endif }; Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); /* Pin clock mux values, re-used structure, value in first index is meaningless */ - const PINMUX_GRP_T pinclockmuxing[] = - { + const PINMUX_GRP_T pinclockmuxing[] = { { 0, 0, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)}, { 0, 1, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)}, { 0, 2, (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)}, @@ -81,8 +87,7 @@ static inline void board_lpc18_pinmux(void) }; /* Clock pins only, group field not used */ - for (uint32_t i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++) - { + for (uint32_t i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++) { Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc); } } diff --git a/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug new file mode 100644 index 000000000..6e298c62d --- /dev/null +++ b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug @@ -0,0 +1,36 @@ + +/********************************************************************* +* +* OnProjectLoad +* +* Function description +* Project load routine. Required. +* +********************************************************************** +*/ +void OnProjectLoad (void) { + Project.AddSvdFile ("Cortex-M3.svd"); + Project.AddSvdFile ("./LPC18xx.svd"); + + Project.SetDevice ("LPC1857"); + Project.SetHostIF ("USB", ""); + Project.SetTargetIF ("SWD"); + Project.SetTIFSpeed ("50 MHz"); + + Project.SetTraceSource ("Trace Pins"); + Project.SetTracePortWidth (4); + + File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-mcb1800/cdc_msc.elf"); +} +/********************************************************************* +* +* BeforeTargetConnect +* +********************************************************************** +*/ +void BeforeTargetConnect (void) { + // + // Trace pin init is done by J-Link script file as J-Link script files are IDE independent + // + // Project.SetJLinkScript("./NXP_LPC1857JET256_TraceExample.pex"); +} diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index 57f9d55da..2fd69c84b 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -69,7 +69,6 @@ void USB1_IRQHandler(void) // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ - /* System configuration variables used by chip driver */ const uint32_t OscRateIn = 12000000; const uint32_t ExtRateIn = 0; @@ -84,7 +83,15 @@ void SystemInit(void) #endif board_lpc18_pinmux(); - Chip_SetupXtalClocking(); + + #ifdef TRACE_ETM + // Trace clock is limited to 60MHz, limit CPU clock to 120MHz + Chip_SetupCoreClock(CLKIN_CRYSTAL, 120000000UL, true); + #else + // CPU clock max to 180 Mhz + Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true); + #endif + } void board_init(void) diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc similarity index 98% rename from hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc rename to hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc index 6ce126f84..c15011896 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc @@ -111,13 +111,13 @@ ProjectManager.MainLocation=Src ProjectManager.NoMain=false ProjectManager.PreviousToolchain= ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=board.ioc -ProjectManager.ProjectName=board +ProjectManager.ProjectFileName=b_g474e_dpow1.ioc +ProjectManager.ProjectName=b_g474e_dpow1 ProjectManager.ProjectStructure= ProjectManager.RegisterCallBack= ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=Makefile -ProjectManager.ToolChainLocation= +ProjectManager.ToolChainLocation=Src ProjectManager.UnderRoot=false ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_UCPD1_Init-UCPD1-false-LL-true RCC.ADC12Freq_Value=150000000 diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc index 1cc2cc8fa..331080c17 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc +++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc @@ -881,7 +881,7 @@ ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 ProjectManager.KeepUserCode=true ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=0 +ProjectManager.LibraryCopy=2 ProjectManager.MainLocation=Src ProjectManager.NoMain=false ProjectManager.PreviousToolchain= @@ -892,7 +892,7 @@ ProjectManager.ProjectStructure= ProjectManager.RegisterCallBack= ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=Makefile -ProjectManager.ToolChainLocation= +ProjectManager.ToolChainLocation=Src ProjectManager.UnderRoot=false ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,4-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true RCC.ADCFreq_Value=50390625 diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug similarity index 96% rename from hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug rename to hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug index 093951765..0ab078319 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug +++ b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug @@ -9,9 +9,6 @@ ********************************************************************** */ void OnProjectLoad (void) { - // - // Dialog-generated settings - // Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd"); Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd"); Project.AddSvdFile ("./STM32H743.svd"); @@ -21,17 +18,16 @@ void OnProjectLoad (void) { Project.SetTargetIF ("SWD"); Project.SetTIFSpeed ("50 MHz"); - // - // User settings - // Project.SetTraceSource ("Trace Pins"); + Project.SetTracePortWidth (4); + // timing delay for trace pins in pico seconds, default is 2 nano seconds Project.SetTraceTiming (100, 100, 100, 100); - Edit.SysVar (VAR_TRACE_CORE_CLOCK, 150000000); - File.Open ("/home/hathach/code/tinyusb/examples/device/cdc_msc/cmake-build-h743eval/cdc_msc.elf"); + + File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-stm32h743eval/cdc_msc.elf"); } /********************************************************************* -* +*0 * TargetReset * * Function description From 19c99d3b42276f25a84b184816a9980ee93beb8f Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 20 Jun 2023 13:19:08 +0700 Subject: [PATCH 49/94] etm trace for nrf52840 --- hw/bsp/lpc18/boards/mcb1800/board.h | 18 +- hw/bsp/nrf/boards/pca10056/board.h | 2 +- .../nrf/boards/pca10056/ozone/nrf52840.jdebug | 242 ++++++++++++++++++ hw/bsp/nrf/family.c | 25 ++ hw/bsp/stm32h7/family.c | 2 +- 5 files changed, 278 insertions(+), 11 deletions(-) create mode 100644 hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug diff --git a/hw/bsp/lpc18/boards/mcb1800/board.h b/hw/bsp/lpc18/boards/mcb1800/board.h index f10500d79..5bfaa37cd 100644 --- a/hw/bsp/lpc18/boards/mcb1800/board.h +++ b/hw/bsp/lpc18/boards/mcb1800/board.h @@ -43,6 +43,15 @@ static inline void board_lpc18_pinmux(void) { const PINMUX_GRP_T pinmuxing[] = { + // ETM Trace + #ifdef TRACE_ETM + { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, + #endif + // LEDs { 0xD, 10, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4) }, { 0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN) }, @@ -65,15 +74,6 @@ static inline void board_lpc18_pinmux(void) { { 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 }, // P9_5 USB1_VBUS_EN, USB1 VBus function { 0x2, 5, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION - - // ETM Trace - #ifdef TRACE_ETM - { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN }, - { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, - { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, - { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, - { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN }, - #endif }; Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h index 50d3067b3..f4368f830 100644 --- a/hw/bsp/nrf/boards/pca10056/board.h +++ b/hw/bsp/nrf/boards/pca10056/board.h @@ -36,7 +36,7 @@ #define LED_STATE_ON 0 // Button -#define BUTTON_PIN 11 +#define BUTTON_PIN 25 // button 4 #define BUTTON_STATE_ACTIVE 0 // UART diff --git a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug new file mode 100644 index 000000000..5b918f429 --- /dev/null +++ b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug @@ -0,0 +1,242 @@ + +/********************************************************************* +* +* OnProjectLoad +* +* Function description +* Project load routine. Required. +* +********************************************************************** +*/ +void OnProjectLoad (void) { + // Dialog-generated settings + Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M4F.svd"); + Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd"); + + Project.SetDevice ("nRF52840_xxAA"); + Project.SetHostIF ("USB", ""); + Project.SetTargetIF ("SWD"); + Project.SetTIFSpeed ("8 MHz"); + Project.SetTraceSource ("Trace Pins"); + Project.SetTracePortWidth (4); + + // User settings + File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10056/cdc_msc.elf"); +} + +/********************************************************************* +* +* TargetReset +* +* Function description +* Replaces the default target device reset routine. Optional. +* +* Notes +* This example demonstrates the usage when +* debugging a RAM program on a Cortex-M target device +* +********************************************************************** +*/ +//void TargetReset (void) { +// +// unsigned int SP; +// unsigned int PC; +// unsigned int VectorTableAddr; +// +// Exec.Reset(); +// +// VectorTableAddr = Elf.GetBaseAddr(); +// +// if (VectorTableAddr != 0xFFFFFFFF) { +// +// Util.Log("Resetting Program."); +// +// SP = Target.ReadU32(VectorTableAddr); +// Target.SetReg("SP", SP); +// +// PC = Target.ReadU32(VectorTableAddr + 4); +// Target.SetReg("PC", PC); +// } +//} + +/********************************************************************* +* +* BeforeTargetReset +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetReset (void) { +//} + +/********************************************************************* +* +* AfterTargetReset +* +* Function description +* Event handler routine. +* - Sets the PC register to program reset value. +* - Sets the SP register to program reset value on Cortex-M. +* +********************************************************************** +*/ +void AfterTargetReset (void) { + unsigned int SP; + unsigned int PC; + unsigned int VectorTableAddr; + + VectorTableAddr = Elf.GetBaseAddr(); + + if (VectorTableAddr == 0xFFFFFFFF) { + Util.Log("Project file error: failed to get program base"); + } else { + SP = Target.ReadU32(VectorTableAddr); + Target.SetReg("SP", SP); + + PC = Target.ReadU32(VectorTableAddr + 4); + Target.SetReg("PC", PC); + } +} + +/********************************************************************* +* +* DebugStart +* +* Function description +* Replaces the default debug session startup routine. Optional. +* +********************************************************************** +*/ +//void DebugStart (void) { +//} + +/********************************************************************* +* +* TargetConnect +* +* Function description +* Replaces the default target IF connection routine. Optional. +* +********************************************************************** +*/ +//void TargetConnect (void) { +//} + +/********************************************************************* +* +* BeforeTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +void BeforeTargetConnect (void) { + // + // Trace pin init is done by J-Link script file as J-Link script files are IDE independent + // + Project.SetJLinkScript("./Nordic_nRF52840_TraceExample.pex"); +} + +/********************************************************************* +* +* AfterTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetConnect (void) { +//} + +/********************************************************************* +* +* TargetDownload +* +* Function description +* Replaces the default program download routine. Optional. +* +********************************************************************** +*/ +//void TargetDownload (void) { +//} + +/********************************************************************* +* +* BeforeTargetDownload +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDownload (void) { +//} + +/********************************************************************* +* +* AfterTargetDownload +* +* Function description +* Event handler routine. +* - Sets the PC register to program reset value. +* - Sets the SP register to program reset value on Cortex-M. +* +********************************************************************** +*/ +void AfterTargetDownload (void) { + unsigned int SP; + unsigned int PC; + unsigned int VectorTableAddr; + + VectorTableAddr = Elf.GetBaseAddr(); + + if (VectorTableAddr == 0xFFFFFFFF) { + Util.Log("Project file error: failed to get program base"); + } else { + SP = Target.ReadU32(VectorTableAddr); + Target.SetReg("SP", SP); + + PC = Target.ReadU32(VectorTableAddr + 4); + Target.SetReg("PC", PC); + } +} + +/********************************************************************* +* +* BeforeTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetHalt +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetHalt (void) { +//} diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 6a559ada6..5a4730f09 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -93,8 +93,33 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) tusb_hal_nrf_power_event((uint32_t) event); } +#ifdef TRACE_ETM +void trace_etm_init(void) { + #ifdef NRF52840_XXAA + // Trace clk: P0.7, Trace D0..D3: P1.0, P0.11, P0.12, P1.09 + // Setting drive strength to H0H1 + uint32_t const pin_cnf = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | + (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos); + NRF_P0->PIN_CNF[ 7] = pin_cnf; // CLK + NRF_P1->PIN_CNF[ 0] = pin_cnf; // D0 + NRF_P0->PIN_CNF[11] = pin_cnf; // D1 + NRF_P0->PIN_CNF[12] = pin_cnf; // D2 + NRF_P1->PIN_CNF[ 9] = pin_cnf; // D3 + + // trace clock = 16 Mhz, Trace mux = parallel + NRF_CLOCK->TRACECONFIG = (CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) | + (CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos); + #endif +} +#else + +#define trace_etm_init() +#endif + void board_init(void) { + trace_etm_init(); + // stop LF clock just in case we jump from application without reset NRF_CLOCK->TASKS_LFCLKSTOP = 1UL; diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 7e0469bd8..eb4ac841e 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -77,7 +77,7 @@ void trace_etm_init(void) { DBGMCU->CR |= DBGMCU_CR_DBG_TRACECKEN | DBGMCU_CR_DBG_CKD1EN | DBGMCU_CR_DBG_CKD3EN; } #else - #define etm_trace_init() + #define trace_etm_init() #endif void board_init(void) From c789cfe518168c7e6e02cd6d4111de9a52b0a8e4 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 20 Jun 2023 16:13:10 +0700 Subject: [PATCH 50/94] use system_nrf5x.c built-in support for ETM with ENABLE_ETM --- .../nrf/boards/pca10056/ozone/nrf52840.jdebug | 4 - .../nrf/boards/pca10095/ozone/nrf5340.jdebug | 335 ++++++++++++++++++ hw/bsp/nrf/family.c | 25 -- hw/bsp/nrf/family.cmake | 6 + 4 files changed, 341 insertions(+), 29 deletions(-) create mode 100644 hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug diff --git a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug index 5b918f429..fa7ab9e23 100644 --- a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug +++ b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug @@ -134,10 +134,6 @@ void AfterTargetReset (void) { ********************************************************************** */ void BeforeTargetConnect (void) { - // - // Trace pin init is done by J-Link script file as J-Link script files are IDE independent - // - Project.SetJLinkScript("./Nordic_nRF52840_TraceExample.pex"); } /********************************************************************* diff --git a/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug b/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug new file mode 100644 index 000000000..4ad0376a4 --- /dev/null +++ b/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug @@ -0,0 +1,335 @@ +/********************************************************************* +* (c) SEGGER Microcontroller GmbH * +* The Embedded Experts * +* www.segger.com * +********************************************************************** + +File : +Created : 30 Jun 2021 13:37 +Ozone Version : V3.24a +*/ + +/********************************************************************* +* +* OnProjectLoad +* +* Function description +* Project load routine. Required. +* +********************************************************************** +*/ +void OnProjectLoad (void) { + // Dialog-generated settings + Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M33F.svd"); + Project.AddSvdFile ("./nrf5340_application.svd"); + Project.SetDevice ("nRF5340_xxAA_APP"); + Project.SetHostIF ("USB", ""); + Project.SetTargetIF ("SWD"); + Project.SetTIFSpeed ("16 MHz"); + + Project.SetTraceSource ("Trace Pins"); + Project.SetTracePortWidth (4); + + // User settings + File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10095/cdc_msc.elf"); +} + +/********************************************************************* +* +* OnStartupComplete +* +* Function description +* Called when program execution has reached/passed +* the startup completion point. Optional. +* +********************************************************************** +*/ +//void OnStartupComplete (void) { +//} + +/********************************************************************* +* +* TargetReset +* +* Function description +* Replaces the default target device reset routine. Optional. +* +* Notes +* This example demonstrates the usage when +* debugging an application in RAM on a Cortex-M target device. +* +********************************************************************** +*/ +//void TargetReset (void) { +// +// unsigned int SP; +// unsigned int PC; +// unsigned int VectorTableAddr; +// +// VectorTableAddr = Elf.GetBaseAddr(); +// // +// // Set up initial stack pointer +// // +// if (VectorTableAddr != 0xFFFFFFFF) { +// SP = Target.ReadU32(VectorTableAddr); +// Target.SetReg("SP", SP); +// } +// // +// // Set up entry point PC +// // +// PC = Elf.GetEntryPointPC(); +// +// if (PC != 0xFFFFFFFF) { +// Target.SetReg("PC", PC); +// } else if (VectorTableAddr != 0xFFFFFFFF) { +// PC = Target.ReadU32(VectorTableAddr + 4); +// Target.SetReg("PC", PC); +// } else { +// Util.Error("Project file error: failed to set entry point PC", 1); +// } +//} + +/********************************************************************* +* +* BeforeTargetReset +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetReset (void) { +//} + +/********************************************************************* +* +* AfterTargetReset +* +* Function description +* Event handler routine. Optional. +* The default implementation initializes SP and PC to reset values. +** +********************************************************************** +*/ +void AfterTargetReset (void) { + _SetupTarget(); +} + +/********************************************************************* +* +* DebugStart +* +* Function description +* Replaces the default debug session startup routine. Optional. +* +********************************************************************** +*/ +//void DebugStart (void) { +//} + +/********************************************************************* +* +* TargetConnect +* +* Function description +* Replaces the default target IF connection routine. Optional. +* +********************************************************************** +*/ +//void TargetConnect (void) { +//} + +/********************************************************************* +* +* BeforeTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +void BeforeTargetConnect (void) { +} + +/********************************************************************* +* +* AfterTargetConnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetConnect (void) { +//} + +/********************************************************************* +* +* TargetDownload +* +* Function description +* Replaces the default program download routine. Optional. +* +********************************************************************** +*/ +//void TargetDownload (void) { +//} + +/********************************************************************* +* +* BeforeTargetDownload +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDownload (void) { +//} + +/********************************************************************* +* +* AfterTargetDownload +* +* Function description +* Event handler routine. Optional. +* The default implementation initializes SP and PC to reset values. +* +********************************************************************** +*/ +void AfterTargetDownload (void) { + _SetupTarget(); +} + +/********************************************************************* +* +* BeforeTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetDisconnect +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetDisconnect (void) { +//} + +/********************************************************************* +* +* AfterTargetHalt +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void AfterTargetHalt (void) { +//} + +/********************************************************************* +* +* BeforeTargetResume +* +* Function description +* Event handler routine. Optional. +* +********************************************************************** +*/ +//void BeforeTargetResume (void) { +//} + +/********************************************************************* +* +* OnSnapshotLoad +* +* Function description +* Called upon loading a snapshot. Optional. +* +* Additional information +* This function is used to restore the target state in cases +* where values cannot simply be written to the target. +* Typical use: GPIO clock needs to be enabled, before +* GPIO is configured. +* +********************************************************************** +*/ +//void OnSnapshotLoad (void) { +//} + +/********************************************************************* +* +* OnSnapshotSave +* +* Function description +* Called upon saving a snapshot. Optional. +* +* Additional information +* This function is usually used to save values of the target +* state which can either not be trivially read, +* or need to be restored in a specific way or order. +* Typically use: Memory Mapped Registers, +* such as PLL and GPIO configuration. +* +********************************************************************** +*/ +//void OnSnapshotSave (void) { +//} + +/********************************************************************* +* +* OnError +* +* Function description +* Called when an error occurred. Optional. +* +********************************************************************** +*/ +//void OnError (void) { +//} + +/********************************************************************* +* +* _SetupTarget +* +* Function description +* Setup the target. +* Called by AfterTargetReset() and AfterTargetDownload(). +* +* Auto-generated function. May be overridden by Ozone. +* +********************************************************************** +*/ +void _SetupTarget(void) { + unsigned int SP; + unsigned int PC; + unsigned int VectorTableAddr; + + VectorTableAddr = Elf.GetBaseAddr(); + // + // Set up initial stack pointer + // + SP = Target.ReadU32(VectorTableAddr); + if (SP != 0xFFFFFFFF) { + Target.SetReg("SP", SP); + } + // + // Set up entry point PC + // + PC = Elf.GetEntryPointPC(); + if (PC != 0xFFFFFFFF) { + Target.SetReg("PC", PC); + } else { + Util.Error("Project script error: failed to set up entry point PC", 1); + } +} diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 5a4730f09..6a559ada6 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -93,33 +93,8 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) tusb_hal_nrf_power_event((uint32_t) event); } -#ifdef TRACE_ETM -void trace_etm_init(void) { - #ifdef NRF52840_XXAA - // Trace clk: P0.7, Trace D0..D3: P1.0, P0.11, P0.12, P1.09 - // Setting drive strength to H0H1 - uint32_t const pin_cnf = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | - (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos); - NRF_P0->PIN_CNF[ 7] = pin_cnf; // CLK - NRF_P1->PIN_CNF[ 0] = pin_cnf; // D0 - NRF_P0->PIN_CNF[11] = pin_cnf; // D1 - NRF_P0->PIN_CNF[12] = pin_cnf; // D2 - NRF_P1->PIN_CNF[ 9] = pin_cnf; // D3 - - // trace clock = 16 Mhz, Trace mux = parallel - NRF_CLOCK->TRACECONFIG = (CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) | - (CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos); - #endif -} -#else - -#define trace_etm_init() -#endif - void board_init(void) { - trace_etm_init(); - // stop LF clock just in case we jump from application without reset NRF_CLOCK->TASKS_LFCLKSTOP = 1UL; diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 88670b50b..825380d0b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -46,6 +46,12 @@ function(add_board_target BOARD_TARGET) target_compile_definitions(${BOARD_TARGET} PUBLIC CONFIG_GPIO_AS_PINRESET ) + + if (TRACE_ETM STREQUAL "1") + # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace + target_compile_definitions(${BOARD_TARGET} PUBLIC ENABLE_TRACE) + endif () + target_include_directories(${BOARD_TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR} ${NRFX_DIR} From 77e01448e2047ede1f2b2c8a52609a0ee48a6b13 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 20 Jun 2023 16:41:51 +0700 Subject: [PATCH 51/94] ide settings --- .idea/cmake.xml | 9 +++++---- .idea/runConfigurations/kl25.xml | 2 +- .idea/runConfigurations/lpc1857.xml | 2 +- .idea/runConfigurations/mcx947.xml | 2 +- .idea/runConfigurations/nrf52840.xml | 10 ++++++++++ .idea/runConfigurations/nrf5340.xml | 10 ++++++++++ .idea/runConfigurations/rt1010.xml | 2 +- .idea/runConfigurations/rt1060.xml | 2 +- .idea/runConfigurations/stlink.xml | 2 +- .idea/runConfigurations/stm32g474.xml | 2 +- .idea/runConfigurations/stm32h743.xml | 4 ++-- 11 files changed, 34 insertions(+), 13 deletions(-) create mode 100644 .idea/runConfigurations/nrf52840.xml create mode 100644 .idea/runConfigurations/nrf5340.xml diff --git a/.idea/cmake.xml b/.idea/cmake.xml index c9024715c..0f7649efc 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,9 +2,9 @@ - - - + + + @@ -29,7 +29,7 @@ - + @@ -38,6 +38,7 @@ + \ No newline at end of file diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml index 8b0cd9e75..add9a0d6b 100644 --- a/.idea/runConfigurations/kl25.xml +++ b/.idea/runConfigurations/kl25.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml index ed7d17ca6..f377d86f2 100644 --- a/.idea/runConfigurations/lpc1857.xml +++ b/.idea/runConfigurations/lpc1857.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml index ddd568bcb..038c87421 100644 --- a/.idea/runConfigurations/mcx947.xml +++ b/.idea/runConfigurations/mcx947.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/nrf52840.xml b/.idea/runConfigurations/nrf52840.xml new file mode 100644 index 000000000..66473cc0e --- /dev/null +++ b/.idea/runConfigurations/nrf52840.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/nrf5340.xml b/.idea/runConfigurations/nrf5340.xml new file mode 100644 index 000000000..403095d70 --- /dev/null +++ b/.idea/runConfigurations/nrf5340.xml @@ -0,0 +1,10 @@ + + + + + + + + + \ No newline at end of file diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml index 98dea28a4..6fabd8561 100644 --- a/.idea/runConfigurations/rt1010.xml +++ b/.idea/runConfigurations/rt1010.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml index ff6ee8d84..218c2dfbc 100644 --- a/.idea/runConfigurations/rt1060.xml +++ b/.idea/runConfigurations/rt1060.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml index b3f6d15f0..c27392ca5 100644 --- a/.idea/runConfigurations/stlink.xml +++ b/.idea/runConfigurations/stlink.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml index d461cd60e..bbab2a5c5 100644 --- a/.idea/runConfigurations/stm32g474.xml +++ b/.idea/runConfigurations/stm32g474.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml index c438422ce..7581ddf9b 100644 --- a/.idea/runConfigurations/stm32h743.xml +++ b/.idea/runConfigurations/stm32h743.xml @@ -1,6 +1,6 @@ - - + + From edbf06aaab9ac7cf098f1170a7a9861f5cf3572e Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 17:35:37 +0700 Subject: [PATCH 52/94] separate iar and gcc build for clean make, also add cpu specific make --- examples/device/cdc_msc/Makefile | 6 +- examples/make.mk | 89 ++++------------ examples/rules.mk | 144 ++------------------------ hw/bsp/stm32h7/family.mk | 13 +-- src/tinyusb.mk | 19 ++++ tools/make/cpu/cortex-m7.mk | 13 ++- tools/make/toolchain/arm_gcc.mk | 77 ++++++++++++++ tools/make/toolchain/arm_gcc_rules.mk | 78 ++++++++++++++ tools/make/toolchain/arm_iar.mk | 13 +++ tools/make/toolchain/arm_iar_rules.mk | 44 ++++++++ 10 files changed, 275 insertions(+), 221 deletions(-) create mode 100644 src/tinyusb.mk create mode 100644 tools/make/toolchain/arm_gcc.mk create mode 100644 tools/make/toolchain/arm_gcc_rules.mk create mode 100644 tools/make/toolchain/arm_iar.mk create mode 100644 tools/make/toolchain/arm_iar_rules.mk diff --git a/examples/device/cdc_msc/Makefile b/examples/device/cdc_msc/Makefile index da088ea6b..429959e70 100644 --- a/examples/device/cdc_msc/Makefile +++ b/examples/device/cdc_msc/Makefile @@ -5,7 +5,11 @@ INC += \ $(TOP)/hw \ # Example source -EXAMPLE_SOURCE += $(wildcard src/*.c) +EXAMPLE_SOURCE += \ + src/main.c \ + src/msc_disk.c \ + src/usb_descriptors.c \ + SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE)) include ../../rules.mk diff --git a/examples/make.mk b/examples/make.mk index 28ebc62da..4fcde83c8 100644 --- a/examples/make.mk +++ b/examples/make.mk @@ -2,6 +2,7 @@ # Common make definition for all examples # --------------------------------------- +# Supported toolchain: gcc, iar TOOLCHAIN ?= gcc #-------------- TOP and CURRENT_PATH ------------ @@ -32,13 +33,6 @@ CMDEXE := 1 SHELL := cmd.exe endif - -# Build directory -BUILD := _build/$(BOARD) - -PROJECT := $(notdir $(CURDIR)) -BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR)) - # Handy check parameter function check_defined = \ $(strip $(foreach 1,$1, \ @@ -47,6 +41,13 @@ __check_defined = \ $(if $(value $1),, \ $(error Undefined make flag: $1$(if $2, ($2)))) + +# Build directory +BUILD := _build/$(BOARD) + +PROJECT := $(notdir $(CURDIR)) +BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR)) + #-------------- Select the board to build for. ------------ # Board without family @@ -81,25 +82,12 @@ endif # Can be set by board, default to ARM GCC CROSS_COMPILE ?= arm-none-eabi- -ifeq ($(CC),iccarm) -USE_IAR = 1 +ifeq ($(TOOLCHAIN),iar) +CC := iccarm endif -ifdef USE_IAR - AS = iasmarm - LD = ilinkarm - OBJCOPY = ielftool - SIZE = size - -else - CC = $(CROSS_COMPILE)gcc - CXX = $(CROSS_COMPILE)g++ - AS = $(CC) -x assembler-with-cpp - LD = $(CC) - - GDB = $(CROSS_COMPILE)gdb - OBJCOPY = $(CROSS_COMPILE)objcopy - SIZE = $(CROSS_COMPILE)size +ifeq ($(CC),iccarm) +USE_IAR = 1 endif ifeq ($(CMDEXE),1) @@ -115,57 +103,19 @@ else endif #-------------- Source files and compiler flags -------------- +# tinyusb makefile +include $(TOP)/src/tinyusb.mk # Include all source C in family & board folder SRC_C += hw/bsp/board.c SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c)) -INC += $(TOP)/$(FAMILY_PATH) +SRC_C += $(TINYUSB_SRC_C) -# Allow for -Os to be changed by board makefiles in case -Os is not allowed -CFLAGS_OPTIMIZED ?= -Os +INC += \ + $(TOP)/$(FAMILY_PATH) \ + $(TOP)/src \ -# GCC Compiler Flags -GCC_CFLAGS += \ - -ggdb \ - -fdata-sections \ - -ffunction-sections \ - -fsingle-precision-constant \ - -fno-strict-aliasing \ - -Wall \ - -Wextra \ - -Werror \ - -Wfatal-errors \ - -Wdouble-promotion \ - -Wstrict-prototypes \ - -Wstrict-overflow \ - -Werror-implicit-function-declaration \ - -Wfloat-equal \ - -Wundef \ - -Wshadow \ - -Wwrite-strings \ - -Wsign-compare \ - -Wmissing-format-attribute \ - -Wunreachable-code \ - -Wcast-align \ - -Wcast-function-type \ - -Wcast-qual \ - -Wnull-dereference \ - -Wuninitialized \ - -Wunused \ - -Wreturn-type \ - -Wredundant-decls - -# conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion -# -Wconversion - -# Debugging/Optimization -ifeq ($(DEBUG), 1) - GCC_CFLAGS += -O0 - NO_LTO = 1 -else - GCC_CFLAGS += $(CFLAGS_OPTIMIZED) -endif # Log level is mapped to TUSB DEBUG option ifneq ($(LOG),) @@ -186,3 +136,6 @@ ifeq ($(LOGGER),rtt) else ifeq ($(LOGGER),swo) CFLAGS += -DLOGGER_SWO endif + +# toolchain specific +include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN).mk diff --git a/examples/rules.mk b/examples/rules.mk index 5727ab7e3..e50c0ec7d 100644 --- a/examples/rules.mk +++ b/examples/rules.mk @@ -13,87 +13,8 @@ ifeq (,$(findstring $(FAMILY),espressif rp2040)) # Compiler Flags # --------------------------------------- -LIBS_GCC ?= -lgcc -lm -lnosys - -# libc -LIBS += $(LIBS_GCC) - -ifneq ($(BOARD), spresense) -LIBS += -lc -endif - -# TinyUSB Stack source -SRC_C += \ - src/tusb.c \ - src/common/tusb_fifo.c \ - src/device/usbd.c \ - src/device/usbd_control.c \ - src/typec/usbc.c \ - src/class/audio/audio_device.c \ - src/class/cdc/cdc_device.c \ - src/class/dfu/dfu_device.c \ - src/class/dfu/dfu_rt_device.c \ - src/class/hid/hid_device.c \ - src/class/midi/midi_device.c \ - src/class/msc/msc_device.c \ - src/class/net/ecm_rndis_device.c \ - src/class/net/ncm_device.c \ - src/class/usbtmc/usbtmc_device.c \ - src/class/video/video_device.c \ - src/class/vendor/vendor_device.c - -# TinyUSB stack include -INC += $(TOP)/src - CFLAGS += $(addprefix -I,$(INC)) -ifdef USE_IAR - -SRC_S += $(IAR_SRC_S) - -ASFLAGS := $(CFLAGS) $(IAR_ASFLAGS) $(ASFLAGS) -S -IAR_LDFLAGS += --config $(TOP)/$(IAR_LD_FILE) -CFLAGS += $(IAR_CFLAGS) -e --debug --silent - -else - -SRC_S += $(GCC_SRC_S) - -CFLAGS += $(GCC_CFLAGS) -MD - -# LTO makes it difficult to analyze map file for optimizing size purpose -# We will run this option in ci -ifeq ($(NO_LTO),1) -CFLAGS := $(filter-out -flto,$(CFLAGS)) -endif - -ifneq ($(CFLAGS_SKIP),) -CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS)) -endif - -LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections - -# Some toolchain such as renesas rx does not support --print-memory-usage flags -ifneq ($(FAMILY),rx) -LDFLAGS += -Wl,--print-memory-usage -endif - -ifdef LD_FILE -LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE) -endif - -ifdef GCC_LD_FILE -LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE) -endif - -ifneq ($(SKIP_NANOLIB), 1) -LDFLAGS += --specs=nosys.specs --specs=nano.specs -endif - -ASFLAGS += $(CFLAGS) - -endif # USE_IAR - # Verbose mode ifeq ("$(V)","1") $(info CFLAGS $(CFLAGS) ) $(info ) @@ -101,15 +22,6 @@ $(info LDFLAGS $(LDFLAGS)) $(info ) $(info ASFLAGS $(ASFLAGS)) $(info ) endif -# Assembly files can be name with upper case .S, convert it to .s -SRC_S := $(SRC_S:.S=.s) - -# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966 -# assembly file should be placed first in linking order -# '_asm' suffix is added to object of assembly file -OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o)) -OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) - # --------------------------------------- # Rules # --------------------------------------- @@ -118,15 +30,6 @@ all: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex size uf2: $(BUILD)/$(PROJECT).uf2 -OBJ_DIRS = $(sort $(dir $(OBJ))) -$(OBJ): | $(OBJ_DIRS) -$(OBJ_DIRS): -ifeq ($(CMDEXE),1) - -@$(MKDIR) $(subst /,\,$@) -else - @$(MKDIR) -p $@ -endif - # We set vpath to point to the top of the tree so that the source files # can be located. By following this scheme, it allows a single build rule # to be used to compile all .c files. @@ -134,49 +37,16 @@ vpath %.c . $(TOP) vpath %.s . $(TOP) vpath %.S . $(TOP) -# Compile .c file -$(BUILD)/obj/%.o: %.c - @echo CC $(notdir $@) - @$(CC) $(CFLAGS) -c -o $@ $< +include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN)_rules.mk -# ASM sources lower case .s -$(BUILD)/obj/%_asm.o: %.s - @echo AS $(notdir $@) - @$(AS) $(ASFLAGS) -c -o $@ $< - -# ASM sources upper case .S -$(BUILD)/obj/%_asm.o: %.S - @echo AS $(notdir $@) - @$(AS) $(ASFLAGS) -c -o $@ $< - -ifdef USE_IAR -# IAR Compiler -$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf - @echo CREATE $@ - @$(OBJCOPY) --silent --bin $^ $@ - -$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf - @echo CREATE $@ - @$(OBJCOPY) --silent --ihex $^ $@ - -$(BUILD)/$(PROJECT).elf: $(OBJ) - @echo LINK $@ - @$(LD) -o $@ $(IAR_LDFLAGS) $^ +OBJ_DIRS = $(sort $(dir $(OBJ))) +$(OBJ): | $(OBJ_DIRS) +$(OBJ_DIRS): +ifeq ($(CMDEXE),1) + -@$(MKDIR) $(subst /,\,$@) else -# GCC based compiler -$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf - @echo CREATE $@ - @$(OBJCOPY) -O binary $^ $@ - -$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf - @echo CREATE $@ - @$(OBJCOPY) -O ihex $^ $@ - -$(BUILD)/$(PROJECT).elf: $(OBJ) - @echo LINK $@ - @$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group - + @$(MKDIR) -p $@ endif # UF2 generation, iMXRT need to strip to text only before conversion diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index c11240207..48730bbb4 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m7 # -------------- # Compiler Flags @@ -29,20 +30,11 @@ endif # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m7 \ - -mfloat-abi=hard \ - -mfpu=fpv5-d16 \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter -# IAR Flags -IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 -IAR_ASFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 - # ----------------- # Sources & Include # ----------------- @@ -66,6 +58,3 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 diff --git a/src/tinyusb.mk b/src/tinyusb.mk new file mode 100644 index 000000000..85052f90f --- /dev/null +++ b/src/tinyusb.mk @@ -0,0 +1,19 @@ +# C source files +TINYUSB_SRC_C += \ + src/tusb.c \ + src/common/tusb_fifo.c \ + src/device/usbd.c \ + src/device/usbd_control.c \ + src/typec/usbc.c \ + src/class/audio/audio_device.c \ + src/class/cdc/cdc_device.c \ + src/class/dfu/dfu_device.c \ + src/class/dfu/dfu_rt_device.c \ + src/class/hid/hid_device.c \ + src/class/midi/midi_device.c \ + src/class/msc/msc_device.c \ + src/class/net/ecm_rndis_device.c \ + src/class/net/ncm_device.c \ + src/class/usbtmc/usbtmc_device.c \ + src/class/video/video_device.c \ + src/class/vendor/vendor_device.c \ diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk index 504ffd486..0e53cbe9c 100644 --- a/tools/make/cpu/cortex-m7.mk +++ b/tools/make/cpu/cortex-m7.mk @@ -5,8 +5,15 @@ ifeq ($(TOOLCHAIN),gcc) -mfloat-abi=hard \ -mfpu=fpv5-d16 \ - #set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "") - FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 else ifeq ($(TOOLCHAIN),iar) - # TODO support IAR + CFLAGS += \ + --cpu cortex-m7 \ + --fpu VFPv5_D16 \ + + ASFLAGS += \ + --cpu cortex-m7 \ + --fpu VFPv5_D16 \ + endif + +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk new file mode 100644 index 000000000..d5ee98def --- /dev/null +++ b/tools/make/toolchain/arm_gcc.mk @@ -0,0 +1,77 @@ +# makefile for arm gcc toolchain + +CC = $(CROSS_COMPILE)gcc +CXX = $(CROSS_COMPILE)g++ +AS = $(CC) -x assembler-with-cpp +LD = $(CC) + +GDB = $(CROSS_COMPILE)gdb +OBJCOPY = $(CROSS_COMPILE)objcopy +SIZE = $(CROSS_COMPILE)size + +# CPU specific flags +include $(TOP)/tools/make/cpu/$(CPU_CORE).mk + +# --------------------------------------- +# Compiler Flags +# --------------------------------------- +CFLAGS += \ + -MD \ + -ggdb \ + -fdata-sections \ + -ffunction-sections \ + -fsingle-precision-constant \ + -fno-strict-aliasing \ + -Wall \ + -Wextra \ + -Werror \ + -Wfatal-errors \ + -Wdouble-promotion \ + -Wstrict-prototypes \ + -Wstrict-overflow \ + -Werror-implicit-function-declaration \ + -Wfloat-equal \ + -Wundef \ + -Wshadow \ + -Wwrite-strings \ + -Wsign-compare \ + -Wmissing-format-attribute \ + -Wunreachable-code \ + -Wcast-align \ + -Wcast-function-type \ + -Wcast-qual \ + -Wnull-dereference \ + -Wuninitialized \ + -Wunused \ + -Wreturn-type \ + -Wredundant-decls \ + +# conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion +# -Wconversion + +# Size Optimization as default +CFLAGS_OPTIMIZED ?= -Os + +# Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -O0 + NO_LTO = 1 +else + CFLAGS += $(CFLAGS_OPTIMIZED) +endif + +# --------------------------------------- +# Linker Flags +# --------------------------------------- +LDFLAGS += \ + -Wl,-Map=$@.map \ + -Wl,-cref \ + -Wl,-gc-sections \ + +# Some toolchain such as renesas rx does not support --print-memory-usage flags +ifneq ($(FAMILY),rx) +LDFLAGS += -Wl,--print-memory-usage +endif + +LDFLAGS += \ + -Wl,--print-memory-usage \ diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk new file mode 100644 index 000000000..a39caf351 --- /dev/null +++ b/tools/make/toolchain/arm_gcc_rules.mk @@ -0,0 +1,78 @@ +SRC_S += $(GCC_SRC_S) + +# Assembly files can be name with upper case .S, convert it to .s +SRC_S := $(SRC_S:.S=.s) + +# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966 +# assembly file should be placed first in linking order +# '_asm' suffix is added to object of assembly file +OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o)) +OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) + +CFLAGS += $(GCC_CFLAGS) -MD + +# LTO makes it difficult to analyze map file for optimizing size purpose +# We will run this option in ci +ifeq ($(NO_LTO),1) +CFLAGS := $(filter-out -flto,$(CFLAGS)) +endif + +ifneq ($(CFLAGS_SKIP),) +CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS)) +endif + +LDFLAGS += $(CFLAGS) + +ifdef LD_FILE +LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE) +endif + +ifdef GCC_LD_FILE +LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE) +endif + +ifneq ($(SKIP_NANOLIB), 1) +LDFLAGS += --specs=nosys.specs --specs=nano.specs +endif + +ASFLAGS += $(CFLAGS) + +LIBS_GCC ?= -lgcc -lm -lnosys + +# libc +LIBS += $(LIBS_GCC) + +ifneq ($(BOARD), spresense) +LIBS += -lc +endif + +# --------------------------------------- +# Rules +# --------------------------------------- + +# Compile .c file +$(BUILD)/obj/%.o: %.c + @echo CC $(notdir $@) + @$(CC) $(CFLAGS) -c -o $@ $< + +# ASM sources lower case .s +$(BUILD)/obj/%_asm.o: %.s + @echo AS $(notdir $@) + @$(AS) $(ASFLAGS) -c -o $@ $< + +# ASM sources upper case .S +$(BUILD)/obj/%_asm.o: %.S + @echo AS $(notdir $@) + @$(AS) $(ASFLAGS) -c -o $@ $< + +$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + @$(OBJCOPY) -O binary $^ $@ + +$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + @$(OBJCOPY) -O ihex $^ $@ + +$(BUILD)/$(PROJECT).elf: $(OBJ) + @echo LINK $@ + @$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk new file mode 100644 index 000000000..42b31cfd3 --- /dev/null +++ b/tools/make/toolchain/arm_iar.mk @@ -0,0 +1,13 @@ +# makefile for arm iar toolchain +AS = iasmarm +LD = ilinkarm +OBJCOPY = ielftool --silent +SIZE = size + +include $(TOP)/tools/make/cpu/$(CPU_CORE).mk + +# Enable extension mode (gcc compatible) +CFLAGS += -e --debug --silent + +# silent mode +ASFLAGS += -S diff --git a/tools/make/toolchain/arm_iar_rules.mk b/tools/make/toolchain/arm_iar_rules.mk new file mode 100644 index 000000000..4b5cc90e3 --- /dev/null +++ b/tools/make/toolchain/arm_iar_rules.mk @@ -0,0 +1,44 @@ +SRC_S += $(IAR_SRC_S) + +# Assembly files can be name with upper case .S, convert it to .s +SRC_S := $(SRC_S:.S=.s) + +# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966 +# assembly file should be placed first in linking order +# '_asm' suffix is added to object of assembly file +OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o)) +OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) + +# Linker script +LDFLAGS += --config $(TOP)/$(IAR_LD_FILE) + +# --------------------------------------- +# Rules +# --------------------------------------- + +# Compile .c file +$(BUILD)/obj/%.o: %.c + @echo CC $(notdir $@) + @$(CC) $(CFLAGS) -c -o $@ $< + +# ASM sources lower case .s +$(BUILD)/obj/%_asm.o: %.s + @echo AS $(notdir $@) + @$(AS) $(ASFLAGS) -c -o $@ $< + +# ASM sources upper case .S +$(BUILD)/obj/%_asm.o: %.S + @echo AS $(notdir $@) + @$(AS) $(ASFLAGS) -c -o $@ $< + +$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + @$(OBJCOPY) --bin $^ $@ + +$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf + @echo CREATE $@ + @$(OBJCOPY) --ihex $^ $@ + +$(BUILD)/$(PROJECT).elf: $(OBJ) + @echo LINK $@ + @$(LD) -o $@ $(LDFLAGS) $^ From dbf7534cd4bcc3a11c1159a42f252d4166bf3afb Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 18:09:05 +0700 Subject: [PATCH 53/94] update all stm32 to use new enhance make --- hw/bsp/stm32f0/family.mk | 12 +----------- hw/bsp/stm32f1/family.mk | 15 +-------------- .../boards/stm32f207nucleo/stm32f207nucleo.c | 2 +- hw/bsp/stm32f2/family.mk | 14 +++++--------- hw/bsp/stm32f3/family.mk | 9 +-------- hw/bsp/stm32f4/family.mk | 13 +------------ hw/bsp/stm32f7/family.mk | 13 +------------ hw/bsp/stm32g0/family.mk | 12 +----------- hw/bsp/stm32g4/family.mk | 13 +------------ hw/bsp/stm32l0/family.mk | 8 +------- hw/bsp/stm32l4/family.mk | 13 +------------ hw/bsp/stm32u5/family.mk | 10 +--------- hw/bsp/stm32wb/family.mk | 9 +-------- tools/make/cpu/cortex-m0.mk | 14 ++++++++++++++ tools/make/cpu/cortex-m0plus.mk | 14 ++++++++++++++ tools/make/cpu/cortex-m3.mk | 17 +++++++++++++++++ tools/make/cpu/cortex-m33.mk | 14 +++++++++----- tools/make/cpu/cortex-m4.mk | 7 ++++--- 18 files changed, 75 insertions(+), 134 deletions(-) create mode 100644 tools/make/cpu/cortex-m0.mk create mode 100644 tools/make/cpu/cortex-m0plus.mk create mode 100644 tools/make/cpu/cortex-m3.mk diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk index 08e349a81..200c4f757 100644 --- a/hw/bsp/stm32f0/family.mk +++ b/hw/bsp/stm32f0/family.mk @@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0 # -------------- # Compiler Flags @@ -17,19 +18,11 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0 \ - -mfloat-abi=soft \ -nostdlib -nostartfiles \ # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m0 -IAR_ASFLAGS += --cpu cortex-m0 - # ------------------------ # All source paths should be relative to the top level. # ------------------------ @@ -51,6 +44,3 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk index cd1d587f1..4813fba2b 100644 --- a/hw/bsp/stm32f1/family.mk +++ b/hw/bsp/stm32f1/family.mk @@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 # -------------- # Compiler Flags @@ -15,16 +16,8 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -mfloat-abi=soft \ -nostdlib -nostartfiles \ -# IAR Flags -IAR_CFLAGS += --cpu cortex-m3 -IAR_ASFLAGS += --cpu cortex-m3 - # ------------------------ # All source paths should be relative to the top level. # ------------------------ @@ -43,12 +36,6 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - -# For flash-jlink target -JLINK_DEVICE = stm32f103c8 - # flash target ROM bootloader flash-dfu-util: $(BUILD)/$(PROJECT).bin dfu-util -R -a 0 --dfuse-address 0x08000000 -D $< diff --git a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c index 48203b787..020f21cb1 100644 --- a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c +++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c @@ -203,7 +203,7 @@ uint32_t board_millis(void) void HardFault_Handler (void) { - asm("bkpt"); + __asm("BKPT #0\n"); } // Required by __libc_init_array in startup code if we are compiling using diff --git a/hw/bsp/stm32f2/family.mk b/hw/bsp/stm32f2/family.mk index 7ca378548..fd27c0e68 100644 --- a/hw/bsp/stm32f2/family.mk +++ b/hw/bsp/stm32f2/family.mk @@ -9,18 +9,17 @@ DEPS_SUBMODULES += \ $(ST_HAL_DRIVER) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F2 + +GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -mfloat-abi=soft \ -nostdlib -nostartfiles \ - -DCFG_TUSB_MCU=OPT_MCU_STM32F2 # mcu driver cause following warnings -CFLAGS += -Wno-error=sign-compare +GCC_CFLAGS += -Wno-error=sign-compare SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ @@ -36,6 +35,3 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc \ $(TOP)/$(BOARD_PATH) - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk index f3b21d530..a740e9012 100644 --- a/hw/bsp/stm32f3/family.mk +++ b/hw/bsp/stm32f3/family.mk @@ -9,14 +9,10 @@ DEPS_SUBMODULES += \ $(ST_HAL_DRIVER) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32F3 @@ -37,6 +33,3 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc \ $(TOP)/$(BOARD_PATH) - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk index 394c4a72f..9c132fd21 100644 --- a/hw/bsp/stm32f4/family.mk +++ b/hw/bsp/stm32f4/family.mk @@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 # -------------- # Compiler Flags @@ -16,20 +17,11 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4 -IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4 - # ----------------- # Sources & Include # ----------------- @@ -51,8 +43,5 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index b44381586..0b3b641d8 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m7 # -------------- # Compiler Flags @@ -29,20 +30,11 @@ endif # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m7 \ - -mfloat-abi=hard \ - -mfpu=fpv5-d16 \ -nostdlib -nostartfiles # mcu driver cause following warnings GCC_CFLAGS += -Wno-error=shadow -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 -IAR_ASFLAGS += --cpu cortex-m7 --fpu VFPv5_D16 - # ----------------- # Sources & Include # ----------------- @@ -64,6 +56,3 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk index 76f59fc34..76f1524e5 100644 --- a/hw/bsp/stm32g0/family.mk +++ b/hw/bsp/stm32g0/family.mk @@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus # -------------- # Compiler Flags @@ -15,19 +16,11 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -mfloat-abi=soft \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m0 -IAR_ASFLAGS += --cpu cortex-m0 - # ----------------- # Sources & Include # ----------------- @@ -50,8 +43,5 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk index a4b644245..8ee453aed 100644 --- a/hw/bsp/stm32g4/family.mk +++ b/hw/bsp/stm32g4/family.mk @@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 # -------------- # Compiler Flags @@ -16,20 +17,11 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4 -IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4 - # ----------------- # Sources & Include # ----------------- @@ -53,8 +45,5 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk index f069ae8f0..43f567b50 100644 --- a/hw/bsp/stm32l0/family.mk +++ b/hw/bsp/stm32l0/family.mk @@ -8,13 +8,10 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -mfloat-abi=soft \ -nostdlib -nostartfiles \ -DCFG_EXAMPLE_MSC_READONLY \ -DCFG_EXAMPLE_VIDEO_READONLY \ @@ -42,6 +39,3 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk index 0e84d1af0..4392c6766 100644 --- a/hw/bsp/stm32l4/family.mk +++ b/hw/bsp/stm32l4/family.mk @@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 # -------------- # Compiler Flags @@ -15,20 +16,11 @@ CFLAGS += \ # GCC Flags GCC_CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -# IAR Flags -IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4 -IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4 - # ----------------- # Sources & Include # ----------------- @@ -54,8 +46,5 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc \ $(TOP)/$(BOARD_PATH) -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk index e1c496dee..9174fe96a 100644 --- a/hw/bsp/stm32u5/family.mk +++ b/hw/bsp/stm32u5/family.mk @@ -5,21 +5,16 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m33 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m33 \ - -mfloat-abi=hard \ - -mfpu=fpv5-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32U5 # suppress warning caused by vendor mcu driver CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter -#src/portable/st/synopsys/dcd_synopsys.c SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ @@ -38,8 +33,5 @@ INC += \ $(TOP)/$(ST_HAL_DRIVER)/Inc \ $(TOP)/$(BOARD_PATH) -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk index 97210889c..bc3afcaff 100644 --- a/hw/bsp/stm32wb/family.mk +++ b/hw/bsp/stm32wb/family.mk @@ -6,14 +6,10 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY) ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_STM32WB @@ -37,8 +33,5 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash target using on-board stlink flash: flash-stlink diff --git a/tools/make/cpu/cortex-m0.mk b/tools/make/cpu/cortex-m0.mk new file mode 100644 index 000000000..c264802c8 --- /dev/null +++ b/tools/make/cpu/cortex-m0.mk @@ -0,0 +1,14 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mthumb \ + -mcpu=cortex-m0 \ + -mfloat-abi=soft \ + +else ifeq ($(TOOLCHAIN),iar) + # IAR Flags + CFLAGS += --cpu cortex-m0 + ASFLAGS += --cpu cortex-m0 +endif + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/tools/make/cpu/cortex-m0plus.mk b/tools/make/cpu/cortex-m0plus.mk new file mode 100644 index 000000000..626f7156e --- /dev/null +++ b/tools/make/cpu/cortex-m0plus.mk @@ -0,0 +1,14 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mthumb \ + -mcpu=cortex-m0plus \ + -mfloat-abi=soft \ + +else ifeq ($(TOOLCHAIN),iar) + # IAR Flags + CFLAGS += --cpu cortex-m0+ + ASFLAGS += --cpu cortex-m0+ +endif + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/tools/make/cpu/cortex-m3.mk b/tools/make/cpu/cortex-m3.mk new file mode 100644 index 000000000..c81cbace6 --- /dev/null +++ b/tools/make/cpu/cortex-m3.mk @@ -0,0 +1,17 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mthumb \ + -mcpu=cortex-m3 \ + -mfloat-abi=soft \ + +else ifeq ($(TOOLCHAIN),iar) + # IAR Flags + CFLAGS += \ + --cpu cortex-m3 \ + + ASFLAGS += \ + --cpu cortex-m3 +endif + +# For freeRTOS port source +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk index 3d12b01fd..240ed0d49 100644 --- a/tools/make/cpu/cortex-m33.mk +++ b/tools/make/cpu/cortex-m33.mk @@ -5,10 +5,14 @@ ifeq ($(TOOLCHAIN),gcc) -mfloat-abi=hard \ -mfpu=fpv5-sp-d16 \ - #-mfpu=fpv5-d16 \ - - #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "") - FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure else ifeq ($(TOOLCHAIN),iar) - # TODO support IAR + CFLAGS += \ + --cpu cortex-m33 \ + --fpu VFPv5-SP \ + + ASFLAGS += \ + --cpu cortex-m33 \ + --fpu VFPv5-SP \ endif + +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk index 890feefe3..fabe05632 100644 --- a/tools/make/cpu/cortex-m4.mk +++ b/tools/make/cpu/cortex-m4.mk @@ -5,8 +5,9 @@ ifeq ($(TOOLCHAIN),gcc) -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ - #set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") - FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F else ifeq ($(TOOLCHAIN),iar) - # TODO support IAR + CFLAGS += --cpu cortex-m4 --fpu VFPv4 + ASFLAGS += --cpu cortex-m4 --fpu VFPv4 endif + +FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F From b59b65d2ed0f6fa14b18b7bc233309d9b9710898 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 18:26:51 +0700 Subject: [PATCH 54/94] rename to kinetis_k32l2, rename OPT_MCU_KINETIS_K32 to OPT_MCU_KINETIS_K32L --- .github/workflows/build_arm.yml | 2 +- hw/bsp/board_mcu.h | 2 +- hw/bsp/imxrt/family.mk | 2 +- .../boards/frdm_k32l2a4s/board.h | 0 .../boards/frdm_k32l2a4s/board.mk | 7 +------ .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c | 0 .../boards/frdm_k32l2b/board.h | 0 .../boards/frdm_k32l2b/board.mk | 7 +------ .../boards/frdm_k32l2b/frdm_k32l2b.c | 0 .../boards/kuiic/K32L2B31xxxxA_flash.ld | 0 .../boards/kuiic/board.h | 0 .../boards/kuiic/board.mk | 10 +--------- .../boards/kuiic/kuiic.c | 0 hw/bsp/{kinetis_k32l => kinetis_k32l2}/family.mk | 8 ++++---- src/common/tusb_mcu.h | 2 +- src/tusb_option.h | 3 ++- tools/get_deps.py | 4 ++-- 17 files changed, 15 insertions(+), 32 deletions(-) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/board.h (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/board.mk (75%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/frdm_k32l2a4s.c (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/board.h (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/board.mk (74%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/frdm_k32l2b.c (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/K32L2B31xxxxA_flash.ld (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/board.h (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/board.mk (63%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/kuiic.c (100%) rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/family.mk (89%) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index a7c7fd1e1..620aec193 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -34,7 +34,7 @@ jobs: family: # Alphabetical order - 'broadcom_32bit' - - 'kinetis_k32l kinetis_kl' + - 'kinetis_k32l2 kinetis_kl' - 'lpc11 lpc13 lpc15 lpc17' - 'lpc51 lpc54 lpc55' - 'mm32 msp432e4' diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h index ce2f919bf..e5d2bb608 100644 --- a/hw/bsp/board_mcu.h +++ b/hw/bsp/board_mcu.h @@ -47,7 +47,7 @@ #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9) #include "fsl_device_registers.h" -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) #include "fsl_device_registers.h" #elif CFG_TUSB_MCU == OPT_MCU_NRF5X diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk index d0bb5be17..9eb541473 100644 --- a/hw/bsp/imxrt/family.mk +++ b/hw/bsp/imxrt/family.mk @@ -5,7 +5,6 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 include $(TOP)/$(BOARD_PATH)/board.mk CPU_CORE ?= cortex-m7 -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk CFLAGS += \ -D__ARMVFP__=0 \ @@ -17,6 +16,7 @@ CFLAGS += \ ifdef BOARD_TUD_RHPORT CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT) endif + ifdef BOARD_TUH_RHPORT CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT) endif diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h similarity index 100% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk similarity index 75% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk index d96ab58b8..f69700139 100644 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk @@ -1,8 +1,6 @@ MCU = K32L2A41A -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2A41VLH1A \ +CFLAGS += -DCPU_K32L2A41VLH1A # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual @@ -13,9 +11,6 @@ LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld SRC_C += \ $(MCU_DIR)/project_template/clock_config.c \ -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # For flash-jlink target JLINK_DEVICE = K32L2A41xxxxA diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c similarity index 100% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h similarity index 100% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk similarity index 74% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk index 5f8ecbfe4..82456b721 100644 --- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk @@ -1,8 +1,6 @@ MCU = K32L2B31A -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ +CFLAGS += -DCPU_K32L2B31VLH0A # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls @@ -13,9 +11,6 @@ LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld SRC_C += \ $(MCU_DIR)/project_template/clock_config.c \ -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # For flash-jlink target JLINK_DEVICE = K32L2B31xxxxA diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c similarity index 100% rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld similarity index 100% rename from hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld rename to hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.h b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h similarity index 100% rename from hw/bsp/kinetis_k32l/boards/kuiic/board.h rename to hw/bsp/kinetis_k32l2/boards/kuiic/board.h diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk similarity index 63% rename from hw/bsp/kinetis_k32l/boards/kuiic/board.mk rename to hw/bsp/kinetis_k32l2/boards/kuiic/board.mk index 29a12e982..fc5bdeec8 100644 --- a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk +++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk @@ -1,11 +1,6 @@ MCU = K32L2B31A -# This board uses TinyUF2 for updates -UF2_FAMILY_ID = 0x7f83e793 - -CFLAGS += \ - -mcpu=cortex-m0plus \ - -DCPU_K32L2B31VLH0A \ +CFLAGS += -DCPU_K32L2B31VLH0A # mcu driver cause following warnings CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls @@ -13,9 +8,6 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # For flash-jlink target JLINK_DEVICE = K32L2B31xxxxA diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c similarity index 100% rename from hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c rename to hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l2/family.mk similarity index 89% rename from hw/bsp/kinetis_k32l/family.mk rename to hw/bsp/kinetis_k32l2/family.mk index 41f22e250..357485762 100644 --- a/hw/bsp/kinetis_k32l/family.mk +++ b/hw/bsp/kinetis_k32l2/family.mk @@ -1,13 +1,13 @@ +UF2_FAMILY_ID = 0x7f83e793 SDK_DIR = hw/mcu/nxp/mcux-sdk DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 - MCU_DIR = $(SDK_DIR)/devices/$(MCU) + include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32 + -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L SRC_C += \ src/portable/nxp/khci/dcd_khci.c \ diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 56525725e..9f3be78fd 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -97,7 +97,7 @@ #define TUP_DCD_ENDPOINT_MAX 8 #define TUP_RHPORT_HIGHSPEED 1 -#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32) +#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L) #define TUP_USBIP_CHIPIDEA_FS #define TUP_USBIP_CHIPIDEA_FS_KINETIS #define TUP_DCD_ENDPOINT_MAX 16 diff --git a/src/tusb_option.h b/src/tusb_option.h index 43e67cf64..f16d8a5d0 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -119,7 +119,8 @@ // NXP Kinetis #define OPT_MCU_KINETIS_KL 1200 ///< NXP KL series -#define OPT_MCU_KINETIS_K32 1201 ///< NXP K32 series +#define OPT_MCU_KINETIS_K32L 1201 ///< NXP K32L series +#define OPT_MCU_KINETIS_K32 1201 ///< Alias to K32L #define OPT_MCU_MKL25ZXX 1200 ///< Alias to KL (obsolete) #define OPT_MCU_K32L2BXX 1201 ///< Alias to K32 (obsolete) diff --git a/tools/get_deps.py b/tools/get_deps.py index 7e798cf9e..b81dabae0 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -52,7 +52,7 @@ deps_optional = { 'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'], 'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git', '950819b7de9b32f92c3edf396bc5ffb8d66e7009', - 'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'], + 'kinetis_k32l2 lpc51 lpc54 lpc55 mcx imxrt'], 'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', 'c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'rp2040'], @@ -166,7 +166,7 @@ deps_optional = { 'ch32v307'], 'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f', - 'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' + 'imxrt kinetis_k32l2 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' 'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 ' 'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'], 'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git', From eb7fcf1b7474fd75f43b2501586c8b6b03354d41 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 18:38:41 +0700 Subject: [PATCH 55/94] add CPU_CORE for all family --- hw/bsp/lpc11/family.mk | 7 +------ hw/bsp/lpc13/family.mk | 7 +------ hw/bsp/lpc15/family.mk | 7 +------ hw/bsp/lpc17/family.mk | 7 +------ hw/bsp/lpc18/family.mk | 7 +------ hw/bsp/lpc51/family.mk | 7 +------ hw/bsp/lpc54/family.mk | 9 +-------- hw/bsp/lpc55/family.mk | 9 +-------- hw/bsp/mcx/family.mk | 2 -- hw/bsp/mm32/family.mk | 8 +------- hw/bsp/msp432e4/family.mk | 11 +++-------- hw/bsp/nrf/family.mk | 1 - hw/bsp/ra/boards/ra4m1_ek/board.mk | 6 +----- hw/bsp/ra/boards/ra4m3_ek/board.mk | 6 +----- hw/bsp/ra/family.mk | 4 +--- hw/bsp/samd11/family.mk | 6 +----- hw/bsp/samd21/family.mk | 7 +------ hw/bsp/samd51/family.mk | 9 +-------- hw/bsp/same5x/family.mk | 8 +------- hw/bsp/saml2x/family.mk | 12 +++--------- hw/bsp/tm4c123/family.mk | 9 +-------- hw/bsp/xmc4000/family.mk | 10 +--------- 22 files changed, 24 insertions(+), 135 deletions(-) diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk index eb427c09d..dee85da90 100644 --- a/hw/bsp/lpc11/family.mk +++ b/hw/bsp/lpc11/family.mk @@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -nostdlib \ -D__USE_LPCOPEN \ -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ @@ -36,8 +34,5 @@ endif INC += \ $(TOP)/$(MCU_DIR)/inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # For flash-jlink target JLINK_DEVICE = LPC11U68 diff --git a/hw/bsp/lpc13/family.mk b/hw/bsp/lpc13/family.mk index 28f98e4ca..10cf4969d 100644 --- a/hw/bsp/lpc13/family.mk +++ b/hw/bsp/lpc13/family.mk @@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ -nostdlib \ -DCORE_M3 \ -D__USE_LPCOPEN \ @@ -34,6 +32,3 @@ SRC_C += \ INC += \ $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk index 0ad1220d6..9f489832f 100644 --- a/hw/bsp/lpc15/family.mk +++ b/hw/bsp/lpc15/family.mk @@ -1,12 +1,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ -nostdlib \ -DCORE_M3 \ -D__USE_LPCOPEN \ @@ -34,6 +32,3 @@ SRC_C += \ INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc17/family.mk b/hw/bsp/lpc17/family.mk index af01b55a8..abf6abe13 100644 --- a/hw/bsp/lpc17/family.mk +++ b/hw/bsp/lpc17/family.mk @@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ -nostdlib \ -DCORE_M3 \ -D__USE_LPCOPEN \ @@ -35,6 +33,3 @@ SRC_C += \ INC += \ $(TOP)/$(MCU_DIR)/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk index fbe6ad834..9d0f85c20 100644 --- a/hw/bsp/lpc18/family.mk +++ b/hw/bsp/lpc18/family.mk @@ -1,12 +1,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ -nostdlib \ -DCORE_M3 \ -D__USE_LPCOPEN \ @@ -32,6 +30,3 @@ INC += \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(MCU_DIR)/inc \ $(TOP)/$(MCU_DIR)/inc/config_18xx - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk index bfca2f6b1..df5a9958e 100644 --- a/hw/bsp/lpc51/family.mk +++ b/hw/bsp/lpc51/family.mk @@ -3,12 +3,10 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 MCU_DIR = $(SDK_DIR)/devices/$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' @@ -40,6 +38,3 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk index f52b9b5eb..7d8bb86cd 100644 --- a/hw/bsp/lpc54/family.mk +++ b/hw/bsp/lpc54/family.mk @@ -2,14 +2,10 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' @@ -49,6 +45,3 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/lpc_gpio SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk index f9dabcfa3..a87fa5acf 100644 --- a/hw/bsp/lpc55/family.mk +++ b/hw/bsp/lpc55/family.mk @@ -3,17 +3,13 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk DEPS_SUBMODULES += lib/CMSIS_5 lib/sct_neopixel $(SDK_DIR) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m33 # Default to Highspeed PORT1 PORT ?= 1 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m33 \ - -mfloat-abi=hard \ - -mfpu=fpv5-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \ -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \ -DBOARD_TUD_RHPORT=$(PORT) @@ -63,6 +59,3 @@ INC += \ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk index 2722c2038..e384aa8eb 100644 --- a/hw/bsp/mcx/family.mk +++ b/hw/bsp/mcx/family.mk @@ -4,9 +4,7 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 include $(TOP)/$(BOARD_PATH)/board.mk - CPU_CORE ?= cortex-m33 -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk # Default to Highspeed PORT1 PORT ?= 1 diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk index 81af0d166..d5b6e315a 100644 --- a/hw/bsp/mm32/family.mk +++ b/hw/bsp/mm32/family.mk @@ -3,13 +3,10 @@ SDK_DIR = hw/mcu/mindmotion/mm32sdk DEPS_SUBMODULES += lib/CMSIS_5 $(SDK_DIR) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m3 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m3 \ - -mfloat-abi=soft \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_MM32F327X @@ -29,8 +26,5 @@ INC += \ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/Include \ $(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 - # flash target using on-board flash: flash-jlink diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk index 2383bc604..b5ade6a52 100644 --- a/hw/bsp/msp432e4/family.mk +++ b/hw/bsp/msp432e4/family.mk @@ -1,13 +1,11 @@ DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/ti +#include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 + CFLAGS += \ -flto \ - -mthumb \ -mslow-flash-data \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -D__MSP432E401Y__ \ -DCFG_TUSB_MCU=OPT_MCU_MSP432E4 @@ -33,9 +31,6 @@ INC += \ SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # For flash-jlink target JLINK_DEVICE = MSP432E401Y JLINK_IF = SWD diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk index 6d067e1c2..cdcfe39bd 100644 --- a/hw/bsp/nrf/family.mk +++ b/hw/bsp/nrf/family.mk @@ -5,7 +5,6 @@ include $(TOP)/$(BOARD_PATH)/board.mk # nRF52 is cortex-m4, nRF53 is cortex-m33 CPU_CORE ?= cortex-m4 -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk CFLAGS += \ -flto \ diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk index 6a661c0b8..5c193513d 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk @@ -1,8 +1,4 @@ -CFLAGS += \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ - -DCFG_TUSB_MCU=OPT_MCU_RAXXX +CPU_CORE = cortex-m4 FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk index d668db0ea..264f29c1a 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -1,8 +1,4 @@ -CFLAGS += \ - -mcpu=cortex-m33 \ - -mfloat-abi=hard \ - -mfpu=fpv5-sp-d16 \ - -DCFG_TUSB_MCU=OPT_MCU_RAXXX +CPU_CORE = cortex-m33 FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index d48272e61..b65c95191 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -1,11 +1,9 @@ DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5 -# Cross Compiler for RA -CROSS_COMPILE = arm-none-eabi- - include $(TOP)/$(BOARD_PATH)/board.mk CFLAGS += \ + -DCFG_TUSB_MCU=OPT_MCU_RAXXX \ -Wno-error=undef \ -Wno-error=strict-prototypes \ -Wno-error=cast-align \ diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk index a2a5268aa..43a60a122 100644 --- a/hw/bsp/samd11/family.mk +++ b/hw/bsp/samd11/family.mk @@ -1,11 +1,10 @@ DEPS_SUBMODULES += hw/mcu/microchip include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -nostdlib -nostartfiles \ -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ -DOSC32K_OVERWRITE_CALIBRATION=0 \ @@ -40,6 +39,3 @@ INC += \ $(TOP)/hw/mcu/microchip/samd11/hri \ $(TOP)/hw/mcu/microchip/samd11/CMSIS/Include \ $(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk index 30eccacb2..49a1a781a 100644 --- a/hw/bsp/samd21/family.mk +++ b/hw/bsp/samd21/family.mk @@ -2,12 +2,10 @@ UF2_FAMILY_ID = 0x68ed2b88 DEPS_SUBMODULES += hw/mcu/microchip include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -nostdlib -nostartfiles \ -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \ -DCFG_TUSB_MCU=OPT_MCU_SAMD21 @@ -39,9 +37,6 @@ INC += \ $(TOP)/hw/mcu/microchip/samd21/hri \ $(TOP)/hw/mcu/microchip/samd21/CMSIS/Include -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ # Add it to your PATH or change BOSSAC variable to match your installation diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk index 657e33438..9a6c67e1a 100644 --- a/hw/bsp/samd51/family.mk +++ b/hw/bsp/samd51/family.mk @@ -2,14 +2,10 @@ UF2_FAMILY_ID = 0x55114460 DEPS_SUBMODULES += hw/mcu/microchip include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_SAMD51 @@ -37,9 +33,6 @@ INC += \ $(TOP)/hw/mcu/microchip/samd51/hri \ $(TOP)/hw/mcu/microchip/samd51/CMSIS/Include -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ # Add it to your PATH or change BOSSAC variable to match your installation diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk index df1af4a9d..691863f11 100644 --- a/hw/bsp/same5x/family.mk +++ b/hw/bsp/same5x/family.mk @@ -2,14 +2,11 @@ DEPS_SUBMODULES += hw/mcu/microchip SDK_DIR = hw/mcu/microchip/$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -mthumb \ - -mabi=aapcs \ -mlong-calls \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_SAME5X @@ -32,9 +29,6 @@ INC += \ $(TOP)/$(SDK_DIR)/hri \ $(TOP)/$(SDK_DIR)/CMSIS/Include -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F - # flash using edbg from https://github.com/ataradov/edbg flash-edbg: $(BUILD)/$(PROJECT).bin edbg --verbose -t $(MCU) -pv -f $< diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index 62e5f8f4a..0acb0ed14 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -1,14 +1,11 @@ UF2_FAMILY_ID = 0x68ed2b88 DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip - -include $(TOP)/$(BOARD_PATH)/board.mk - MCU_DIR = hw/mcu/microchip/$(SAML_VARIANT) +include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus + CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -nostdlib -nostartfiles \ -DCONF_OSC32K_CALIB_ENABLE=0 \ -DCFG_TUSB_MCU=OPT_MCU_SAML22 @@ -41,9 +38,6 @@ INC += \ $(TOP)/$(MCU_DIR)/hri \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 - # flash using bossac at least version 1.8 # can be found in arduino15/packages/arduino/tools/bossac/ # Add it to your PATH or change BOSSAC variable to match your installation diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk index 021b47fd3..608c530bb 100644 --- a/hw/bsp/tm4c123/family.mk +++ b/hw/bsp/tm4c123/family.mk @@ -1,14 +1,10 @@ DEPS_SUBMODULES += hw/mcu/ti include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -DCFG_TUSB_MCU=OPT_MCU_TM4C123 \ -uvectors \ -DTM4C123GH6PM @@ -31,6 +27,3 @@ SRC_C += \ src/portable/mentor/musb/hcd_musb.c \ $(MCU_DIR)/Source/system_TM4C123.c \ $(MCU_DIR)/Source/GCC/tm4c123_startup.c - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk index 1094f3b72..35c3a58b7 100644 --- a/hw/bsp/xmc4000/family.mk +++ b/hw/bsp/xmc4000/family.mk @@ -4,14 +4,10 @@ MCU_DIR = hw/mcu/infineon/mtb-xmclib-cat3 DEPS_SUBMODULES += $(MCU_DIR) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m4 CFLAGS += \ -flto \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m4 \ - -mfloat-abi=hard \ - -mfpu=fpv4-sp-d16 \ -nostdlib -nostartfiles \ -DCFG_TUSB_MCU=OPT_MCU_XMC4000 @@ -27,7 +23,6 @@ SRC_C += \ $(MCU_DIR)/XMCLib/src/xmc4_gpio.c \ $(MCU_DIR)/XMCLib/src/xmc4_scu.c - SRC_S += $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/startup_$(MCU_VARIANT).S INC += \ @@ -35,6 +30,3 @@ INC += \ $(TOP)/$(MCU_DIR)/CMSIS/Core/Include \ $(TOP)/$(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Include \ $(TOP)/$(MCU_DIR)/XMCLib/inc - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F From 086c1d4090bc3bfdcde56aed5036e3efc6d5ea9f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 18:54:14 +0700 Subject: [PATCH 56/94] more CPU_CORE --- .../boards/raspberrypi_zero_w/board.mk | 4 ++-- .../broadcom_64bit/boards/raspberrypi_cm4/board.mk | 4 ++-- .../boards/raspberrypi_zero2w/board.mk | 4 ++-- hw/bsp/kinetis_kl/family.mk | 7 +------ tools/make/cpu/arm1176.mk | 9 +++++++++ tools/make/cpu/cortex-a53.mk | 12 ++++++++++++ tools/make/cpu/cortex-a72.mk | 12 ++++++++++++ tools/make/cpu/cortex-m33.mk | 1 + 8 files changed, 41 insertions(+), 12 deletions(-) create mode 100644 tools/make/cpu/arm1176.mk create mode 100644 tools/make/cpu/cortex-a53.mk create mode 100644 tools/make/cpu/cortex-a72.mk diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk index 77811d18d..052033230 100644 --- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk +++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk @@ -1,5 +1,5 @@ -CFLAGS += -mcpu=arm1176jzf-s \ - -DBCM_VERSION=2835 \ +CPU_CORE = arm1176 +CFLAGS += -DBCM_VERSION=2835 \ -DCFG_TUSB_MCU=OPT_MCU_BCM2835 SUFFIX = diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk index 5706b8318..702f10137 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk @@ -1,3 +1,3 @@ -CFLAGS += -mcpu=cortex-a72 \ - -DBCM_VERSION=2711 \ +CPU_CORE = cortex-a72 +CFLAGS += -DBCM_VERSION=2711 \ -DCFG_TUSB_MCU=OPT_MCU_BCM2711 diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk index 3060b0571..da3fe17bc 100644 --- a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk +++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk @@ -1,3 +1,3 @@ -CFLAGS += -mcpu=cortex-a53 \ - -DBCM_VERSION=2837 \ +CPU_CORE = cortex-a53 +CFLAGS += -DBCM_VERSION=2837 \ -DCFG_TUSB_MCU=OPT_MCU_BCM2837 diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk index 2bed6b486..edb2f3366 100644 --- a/hw/bsp/kinetis_kl/family.mk +++ b/hw/bsp/kinetis_kl/family.mk @@ -3,11 +3,9 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 MCU_DIR = $(SDK_DIR)/devices/$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk +CPU_CORE ?= cortex-m0plus CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \ LDFLAGS += \ @@ -34,6 +32,3 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/port \ $(TOP)/$(SDK_DIR)/drivers/smc \ $(TOP)/$(SDK_DIR)/drivers/uart \ - -# For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/tools/make/cpu/arm1176.mk b/tools/make/cpu/arm1176.mk new file mode 100644 index 000000000..022ccf7ad --- /dev/null +++ b/tools/make/cpu/arm1176.mk @@ -0,0 +1,9 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mcpu=arm1176jzf-s \ + +else ifeq ($(TOOLCHAIN),iar) + #CFLAGS += --cpu cortex-a53 + #ASFLAGS += --cpu cortex-a53 + +endif diff --git a/tools/make/cpu/cortex-a53.mk b/tools/make/cpu/cortex-a53.mk new file mode 100644 index 000000000..42e522ecf --- /dev/null +++ b/tools/make/cpu/cortex-a53.mk @@ -0,0 +1,12 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mcpu=cortex-a53 \ + +else ifeq ($(TOOLCHAIN),iar) + CFLAGS += \ + --cpu cortex-a53 \ + + ASFLAGS += \ + --cpu cortex-a53 \ + +endif diff --git a/tools/make/cpu/cortex-a72.mk b/tools/make/cpu/cortex-a72.mk new file mode 100644 index 000000000..1b3d8da4a --- /dev/null +++ b/tools/make/cpu/cortex-a72.mk @@ -0,0 +1,12 @@ +ifeq ($(TOOLCHAIN),gcc) + CFLAGS += \ + -mcpu=cortex-a72 \ + +else ifeq ($(TOOLCHAIN),iar) + CFLAGS += \ + --cpu cortex-a72 \ + + ASFLAGS += \ + --cpu cortex-a72 \ + +endif diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk index 240ed0d49..e53f5c2b1 100644 --- a/tools/make/cpu/cortex-m33.mk +++ b/tools/make/cpu/cortex-m33.mk @@ -13,6 +13,7 @@ else ifeq ($(TOOLCHAIN),iar) ASFLAGS += \ --cpu cortex-m33 \ --fpu VFPv5-SP \ + endif FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure From 7d0ce5605ace2acba928f444f3dd7eb6de0b29ec Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 19:08:37 +0700 Subject: [PATCH 57/94] allow to skip CPU_CORE --- .github/workflows/build_iar.yml | 2 +- examples/make.mk | 5 +++++ tools/build_family.py | 2 +- tools/make/toolchain/arm_gcc.mk | 3 --- tools/make/toolchain/arm_iar.mk | 2 -- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 48d66240e..8c9a500d7 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -47,7 +47,7 @@ jobs: run: python3 tools/get_deps.py ${{ matrix.family }} - name: Build - run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm + run: python3 tools/build_family.py ${{ matrix.family }} TOOLCHAIN=iar cmake: runs-on: [self-hosted, Linux, X64, hifiphile] diff --git a/examples/make.mk b/examples/make.mk index 4fcde83c8..3c3a920cc 100644 --- a/examples/make.mk +++ b/examples/make.mk @@ -137,5 +137,10 @@ else ifeq ($(LOGGER),swo) CFLAGS += -DLOGGER_SWO endif +# CPU specific flags +ifdef CPU_CORE +include $(TOP)/tools/make/cpu/$(CPU_CORE).mk +endif + # toolchain specific include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN).mk diff --git a/tools/build_family.py b/tools/build_family.py index 9b612b4cb..fb90e0edb 100644 --- a/tools/build_family.py +++ b/tools/build_family.py @@ -11,7 +11,7 @@ SKIPPED = "\033[33mskipped\033[0m" build_separator = '-' * 106 -make_iar_option = 'CC=iccarm' +make_iar_option = 'TOOLCHAIN=iar' def filter_with_input(mylist): if len(sys.argv) > 1: diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk index d5ee98def..693fda0b3 100644 --- a/tools/make/toolchain/arm_gcc.mk +++ b/tools/make/toolchain/arm_gcc.mk @@ -9,9 +9,6 @@ GDB = $(CROSS_COMPILE)gdb OBJCOPY = $(CROSS_COMPILE)objcopy SIZE = $(CROSS_COMPILE)size -# CPU specific flags -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk - # --------------------------------------- # Compiler Flags # --------------------------------------- diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk index 42b31cfd3..f1850add7 100644 --- a/tools/make/toolchain/arm_iar.mk +++ b/tools/make/toolchain/arm_iar.mk @@ -4,8 +4,6 @@ LD = ilinkarm OBJCOPY = ielftool --silent SIZE = size -include $(TOP)/tools/make/cpu/$(CPU_CORE).mk - # Enable extension mode (gcc compatible) CFLAGS += -e --debug --silent From 2216704db8801b359659bf191ae955e4c626f031 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 19:31:33 +0700 Subject: [PATCH 58/94] rename GCC_CFLAGS to CFLAGS_GCC, GCC_SRC_S to SRC_S_GCC etc .. --- hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk | 9 ++------- hw/bsp/stm32f0/boards/stm32f072disco/board.mk | 9 ++++----- hw/bsp/stm32f0/boards/stm32f072eval/board.mk | 8 ++++---- hw/bsp/stm32f0/family.mk | 11 +++++++++-- hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk | 12 +++++------- hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk | 12 +++++------- hw/bsp/stm32f1/family.mk | 6 +++++- hw/bsp/stm32f2/family.mk | 4 ++-- hw/bsp/stm32f4/boards/feather_stm32f405/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/pyboardv11/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f407disco/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f411disco/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f412disco/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk | 8 ++++---- hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk | 8 ++++---- hw/bsp/stm32f4/family.mk | 4 ++-- hw/bsp/stm32f7/boards/stlinkv3mini/board.mk | 8 ++++---- hw/bsp/stm32f7/boards/stm32f723disco/board.mk | 8 ++++---- hw/bsp/stm32f7/boards/stm32f746disco/board.mk | 8 ++++---- hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk | 8 ++++---- hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk | 8 ++++---- hw/bsp/stm32f7/boards/stm32f769disco/board.mk | 8 ++++---- hw/bsp/stm32f7/family.mk | 4 ++-- hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk | 8 ++++---- hw/bsp/stm32g0/family.mk | 4 ++-- hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk | 11 ++++------- hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk | 11 ++++------- hw/bsp/stm32g4/family.mk | 11 +++++++++-- hw/bsp/stm32h7/boards/daisyseed/board.mk | 8 ++++---- hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk | 8 ++++---- hw/bsp/stm32h7/boards/stm32h743eval/board.mk | 8 ++++---- hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk | 8 ++++---- hw/bsp/stm32h7/boards/stm32h745disco/board.mk | 8 ++++---- hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk | 8 ++++---- hw/bsp/stm32h7/family.mk | 4 ++-- hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk | 8 ++++---- hw/bsp/stm32l4/boards/stm32l476disco/board.mk | 8 ++++---- hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk | 8 ++++---- hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk | 8 ++++---- hw/bsp/stm32l4/family.mk | 4 ++-- tools/make/toolchain/arm_gcc.mk | 3 --- tools/make/toolchain/arm_gcc_rules.mk | 8 ++++---- tools/make/toolchain/arm_iar_rules.mk | 4 ++-- 45 files changed, 173 insertions(+), 174 deletions(-) diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk index 1cc443352..f8f0952e8 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk @@ -1,12 +1,7 @@ CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY -# GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s -GCC_LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld - -# IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f070xb.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/stm32F070rbtx_flash.ld # For flash-jlink target JLINK_DEVICE = stm32f070rb diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk index 4216ba186..57c658629 100644 --- a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk @@ -1,10 +1,9 @@ +MCU_VARIANT = stm32f072xb + CFLAGS += -DSTM32F072xB -DCFG_EXAMPLE_VIDEO_READONLY -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld - -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld # For flash-jlink target JLINK_DEVICE = stm32f072rb diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk index bb9cba22a..c368bd8af 100644 --- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk @@ -1,10 +1,10 @@ CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f072vb diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk index 200c4f757..129a3b73a 100644 --- a/hw/bsp/stm32f0/family.mk +++ b/hw/bsp/stm32f0/family.mk @@ -16,12 +16,12 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32F0 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles \ # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-align # ------------------------ # All source paths should be relative to the top level. @@ -44,3 +44,10 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc + +# Startup +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s + +# Linker +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk index 159b3ecb6..6c5f34501 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk @@ -1,12 +1,10 @@ +MCU_VARIANT = stm32f103xb + CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -DCFG_EXAMPLE_VIDEO_READONLY -# GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld - -# IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s -IAR_LD_FILE = $(BOARD_PATH)/stm32f103x8_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/STM32F103X8_FLASH.ld +LD_FILE_IAR = $(BOARD_PATH)/stm32f103x8_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f103c8 diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk index efea75be7..7e95c1fe1 100644 --- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk @@ -1,12 +1,10 @@ +MCU_VARIANT = stm32f103xb + CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -# GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld - -# IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s -IAR_LD_FILE = $(BOARD_PATH)/stm32f103xc_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/STM32F103XC_FLASH.ld +LD_FILE_IAR = $(BOARD_PATH)/stm32f103xc_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f103rc diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk index 4813fba2b..c9321c3cb 100644 --- a/hw/bsp/stm32f1/family.mk +++ b/hw/bsp/stm32f1/family.mk @@ -14,7 +14,7 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32F1 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles \ @@ -36,6 +36,10 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc +# Startup +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s + # flash target ROM bootloader flash-dfu-util: $(BUILD)/$(PROJECT).bin dfu-util -R -a 0 --dfuse-address 0x08000000 -D $< diff --git a/hw/bsp/stm32f2/family.mk b/hw/bsp/stm32f2/family.mk index fd27c0e68..ce50b16ad 100644 --- a/hw/bsp/stm32f2/family.mk +++ b/hw/bsp/stm32f2/family.mk @@ -14,12 +14,12 @@ CPU_CORE ?= cortex-m3 CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32F2 -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles \ # mcu driver cause following warnings -GCC_CFLAGS += -Wno-error=sign-compare +CFLAGS_GCC += -Wno-error=sign-compare SRC_C += \ src/portable/synopsys/dwc2/dcd_dwc2.c \ diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk index 1962dd9d8..cfd1d8b3b 100644 --- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk +++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F405xx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f405rg diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.mk b/hw/bsp/stm32f4/boards/pyboardv11/board.mk index 0a9100e1e..4c52e004a 100644 --- a/hw/bsp/stm32f4/boards/pyboardv11/board.mk +++ b/hw/bsp/stm32f4/boards/pyboardv11/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F405xx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f405rg diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk index 11f9b81aa..3285bd232 100644 --- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F401xC # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f401cc diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk index a184804d3..4de656b0c 100644 --- a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F407xx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf # For flash-jlink target diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk index ac15eaa5d..7af7ca47c 100644 --- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F411xE # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f411ce diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk index c5736050c..09fa50bd3 100644 --- a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F411xE # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F411VETx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f411ve diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk index 7dc3699e0..f767ac6c4 100644 --- a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F412Zx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f412zg diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk index 7dc3699e0..f767ac6c4 100644 --- a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F412Zx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f412zg diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk index e1f337a7e..2ab32b7f3 100644 --- a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk +++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk @@ -1,12 +1,12 @@ CFLAGS += -DSTM32F439xx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f439zi diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk index 9c132fd21..38592ecb0 100644 --- a/hw/bsp/stm32f4/family.mk +++ b/hw/bsp/stm32f4/family.mk @@ -15,12 +15,12 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32F4 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=cast-align # ----------------- # Sources & Include diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk index e1d352cc9..b59125edc 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk @@ -7,12 +7,12 @@ CFLAGS += \ -DHSE_VALUE=25000000 \ # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk index 6ddb727c7..168ca5dad 100644 --- a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk @@ -6,12 +6,12 @@ CFLAGS += \ -DHSE_VALUE=25000000 \ # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk index ba31baa16..acda5e2e8 100644 --- a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk @@ -6,12 +6,12 @@ CFLAGS += \ -DHSE_VALUE=25000000 # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk index e4d31040e..511433885 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk @@ -6,12 +6,12 @@ CFLAGS += \ -DHSE_VALUE=8000000 # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk index be5862612..329771986 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk @@ -6,12 +6,12 @@ CFLAGS += \ -DHSE_VALUE=8000000 \ # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f767zi diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk index 18f59e8b2..20042db98 100644 --- a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk @@ -7,12 +7,12 @@ CFLAGS += \ -DHSE_VALUE=25000000 \ # GCC -GCC_LD_FILE = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 0b3b641d8..1a15a743c 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -28,12 +28,12 @@ else endif # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles # mcu driver cause following warnings -GCC_CFLAGS += -Wno-error=shadow -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=shadow -Wno-error=cast-align # ----------------- # Sources & Include diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk index 50f282b09..6a6078d5f 100644 --- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk +++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk @@ -2,12 +2,12 @@ CFLAGS += \ -DSTM32G0B1xx # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32g0b1re diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk index 76f1524e5..412c73291 100644 --- a/hw/bsp/stm32g0/family.mk +++ b/hw/bsp/stm32g0/family.mk @@ -14,12 +14,12 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32G0 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=cast-align # ----------------- # Sources & Include diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk index 75cd9d8f5..6266b3ccc 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk @@ -1,13 +1,10 @@ +MCU_VARIANT = stm32g474xx + CFLAGS += \ -DSTM32G474xx \ -# GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g474xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld - -# IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g474xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g474xx_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld # For flash-jlink target JLINK_DEVICE = stm32g474re diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk index 2f6ec0ed6..dc46af1d1 100644 --- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk +++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk @@ -1,14 +1,11 @@ +MCU_VARIANT = stm32g474xx + CFLAGS += \ -DSTM32G474xx \ -DHSE_VALUE=24000000 -# GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g474xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld - -# IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g474xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g474xx_flash.icf +# Linker +LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld # For flash-jlink target JLINK_DEVICE = stm32g474re diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk index 8ee453aed..2efe91449 100644 --- a/hw/bsp/stm32g4/family.mk +++ b/hw/bsp/stm32g4/family.mk @@ -15,12 +15,12 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32G4 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles \ # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=cast-align # ----------------- # Sources & Include @@ -45,5 +45,12 @@ INC += \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc +# Startup +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s + +# Linker +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf + # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk index d53782496..da2eb4433 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.mk +++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk @@ -4,12 +4,12 @@ CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=16000000 PORT ?= 0 # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s -GCC_LD_FILE = $(BOARD_PATH)/stm32h750ibkx_flash.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s +LD_FILE_GCC = $(BOARD_PATH)/stm32h750ibkx_flash.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h750ibk6_m7 diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk index 9cf241df8..57a316f41 100644 --- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk @@ -4,12 +4,12 @@ CFLAGS += -DSTM32H723xx -DHSE_VALUE=8000000 PORT ?= 0 # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s -GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h723xx_flash.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s +LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h723xx_flash.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h723xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h723xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h723zg diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk index 558e943b4..36882a0e5 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk @@ -5,12 +5,12 @@ PORT ?= 1 SPEED ?= high # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h743xi diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk index 0bff0940e..f641b77aa 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk @@ -4,12 +4,12 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=8000000 PORT ?= 0 # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h743zi diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk index 86347ade7..9c3615f05 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk @@ -7,12 +7,12 @@ CFLAGS += -DSTM32H745xx -DCORE_CM7 -DHSE_VALUE=25000000 PORT ?= 0 # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s -GCC_LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s +LD_FILE_GCC = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h745xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h745xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf # For flash-jlink target JLINK_DEVICE = stm32h745xi_m7 diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk index 9997faff9..cea4bfacb 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk @@ -10,12 +10,12 @@ SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim_ex.c # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s -GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s +LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32h743ii diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk index 48730bbb4..a1ff26d0b 100644 --- a/hw/bsp/stm32h7/family.mk +++ b/hw/bsp/stm32h7/family.mk @@ -28,12 +28,12 @@ else endif # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter +CFLAGS_GCC += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter # ----------------- # Sources & Include diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk index 854397fc8..87b333500 100644 --- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk @@ -2,12 +2,12 @@ CFLAGS += \ -DSTM32L412xx \ # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32l412kb diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk index 125f1f106..3ba9ab444 100644 --- a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk +++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk @@ -2,12 +2,12 @@ CFLAGS += \ -DSTM32L476xx \ # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32l476vg diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk index 11edcd9a8..84f831878 100644 --- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk @@ -2,12 +2,12 @@ CFLAGS += \ -DSTM32L4P5xx \ # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32l4p5zg diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk index 6dca88a8b..ad5bfba38 100644 --- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk @@ -3,12 +3,12 @@ CFLAGS += \ -DSTM32L4R5xx \ # GCC -GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s -GCC_LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s +LD_FILE_GCC = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld # IAR -IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s -IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32l4r5zi diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk index 4392c6766..d492b9645 100644 --- a/hw/bsp/stm32l4/family.mk +++ b/hw/bsp/stm32l4/family.mk @@ -14,12 +14,12 @@ CFLAGS += \ -DCFG_TUSB_MCU=OPT_MCU_STM32L4 # GCC Flags -GCC_CFLAGS += \ +CFLAGS_GCC += \ -flto \ -nostdlib -nostartfiles # suppress warning caused by vendor mcu driver -GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=maybe-uninitialized -Wno-error=cast-align # ----------------- # Sources & Include diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk index 693fda0b3..bba0607df 100644 --- a/tools/make/toolchain/arm_gcc.mk +++ b/tools/make/toolchain/arm_gcc.mk @@ -69,6 +69,3 @@ LDFLAGS += \ ifneq ($(FAMILY),rx) LDFLAGS += -Wl,--print-memory-usage endif - -LDFLAGS += \ - -Wl,--print-memory-usage \ diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk index a39caf351..2e8b9f911 100644 --- a/tools/make/toolchain/arm_gcc_rules.mk +++ b/tools/make/toolchain/arm_gcc_rules.mk @@ -1,4 +1,4 @@ -SRC_S += $(GCC_SRC_S) +SRC_S += $(SRC_S_GCC) # Assembly files can be name with upper case .S, convert it to .s SRC_S := $(SRC_S:.S=.s) @@ -9,7 +9,7 @@ SRC_S := $(SRC_S:.S=.s) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o)) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) -CFLAGS += $(GCC_CFLAGS) -MD +CFLAGS += $(CFLAGS_GCC) -MD # LTO makes it difficult to analyze map file for optimizing size purpose # We will run this option in ci @@ -27,8 +27,8 @@ ifdef LD_FILE LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE) endif -ifdef GCC_LD_FILE -LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE) +ifdef LD_FILE_GCC +LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE_GCC) endif ifneq ($(SKIP_NANOLIB), 1) diff --git a/tools/make/toolchain/arm_iar_rules.mk b/tools/make/toolchain/arm_iar_rules.mk index 4b5cc90e3..2c066f6da 100644 --- a/tools/make/toolchain/arm_iar_rules.mk +++ b/tools/make/toolchain/arm_iar_rules.mk @@ -1,4 +1,4 @@ -SRC_S += $(IAR_SRC_S) +SRC_S += $(SRC_S_IAR) # Assembly files can be name with upper case .S, convert it to .s SRC_S := $(SRC_S:.S=.s) @@ -10,7 +10,7 @@ OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o)) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) # Linker script -LDFLAGS += --config $(TOP)/$(IAR_LD_FILE) +LDFLAGS += --config $(TOP)/$(LD_FILE_IAR) # --------------------------------------- # Rules From eb4380fa14a4cdbd8dde92da74c223b458662dc9 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 20:17:48 +0700 Subject: [PATCH 59/94] more make update --- hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk | 2 ++ hw/bsp/stm32f0/boards/stm32f072eval/board.mk | 7 +++---- hw/bsp/stm32f7/boards/stlinkv3mini/board.mk | 9 +++------ hw/bsp/stm32f7/boards/stm32f723disco/board.mk | 9 +++------ hw/bsp/stm32f7/boards/stm32f746disco/board.mk | 9 +++------ hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk | 9 +++------ hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk | 9 +++------ hw/bsp/stm32f7/boards/stm32f769disco/board.mk | 9 +++------ hw/bsp/stm32f7/family.mk | 7 +++++++ 9 files changed, 30 insertions(+), 40 deletions(-) diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk index f8f0952e8..63f6a31c2 100644 --- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f070xb + CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY # Linker diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk index c368bd8af..bab889524 100644 --- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk @@ -1,11 +1,10 @@ +MCU_VARIANT = stm32f072xb + CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf - # For flash-jlink target JLINK_DEVICE = stm32f072vb diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk index b59125edc..94dce5e84 100644 --- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk +++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f723xx + # Only OTG-HS has a connector on this board PORT ?= 1 SPEED ?= high @@ -6,13 +8,8 @@ CFLAGS += \ -DSTM32F723xx \ -DHSE_VALUE=25000000 \ -# GCC -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf - # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk index 168ca5dad..43e8eafe1 100644 --- a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f723xx + PORT ?= 1 SPEED ?= high @@ -5,13 +7,8 @@ CFLAGS += \ -DSTM32F723xx \ -DHSE_VALUE=25000000 \ -# GCC +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s - -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk index acda5e2e8..61c0aaa7d 100644 --- a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f746xx + PORT ?= 1 SPEED ?= high @@ -5,13 +7,8 @@ CFLAGS += \ -DSTM32F746xx \ -DHSE_VALUE=25000000 -# GCC +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s - -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk index 511433885..3683c79a5 100644 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f746xx + PORT ?= 0 SPEED ?= full @@ -5,13 +7,8 @@ CFLAGS += \ -DSTM32F746xx \ -DHSE_VALUE=8000000 -# GCC +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s - -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk index 329771986..059ad166a 100644 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f767xx + PORT ?= 0 SPEED ?= full @@ -5,13 +7,8 @@ CFLAGS += \ -DSTM32F767xx \ -DHSE_VALUE=8000000 \ -# GCC +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s - -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf # For flash-jlink target JLINK_DEVICE = stm32f767zi diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk index 20042db98..a45af8cc0 100644 --- a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk +++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk @@ -1,3 +1,5 @@ +MCU_VARIANT = stm32f769xx + # Only OTG-HS has a connector on this board PORT ?= 1 SPEED ?= high @@ -6,13 +8,8 @@ CFLAGS += \ -DSTM32F769xx \ -DHSE_VALUE=25000000 \ -# GCC +# Linker LD_FILE_GCC = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld -SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s - -# IAR -SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s -LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf # flash target using on-board stlink flash: flash-stlink diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 1a15a743c..4a699ea31 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -56,3 +56,10 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_HAL_DRIVER)/Inc + +# Startup +SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s +SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s + +# Linker +LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf From 38a582634ecb31745600768583651df2468ed913 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 20:32:18 +0700 Subject: [PATCH 60/94] fix missing replace --- examples/device/cdc_msc_freertos/Makefile | 4 ++-- examples/device/hid_composite_freertos/Makefile | 4 ++-- examples/device/net_lwip_webserver/Makefile | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index 73b4ce608..5b5e513ad 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -37,10 +37,10 @@ SRC_S += \ # CFLAGS += -Wno-error=sign-compare # Suppress FreeRTOSConfig.h warnings -GCC_CFLAGS += -Wno-error=redundant-decls +CFLAGS_GCC += -Wno-error=redundant-decls # Suppress FreeRTOS source warnings -GCC_CFLAGS += -Wno-error=cast-qual +CFLAGS_GCC += -Wno-error=cast-qual # FreeRTOS (lto + Os) linker issue LDFLAGS += -Wl,--undefined=vTaskSwitchContext diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index 9d30fddf7..cc1526cfe 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -36,10 +36,10 @@ SRC_S += \ # CFLAGS += -Wno-error=sign-compare # Suppress FreeRTOSConfig.h warnings -GCC_CFLAGS += -Wno-error=redundant-decls +CFLAGS_GCC += -Wno-error=redundant-decls # Suppress FreeRTOS source warnings -GCC_CFLAGS += -Wno-error=cast-qual +CFLAGS_GCC += -Wno-error=cast-qual # FreeRTOS (lto + Os) linker issue LDFLAGS += -Wl,--undefined=vTaskSwitchContext diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile index bc2914b36..90b429d00 100644 --- a/examples/device/net_lwip_webserver/Makefile +++ b/examples/device/net_lwip_webserver/Makefile @@ -3,7 +3,7 @@ DEPS_SUBMODULES += lib/lwip include ../../make.mk # suppress warning caused by lwip -GCC_CFLAGS += \ +CFLAGS_GCC += \ -Wno-error=null-dereference \ -Wno-error=unused-parameter \ -Wno-error=unused-variable From 946d3fdd4f0b5dc1e5a3cadde25691d6f34e30dc Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 21:17:40 +0700 Subject: [PATCH 61/94] fix iar with make --- examples/device/cdc_msc_freertos/Makefile | 2 +- examples/device/hid_composite_freertos/Makefile | 2 +- tools/make/toolchain/arm_gcc_rules.mk | 2 +- tools/make/toolchain/arm_iar.mk | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile index 5b5e513ad..0bee668b7 100644 --- a/examples/device/cdc_msc_freertos/Makefile +++ b/examples/device/cdc_msc_freertos/Makefile @@ -43,6 +43,6 @@ CFLAGS_GCC += -Wno-error=redundant-decls CFLAGS_GCC += -Wno-error=cast-qual # FreeRTOS (lto + Os) linker issue -LDFLAGS += -Wl,--undefined=vTaskSwitchContext +LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext include ../../rules.mk diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile index cc1526cfe..a892e7d1d 100644 --- a/examples/device/hid_composite_freertos/Makefile +++ b/examples/device/hid_composite_freertos/Makefile @@ -42,6 +42,6 @@ CFLAGS_GCC += -Wno-error=redundant-decls CFLAGS_GCC += -Wno-error=cast-qual # FreeRTOS (lto + Os) linker issue -LDFLAGS += -Wl,--undefined=vTaskSwitchContext +LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext include ../../rules.mk diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk index 2e8b9f911..f3482b9a8 100644 --- a/tools/make/toolchain/arm_gcc_rules.mk +++ b/tools/make/toolchain/arm_gcc_rules.mk @@ -21,7 +21,7 @@ ifneq ($(CFLAGS_SKIP),) CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS)) endif -LDFLAGS += $(CFLAGS) +LDFLAGS += $(CFLAGS) $(LDFLAGS_GCC) ifdef LD_FILE LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE) diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk index f1850add7..04c9f22b3 100644 --- a/tools/make/toolchain/arm_iar.mk +++ b/tools/make/toolchain/arm_iar.mk @@ -8,4 +8,4 @@ SIZE = size CFLAGS += -e --debug --silent # silent mode -ASFLAGS += -S +ASFLAGS += -S $(addprefix -I,$(INC)) From 2a96ef2519d566c654907df0e1198088510774fe Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 21:33:46 +0700 Subject: [PATCH 62/94] add cmake for f0, f1 --- .github/workflows/build_iar.yml | 4 +- .../boards/stm32f070rbnucleo/board.cmake | 11 ++ .../stm32f0/boards/stm32f072disco/board.cmake | 11 ++ .../stm32f0/boards/stm32f072eval/board.cmake | 12 ++ hw/bsp/stm32f0/family.cmake | 134 ++++++++++++++++++ .../boards/stm32f103_bluepill/board.cmake | 13 ++ .../boards/stm32f103_mini_2/board.cmake | 12 ++ hw/bsp/stm32f1/family.cmake | 130 +++++++++++++++++ tools/cmake/cpu/cortex-m0.cmake | 17 +++ 9 files changed, 342 insertions(+), 2 deletions(-) create mode 100644 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake create mode 100644 hw/bsp/stm32f0/boards/stm32f072disco/board.cmake create mode 100644 hw/bsp/stm32f0/boards/stm32f072eval/board.cmake create mode 100644 hw/bsp/stm32f0/family.cmake create mode 100644 hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake create mode 100644 hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake create mode 100644 hw/bsp/stm32f1/family.cmake create mode 100644 tools/cmake/cpu/cortex-m0.cmake diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 8c9a500d7..39d9b9232 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -32,7 +32,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32f0 stm32f1 stm32f7 stm32l4' + - 'stm32f7 stm32l4' steps: - name: Clean workspace run: | @@ -58,7 +58,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32g0 stm32g4 stm32h7' + - 'stm32f0 stm32f1 stm32g0 stm32g4 stm32h7' steps: - name: Clean workspace run: | diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake new file mode 100644 index 000000000..61fec0d30 --- /dev/null +++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT stm32f070xb) +set(JLINK_DEVICE stm32f070rb) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32F070rbtx_flash.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F070xB + CFG_EXAMPLE_VIDEO_READONLY + ) +endfunction() diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake b/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake new file mode 100644 index 000000000..287593f43 --- /dev/null +++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT stm32f072xb) +set(JLINK_DEVICE stm32f072rb) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F072RBTx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F072xB + CFG_EXAMPLE_VIDEO_READONLY + ) +endfunction() diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake b/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake new file mode 100644 index 000000000..42d778cb5 --- /dev/null +++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake @@ -0,0 +1,12 @@ +set(MCU_VARIANT stm32f072xb) +set(JLINK_DEVICE stm32f072vb) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F072VBTx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F072xB + LSI_VALUE=40000 + CFG_EXAMPLE_VIDEO_READONLY + ) +endfunction() diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake new file mode 100644 index 000000000..68a69586e --- /dev/null +++ b/hw/bsp/stm32f0/family.cmake @@ -0,0 +1,134 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY f0) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m0 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32F0 CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + # Startup + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + + # Linker + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_STM32F0) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + #family_flash_jlink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake new file mode 100644 index 000000000..87b8458a2 --- /dev/null +++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake @@ -0,0 +1,13 @@ +set(MCU_VARIANT stm32f103xb) +set(JLINK_DEVICE stm32f103c8) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F103X8_FLASH.ld) +set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32f103x8_flash.icf) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F103xB + HSE_VALUE=8000000U + CFG_EXAMPLE_VIDEO_READONLY + ) +endfunction() diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake new file mode 100644 index 000000000..67a96c4d1 --- /dev/null +++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake @@ -0,0 +1,12 @@ +set(MCU_VARIANT stm32f103xb) +set(JLINK_DEVICE stm32f103rc) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F103XC_FLASH.ld) +set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32f103xc_flash.icf) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F103xB + HSE_VALUE=8000000U + ) +endfunction() diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake new file mode 100644 index 000000000..d42da090d --- /dev/null +++ b/hw/bsp/stm32f1/family.cmake @@ -0,0 +1,130 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY f1) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32F1 CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + # Startup + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_STM32F1) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + #family_flash_jlink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/tools/cmake/cpu/cortex-m0.cmake b/tools/cmake/cpu/cortex-m0.cmake new file mode 100644 index 000000000..bc2257048 --- /dev/null +++ b/tools/cmake/cpu/cortex-m0.cmake @@ -0,0 +1,17 @@ +if (TOOLCHAIN STREQUAL "gcc") + set(TOOLCHAIN_COMMON_FLAGS + -mthumb + -mcpu=cortex-m0plus + -mfloat-abi=soft + ) + + set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "") + +elseif (TOOLCHAIN STREQUAL "iar") + set(TOOLCHAIN_COMMON_FLAGS + --cpu cortex-m0 + ) + + set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "") + +endif () From 430f16bf76738ca192cfca872c9fd271bfbb78eb Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 22:36:53 +0700 Subject: [PATCH 63/94] move all IAR to cmake --- .github/workflows/build_iar.yml | 28 +- .../stm32f0/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++ hw/bsp/stm32f0/family.cmake | 12 +- .../stm32f1/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++ hw/bsp/stm32f1/family.cmake | 8 +- .../stm32f7/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++ .../stm32f7/boards/stlinkv3mini/board.cmake | 14 + .../stm32f7/boards/stm32f723disco/board.cmake | 14 + .../stm32f723disco/stm32f7xx_hal_conf.h | 472 ------------------ .../stm32f7/boards/stm32f746disco/board.cmake | 14 + .../stm32f746disco/stm32f7xx_hal_conf.h | 472 ------------------ .../boards/stm32f746nucleo/board.cmake | 13 + .../stm32f746nucleo/stm32f7xx_hal_conf.h | 472 ------------------ .../boards/stm32f767nucleo/board.cmake | 13 + .../stm32f767nucleo/stm32f7xx_hal_conf.h | 472 ------------------ .../stm32f7/boards/stm32f769disco/board.cmake | 14 + .../stm32f769disco/stm32f7xx_hal_conf.h | 472 ------------------ hw/bsp/stm32f7/family.cmake | 135 +++++ .../stlinkv3mini => }/stm32f7xx_hal_conf.h | 0 .../boards/stm32g0b1nucleo/board.cmake | 4 - hw/bsp/stm32g0/family.cmake | 5 + .../stm32g4/boards/b_g474e_dpow1/board.cmake | 4 - .../boards/stm32g474nucleo/board.cmake | 4 - hw/bsp/stm32g4/family.cmake | 5 + hw/bsp/stm32h7/boards/daisyseed/board.cmake | 4 - .../boards/stm32h723nucleo/board.cmake | 4 - .../stm32h7/boards/stm32h743eval/board.cmake | 4 - .../boards/stm32h743nucleo/board.cmake | 4 - .../stm32h7/boards/stm32h745disco/board.cmake | 4 - .../boards/waveshare_openh743i/board.cmake | 4 - hw/bsp/stm32h7/family.cmake | 5 + .../boards/stm32l412nucleo/board.cmake | 10 + .../stm32l4/boards/stm32l476disco/board.cmake | 10 + .../boards/stm32l4p5nucleo/board.cmake | 10 + .../boards/stm32l4r5nucleo/board.cmake | 11 + hw/bsp/stm32l4/family.cmake | 136 +++++ hw/bsp/stm32l4/family.mk | 6 +- 37 files changed, 917 insertions(+), 2437 deletions(-) create mode 100644 hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h create mode 100644 hw/bsp/stm32f7/boards/stlinkv3mini/board.cmake create mode 100644 hw/bsp/stm32f7/boards/stm32f723disco/board.cmake delete mode 100644 hw/bsp/stm32f7/boards/stm32f723disco/stm32f7xx_hal_conf.h create mode 100644 hw/bsp/stm32f7/boards/stm32f746disco/board.cmake delete mode 100644 hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h create mode 100644 hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake delete mode 100644 hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h create mode 100644 hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake delete mode 100644 hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h create mode 100644 hw/bsp/stm32f7/boards/stm32f769disco/board.cmake delete mode 100644 hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h create mode 100644 hw/bsp/stm32f7/family.cmake rename hw/bsp/stm32f7/{boards/stlinkv3mini => }/stm32f7xx_hal_conf.h (100%) create mode 100644 hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake create mode 100644 hw/bsp/stm32l4/boards/stm32l476disco/board.cmake create mode 100644 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake create mode 100644 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake create mode 100644 hw/bsp/stm32l4/family.cmake diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 39d9b9232..6273385e7 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -23,32 +23,6 @@ concurrency: cancel-in-progress: true jobs: - makefile: - runs-on: [self-hosted, Linux, X64, hifiphile] - strategy: - fail-fast: false - matrix: - family: - # Alphabetical order - # Note: bundle multiple families into a matrix since there is only one self-hosted instance can - # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32f7 stm32l4' - steps: - - name: Clean workspace - run: | - echo "Cleaning up previous run" - rm -rf "${{ github.workspace }}" - mkdir -p "${{ github.workspace }}" - - - name: Checkout TinyUSB - uses: actions/checkout@v3 - - - name: Get Dependencies - run: python3 tools/get_deps.py ${{ matrix.family }} - - - name: Build - run: python3 tools/build_family.py ${{ matrix.family }} TOOLCHAIN=iar - cmake: runs-on: [self-hosted, Linux, X64, hifiphile] strategy: @@ -58,7 +32,7 @@ jobs: # Alphabetical order # Note: bundle multiple families into a matrix since there is only one self-hosted instance can # run IAR build. Too many matrix can hurt due to setup/teardown overhead. - - 'stm32f0 stm32f1 stm32g0 stm32g4 stm32h7' + - 'stm32f0 stm32f1 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4' steps: - name: Clean workspace run: | diff --git a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..fc2f9fc67 --- /dev/null +++ b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "stm32f0xx.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 2 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 4 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 4 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<
© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.
- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -/* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_JPEG_MODULE_ENABLED */ -/* #define HAL_MDIOS_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ - -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ -#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ -#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ - - -#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ -#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CAN_LEGACY_MODULE_ENABLED - #include "stm32f7xx_hal_can_legacy.h" -#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f7xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32f7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32f7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake new file mode 100644 index 000000000..e44c164b8 --- /dev/null +++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake @@ -0,0 +1,14 @@ +set(MCU_VARIANT stm32f746xx) +set(JLINK_DEVICE stm32f746xx) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F746ZGTx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F746xx + HSE_VALUE=25000000 + # default to PORT 1 High Speed + BOARD_TUD_RHPORT=1 + BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + ) +endfunction() diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h deleted file mode 100644 index 03dec8f0d..000000000 --- a/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -/* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_JPEG_MODULE_ENABLED */ -/* #define HAL_MDIOS_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ - -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ -#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ -#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ - - -#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ -#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CAN_LEGACY_MODULE_ENABLED - #include "stm32f7xx_hal_can_legacy.h" -#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f7xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32f7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32f7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake new file mode 100644 index 000000000..dd4d4a753 --- /dev/null +++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake @@ -0,0 +1,13 @@ +set(MCU_VARIANT stm32f746xx) +set(JLINK_DEVICE stm32f746xx) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F746ZGTx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F746xx + HSE_VALUE=8000000 + BOARD_TUD_RHPORT=0 + BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + ) +endfunction() diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h deleted file mode 100644 index 03dec8f0d..000000000 --- a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -/* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_JPEG_MODULE_ENABLED */ -/* #define HAL_MDIOS_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ - -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ -#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ -#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ - - -#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ -#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CAN_LEGACY_MODULE_ENABLED - #include "stm32f7xx_hal_can_legacy.h" -#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f7xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32f7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32f7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake new file mode 100644 index 000000000..679a6ce87 --- /dev/null +++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake @@ -0,0 +1,13 @@ +set(MCU_VARIANT stm32f767xx) +set(JLINK_DEVICE stm32f767zi) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F767ZITx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F767xx + HSE_VALUE=8000000 + BOARD_TUD_RHPORT=0 + BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED + ) +endfunction() diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h deleted file mode 100644 index 03dec8f0d..000000000 --- a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -/* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_JPEG_MODULE_ENABLED */ -/* #define HAL_MDIOS_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ - -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ -#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ -#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ - - -#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ -#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CAN_LEGACY_MODULE_ENABLED - #include "stm32f7xx_hal_can_legacy.h" -#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f7xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32f7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32f7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake new file mode 100644 index 000000000..62a157c58 --- /dev/null +++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake @@ -0,0 +1,14 @@ +set(MCU_VARIANT stm32f769xx) +set(JLINK_DEVICE stm32f769xx) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F769ZITx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32F769xx + HSE_VALUE=25000000 + # default to PORT 1 High Speed + BOARD_TUD_RHPORT=1 + BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED + ) +endfunction() diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h deleted file mode 100644 index 581f0e46a..000000000 --- a/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h +++ /dev/null @@ -1,472 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f7xx_hal_conf.h - * @author MCD Application Team - * @brief HAL configuration file. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F7xx_HAL_CONF_H -#define __STM32F7xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -/* #define HAL_ADC_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CAN_LEGACY_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ -/* #define HAL_DCMI_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -#define HAL_FLASH_MODULE_ENABLED -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -/* #define HAL_I2C_MODULE_ENABLED */ -/* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -#define HAL_PWR_MODULE_ENABLED -/* #define HAL_QSPI_MODULE_ENABLED */ -#define HAL_RCC_MODULE_ENABLED -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ -/* #define HAL_TIM_MODULE_ENABLED */ -#define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_CORTEX_MODULE_ENABLED -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_JPEG_MODULE_ENABLED */ -/* #define HAL_MDIOS_MODULE_ENABLED */ - - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */ - -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ -#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ -#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIOS register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)5) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)5) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ -/* LAN8742A PHY Address*/ -#define LAN8742A_PHY_ADDRESS 0x00 -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x00000FFF) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) - -#define PHY_READ_TO ((uint32_t)0x0000FFFF) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ - -#define PHY_SR ((uint16_t)0x1F) /*!< PHY special control/ status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0004) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0010) /*!< PHY Duplex mask */ - - -#define PHY_ISFR ((uint16_t)0x1D) /*!< PHY Interrupt Source Flag register Offset */ -#define PHY_ISFR_INT4 ((uint16_t)0x0010) /*!< PHY Link down inturrupt */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 1U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f7xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f7xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f7xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f7xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f7xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f7xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CAN_LEGACY_MODULE_ENABLED - #include "stm32f7xx_hal_can_legacy.h" -#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f7xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f7xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f7xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f7xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f7xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f7xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f7xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f7xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f7xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f7xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f7xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f7xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f7xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f7xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f7xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f7xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f7xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f7xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f7xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f7xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f7xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f7xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f7xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f7xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f7xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f7xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f7xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f7xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f7xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f7xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f7xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f7xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f7xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f7xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f7xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_JPEG_MODULE_ENABLED - #include "stm32f7xx_hal_jpeg.h" -#endif /* HAL_JPEG_MODULE_ENABLED */ - -#ifdef HAL_MDIOS_MODULE_ENABLED - #include "stm32f7xx_hal_mdios.h" -#endif /* HAL_MDIOS_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F7xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake new file mode 100644 index 000000000..3b6ba1a15 --- /dev/null +++ b/hw/bsp/stm32f7/family.cmake @@ -0,0 +1,135 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY f7) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32F7 CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_STM32F7) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + family_flash_jlink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/stm32f7xx_hal_conf.h similarity index 100% rename from hw/bsp/stm32f7/boards/stlinkv3mini/stm32f7xx_hal_conf.h rename to hw/bsp/stm32f7/stm32f7xx_hal_conf.h diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake index 1ebf8a700..defeb0114 100644 --- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake +++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake @@ -2,10 +2,6 @@ set(JLINK_DEVICE STM32G0B1RE) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake index 1381eaa5f..fa93566bf 100644 --- a/hw/bsp/stm32g0/family.cmake +++ b/hw/bsp/stm32g0/family.cmake @@ -34,6 +34,11 @@ endif () # only need to be built ONCE for all examples function(add_board_target BOARD_TARGET) if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + add_library(${BOARD_TARGET} STATIC ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake index 9b72672ea..7a276b20d 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32g474xx) set(JLINK_DEVICE stm32g474re) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake index 88cd616b3..11c76863f 100644 --- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake +++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32g474xx) set(JLINK_DEVICE stm32g474re) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 45525c744..c89993f6d 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -34,6 +34,11 @@ endif () # only need to be built ONCE for all examples function(add_board_target BOARD_TARGET) if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + add_library(${BOARD_TARGET} STATIC ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.cmake b/hw/bsp/stm32h7/boards/daisyseed/board.cmake index 9fac51128..4811c97e8 100644 --- a/hw/bsp/stm32h7/boards/daisyseed/board.cmake +++ b/hw/bsp/stm32h7/boards/daisyseed/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h750xx) set(JLINK_DEVICE stm32h750ibk6_m7) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32h750ibkx_flash.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake index ac1acd346..b7d133dfa 100644 --- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake +++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h723xx) set(JLINK_DEVICE stm32h723zg) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake index 2cd2a4bac..a28aa87bd 100644 --- a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake +++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx) set(JLINK_DEVICE stm32h743xi) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake index 9d5f09be4..f1532a95f 100644 --- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake +++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx) set(JLINK_DEVICE stm32h743xi) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake index 46744df49..f0e8bd70a 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h745xx) set(JLINK_DEVICE stm32h745xi_m7) set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake index 033d3a9f2..83c8d4833 100644 --- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake +++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake @@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx) set(JLINK_DEVICE stm32h743xi) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) -set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) - -set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) -set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index f04a768a5..8f161470e 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -34,6 +34,11 @@ endif () # only need to be built ONCE for all examples function(add_board_target BOARD_TARGET) if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + add_library(${BOARD_TARGET} STATIC ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake new file mode 100644 index 000000000..e979a7378 --- /dev/null +++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake @@ -0,0 +1,10 @@ +set(MCU_VARIANT stm32l412xx) +set(JLINK_DEVICE stm32l412kb) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L412KBUx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32L412xx + ) +endfunction() diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake b/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake new file mode 100644 index 000000000..4ade0a5c9 --- /dev/null +++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake @@ -0,0 +1,10 @@ +set(MCU_VARIANT stm32l476xx) +set(JLINK_DEVICE stm32l476vg) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L476VGTx_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32L476xx + ) +endfunction() diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake new file mode 100644 index 000000000..ead241e32 --- /dev/null +++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake @@ -0,0 +1,10 @@ +set(MCU_VARIANT stm32l4p5xx) +set(JLINK_DEVICE stm32l4p5zg) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L4P5ZGTX_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32L4P5xx + ) +endfunction() diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake new file mode 100644 index 000000000..d4bbe6a94 --- /dev/null +++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT stm32l4r5xx) +set(JLINK_DEVICE stm32l4r5zi) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L4RXxI_FLASH.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32L4R5xx + HSE_VALUE=8000000 + ) +endfunction() diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake new file mode 100644 index 000000000..d299b2568 --- /dev/null +++ b/hw/bsp/stm32l4/family.cmake @@ -0,0 +1,136 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(ST_FAMILY l4) +set(ST_PREFIX stm32${ST_FAMILY}xx) + +set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver) +set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY}) +set(CMSIS_5 ${TOP}/lib/CMSIS_5) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS STM32L4 CACHE INTERNAL "") + +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + # Startup & Linker script + set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) + set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + add_library(${BOARD_TARGET} STATIC + ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c + ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c + ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMSIS_5}/CMSIS/Core/Include + ${ST_CMSIS}/Include + ${ST_HAL_DRIVER}/Inc + ) + target_compile_options(${BOARD_TARGET} PUBLIC + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nosys.specs + --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET) + family_configure_common(${TARGET}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS)) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c + ${TOP}/src/st/stm32_fsdev/dcd_stm32_fsdev.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_stlink(${TARGET}) + family_flash_jlink(${TARGET}) +endfunction() + + +function(family_configure_device_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_example(${TARGET}) +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_example(${TARGET}) +endfunction() diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk index d492b9645..c16040887 100644 --- a/hw/bsp/stm32l4/family.mk +++ b/hw/bsp/stm32l4/family.mk @@ -32,11 +32,11 @@ SRC_C += \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ - $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ + $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c From c81d8b43a1f0d366cf273b489ce51a3f21653c87 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 22:58:15 +0700 Subject: [PATCH 64/94] fix ci build --- hw/bsp/stm32f0/family.cmake | 1 + hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake | 5 ++--- hw/bsp/stm32h7/boards/stm32h745disco/board.cmake | 1 + hw/bsp/stm32h7/family.cmake | 5 ++++- hw/bsp/stm32l4/family.cmake | 2 +- 5 files changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake index 9f6a7f098..ecf6a8424 100644 --- a/hw/bsp/stm32f0/family.cmake +++ b/hw/bsp/stm32f0/family.cmake @@ -59,6 +59,7 @@ function(add_board_target BOARD_TARGET) target_compile_options(${BOARD_TARGET} PUBLIC ) target_compile_definitions(${BOARD_TARGET} PUBLIC + CFG_EXAMPLE_MSC_READONLY ) update_board(${BOARD_TARGET}) diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake index defeb0114..8874b0526 100644 --- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake +++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake @@ -1,11 +1,10 @@ -#set(MCU_VARIANT MIMXRT1011) -set(JLINK_DEVICE STM32G0B1RE) +set(MCU_VARIANT stm32g0b1xx) +set(JLINK_DEVICE stm32g0b1re) set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC STM32G0B1xx - #HSE_VALUE=8000000U ) endfunction() diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake index f0e8bd70a..f1313d54e 100644 --- a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake +++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake @@ -2,6 +2,7 @@ set(MCU_VARIANT stm32h745xx) set(JLINK_DEVICE stm32h745xi_m7) set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld) +set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index 8f161470e..f3705edb4 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -37,7 +37,10 @@ function(add_board_target BOARD_TARGET) # Startup & Linker script set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) - set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + + if(NOT DEFINED LD_FILE_IAR) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + endif() add_library(${BOARD_TARGET} STATIC ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake index d299b2568..c8397f418 100644 --- a/hw/bsp/stm32l4/family.cmake +++ b/hw/bsp/stm32l4/family.cmake @@ -110,7 +110,7 @@ function(family_configure_example TARGET) family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS)) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c - ${TOP}/src/st/stm32_fsdev/dcd_stm32_fsdev.c + ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ) target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) From b9cefb144004691ec201f3bb60619ebac633da4b Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 23:10:01 +0700 Subject: [PATCH 65/94] fix build with L4 --- hw/bsp/stm32l4/family.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake index c8397f418..83c51c9bf 100644 --- a/hw/bsp/stm32l4/family.cmake +++ b/hw/bsp/stm32l4/family.cmake @@ -107,7 +107,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS)) + family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c From a64d5607a745cc655ded19bc91494a9b55dc0dd6 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 23:17:28 +0700 Subject: [PATCH 66/94] fix l4 freertos build --- .../stm32l4/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++++++++++++++ 1 file changed, 165 insertions(+) create mode 100644 hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h diff --git a/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..e6a735ddd --- /dev/null +++ b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,165 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #include "stm32l4xx.h" +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 4 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< Date: Sat, 24 Jun 2023 23:32:24 +0700 Subject: [PATCH 67/94] move some family ci make to cmake --- .github/workflows/build_arm.yml | 6 ++---- .github/workflows/cmake_arm.yml | 5 +++++ 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 620aec193..94721004c 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -43,11 +43,9 @@ jobs: - 'samd11 samd21' - 'samd51 same5x' - 'saml2x' - - 'stm32f0 stm32f1 stm32f2 stm32f3' + - 'stm32f2 stm32f3' - 'stm32f4' - - 'stm32f7' - - 'stm32h7' - - 'stm32l0 stm32l4 stm32u5 stm32wb' + - 'stm32l0 stm32u5 stm32wb' - 'tm4c123 xmc4000' steps: - name: Setup Python diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index 2ca8e32f5..ec2f977b6 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -37,8 +37,13 @@ jobs: - 'mcx' - 'imxrt' - 'rp2040' + - 'stm32f0' + - 'stm32f1' + - 'stm32f7' - 'stm32g0' - 'stm32g4' + - 'stm32h7' + - 'stm32l4' steps: - name: Setup Python uses: actions/setup-python@v4 From 30ccfe083216f5219bfa8e85e0a0a26547a2655c Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Jun 2023 23:36:52 +0700 Subject: [PATCH 68/94] more cmake less make --- .github/workflows/build_arm.yml | 4 ++-- .github/workflows/cmake_arm.yml | 6 ++++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 94721004c..b7e6890f9 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -34,9 +34,9 @@ jobs: family: # Alphabetical order - 'broadcom_32bit' - - 'kinetis_k32l2 kinetis_kl' + - 'kinetis_k32l2' - 'lpc11 lpc13 lpc15 lpc17' - - 'lpc51 lpc54 lpc55' + - 'lpc51 lpc54' - 'mm32 msp432e4' - 'nrf' - 'ra' diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index ec2f977b6..6d7977de8 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -33,9 +33,11 @@ jobs: matrix: family: # Alphabetical order - - 'lpc18' - - 'mcx' - 'imxrt' + - 'kinetis_kl' + - 'lpc18' + - 'lpc55' + - 'mcx' - 'rp2040' - 'stm32f0' - 'stm32f1' From 15376397b10e6fb35ef7ec4b693271adbafecabf Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 25 Jun 2023 00:05:23 +0700 Subject: [PATCH 69/94] run ci with -DCMAKE_BUILD_TYPE=MinSizeRel --- .github/workflows/build_iar.yml | 2 +- .github/workflows/cmake_arm.yml | 2 +- hw/bsp/stm32f7/family.c | 10 ++++++++++ hw/bsp/stm32f7/family.mk | 2 +- tools/build_cmake.py | 15 +++++++-------- 5 files changed, 20 insertions(+), 11 deletions(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 6273385e7..4c5fd770c 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -47,4 +47,4 @@ jobs: run: python3 tools/get_deps.py ${{ matrix.family }} - name: Build - run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar + run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index 6d7977de8..0ce63281e 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -75,7 +75,7 @@ jobs: run: python3 tools/get_deps.py ${{ matrix.family }} - name: Build - run: python tools/build_cmake.py ${{ matrix.family }} + run: python tools/build_cmake.py ${{ matrix.family }} -DCMAKE_BUILD_TYPE=MinSizeRel env: # for rp2040, there is no harm if defined for other families PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c index 88cba2c7d..ce7e9d1bc 100644 --- a/hw/bsp/stm32f7/family.c +++ b/hw/bsp/stm32f7/family.c @@ -143,9 +143,19 @@ void board_init(void) GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +// Suppress warning caused by mcu driver +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wshadow" +#endif + /* Enable USB FS Clocks */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + #if OTG_FS_VBUS_SENSE /* Configure VBUS Pin */ GPIO_InitStruct.Pin = GPIO_PIN_9; diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk index 4a699ea31..7f37a7e40 100644 --- a/hw/bsp/stm32f7/family.mk +++ b/hw/bsp/stm32f7/family.mk @@ -33,7 +33,7 @@ CFLAGS_GCC += \ -nostdlib -nostartfiles # mcu driver cause following warnings -CFLAGS_GCC += -Wno-error=shadow -Wno-error=cast-align +CFLAGS_GCC += -Wno-error=cast-align # ----------------- # Sources & Include diff --git a/tools/build_cmake.py b/tools/build_cmake.py index eb7375ae2..e539b9f94 100644 --- a/tools/build_cmake.py +++ b/tools/build_cmake.py @@ -13,8 +13,6 @@ SKIPPED = "\033[33mskipped\033[0m" build_separator = '-' * 106 -toolchain_iar = '-DTOOLCHAIN=iar' - def filter_with_input(mylist): if len(sys.argv) > 1: input_args = list(set(mylist).intersection(sys.argv)) @@ -22,7 +20,7 @@ def filter_with_input(mylist): mylist[:] = input_args -def build_family(family, toolchain_option): +def build_family(family, cmake_option): all_boards = [] for entry in os.scandir("hw/bsp/{}/boards".format(family)): if entry.is_dir() and entry.name != 'pico_sdk': @@ -38,7 +36,7 @@ def build_family(family, toolchain_option): # Generate build r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD" - f"={board} {toolchain_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) + f"={board} {cmake_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT) # Build if r.returncode == 0: @@ -74,9 +72,10 @@ def build_family(family, toolchain_option): if __name__ == '__main__': - # IAR CC - if toolchain_iar not in sys.argv: - toolchain_iar = '' + cmake_options = '' + for a in sys.argv[1:]: + if a.startswith('-'): + cmake_options += ' ' + a # If family are not specified in arguments, build all supported all_families = [] @@ -93,7 +92,7 @@ if __name__ == '__main__': # succeeded, failed, skipped total_result = [0, 0, 0] for family in all_families: - fret = build_family(family, toolchain_iar) + fret = build_family(family, cmake_options) if len(fret) == len(total_result): total_result = [total_result[i] + fret[i] for i in range(len(fret))] From 2ecd7c148db9f370dc151dc2f4fe223a71e9df76 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 25 Jun 2023 09:55:05 +0700 Subject: [PATCH 70/94] fix ci with lpc55 and kl, move hw test l4 to cmake iar --- .github/workflows/build_arm.yml | 128 ++++++++++++++++---------------- .github/workflows/build_iar.yml | 78 +++++++++++++++++++ hw/bsp/lpc55/family.cmake | 6 ++ tools/get_deps.py | 4 +- 4 files changed, 150 insertions(+), 66 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index b7e6890f9..0b770f379 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -101,67 +101,67 @@ jobs: path: | *.elf - # --------------------------------------- - # Hardware in the loop (HIL) - # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user - # - STM32L412 Nucleo with on-board jlink as ttyACM0 - # --------------------------------------- - hw-stm32l412nucleo-test: - needs: build-arm - runs-on: [self-hosted, Linux, X64, hifiphile] - - steps: - - name: Clean workspace - run: | - echo "Cleaning up previous run" - rm -rf "${{ github.workspace }}" - mkdir -p "${{ github.workspace }}" - - - name: Download stm32l4 Artifacts - uses: actions/download-artifact@v3 - with: - name: stm32l4 - - - name: Create flash.sh - run: | - echo > flash.sh 'echo halt > flash.jlink' - echo >> flash.sh 'echo r >> flash.jlink' - echo >> flash.sh 'echo loadfile $1 >> flash.jlink' - echo >> flash.sh 'echo r >> flash.jlink' - echo >> flash.sh 'echo go >> flash.jlink' - echo >> flash.sh 'echo exit >> flash.jlink' - echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)' - echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi' - chmod +x flash.sh - - - name: Test cdc_dual_ports - run: | - ./flash.sh cdc_dual_ports.elf - while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done - test -e /dev/ttyACM1 && echo "ttyACM1 exists" - test -e /dev/ttyACM2 && echo "ttyACM2 exists" - - # Debian does not auto mount usb drive. skip this test for now - - name: Test cdc_msc - if: false - run: | - ./flash.sh cdc_msc.elf - readme='/media/pi/TinyUSB MSC/README.TXT' - while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done - test -e /dev/ttyACM1 && echo "ttyACM1 exists" - test -f "$readme" && echo "$readme exists" - cat "$readme" - - - name: Test dfu - run: | - ./flash.sh dfu.elf - while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done - dfu-util -d cafe -a 0 -U dfu0 - dfu-util -d cafe -a 1 -U dfu1 - grep "TinyUSB DFU! - Partition 0" dfu0 - grep "TinyUSB DFU! - Partition 1" dfu1 - - - name: Test dfu_runtime - run: | - ./flash.sh dfu_runtime.elf - while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done +# # --------------------------------------- +# # Hardware in the loop (HIL) +# # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user +# # - STM32L412 Nucleo with on-board jlink as ttyACM0 +# # --------------------------------------- +# hw-stm32l412nucleo-test: +# needs: build-arm +# runs-on: [self-hosted, Linux, X64, hifiphile] +# +# steps: +# - name: Clean workspace +# run: | +# echo "Cleaning up previous run" +# rm -rf "${{ github.workspace }}" +# mkdir -p "${{ github.workspace }}" +# +# - name: Download stm32l4 Artifacts +# uses: actions/download-artifact@v3 +# with: +# name: stm32l4 +# +# - name: Create flash.sh +# run: | +# echo > flash.sh 'echo halt > flash.jlink' +# echo >> flash.sh 'echo r >> flash.jlink' +# echo >> flash.sh 'echo loadfile $1 >> flash.jlink' +# echo >> flash.sh 'echo r >> flash.jlink' +# echo >> flash.sh 'echo go >> flash.jlink' +# echo >> flash.sh 'echo exit >> flash.jlink' +# echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)' +# echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi' +# chmod +x flash.sh +# +# - name: Test cdc_dual_ports +# run: | +# ./flash.sh cdc_dual_ports.elf +# while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done +# test -e /dev/ttyACM1 && echo "ttyACM1 exists" +# test -e /dev/ttyACM2 && echo "ttyACM2 exists" +# +# # Debian does not auto mount usb drive. skip this test for now +# - name: Test cdc_msc +# if: false +# run: | +# ./flash.sh cdc_msc.elf +# readme='/media/pi/TinyUSB MSC/README.TXT' +# while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done +# test -e /dev/ttyACM1 && echo "ttyACM1 exists" +# test -f "$readme" && echo "$readme exists" +# cat "$readme" +# +# - name: Test dfu +# run: | +# ./flash.sh dfu.elf +# while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done +# dfu-util -d cafe -a 0 -U dfu0 +# dfu-util -d cafe -a 1 -U dfu1 +# grep "TinyUSB DFU! - Partition 0" dfu0 +# grep "TinyUSB DFU! - Partition 1" dfu1 +# +# - name: Test dfu_runtime +# run: | +# ./flash.sh dfu_runtime.elf +# while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index 4c5fd770c..cafb75cd8 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -48,3 +48,81 @@ jobs: - name: Build run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel + + # Upload binaries for hardware test with self-hosted + - name: Prepare stm32l412nucleo Artifacts + if: contains(matrix.family, 'stm32l4') + run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \; + + - name: Upload Artifacts for stm32l412nucleo + if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach' + uses: actions/upload-artifact@v3 + with: + name: stm32l4 + path: | + *.elf + + # --------------------------------------- + # Hardware in the loop (HIL) + # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user + # - STM32L412 Nucleo with on-board jlink as ttyACM0 + # --------------------------------------- + hw-stm32l412nucleo-test: + needs: cmake + runs-on: [self-hosted, Linux, X64, hifiphile] + + steps: + - name: Clean workspace + run: | + echo "Cleaning up previous run" + rm -rf "${{ github.workspace }}" + mkdir -p "${{ github.workspace }}" + + - name: Download stm32l4 Artifacts + uses: actions/download-artifact@v3 + with: + name: stm32l4 + + - name: Create flash.sh + run: | + echo > flash.sh 'echo halt > flash.jlink' + echo >> flash.sh 'echo r >> flash.jlink' + echo >> flash.sh 'echo loadfile $1 >> flash.jlink' + echo >> flash.sh 'echo r >> flash.jlink' + echo >> flash.sh 'echo go >> flash.jlink' + echo >> flash.sh 'echo exit >> flash.jlink' + echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)' + echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi' + chmod +x flash.sh + + - name: Test cdc_dual_ports + run: | + ./flash.sh cdc_dual_ports.elf + while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done + test -e /dev/ttyACM1 && echo "ttyACM1 exists" + test -e /dev/ttyACM2 && echo "ttyACM2 exists" + + # Debian does not auto mount usb drive. skip this test for now + - name: Test cdc_msc + if: false + run: | + ./flash.sh cdc_msc.elf + readme='/media/pi/TinyUSB MSC/README.TXT' + while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done + test -e /dev/ttyACM1 && echo "ttyACM1 exists" + test -f "$readme" && echo "$readme exists" + cat "$readme" + + - name: Test dfu + run: | + ./flash.sh dfu.elf + while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done + dfu-util -d cafe -a 0 -U dfu0 + dfu-util -d cafe -a 1 -U dfu1 + grep "TinyUSB DFU! - Partition 0" dfu0 + grep "TinyUSB DFU! - Partition 1" dfu1 + + - name: Test dfu_runtime + run: | + ./flash.sh dfu_runtime.elf + while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index 9f6b1f63d..e443f47d3 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -103,6 +103,12 @@ function(family_configure_example TARGET) ${TOP}/lib/sct_neopixel/sct_neopixel.c ) + # https://github.com/gsteiert/sct_neopixel/pull/1 + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES + COMPILE_FLAGS "-Wno-unused-parameter") + endif () + target_include_directories(${TARGET} PUBLIC # family, hw, board ${CMAKE_CURRENT_FUNCTION_LIST_DIR} diff --git a/tools/get_deps.py b/tools/get_deps.py index b81dabae0..34e2f30a3 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -52,7 +52,7 @@ deps_optional = { 'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'], 'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git', '950819b7de9b32f92c3edf396bc5ffb8d66e7009', - 'kinetis_k32l2 lpc51 lpc54 lpc55 mcx imxrt'], + 'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'], 'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', 'c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'rp2040'], @@ -166,7 +166,7 @@ deps_optional = { 'ch32v307'], 'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git', '20285262657d1b482d132d20d755c8c330d55c1f', - 'imxrt kinetis_k32l2 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' + 'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x' 'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 ' 'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'], 'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git', From 06d93e95d15b7b6fad4cde608a25c1b50776ec3e Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 25 Jun 2023 10:15:05 +0700 Subject: [PATCH 71/94] update hw test l4 --- .github/workflows/build_iar.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml index cafb75cd8..4b170f2bd 100644 --- a/.github/workflows/build_iar.yml +++ b/.github/workflows/build_iar.yml @@ -52,7 +52,9 @@ jobs: # Upload binaries for hardware test with self-hosted - name: Prepare stm32l412nucleo Artifacts if: contains(matrix.family, 'stm32l4') - run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \; + working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo + run: | + find device/ -name "*.elf" -exec mv {} ../../ \; - name: Upload Artifacts for stm32l412nucleo if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach' From 200e58d11ec6aceec31867129508c77f7989d051 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 26 Jun 2023 13:38:24 +0700 Subject: [PATCH 72/94] auto detect FAMILY based on BOARD --- .idea/cmake.xml | 42 ++++++++++++++++++++----------------- hw/bsp/family_support.cmake | 21 +++++++++++++++++-- 2 files changed, 42 insertions(+), 21 deletions(-) diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 0f7649efc..012dc63ef 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,10 +2,10 @@ - - - - + + + + @@ -15,7 +15,7 @@ - + @@ -25,20 +25,24 @@ - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 73e674c18..93cab8723 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -11,8 +11,25 @@ if (NOT DEFINED TOOLCHAIN) set(TOOLCHAIN gcc) endif () -if (NOT FAMILY) - message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line") +# FAMILY not defined, try to detect it from BOARD +if (NOT DEFINED FAMILY) + if (NOT DEFINED BOARD) + message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, espressif). + You can do this via -DFAMILY=xxx on the cmake command line") + endif () + + # Find path contains BOARD + file(GLOB BOARD_PATH LIST_DIRECTORIES true + RELATIVE ${TOP}/hw/bsp + ${TOP}/hw/bsp/*/boards/${BOARD} + ) + if (NOT BOARD_PATH) + message(FATAL_ERROR "Could not detect FAMILY from BOARD=${BOARD}") + endif () + + # replace / with ; so that we can get the first element as FAMILY + string(REPLACE "/" ";" BOARD_PATH ${BOARD_PATH}) + list(GET BOARD_PATH 0 FAMILY) endif () if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) From 3cfb838ba7f1f1a12203d36c9cbb615178af2cf7 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 26 Jun 2023 17:03:45 +0700 Subject: [PATCH 73/94] fix warnings when enable rtt with rp2040 --- hw/bsp/rp2040/family.c | 4 ++-- hw/bsp/rp2040/family.cmake | 6 +++++- src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +- src/portable/raspberrypi/rp2040/rp2040_usb.c | 2 +- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index 3aa989c0e..097e6fbd6 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -93,12 +93,12 @@ bool __no_inline_not_in_flash_func(get_bootsel_button)(void) { static void stdio_rtt_write (const char *buf, int length) { - SEGGER_RTT_Write(0, buf, length); + SEGGER_RTT_Write(0, buf, (unsigned) length); } static int stdio_rtt_read (char *buf, int len) { - return SEGGER_RTT_Read(0, buf, len); + return (int) SEGGER_RTT_Read(0, buf, (unsigned) len); } static stdio_driver_t stdio_rtt = diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 28637e3ee..5cf6b1219 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -127,7 +127,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker) target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG}) endif() - if(LOGGER STREQUAL "rtt") + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") target_compile_definitions(tinyusb_additions INTERFACE LOGGER_RTT SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL @@ -137,6 +137,10 @@ if (NOT TARGET _rp2040_family_inclusion_marker) ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c ) + set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + PROPERTIES + COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion") + target_include_directories(tinyusb_additions INTERFACE ${TOP}/lib/SEGGER_RTT/RTT ) diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c index 500a5373f..479b17b67 100644 --- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c +++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c @@ -189,7 +189,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by static void __tusb_irq_path_func(hw_handle_buff_status)(void) { uint32_t remaining_buffers = usb_hw->buf_status; - pico_trace("buf_status = 0x%08x\n", remaining_buffers); + pico_trace("buf_status = 0x%08lx\n", remaining_buffers); uint bit = 1u; for (uint8_t i = 0; remaining_buffers && i < USB_MAX_ENDPOINTS * 2; i++) { diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index cf37cba07..1f49665ff 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -419,7 +419,7 @@ static bool __tusb_irq_path_func(e15_is_critical_frame_period) (struct hw_endpoi if (delta < 800 || delta > 998) { return false; } - TU_LOG(3, "Avoiding sof %u now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof); + TU_LOG(3, "Avoiding sof %lu now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof); return true; } From 8aa28e63fbcb4f38b62a8e111e29ee48b710db6b Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 26 Jun 2023 17:54:31 +0700 Subject: [PATCH 74/94] minor clean up with include_guard() --- .idea/cmake.xml | 2 +- hw/bsp/rp2040/family.cmake | 674 ++++++++++++++++++------------------- src/CMakeLists.txt | 7 +- 3 files changed, 342 insertions(+), 341 deletions(-) diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 012dc63ef..2ac7993c1 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -25,7 +25,7 @@ - + diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 5cf6b1219..fee376538 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -1,341 +1,339 @@ cmake_minimum_required(VERSION 3.13) -if (NOT TARGET _rp2040_family_inclusion_marker) - add_library(_rp2040_family_inclusion_marker INTERFACE) +include_guard() - if (NOT BOARD) - message("BOARD not specified, defaulting to pico_sdk") - set(BOARD pico_sdk) - endif() - - # add the SDK in case we are standalone tinyusb example (noop if already present) - include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake) - - # include basic family CMake functionality - set(FAMILY_MCUS RP2040) - - include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) - - # TOP is absolute path to root directory of TinyUSB git repo - #set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..") - #get_filename_component(TOP "${TOP}" REALPATH) - - if (NOT PICO_TINYUSB_PATH) - set(PICO_TINYUSB_PATH ${TOP}) - endif() - - if (NOT TINYUSB_OPT_OS) - set(TINYUSB_OPT_OS OPT_OS_PICO) - endif() - - #------------------------------------ - # Base config for both device and host; wrapped by SDK's tinyusb_common - #------------------------------------ - add_library(tinyusb_common_base INTERFACE) - - target_sources(tinyusb_common_base INTERFACE - ${TOP}/src/tusb.c - ${TOP}/src/common/tusb_fifo.c - ) - - target_include_directories(tinyusb_common_base INTERFACE - ${TOP}/src - ${TOP}/src/common - ${TOP}/hw - ) - - target_link_libraries(tinyusb_common_base INTERFACE - hardware_structs - hardware_irq - hardware_resets - pico_sync - ) - - set(TINYUSB_DEBUG_LEVEL 0) - if (CMAKE_BUILD_TYPE STREQUAL "Debug") - message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") - set(TINYUSB_DEBUG_LEVEL 1) - endif() - - target_compile_definitions(tinyusb_common_base INTERFACE - CFG_TUSB_MCU=OPT_MCU_RP2040 - CFG_TUSB_OS=${TINYUSB_OPT_OS} - #CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} - ) - - #------------------------------------ - # Base config for device mode; wrapped by SDK's tinyusb_device - #------------------------------------ - add_library(tinyusb_device_base INTERFACE) - target_sources(tinyusb_device_base INTERFACE - ${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c - ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c - ${TOP}/src/device/usbd.c - ${TOP}/src/device/usbd_control.c - ${TOP}/src/class/audio/audio_device.c - ${TOP}/src/class/cdc/cdc_device.c - ${TOP}/src/class/dfu/dfu_device.c - ${TOP}/src/class/dfu/dfu_rt_device.c - ${TOP}/src/class/hid/hid_device.c - ${TOP}/src/class/midi/midi_device.c - ${TOP}/src/class/msc/msc_device.c - ${TOP}/src/class/net/ecm_rndis_device.c - ${TOP}/src/class/net/ncm_device.c - ${TOP}/src/class/usbtmc/usbtmc_device.c - ${TOP}/src/class/vendor/vendor_device.c - ${TOP}/src/class/video/video_device.c - ) - - #------------------------------------ - # Base config for host mode; wrapped by SDK's tinyusb_host - #------------------------------------ - add_library(tinyusb_host_base INTERFACE) - target_sources(tinyusb_host_base INTERFACE - ${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c - ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c - ${TOP}/src/host/usbh.c - ${TOP}/src/host/hub.c - ${TOP}/src/class/cdc/cdc_host.c - ${TOP}/src/class/hid/hid_host.c - ${TOP}/src/class/msc/msc_host.c - ${TOP}/src/class/vendor/vendor_host.c - ) - - # Sometimes have to do host specific actions in mostly common functions - target_compile_definitions(tinyusb_host_base INTERFACE - RP2040_USB_HOST_MODE=1 - ) - - #------------------------------------ - # BSP & Additions - #------------------------------------ - add_library(tinyusb_bsp INTERFACE) - target_sources(tinyusb_bsp INTERFACE - ${TOP}/hw/bsp/rp2040/family.c - ) - # target_include_directories(tinyusb_bsp INTERFACE - # ${TOP}/hw/bsp/rp2040) - - # tinyusb_additions will hold our extra settings for examples - add_library(tinyusb_additions INTERFACE) - - target_compile_definitions(tinyusb_additions INTERFACE - PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1 - PICO_RP2040_USB_DEVICE_UFRAME_FIX=1 - ) - - if(DEFINED LOG) - target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG}) - endif() - - if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") - target_compile_definitions(tinyusb_additions INTERFACE - LOGGER_RTT - SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL - ) - - target_sources(tinyusb_additions INTERFACE - ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c - ) - - set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c - PROPERTIES - COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion") - - target_include_directories(tinyusb_additions INTERFACE - ${TOP}/lib/SEGGER_RTT/RTT - ) - endif() - - #------------------------------------ - # Functions - #------------------------------------ - - function(family_configure_target TARGET) - pico_add_extra_outputs(${TARGET}) - pico_enable_stdio_uart(${TARGET} 1) - target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions) - endfunction() - - function(rp2040_family_configure_example_warnings TARGET) - if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS) - family_add_default_example_warnings(${TARGET}) - endif() - if(CMAKE_C_COMPILER_ID STREQUAL "Clang") - target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code) - endif() - suppress_tinyusb_warnings() - endfunction() - - function(family_configure_device_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device) - rp2040_family_configure_example_warnings(${TARGET}) - endfunction() - - function(family_add_pico_pio_usb TARGET) - target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) - endfunction() - - function(family_configure_host_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) - rp2040_family_configure_example_warnings(${TARGET}) - - # For rp2040 enable pico-pio-usb - if (TARGET tinyusb_pico_pio_usb) - # code does not compile with non GCC, or GCC 11.3+ - if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3) - family_add_pico_pio_usb(${PROJECT}) - endif() - endif() - endfunction() - - function(family_configure_dual_usb_example TARGET) - family_configure_target(${TARGET}) - # require tinyusb_pico_pio_usb - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) - rp2040_family_configure_example_warnings(${TARGET}) - endfunction() - - function(check_and_add_pico_pio_usb_support) - # check for pico_generate_pio_header (as depending on environment we may be called before SDK is - # initialized in which case it isn't available yet), and only do the initialization once - if (COMMAND pico_generate_pio_header AND NOT TARGET tinyusb_pico_pio_usb) - #------------------------------------ - # PIO USB for both host and device - #------------------------------------ - - if (NOT DEFINED PICO_PIO_USB_PATH) - set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB") - endif() - - if (EXISTS ${PICO_PIO_USB_PATH}/src/pio_usb.c) - add_library(tinyusb_pico_pio_usb INTERFACE) - target_sources(tinyusb_device_base INTERFACE - ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c - ) - target_sources(tinyusb_host_base INTERFACE - ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c - ) - - target_sources(tinyusb_pico_pio_usb INTERFACE - ${PICO_PIO_USB_PATH}/src/pio_usb.c - ${PICO_PIO_USB_PATH}/src/pio_usb_host.c - ${PICO_PIO_USB_PATH}/src/pio_usb_device.c - ${PICO_PIO_USB_PATH}/src/usb_crc.c - ) - - target_include_directories(tinyusb_pico_pio_usb INTERFACE - ${PICO_PIO_USB_PATH}/src - ) - - target_link_libraries(tinyusb_pico_pio_usb INTERFACE - hardware_dma - hardware_pio - pico_multicore - ) - - target_compile_definitions(tinyusb_pico_pio_usb INTERFACE - PIO_USB_USE_TINYUSB - ) - - pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_tx.pio) - pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_rx.pio) - endif() - endif() - endfunction() - - # Try to add Pico-PIO_USB support now for the case where this file is included directly - # after Pico SDK initialization, but without using the family_ functions (as is the case - # when included by the SDK itself) - check_and_add_pico_pio_usb_support() - - function(family_initialize_project PROJECT DIR) - # call the original version of this function from family_common.cmake - _family_initialize_project(${PROJECT} ${DIR}) - enable_language(C CXX ASM) - pico_sdk_init() - - # now re-check for adding Pico-PIO_USB support now SDK is definitely available - check_and_add_pico_pio_usb_support() - endfunction() - - # This method must be called from the project scope to suppress known warnings in TinyUSB source files - function(suppress_tinyusb_warnings) - # some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior - if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0) - set(CONVERSION_WARNING_FILES - ${PICO_TINYUSB_PATH}/src/tusb.c - ${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c - ${PICO_TINYUSB_PATH}/src/device/usbd.c - ${PICO_TINYUSB_PATH}/src/device/usbd_control.c - ${PICO_TINYUSB_PATH}/src/host/usbh.c - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c - ${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c - ${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c - ${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c - ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c - ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c - ${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c - ${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c - ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c - ) - foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES) - set_source_files_properties( - ${SOURCE_FILE} - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") - endforeach() - endif() - if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0) - set_source_files_properties( - ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c - COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds") - endif() - set_source_files_properties( - ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual") - - set_source_files_properties( - ${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_in.c - ${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_out.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion") - - set_source_files_properties( - ${PICO_TINYUSB_PATH}/lib/networking/dnserver.c - ${PICO_TINYUSB_PATH}/lib/networking/dhserver.c - ${PICO_TINYUSB_PATH}/lib/networking/rndis_reports.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion -Wno-sign-conversion") - - if (TARGET tinyusb_pico_pio_usb) - set_source_files_properties( - ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_device.c - ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb.c - ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_host.c - ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c - PROPERTIES - COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes") - endif() - elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c - COMPILE_FLAGS "-Wno-unreachable-code") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c - COMPILE_FLAGS "-Wno-unreachable-code-fallthrough") - set_source_files_properties( - ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c - PROPERTIES - COMPILE_FLAGS "-Wno-cast-qual") - endif() - endfunction() - - # rp2040 does not support freeRTOS example yet - function(family_add_freertos TARGET) - endfunction() +if (NOT BOARD) + message("BOARD not specified, defaulting to pico_sdk") + set(BOARD pico_sdk) endif() + +# add the SDK in case we are standalone tinyusb example (noop if already present) +include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake) + +# include basic family CMake functionality +set(FAMILY_MCUS RP2040) + +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +# TOP is absolute path to root directory of TinyUSB git repo +#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..") +#get_filename_component(TOP "${TOP}" REALPATH) + +if (NOT PICO_TINYUSB_PATH) + set(PICO_TINYUSB_PATH ${TOP}) +endif() + +if (NOT TINYUSB_OPT_OS) + set(TINYUSB_OPT_OS OPT_OS_PICO) +endif() + +#------------------------------------ +# Base config for both device and host; wrapped by SDK's tinyusb_common +#------------------------------------ +add_library(tinyusb_common_base INTERFACE) + +target_sources(tinyusb_common_base INTERFACE + ${TOP}/src/tusb.c + ${TOP}/src/common/tusb_fifo.c + ) + +target_include_directories(tinyusb_common_base INTERFACE + ${TOP}/src + ${TOP}/src/common + ${TOP}/hw + ) + +target_link_libraries(tinyusb_common_base INTERFACE + hardware_structs + hardware_irq + hardware_resets + pico_sync + ) + +set(TINYUSB_DEBUG_LEVEL 0) +if (CMAKE_BUILD_TYPE STREQUAL "Debug") + message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") + set(TINYUSB_DEBUG_LEVEL 1) +endif() + +target_compile_definitions(tinyusb_common_base INTERFACE + CFG_TUSB_MCU=OPT_MCU_RP2040 + CFG_TUSB_OS=${TINYUSB_OPT_OS} + #CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} +) + +#------------------------------------ +# Base config for device mode; wrapped by SDK's tinyusb_device +#------------------------------------ +add_library(tinyusb_device_base INTERFACE) +target_sources(tinyusb_device_base INTERFACE + ${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c + ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c + ${TOP}/src/device/usbd.c + ${TOP}/src/device/usbd_control.c + ${TOP}/src/class/audio/audio_device.c + ${TOP}/src/class/cdc/cdc_device.c + ${TOP}/src/class/dfu/dfu_device.c + ${TOP}/src/class/dfu/dfu_rt_device.c + ${TOP}/src/class/hid/hid_device.c + ${TOP}/src/class/midi/midi_device.c + ${TOP}/src/class/msc/msc_device.c + ${TOP}/src/class/net/ecm_rndis_device.c + ${TOP}/src/class/net/ncm_device.c + ${TOP}/src/class/usbtmc/usbtmc_device.c + ${TOP}/src/class/vendor/vendor_device.c + ${TOP}/src/class/video/video_device.c + ) + +#------------------------------------ +# Base config for host mode; wrapped by SDK's tinyusb_host +#------------------------------------ +add_library(tinyusb_host_base INTERFACE) +target_sources(tinyusb_host_base INTERFACE + ${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c + ${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c + ${TOP}/src/host/usbh.c + ${TOP}/src/host/hub.c + ${TOP}/src/class/cdc/cdc_host.c + ${TOP}/src/class/hid/hid_host.c + ${TOP}/src/class/msc/msc_host.c + ${TOP}/src/class/vendor/vendor_host.c + ) + +# Sometimes have to do host specific actions in mostly common functions +target_compile_definitions(tinyusb_host_base INTERFACE + RP2040_USB_HOST_MODE=1 +) + +#------------------------------------ +# BSP & Additions +#------------------------------------ +add_library(tinyusb_bsp INTERFACE) +target_sources(tinyusb_bsp INTERFACE + ${TOP}/hw/bsp/rp2040/family.c + ) +# target_include_directories(tinyusb_bsp INTERFACE +# ${TOP}/hw/bsp/rp2040) + +# tinyusb_additions will hold our extra settings for examples +add_library(tinyusb_additions INTERFACE) + +target_compile_definitions(tinyusb_additions INTERFACE + PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1 + PICO_RP2040_USB_DEVICE_UFRAME_FIX=1 +) + +if(DEFINED LOG) + target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG}) +endif() + +if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + target_compile_definitions(tinyusb_additions INTERFACE + LOGGER_RTT + SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL + ) + + target_sources(tinyusb_additions INTERFACE + ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + ) + + set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + PROPERTIES + COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion") + + target_include_directories(tinyusb_additions INTERFACE + ${TOP}/lib/SEGGER_RTT/RTT + ) +endif() + +#------------------------------------ +# Functions +#------------------------------------ + +function(family_configure_target TARGET) + pico_add_extra_outputs(${TARGET}) + pico_enable_stdio_uart(${TARGET} 1) + target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions) +endfunction() + +function(rp2040_family_configure_example_warnings TARGET) + if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS) + family_add_default_example_warnings(${TARGET}) + endif() + if(CMAKE_C_COMPILER_ID STREQUAL "Clang") + target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code) + endif() + suppress_tinyusb_warnings() +endfunction() + +function(family_configure_device_example TARGET) + family_configure_target(${TARGET}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device) + rp2040_family_configure_example_warnings(${TARGET}) +endfunction() + +function(family_add_pico_pio_usb TARGET) + target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) +endfunction() + +function(family_configure_host_example TARGET) + family_configure_target(${TARGET}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) + rp2040_family_configure_example_warnings(${TARGET}) + + # For rp2040 enable pico-pio-usb + if (TARGET tinyusb_pico_pio_usb) + # code does not compile with non GCC, or GCC 11.3+ + if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3) + family_add_pico_pio_usb(${PROJECT}) + endif() + endif() +endfunction() + +function(family_configure_dual_usb_example TARGET) + family_configure_target(${TARGET}) + # require tinyusb_pico_pio_usb + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) + rp2040_family_configure_example_warnings(${TARGET}) +endfunction() + +function(check_and_add_pico_pio_usb_support) + # check for pico_generate_pio_header (as depending on environment we may be called before SDK is + # initialized in which case it isn't available yet), and only do the initialization once + if (COMMAND pico_generate_pio_header AND NOT TARGET tinyusb_pico_pio_usb) + #------------------------------------ + # PIO USB for both host and device + #------------------------------------ + + if (NOT DEFINED PICO_PIO_USB_PATH) + set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB") + endif() + + if (EXISTS ${PICO_PIO_USB_PATH}/src/pio_usb.c) + add_library(tinyusb_pico_pio_usb INTERFACE) + target_sources(tinyusb_device_base INTERFACE + ${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c + ) + target_sources(tinyusb_host_base INTERFACE + ${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c + ) + + target_sources(tinyusb_pico_pio_usb INTERFACE + ${PICO_PIO_USB_PATH}/src/pio_usb.c + ${PICO_PIO_USB_PATH}/src/pio_usb_host.c + ${PICO_PIO_USB_PATH}/src/pio_usb_device.c + ${PICO_PIO_USB_PATH}/src/usb_crc.c + ) + + target_include_directories(tinyusb_pico_pio_usb INTERFACE + ${PICO_PIO_USB_PATH}/src + ) + + target_link_libraries(tinyusb_pico_pio_usb INTERFACE + hardware_dma + hardware_pio + pico_multicore + ) + + target_compile_definitions(tinyusb_pico_pio_usb INTERFACE + PIO_USB_USE_TINYUSB + ) + + pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_tx.pio) + pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_rx.pio) + endif() + endif() +endfunction() + +# Try to add Pico-PIO_USB support now for the case where this file is included directly +# after Pico SDK initialization, but without using the family_ functions (as is the case +# when included by the SDK itself) +check_and_add_pico_pio_usb_support() + +function(family_initialize_project PROJECT DIR) + # call the original version of this function from family_common.cmake + _family_initialize_project(${PROJECT} ${DIR}) + enable_language(C CXX ASM) + pico_sdk_init() + + # now re-check for adding Pico-PIO_USB support now SDK is definitely available + check_and_add_pico_pio_usb_support() +endfunction() + +# This method must be called from the project scope to suppress known warnings in TinyUSB source files +function(suppress_tinyusb_warnings) + # some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0) + set(CONVERSION_WARNING_FILES + ${PICO_TINYUSB_PATH}/src/tusb.c + ${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c + ${PICO_TINYUSB_PATH}/src/device/usbd.c + ${PICO_TINYUSB_PATH}/src/device/usbd_control.c + ${PICO_TINYUSB_PATH}/src/host/usbh.c + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c + ${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c + ${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c + ${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c + ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c + ${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c + ${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c + ${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c + ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c + ) + foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES) + set_source_files_properties( + ${SOURCE_FILE} + PROPERTIES + COMPILE_FLAGS "-Wno-conversion") + endforeach() + endif() + if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0) + set_source_files_properties( + ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c + COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds") + endif() + set_source_files_properties( + ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c + PROPERTIES + COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual") + + set_source_files_properties( + ${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_in.c + ${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_out.c + PROPERTIES + COMPILE_FLAGS "-Wno-conversion") + + set_source_files_properties( + ${PICO_TINYUSB_PATH}/lib/networking/dnserver.c + ${PICO_TINYUSB_PATH}/lib/networking/dhserver.c + ${PICO_TINYUSB_PATH}/lib/networking/rndis_reports.c + PROPERTIES + COMPILE_FLAGS "-Wno-conversion -Wno-sign-conversion") + + if (TARGET tinyusb_pico_pio_usb) + set_source_files_properties( + ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_device.c + ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb.c + ${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_host.c + ${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c + PROPERTIES + COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes") + endif() + elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang") + set_source_files_properties( + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c + COMPILE_FLAGS "-Wno-unreachable-code") + set_source_files_properties( + ${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c + COMPILE_FLAGS "-Wno-unreachable-code-fallthrough") + set_source_files_properties( + ${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c + PROPERTIES + COMPILE_FLAGS "-Wno-cast-qual") + endif() +endfunction() + +# rp2040 does not support freeRTOS example yet +function(family_add_freertos TARGET) +endfunction() diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index b99c7be6e..8f7f38589 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -75,8 +75,11 @@ endfunction() #------------------------------------ # TinyUSB as library target #------------------------------------ -set(TINYUSB_TARGET "tinyusb") -set(TINYUSB_CONFIG_TARGET "tinyusb_config") +if (NOT DEFINED TINYUSB_TARGET) + set(TINYUSB_TARGET "tinyusb") +endif () + +set(TINYUSB_CONFIG_TARGET "${TINYUSB_TARGET}_config") if (DEFINED TINYUSB_TARGET_PREFIX) set(TINYUSB_TARGET "${TINYUSB_TARGET_PREFIX}${TINYUSB_TARGET}") From a61d0f074fbca389ff5e8744dfcb610aafd8ae1e Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 26 Jun 2023 23:08:59 +0700 Subject: [PATCH 75/94] more rp2040 family clean up --- hw/bsp/rp2040/family.cmake | 42 ++++++++++++++++---------------------- 1 file changed, 18 insertions(+), 24 deletions(-) diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index fee376538..2d37f8be9 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -14,10 +14,6 @@ set(FAMILY_MCUS RP2040) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) -# TOP is absolute path to root directory of TinyUSB git repo -#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..") -#get_filename_component(TOP "${TOP}" REALPATH) - if (NOT PICO_TINYUSB_PATH) set(PICO_TINYUSB_PATH ${TOP}) endif() @@ -38,29 +34,30 @@ target_sources(tinyusb_common_base INTERFACE target_include_directories(tinyusb_common_base INTERFACE ${TOP}/src - ${TOP}/src/common - ${TOP}/hw ) -target_link_libraries(tinyusb_common_base INTERFACE - hardware_structs - hardware_irq - hardware_resets - pico_sync - ) - -set(TINYUSB_DEBUG_LEVEL 0) -if (CMAKE_BUILD_TYPE STREQUAL "Debug") +if(DEFINED LOG) + set(TINYUSB_DEBUG_LEVEL ${LOG}) +elseif (CMAKE_BUILD_TYPE STREQUAL "Debug") message("Compiling TinyUSB with CFG_TUSB_DEBUG=1") set(TINYUSB_DEBUG_LEVEL 1) +else () + set(TINYUSB_DEBUG_LEVEL 0) endif() target_compile_definitions(tinyusb_common_base INTERFACE CFG_TUSB_MCU=OPT_MCU_RP2040 CFG_TUSB_OS=${TINYUSB_OPT_OS} - #CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} + CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL} ) +target_link_libraries(tinyusb_common_base INTERFACE + hardware_structs + hardware_irq + hardware_resets + pico_sync + ) + #------------------------------------ # Base config for device mode; wrapped by SDK's tinyusb_device #------------------------------------ @@ -109,10 +106,11 @@ target_compile_definitions(tinyusb_host_base INTERFACE #------------------------------------ add_library(tinyusb_bsp INTERFACE) target_sources(tinyusb_bsp INTERFACE - ${TOP}/hw/bsp/rp2040/family.c - ) -# target_include_directories(tinyusb_bsp INTERFACE -# ${TOP}/hw/bsp/rp2040) + ${TOP}/hw/bsp/rp2040/family.c + ) +target_include_directories(tinyusb_bsp INTERFACE + ${TOP}/hw + ) # tinyusb_additions will hold our extra settings for examples add_library(tinyusb_additions INTERFACE) @@ -122,10 +120,6 @@ target_compile_definitions(tinyusb_additions INTERFACE PICO_RP2040_USB_DEVICE_UFRAME_FIX=1 ) -if(DEFINED LOG) - target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG}) -endif() - if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") target_compile_definitions(tinyusb_additions INTERFACE LOGGER_RTT From e43387abaca2044f96017481ccb00b3b68dbdc2a Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 27 Jun 2023 15:45:38 +0700 Subject: [PATCH 76/94] rework cmake with rtos support add RTOS to family_configure_device/host/dual_example() --- .../device/audio_4_channel_mic/CMakeLists.txt | 6 +- examples/device/audio_test/CMakeLists.txt | 6 +- .../audio_test_multi_rate/CMakeLists.txt | 6 +- examples/device/board_test/CMakeLists.txt | 6 +- examples/device/cdc_dual_ports/CMakeLists.txt | 6 +- examples/device/cdc_msc/CMakeLists.txt | 2 +- .../device/cdc_msc_freertos/CMakeLists.txt | 9 +- examples/device/dfu/CMakeLists.txt | 6 +- examples/device/dfu_runtime/CMakeLists.txt | 6 +- .../dynamic_configuration/CMakeLists.txt | 6 +- .../device/hid_boot_interface/CMakeLists.txt | 6 +- examples/device/hid_composite/CMakeLists.txt | 6 +- .../hid_composite_freertos/CMakeLists.txt | 9 +- .../device/hid_generic_inout/CMakeLists.txt | 6 +- .../hid_multiple_interface/CMakeLists.txt | 6 +- examples/device/midi_test/CMakeLists.txt | 6 +- examples/device/msc_dual_lun/CMakeLists.txt | 6 +- .../device/net_lwip_webserver/CMakeLists.txt | 6 +- examples/device/uac2_headset/CMakeLists.txt | 6 +- examples/device/usbtmc/CMakeLists.txt | 6 +- examples/device/video_capture/CMakeLists.txt | 6 +- examples/device/webusb_serial/CMakeLists.txt | 6 +- .../host_hid_to_device_cdc/CMakeLists.txt | 6 +- examples/host/bare_api/CMakeLists.txt | 6 +- examples/host/cdc_msc_hid/CMakeLists.txt | 6 +- examples/host/hid_controller/CMakeLists.txt | 6 +- .../host/msc_file_explorer/CMakeLists.txt | 6 +- examples/typec/power_delivery/CMakeLists.txt | 6 +- .../typec/power_delivery/src/tusb_config.h | 14 +- hw/bsp/family_support.cmake | 174 ++++++++++-------- hw/bsp/imxrt/family.cmake | 19 +- hw/bsp/kinetis_kl/family.cmake | 19 +- hw/bsp/lpc18/family.cmake | 19 +- hw/bsp/lpc55/family.cmake | 19 +- hw/bsp/mcx/family.cmake | 19 +- hw/bsp/nrf/family.cmake | 19 +- hw/bsp/rp2040/family.cmake | 43 +++-- hw/bsp/stm32f0/family.cmake | 19 +- hw/bsp/stm32f1/family.cmake | 19 +- hw/bsp/stm32f7/family.cmake | 19 +- hw/bsp/stm32g0/family.cmake | 19 +- hw/bsp/stm32g4/family.cmake | 19 +- hw/bsp/stm32h7/family.cmake | 19 +- hw/bsp/stm32l4/family.cmake | 19 +- src/common/tusb_compiler.h | 8 +- test/fuzz/device/cdc/CMakeLists.txt | 18 +- test/fuzz/device/msc/CMakeLists.txt | 6 +- test/fuzz/device/net/CMakeLists.txt | 6 +- 48 files changed, 277 insertions(+), 409 deletions(-) diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_4_channel_mic/CMakeLists.txt +++ b/examples/device/audio_4_channel_mic/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_test/CMakeLists.txt +++ b/examples/device/audio_test/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/audio_test_multi_rate/CMakeLists.txt +++ b/examples/device/audio_test_multi_rate/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt index 4ab8d5a65..012eff095 100644 --- a/examples/device/board_test/CMakeLists.txt +++ b/examples/device/board_test/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt index 87b7d07d4..f61e1b640 100644 --- a/examples/device/cdc_dual_ports/CMakeLists.txt +++ b/examples/device/cdc_dual_ports/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt index 4ec172f17..9415f8c68 100644 --- a/examples/device/cdc_msc/CMakeLists.txt +++ b/examples/device/cdc_msc/CMakeLists.txt @@ -32,4 +32,4 @@ target_include_directories(${PROJECT} PUBLIC # Configure compilation flags and libraries for the example... see the corresponding function # in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt index 319ad0356..33c7a1ec0 100644 --- a/examples/device/cdc_msc_freertos/CMakeLists.txt +++ b/examples/device/cdc_msc_freertos/CMakeLists.txt @@ -30,9 +30,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) - -# Add FreeRTOS for this example -family_add_freertos(${PROJECT}) +# Configure compilation flags and libraries for the example with FreeRTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} freertos) diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/dfu/CMakeLists.txt +++ b/examples/device/dfu/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/dfu_runtime/CMakeLists.txt +++ b/examples/device/dfu_runtime/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt index 046a32257..2b20d2234 100644 --- a/examples/device/dynamic_configuration/CMakeLists.txt +++ b/examples/device/dynamic_configuration/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_boot_interface/CMakeLists.txt +++ b/examples/device/hid_boot_interface/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_composite/CMakeLists.txt +++ b/examples/device/hid_composite/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt index 211904cf9..eb22014fb 100644 --- a/examples/device/hid_composite_freertos/CMakeLists.txt +++ b/examples/device/hid_composite_freertos/CMakeLists.txt @@ -29,9 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) - -# Add FreeRTOS for this example -family_add_freertos(${PROJECT}) +# Configure compilation flags and libraries for the example with FreeRTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} freertos) diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_generic_inout/CMakeLists.txt +++ b/examples/device/hid_generic_inout/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt index eb4c198d6..a01eb3456 100644 --- a/examples/device/hid_multiple_interface/CMakeLists.txt +++ b/examples/device/hid_multiple_interface/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt index 5b1a5547d..e51f14c02 100644 --- a/examples/device/midi_test/CMakeLists.txt +++ b/examples/device/midi_test/CMakeLists.txt @@ -26,6 +26,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt index dc8d5512c..e69fead35 100644 --- a/examples/device/msc_dual_lun/CMakeLists.txt +++ b/examples/device/msc_dual_lun/CMakeLists.txt @@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt index 2c21aa52b..1e34428fe 100644 --- a/examples/device/net_lwip_webserver/CMakeLists.txt +++ b/examples/device/net_lwip_webserver/CMakeLists.txt @@ -88,6 +88,6 @@ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") endif () -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt index d142e9c04..e92a57148 100644 --- a/examples/device/uac2_headset/CMakeLists.txt +++ b/examples/device/uac2_headset/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt index a6b22ab36..a63ca2d81 100644 --- a/examples/device/usbtmc/CMakeLists.txt +++ b/examples/device/usbtmc/CMakeLists.txt @@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt index e0bd975c4..80dc39ca5 100644 --- a/examples/device/video_capture/CMakeLists.txt +++ b/examples/device/video_capture/CMakeLists.txt @@ -34,6 +34,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt index d142e9c04..e92a57148 100644 --- a/examples/device/webusb_serial/CMakeLists.txt +++ b/examples/device/webusb_serial/CMakeLists.txt @@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt index c6d19a720..a6557c2d0 100644 --- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt +++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt @@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_dual_usb_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_dual_usb_example(${PROJECT} noos) # due to warnings from Pico-PIO-USB target_compile_options(${PROJECT} PUBLIC diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt index b6d8c9c89..95af48718 100644 --- a/examples/host/bare_api/CMakeLists.txt +++ b/examples/host/bare_api/CMakeLists.txt @@ -22,9 +22,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt index 68b52e274..3fdc832ab 100644 --- a/examples/host/cdc_msc_hid/CMakeLists.txt +++ b/examples/host/cdc_msc_hid/CMakeLists.txt @@ -25,9 +25,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt index e27f83c53..d1d901b53 100644 --- a/examples/host/hid_controller/CMakeLists.txt +++ b/examples/host/hid_controller/CMakeLists.txt @@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt index 327d1218a..99c797275 100644 --- a/examples/host/msc_file_explorer/CMakeLists.txt +++ b/examples/host/msc_file_explorer/CMakeLists.txt @@ -35,9 +35,9 @@ target_include_directories(${PROJECT} PUBLIC ${TOP}/lib/embedded-cli ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_host_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_host_example(${PROJECT} noos) # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host if(FAMILY STREQUAL "rp2040") diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt index 4ab8d5a65..012eff095 100644 --- a/examples/typec/power_delivery/CMakeLists.txt +++ b/examples/typec/power_delivery/CMakeLists.txt @@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h index deddcbfa4..f7cb3cc04 100644 --- a/examples/typec/power_delivery/src/tusb_config.h +++ b/examples/typec/power_delivery/src/tusb_config.h @@ -30,11 +30,6 @@ extern "C" { #endif -// special example that doesn't enable device or host stack -// This can cause some TinyUSB API missing, this define hack to allow us to fill those API -// to pass the compilation process -#define tud_int_handler(x) - //-------------------------------------------------------------------- // COMMON CONFIGURATION //-------------------------------------------------------------------- @@ -54,6 +49,15 @@ // Enable TYPEC stack #define CFG_TUC_ENABLED 1 + +// special example that doesn't enable device or host stack +// This can cause some TinyUSB API missing, this define hack to allow us to fill those API +// to pass the compilation process +#if CFG_TUD_ENABLED == 0 +#define tud_int_handler(x) +#endif + + // CFG_TUSB_DEBUG is defined by compiler in DEBUG build // #define CFG_TUSB_DEBUG 0 diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 93cab8723..781c67bf7 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -64,6 +64,8 @@ set(WARNING_FLAGS_GNU set(WARNINGS_FLAGS_IAR "") + +# Filter example based on only.txt and skip.txt function(family_filter RESULT DIR) get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) @@ -142,112 +144,136 @@ function(family_initialize_project PROJECT DIR) endfunction() -# Add segger rtt to example -function(family_add_segger_rtt TARGET) - if (NOT TARGET segger_rtt) - add_library(segger_rtt STATIC - ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c - ) - target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) - endif() +#------------------------------------------------------------- +# Common Target Configure +# Most families use these settings except rp2040 and espressif +#------------------------------------------------------------- - target_link_libraries(${TARGET} PUBLIC segger_rtt) +# Add RTOS to example +function(family_add_rtos TARGET RTOS) + if (RTOS STREQUAL "freertos") + # freertos config + if (NOT TARGET freertos_config) + add_library(freertos_config INTERFACE) + target_include_directories(freertos_config INTERFACE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig) + # add board definition to freertos_config mostly for SystemCoreClock + target_link_libraries(freertos_config INTERFACE board_${BOARD}) + endif() + + # freertos kernel + if (NOT TARGET freertos_kernel) + add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel) + endif () + + target_link_libraries(${TARGET} PUBLIC freertos_kernel) + endif () endfunction() -#------------------------------------ -# Main target configure -#------------------------------------ # Add common configuration to example -function(family_configure_common TARGET) +function(family_configure_common TARGET RTOS) + family_add_rtos(${TARGET} ${RTOS}) + # run size after build add_custom_command(TARGET ${TARGET} POST_BUILD COMMAND ${CMAKE_SIZE} $ ) + # Add warnings flags target_compile_options(${TARGET} PUBLIC ${WARNING_FLAGS_${CMAKE_C_COMPILER_ID}}) + # Generate linker map file if (CMAKE_C_COMPILER_ID STREQUAL "GNU") - # Generate map file - target_link_options(${TARGET} PUBLIC - # link map - "LINKER:-Map=$.map" - ) + target_link_options(${TARGET} PUBLIC "LINKER:-Map=$.map") endif() - # LOGGER - if (DEFINED LOGGER) - target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) - if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") - family_add_segger_rtt(${TARGET}) - endif () - endif () - - # ETM Trace + # ETM Trace option if (TRACE_ETM STREQUAL "1") target_compile_definitions(${TARGET} PUBLIC TRACE_ETM) endif () -endfunction() + # LOGGER option + if (DEFINED LOGGER) + target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) - -# configure an executable target to link to tinyusb in device mode, and add the board implementation -function(family_configure_device_example TARGET) - # default implementation is empty, the function should be redefined in the FAMILY/family.cmake -endfunction() - - -# configure an executable target to link to tinyusb in host mode, and add the board implementation -function(family_configure_host_example TARGET) - # default implementation is empty, the function should be redefined in the FAMILY/family.cmake + # Add segger rtt to example + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + if (NOT TARGET segger_rtt) + add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c) + target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) + endif() + target_link_libraries(${TARGET} PUBLIC segger_rtt) + endif () + endif () endfunction() # Add tinyusb to example -function(family_add_tinyusb TARGET OPT_MCU) +function(family_add_tinyusb TARGET OPT_MCU RTOS) # tinyusb target is built for each example since it depends on example's tusb_config.h set(TINYUSB_TARGET_PREFIX ${TARGET}-) add_library(${TARGET}-tinyusb_config INTERFACE) + # path to tusb_config.h target_include_directories(${TARGET}-tinyusb_config INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/src) target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_MCU=${OPT_MCU}) + if (DEFINED LOG) target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG}) endif() - # tinyusb's CMakeList.txt - add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) -endfunction() - - -# Add freeRTOS support to example -function(family_add_freertos TARGET) - # freeros config - if (NOT TARGET freertos_config) - add_library(freertos_config INTERFACE) - target_include_directories(freertos_config INTERFACE - ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig - ) - # add board definition to freertos_config mostly for SystemCoreClock - target_link_libraries(freertos_config INTERFACE board_${BOARD}) - endif() - - # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable - # such as CMAKE_C_COMPILE_OBJECT - if (NOT TARGET freertos_kernel) - add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel) + if (RTOS STREQUAL "freertos") + target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_OS=OPT_OS_FREERTOS) endif () - # Add FreeRTOS option to tinyusb_config - target_compile_definitions(${TARGET}-tinyusb_config INTERFACE - CFG_TUSB_OS=OPT_OS_FREERTOS - ) - # link tinyusb with freeRTOS kernel - target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel) - target_link_libraries(${TARGET} PUBLIC freertos_kernel) + # tinyusb's CMakeList.txt + add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb) + + if (RTOS STREQUAL "freertos") + # link tinyusb with freeRTOS kernel + target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel) + endif () endfunction() +# Add bin/hex output +function(family_add_bin_hex TARGET) + add_custom_command(TARGET ${TARGET} POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -Obinary $ $/${TARGET}.bin + COMMAND ${CMAKE_OBJCOPY} -Oihex $ $/${TARGET}.hex + VERBATIM) +endfunction() + + +#---------------------------------- +# Example Target Configure (Default rule) +# These function can be redefined in FAMILY/family.cmake +#---------------------------------- + +function(family_configure_example TARGET RTOS) + # empty function, should be redefined in FAMILY/family.cmake +endfunction() + +# Configure device example with RTOS +function(family_configure_device_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) +endfunction() + + +# Configure host example with RTOS +function(family_configure_host_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) +endfunction() + + +# Configure host + device example with RTOS +function(family_configure_dual_usb_example TARGET RTOS) + family_configure_example(${TARGET} ${RTOS}) +endfunction() + +#---------------------------------- +# RPI specific: refactor later +#---------------------------------- function(family_add_default_example_warnings TARGET) target_compile_options(${TARGET} PUBLIC -Wall @@ -294,16 +320,6 @@ function(family_add_default_example_warnings TARGET) endif() endfunction() - -# Add bin/hex output -function(family_add_bin_hex TARGET) - add_custom_command(TARGET ${TARGET} POST_BUILD - COMMAND ${CMAKE_OBJCOPY} -Obinary $ $/${TARGET}.bin - COMMAND ${CMAKE_OBJCOPY} -Oihex $ $/${TARGET}.hex - VERBATIM) -endfunction() - - #---------------------------------- # Flashing target #---------------------------------- @@ -374,6 +390,10 @@ function(family_flash_nxplink TARGET) endfunction() +#---------------------------------- +# Family specific +#---------------------------------- + # family specific: can override above functions include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index 4a9842cf9..aaedfc9d6 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -94,8 +94,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -115,7 +115,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX) + family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -130,16 +130,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 5d4165185..4df3d1ed1 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -78,8 +78,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -99,7 +99,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL) + family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c ${TOP}/src/portable/nxp/khci/hcd_khci.c @@ -113,16 +113,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake index 4e6e2b56d..da71a0e5d 100644 --- a/hw/bsp/lpc18/family.cmake +++ b/hw/bsp/lpc18/family.cmake @@ -70,8 +70,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -91,7 +91,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX) + family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c @@ -106,16 +106,3 @@ function(family_configure_example TARGET) family_flash_jlink(${TARGET}) #family_flash_nxplink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake index e443f47d3..dfd08a732 100644 --- a/hw/bsp/lpc55/family.cmake +++ b/hw/bsp/lpc55/family.cmake @@ -87,8 +87,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -117,7 +117,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX) + family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c ) @@ -131,16 +131,3 @@ function(family_configure_example TARGET) #family_flash_nxplink(${TARGET}) #family_flash_pyocd(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index 83f44222b..f548ac4f3 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -79,8 +79,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -100,7 +100,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_MCXN9) + family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS ${TOP}/src/portable/chipidea/$ @@ -115,16 +115,3 @@ function(family_configure_example TARGET) #family_flash_nxplink(${TARGET}) #family_flash_pyocd(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 825380d0b..30fd41d7b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -97,8 +97,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -118,7 +118,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_NRF5X) + family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c ) @@ -132,16 +132,3 @@ function(family_configure_example TARGET) # Flashing family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake index 2d37f8be9..b986b3ebb 100644 --- a/hw/bsp/rp2040/family.cmake +++ b/hw/bsp/rp2040/family.cmake @@ -11,6 +11,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake) # include basic family CMake functionality set(FAMILY_MCUS RP2040) +set(JLINK_DEVICE rp2040_m0_0) include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) @@ -143,12 +144,23 @@ endif() # Functions #------------------------------------ -function(family_configure_target TARGET) +function(family_configure_target TARGET RTOS) + if (RTOS STREQUAL noos OR RTOS STREQUAL "") + set(RTOS_SUFFIX "") + else() + set(RTOS_SUFFIX _${RTOS}) + endif() + # export RTOS_SUFFIX to parent scope + set(RTOS_SUFFIX ${RTOS_SUFFIX} PARENT_SCOPE) + pico_add_extra_outputs(${TARGET}) pico_enable_stdio_uart(${TARGET} 1) - target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions) + target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board${RTOS_SUFFIX} tinyusb_additions) + + family_flash_jlink(${TARGET}) endfunction() + function(rp2040_family_configure_example_warnings TARGET) if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS) family_add_default_example_warnings(${TARGET}) @@ -159,19 +171,22 @@ function(rp2040_family_configure_example_warnings TARGET) suppress_tinyusb_warnings() endfunction() -function(family_configure_device_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device) + +function(family_configure_device_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device${RTOS_SUFFIX}) rp2040_family_configure_example_warnings(${TARGET}) endfunction() + function(family_add_pico_pio_usb TARGET) target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb) endfunction() -function(family_configure_host_example TARGET) - family_configure_target(${TARGET}) - target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host) + +function(family_configure_host_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) + target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host${RTOS_SUFFIX}) rp2040_family_configure_example_warnings(${TARGET}) # For rp2040 enable pico-pio-usb @@ -183,13 +198,15 @@ function(family_configure_host_example TARGET) endif() endfunction() -function(family_configure_dual_usb_example TARGET) - family_configure_target(${TARGET}) + +function(family_configure_dual_usb_example TARGET RTOS) + family_configure_target(${TARGET} ${RTOS}) # require tinyusb_pico_pio_usb target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb ) rp2040_family_configure_example_warnings(${TARGET}) endfunction() + function(check_and_add_pico_pio_usb_support) # check for pico_generate_pio_header (as depending on environment we may be called before SDK is # initialized in which case it isn't available yet), and only do the initialization once @@ -243,6 +260,7 @@ endfunction() # when included by the SDK itself) check_and_add_pico_pio_usb_support() + function(family_initialize_project PROJECT DIR) # call the original version of this function from family_common.cmake _family_initialize_project(${PROJECT} ${DIR}) @@ -253,6 +271,7 @@ function(family_initialize_project PROJECT DIR) check_and_add_pico_pio_usb_support() endfunction() + # This method must be called from the project scope to suppress known warnings in TinyUSB source files function(suppress_tinyusb_warnings) # some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior @@ -327,7 +346,3 @@ function(suppress_tinyusb_warnings) COMPILE_FLAGS "-Wno-cast-qual") endif() endfunction() - -# rp2040 does not support freeRTOS example yet -function(family_add_freertos TARGET) -endfunction() diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake index ecf6a8424..73f43de82 100644 --- a/hw/bsp/stm32f0/family.cmake +++ b/hw/bsp/stm32f0/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F0) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F0 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ) @@ -118,16 +118,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake index ab46c9872..efe41bc1b 100644 --- a/hw/bsp/stm32f1/family.cmake +++ b/hw/bsp/stm32f1/family.cmake @@ -81,8 +81,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -102,7 +102,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F1) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F1 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ) @@ -115,16 +115,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake index 3b6ba1a15..30bde9b0d 100644 --- a/hw/bsp/stm32f7/family.cmake +++ b/hw/bsp/stm32f7/family.cmake @@ -86,8 +86,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -107,7 +107,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32F7) + family_add_tinyusb(${TARGET} OPT_MCU_STM32F7 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ) @@ -120,16 +120,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake index fa93566bf..f7b665090 100644 --- a/hw/bsp/stm32g0/family.cmake +++ b/hw/bsp/stm32g0/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32G0) + family_add_tinyusb(${TARGET} OPT_MCU_STM32G0 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ${TOP}/src/portable/st/typec/typec_stm32.c @@ -119,16 +119,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) #family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index c89993f6d..3c7633d64 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -84,8 +84,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -105,7 +105,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32G4) + family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c ${TOP}/src/portable/st/typec/typec_stm32.c @@ -119,16 +119,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index f3705edb4..1a8c4354c 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -89,8 +89,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -110,7 +110,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_STM32H7) + family_add_tinyusb(${TARGET} OPT_MCU_STM32H7 ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ) @@ -123,16 +123,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake index 83c51c9bf..da017cdde 100644 --- a/hw/bsp/stm32l4/family.cmake +++ b/hw/bsp/stm32l4/family.cmake @@ -86,8 +86,8 @@ endfunction() #------------------------------------ # Functions #------------------------------------ -function(family_configure_example TARGET) - family_configure_common(${TARGET}) +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) # Board target add_board_target(board_${BOARD}) @@ -107,7 +107,7 @@ function(family_configure_example TARGET) ) # Add TinyUSB target and port source - family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS}) + family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS} ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -121,16 +121,3 @@ function(family_configure_example TARGET) family_flash_stlink(${TARGET}) family_flash_jlink(${TARGET}) endfunction() - - -function(family_configure_device_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_host_example TARGET) - family_configure_example(${TARGET}) -endfunction() - -function(family_configure_dual_usb_example TARGET) - family_configure_example(${TARGET}) -endfunction() diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h index 5ab56e145..6f07bdd53 100644 --- a/src/common/tusb_compiler.h +++ b/src/common/tusb_compiler.h @@ -128,7 +128,9 @@ #define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name))) #define TU_ATTR_PACKED __attribute__ ((packed)) #define TU_ATTR_WEAK __attribute__ ((weak)) - #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug + #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #endif #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used @@ -205,7 +207,9 @@ #define TU_ATTR_SECTION(sec_name) __attribute__ ((section(#sec_name))) #define TU_ATTR_PACKED __attribute__ ((packed)) #define TU_ATTR_WEAK __attribute__ ((weak)) - #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug + #define TU_ATTR_ALWAYS_INLINE __attribute__ ((always_inline)) + #endif #define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used #define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused #define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt index 8e4db9d29..c60f292b9 100644 --- a/test/fuzz/device/cdc/CMakeLists.txt +++ b/test/fuzz/device/cdc/CMakeLists.txt @@ -14,16 +14,16 @@ add_executable(${PROJECT}) # Example source target_sources(${PROJECT} PUBLIC - ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c - ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c - ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c - ) + ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c + ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c + ) # Example include target_include_directories(${PROJECT} PUBLIC - ${CMAKE_CURRENT_SOURCE_DIR}/src - ) + ${CMAKE_CURRENT_SOURCE_DIR}/src + ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt index 8e4db9d29..8bff217cb 100644 --- a/test/fuzz/device/msc/CMakeLists.txt +++ b/test/fuzz/device/msc/CMakeLists.txt @@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt index 8e4db9d29..8bff217cb 100644 --- a/test/fuzz/device/net/CMakeLists.txt +++ b/test/fuzz/device/net/CMakeLists.txt @@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC ${CMAKE_CURRENT_SOURCE_DIR}/src ) -# Configure compilation flags and libraries for the example... see the corresponding function -# in hw/bsp/FAMILY/family.cmake for details. -family_configure_device_example(${PROJECT}) +# Configure compilation flags and libraries for the example without RTOS. +# See the corresponding function in hw/bsp/FAMILY/family.cmake for details. +family_configure_device_example(${PROJECT} noos) From 98fb10a724a33b545990a8593f60b5f10f030f5d Mon Sep 17 00:00:00 2001 From: Devin Auclair Date: Wed, 28 Jun 2023 14:03:18 -0400 Subject: [PATCH 77/94] Fix minor spelling --- src/class/msc/msc.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h index 7f25a29ba..bbfd35a43 100644 --- a/src/class/msc/msc.h +++ b/src/class/msc/msc.h @@ -53,7 +53,7 @@ enum { }; /// \brief MassStorage Protocol. -/// \details CBI only approved to use with full-speed floopy disk & should not used with highspeed or device other than floopy +/// \details CBI only approved to use with full-speed floppy disk & should not used with highspeed or device other than floppy typedef enum { MSC_PROTOCOL_CBI = 0 , ///< Control/Bulk/Interrupt protocol (with command completion interrupt) @@ -97,7 +97,7 @@ typedef struct TU_ATTR_PACKED { uint32_t signature ; ///< Signature that helps identify this data packet as a CSW. The signature field shall contain the value 53425355h (little endian), indicating CSW. uint32_t tag ; ///< The device shall set this field to the value received in the dCBWTag of the associated CBW. - uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device + uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResidue the difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device uint8_t status ; ///< indicates the success or failure of the command. Values from \ref msc_csw_status_t }msc_csw_t; @@ -120,14 +120,14 @@ typedef enum SCSI_CMD_REQUEST_SENSE = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device. SCSI_CMD_READ_FORMAT_CAPACITY = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed SCSI_CMD_READ_10 = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer. - SCSI_CMD_WRITE_10 = 0x2A, ///< The WRITE (10) command requests thatthe device server transfer the specified logical block(s) from the data-out buffer and write them. + SCSI_CMD_WRITE_10 = 0x2A, ///< The WRITE (10) command requests that the device server transfer the specified logical block(s) from the data-out buffer and write them. }scsi_cmd_type_t; /// SCSI Sense Key typedef enum { SCSI_SENSE_NONE = 0x00, ///< no specific Sense Key. This would be the case for a successful command - SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< ndicates the last command completed successfully with some recovery action performed by the disc drive. + SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< Indicates the last command completed successfully with some recovery action performed by the disc drive. SCSI_SENSE_NOT_READY = 0x02, ///< Indicates the logical unit addressed cannot be accessed. SCSI_SENSE_MEDIUM_ERROR = 0x03, ///< Indicates the command terminated with a non-recovered error condition. SCSI_SENSE_HARDWARE_ERROR = 0x04, ///< Indicates the disc drive detected a nonrecoverable hardware failure while performing the command or during a self test. @@ -138,7 +138,7 @@ typedef enum SCSI_SENSE_ABORTED_COMMAND = 0x0b, ///< Indicates the disc drive aborted the command. SCSI_SENSE_EQUAL = 0x0c, ///< Indicates a SEARCH DATA command has satisfied an equal comparison. SCSI_SENSE_VOLUME_OVERFLOW = 0x0d, ///< Indicates a buffered peripheral device has reached the end of medium partition and data remains in the buffer that has not been written to the medium. - SCSI_SENSE_MISCOMPARE = 0x0e ///< ndicates that the source data did not match the data read from the medium. + SCSI_SENSE_MISCOMPARE = 0x0e ///< Indicates that the source data did not match the data read from the medium. }scsi_sense_key_type_t; //--------------------------------------------------------------------+ From 6284f2d72287396a0df153a0a7bd192c4e3847a7 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 29 Jun 2023 18:58:33 +0700 Subject: [PATCH 78/94] add hcd_frame_number() for pio-usb host --- .gitmodules | 0 hw/bsp/rp2040/board.h | 4 +++- src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 2 +- tools/get_deps.py | 2 +- 4 files changed, 5 insertions(+), 3 deletions(-) delete mode 100644 .gitmodules diff --git a/.gitmodules b/.gitmodules deleted file mode 100644 index e69de29bb..000000000 diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h index ccad00c4a..934e1c7ae 100644 --- a/hw/bsp/rp2040/board.h +++ b/hw/bsp/rp2040/board.h @@ -49,7 +49,10 @@ #define UART_RX_PIN PICO_DEFAULT_UART_RX_PIN #endif +//--------------------------------------------------------------------+ // PIO_USB +// default to pin on Adafruit Feather rp2040 USB Host or Tester if defined +//--------------------------------------------------------------------+ // #define USE_ADAFRUIT_RP2040_TESTER #ifdef USE_ADAFRUIT_RP2040_TESTER @@ -57,7 +60,6 @@ #define PICO_DEFAULT_PIO_USB_VBUSEN_PIN 22 #endif -// following default to pin on Adafruit Feather rp2040 USB Host #ifndef PICO_DEFAULT_PIO_USB_DP_PIN #define PICO_DEFAULT_PIO_USB_DP_PIN 16 #endif diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c index 58b153ac3..264af2e7a 100644 --- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c +++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c @@ -105,7 +105,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) uint32_t hcd_frame_number(uint8_t rhport) { (void) rhport; - return 0; + return pio_usb_host_get_frame_number(); } void hcd_int_enable(uint8_t rhport) diff --git a/tools/get_deps.py b/tools/get_deps.py index 34e2f30a3..9b89c5e4c 100644 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -54,7 +54,7 @@ deps_optional = { '950819b7de9b32f92c3edf396bc5ffb8d66e7009', 'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'], 'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git', - 'c3715ce94b6f6391856de56081d4d9b3e98fa93d', + '58879cfa0eca5725d8db6443ec17f8896a321042', 'rp2040'], 'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git', '8dc14709f2a6518b43f71efad70d900b7718d9f1', From f5d0510064bd2a0ffd040697de1fac707fa70069 Mon Sep 17 00:00:00 2001 From: Ha Thach Date: Thu, 29 Jun 2023 22:57:58 +0700 Subject: [PATCH 79/94] Update build badge --- README.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.rst b/README.rst index 2c9119fef..78e8d87b0 100644 --- a/README.rst +++ b/README.rst @@ -138,7 +138,7 @@ Please make sure you understand all the license term for files you use in your project. -.. |Build Status| image:: https://github.com/hathach/tinyusb/workflows/Build/badge.svg +.. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/cmake_arm.yml/badge.svg :target: https://github.com/hathach/tinyusb/actions .. |Documentation Status| image:: https://readthedocs.org/projects/tinyusb/badge/?version=latest :target: https://docs.tinyusb.org/en/latest/?badge=latest From 3cb4d738996e0856ab42654e421fd766652519bd Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 30 Jun 2023 14:52:04 +0700 Subject: [PATCH 80/94] clean up ra makefile --- hw/bsp/ra/boards/ra4m1_ek/board.mk | 9 +++++- hw/bsp/ra/boards/ra4m3_ek/board.mk | 9 +++++- hw/bsp/ra/family.mk | 47 +++++++++++++----------------- tools/make/cpu/cortex-m0.mk | 2 +- tools/make/cpu/cortex-m0plus.mk | 2 +- tools/make/cpu/cortex-m3.mk | 2 +- tools/make/cpu/cortex-m33.mk | 2 +- tools/make/cpu/cortex-m4.mk | 2 +- tools/make/cpu/cortex-m7.mk | 2 +- 9 files changed, 43 insertions(+), 34 deletions(-) diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk index 5c193513d..eae68f87d 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk @@ -1,8 +1,15 @@ CPU_CORE = cortex-m4 +MCU_VARIANT = ra4m1 -FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek +SRC_C += \ + $(FSP_BOARD_DIR)/board_init.c \ + $(FSP_BOARD_DIR)/board_leds.c \ + +INC += \ + $(TOP)/$(FSP_BOARD_DIR) + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk index 264f29c1a..4ca1d365e 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -1,8 +1,15 @@ CPU_CORE = cortex-m33 +MCU_VARIANT = ra4m3 -FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek +SRC_C += \ + $(FSP_BOARD_DIR)/board_init.c \ + $(FSP_BOARD_DIR)/board_leds.c \ + +INC += \ + $(TOP)/$(FSP_BOARD_DIR) + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index b65c95191..103d3cfa6 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -1,5 +1,6 @@ DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5 +FSP_RA = hw/mcu/renesas/fsp/ra/fsp include $(TOP)/$(BOARD_PATH)/board.mk CFLAGS += \ @@ -10,44 +11,38 @@ CFLAGS += \ -Wno-error=cast-qual \ -Wno-error=unused-but-set-variable \ -Wno-error=unused-variable \ - -mthumb \ -nostdlib \ -nostartfiles \ - -ffunction-sections \ - -fdata-sections \ -ffreestanding SRC_C += \ src/portable/renesas/rusb2/dcd_rusb2.c \ src/portable/renesas/rusb2/hcd_rusb2.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_common.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_delay.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_group_irq.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_guard.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_io.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_irq.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_register_protection.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_sbrk.c \ - hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_security.c \ - hw/mcu/renesas/fsp/ra/fsp/src/r_ioport/r_ioport.c \ - $(FSP_BOARD_DIR)/board_init.c \ - $(FSP_BOARD_DIR)/board_leds.c + $(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \ + $(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_common.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_delay.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_group_irq.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_guard.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_io.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_irq.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_register_protection.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_rom_registers.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_sbrk.c \ + $(FSP_RA)/src/bsp/mcu/all/bsp_security.c \ + $(FSP_RA)/src/r_ioport/r_ioport.c \ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \ + $(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(BOARD_PATH)/fsp_cfg \ - $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \ - $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \ - $(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \ - $(TOP)/$(FSP_MCU_DIR) \ - $(TOP)/$(FSP_BOARD_DIR) + $(TOP)/$(FSP_RA)/inc \ + $(TOP)/$(FSP_RA)/inc/api \ + $(TOP)/$(FSP_RA)/inc/instances \ + $(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \ # For freeRTOS port source # hack to use the port provided by renesas -FREERTOS_PORTABLE_SRC = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port +FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port diff --git a/tools/make/cpu/cortex-m0.mk b/tools/make/cpu/cortex-m0.mk index c264802c8..feb0f395b 100644 --- a/tools/make/cpu/cortex-m0.mk +++ b/tools/make/cpu/cortex-m0.mk @@ -11,4 +11,4 @@ else ifeq ($(TOOLCHAIN),iar) endif # For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/tools/make/cpu/cortex-m0plus.mk b/tools/make/cpu/cortex-m0plus.mk index 626f7156e..b416b7a4a 100644 --- a/tools/make/cpu/cortex-m0plus.mk +++ b/tools/make/cpu/cortex-m0plus.mk @@ -11,4 +11,4 @@ else ifeq ($(TOOLCHAIN),iar) endif # For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0 +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0 diff --git a/tools/make/cpu/cortex-m3.mk b/tools/make/cpu/cortex-m3.mk index c81cbace6..7a34b9e04 100644 --- a/tools/make/cpu/cortex-m3.mk +++ b/tools/make/cpu/cortex-m3.mk @@ -14,4 +14,4 @@ else ifeq ($(TOOLCHAIN),iar) endif # For freeRTOS port source -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3 +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM3 diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk index e53f5c2b1..fe5b7b380 100644 --- a/tools/make/cpu/cortex-m33.mk +++ b/tools/make/cpu/cortex-m33.mk @@ -16,4 +16,4 @@ else ifeq ($(TOOLCHAIN),iar) endif -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk index fabe05632..d8776b5d8 100644 --- a/tools/make/cpu/cortex-m4.mk +++ b/tools/make/cpu/cortex-m4.mk @@ -10,4 +10,4 @@ else ifeq ($(TOOLCHAIN),iar) ASFLAGS += --cpu cortex-m4 --fpu VFPv4 endif -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM4F diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk index 0e53cbe9c..0e3461787 100644 --- a/tools/make/cpu/cortex-m7.mk +++ b/tools/make/cpu/cortex-m7.mk @@ -16,4 +16,4 @@ else ifeq ($(TOOLCHAIN),iar) endif -FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 +FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1 From 48738df489ac583ea8a999d15222f1a570f735f7 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 30 Jun 2023 16:05:59 +0700 Subject: [PATCH 81/94] move LTO checked to family_support.cmake --- hw/bsp/family_support.cmake | 7 +++++++ hw/bsp/imxrt/family.cmake | 7 ------- hw/bsp/kinetis_kl/family.cmake | 7 ------- hw/bsp/lpc18/family.cmake | 7 ------- hw/bsp/mcx/family.cmake | 7 ------- hw/bsp/nrf/family.cmake | 8 -------- hw/bsp/stm32f0/family.cmake | 7 ------- hw/bsp/stm32f1/family.cmake | 7 ------- hw/bsp/stm32f7/family.cmake | 7 ------- hw/bsp/stm32g0/family.cmake | 7 ------- hw/bsp/stm32g4/family.cmake | 7 ------- hw/bsp/stm32h7/family.cmake | 7 ------- hw/bsp/stm32l4/family.cmake | 7 ------- 13 files changed, 7 insertions(+), 85 deletions(-) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 781c67bf7..b2e61a824 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -36,6 +36,13 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake) message(FATAL_ERROR "Family '${FAMILY}' is not known/supported") endif() +# enable LTO if supported +include(CheckIPOSupported) +check_ipo_supported(RESULT IPO_SUPPORTED) +if (IPO_SUPPORTED) + set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) +endif () + set(WARNING_FLAGS_GNU -Wall -Wextra diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake index aaedfc9d6..a8841f8ce 100644 --- a/hw/bsp/imxrt/family.cmake +++ b/hw/bsp/imxrt/family.cmake @@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake index 4df3d1ed1..793ef1783 100644 --- a/hw/bsp/kinetis_kl/family.cmake +++ b/hw/bsp/kinetis_kl/family.cmake @@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake index da71a0e5d..74a794bde 100644 --- a/hw/bsp/lpc18/family.cmake +++ b/hw/bsp/lpc18/family.cmake @@ -15,13 +15,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS LPC18XX CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake index f548ac4f3..b3a4a846e 100644 --- a/hw/bsp/mcx/family.cmake +++ b/hw/bsp/mcx/family.cmake @@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS MCXN9 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 30fd41d7b..2b13249f4 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -23,12 +23,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS NRF5X CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () #------------------------------------ # BOARD_TARGET @@ -124,8 +118,6 @@ function(family_configure_example TARGET RTOS) ) target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) - - # Link dependencies target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake index 73f43de82..e0fc705f8 100644 --- a/hw/bsp/stm32f0/family.cmake +++ b/hw/bsp/stm32f0/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32F0 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake index efe41bc1b..53af35862 100644 --- a/hw/bsp/stm32f1/family.cmake +++ b/hw/bsp/stm32f1/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32F1 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake index 30bde9b0d..48dd9c7ca 100644 --- a/hw/bsp/stm32f7/family.cmake +++ b/hw/bsp/stm32f7/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32F7 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake index f7b665090..b787363ed 100644 --- a/hw/bsp/stm32g0/family.cmake +++ b/hw/bsp/stm32g0/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32G0 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake index 3c7633d64..675a96c74 100644 --- a/hw/bsp/stm32g4/family.cmake +++ b/hw/bsp/stm32g4/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32G4 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake index 1a8c4354c..c08857a50 100644 --- a/hw/bsp/stm32h7/family.cmake +++ b/hw/bsp/stm32h7/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32H7 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake index da017cdde..87f87004b 100644 --- a/hw/bsp/stm32l4/family.cmake +++ b/hw/bsp/stm32l4/family.cmake @@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) set(FAMILY_MCUS STM32L4 CACHE INTERNAL "") -# enable LTO if supported -include(CheckIPOSupported) -check_ipo_supported(RESULT IPO_SUPPORTED) -if (IPO_SUPPORTED) - set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE) -endif () - #------------------------------------ # BOARD_TARGET From 99e75e6a8a0de9903e574a51d6ce8057a1e3e73f Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 12:40:56 +0700 Subject: [PATCH 82/94] rework ra build --- .github/workflows/cmake_arm.yml | 1 + hw/bsp/ra/boards/ra4m1_ek/board.cmake | 15 ++ hw/bsp/ra/boards/ra4m1_ek/board.h | 53 ++++ hw/bsp/ra/boards/ra4m1_ek/board.mk | 7 - hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h | 6 +- .../ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h | 5 + hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld | 1 + hw/bsp/ra/boards/ra4m3_ek/board.cmake | 15 ++ hw/bsp/ra/boards/ra4m3_ek/board.h | 52 ++++ hw/bsp/ra/boards/ra4m3_ek/board.mk | 7 - hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h | 4 +- hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c | 236 ------------------ hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld | 1 + .../{boards/ra4m1_ek/ra4m1_ek.c => family.c} | 43 ++-- hw/bsp/ra/family.cmake | 114 +++++++++ hw/bsp/ra/family.mk | 2 +- src/portable/renesas/rusb2/rusb2_ra.h | 12 + 17 files changed, 299 insertions(+), 275 deletions(-) create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.cmake create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.h create mode 100644 hw/bsp/ra/boards/ra4m3_ek/board.cmake create mode 100644 hw/bsp/ra/boards/ra4m3_ek/board.h delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c rename hw/bsp/ra/{boards/ra4m1_ek/ra4m1_ek.c => family.c} (83%) create mode 100644 hw/bsp/ra/family.cmake diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index 0ce63281e..4d8cd5591 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -38,6 +38,7 @@ jobs: - 'lpc18' - 'lpc55' - 'mcx' + - 'ra' - 'rp2040' - 'stm32f0' - 'stm32f1' diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.cmake b/hw/bsp/ra/boards/ra4m1_ek/board.cmake new file mode 100644 index 000000000..37c39061d --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/board.cmake @@ -0,0 +1,15 @@ +set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor") +set(MCU_VARIANT ra4m1) + +set(JLINK_DEVICE R7FA4M1AB) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m1_ek.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + ) + target_sources(${TARGET} PRIVATE + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ) +endfunction() diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h new file mode 100644 index 000000000..383ab7399 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m1_ek/board.h @@ -0,0 +1,53 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define LED1 (BSP_IO_PORT_01_PIN_06) +#define LED_STATE_ON 1 + +#define SW1 (BSP_IO_PORT_01_PIN_05) +#define BUTTON_STATE_ACTIVE 0 + +const ioport_pin_cfg_t board_pin_cfg[] = { + { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) }, + { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) }, + + { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, + { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, + { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, +}; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk index eae68f87d..9b0fafb28 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk @@ -3,13 +3,6 @@ MCU_VARIANT = ra4m1 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek -SRC_C += \ - $(FSP_BOARD_DIR)/board_init.c \ - $(FSP_BOARD_DIR)/board_leds.c \ - -INC += \ - $(TOP)/$(FSP_BOARD_DIR) - # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h index b38a79b40..b337e49f2 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h @@ -2,7 +2,6 @@ #ifndef BSP_CFG_H_ #define BSP_CFG_H_ -#include "board.h" #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" @@ -32,4 +31,9 @@ #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 +#define BSP_FEATURE_TFU_SUPPORTED 0 + +// for SystemInit() +void bsp_init(void * p_args); + #endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h index 3bde2db0d..4e080023e 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h @@ -25,6 +25,11 @@ #define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) #define BSP_VECTOR_TABLE_MAX_ENTRIES (48U) +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (0) + +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0 + #define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) #define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) #define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld index 8ddaa0a97..63c1d33aa 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld +++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld @@ -553,6 +553,7 @@ SECTIONS { . = ALIGN(8); __HeapBase = .; + PROVIDE(end = .); /* Place the STD heap here. */ KEEP(*(.heap)) __HeapLimit = .; diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.cmake b/hw/bsp/ra/boards/ra4m3_ek/board.cmake new file mode 100644 index 000000000..241b659a0 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m3_ek/board.cmake @@ -0,0 +1,15 @@ +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(MCU_VARIANT ra4m3) + +set(JLINK_DEVICE R7FA4M3AF) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m3_ek.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + ) + target_sources(${TARGET} PRIVATE + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ) +endfunction() diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h new file mode 100644 index 000000000..e41302f90 --- /dev/null +++ b/hw/bsp/ra/boards/ra4m3_ek/board.h @@ -0,0 +1,52 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define LED1 (BSP_IO_PORT_04_PIN_15) +#define LED_STATE_ON 1 + +#define SW1 (BSP_IO_PORT_00_PIN_05) +#define BUTTON_STATE_ACTIVE 0 + +const ioport_pin_cfg_t board_pin_cfg[] = { + {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, +}; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk index 4ca1d365e..266de7c0d 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -3,13 +3,6 @@ MCU_VARIANT = ra4m3 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek -SRC_C += \ - $(FSP_BOARD_DIR)/board_init.c \ - $(FSP_BOARD_DIR)/board_leds.c \ - -INC += \ - $(TOP)/$(FSP_BOARD_DIR) - # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h index a84d81e8d..a9cb8210b 100755 --- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h @@ -2,7 +2,6 @@ #ifndef BSP_CFG_H_ #define BSP_CFG_H_ -#include "board.h" #include "bsp_clock_cfg.h" #include "bsp_mcu_family_cfg.h" @@ -32,4 +31,7 @@ #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 +// for SystemInit() +void bsp_init(void * p_args); + #endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c deleted file mode 100644 index 327ef71d5..000000000 --- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2022, Rafael Silva - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include - -#include "bsp/board.h" -#include "bsp_api.h" -#include "r_ioport.h" -#include "r_ioport_api.h" -#include "renesas.h" - -/* Key code for writing PRCR register. */ -#define BSP_PRV_PRCR_KEY (0xA500U) -#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) -#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) - -#define SW1 (BSP_IO_PORT_00_PIN_05) -#define SW2 (BSP_IO_PORT_00_PIN_06) -#define LED1 (BSP_IO_PORT_04_PIN_15) -#define LED3 (BSP_IO_PORT_04_PIN_00) -#define LED2 (BSP_IO_PORT_04_PIN_04) - -/* ISR prototypes */ -void usbfs_interrupt_handler(void); -void usbfs_resume_handler(void); -void usbfs_d0fifo_handler(void); -void usbfs_d1fifo_handler(void); - -BSP_DONT_REMOVE const - fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { - [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ - [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ - [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ -}; -const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { - [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ - [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ - [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ -}; - -const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { - {.pin = BSP_IO_PORT_04_PIN_07, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_00, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_01, - .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, - {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}}; - -const ioport_cfg_t g_bsp_pin_cfg = { - .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), - .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], -}; -ioport_instance_ctrl_t g_ioport_ctrl; -const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void usbfs_interrupt_handler(void) -{ - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); - -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif - -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} -void usbfs_resume_handler(void) -{ - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); - -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif - -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} - -void usbfs_d0fifo_handler(void) -{ - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); - -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif - -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} - -void usbfs_d1fifo_handler(void) -{ - IRQn_Type irq = R_FSP_CurrentIrqGet(); - R_BSP_IrqStatusClear(irq); - -#if CFG_TUH_ENABLED - tuh_int_handler(0); -#endif - -#if CFG_TUD_ENABLED - tud_int_handler(0); -#endif -} - -void board_init(void) -{ - /* Configure pins. */ - R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); - - /* Enable USB_BASE */ - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; - R_MSTP->MSTPCRB &= ~(1U << 11U); - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; - -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); -#endif - -#if CFG_TUSB_OS == OPT_OS_NONE - /* Init systick */ - SysTick_Config(SystemCoreClock / 1000); -#endif -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state); - R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state); - R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state); -} - -uint32_t board_button_read(void) -{ - bsp_io_level_t lvl; - R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); - return lvl; -} - -int board_uart_read(uint8_t *buf, int len) -{ - (void) buf; - (void) len; - return 0; -} - -int board_uart_write(void const *buf, int len) -{ - (void) buf; - (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#else -#endif - -int close(int fd) -{ - (void) fd; - return -1; -} -int fstat(int fd, void *pstat) -{ - (void) fd; - (void) pstat; - return 0; -} -off_t lseek(int fd, off_t pos, int whence) -{ - (void) fd; - (void) pos; - (void) whence; - return 0; -} -int isatty(int fd) -{ - (void) fd; - return 1; -} diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld index 5bc335cb4..520b44cc6 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld +++ b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld @@ -413,6 +413,7 @@ SECTIONS { . = ALIGN(8); __HeapBase = .; + PROVIDE(end = .); /* Place the STD heap here. */ KEEP(*(.heap)) __HeapLimit = .; diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c b/hw/bsp/ra/family.c similarity index 83% rename from hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c rename to hw/bsp/ra/family.c index ea2204837..42cb2d4a4 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c +++ b/hw/bsp/ra/family.c @@ -26,23 +26,33 @@ #include -#include "bsp/board.h" +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-prototypes" +#pragma GCC diagnostic ignored "-Wundef" + +// extra push due to https://github.com/renesas/fsp/pull/278 +#pragma GCC diagnostic push +#endif + #include "bsp_api.h" + +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + #include "r_ioport.h" #include "r_ioport_api.h" #include "renesas.h" +#include "bsp/board.h" +#include "board.h" + /* Key code for writing PRCR register. */ #define BSP_PRV_PRCR_KEY (0xA500U) #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) #define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) -#define SW1 (BSP_IO_PORT_01_PIN_05) -#define LED1 (BSP_IO_PORT_01_PIN_06) - -#define LED_STATE_ON 1 -#define BUTTON_STATE_ACTIVE 0 - /* ISR prototypes */ void usbfs_interrupt_handler(void); void usbfs_resume_handler(void); @@ -50,7 +60,7 @@ void usbfs_d0fifo_handler(void); void usbfs_d1fifo_handler(void); BSP_DONT_REMOVE const - fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { +fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ @@ -63,22 +73,12 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ }; -const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { - { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) }, - { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) }, - - { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, - { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, - { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) }, - -}; - const ioport_cfg_t g_bsp_pin_cfg = { - .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t), - .p_pin_cfg_data = &g_bsp_pin_cfg_data[0], + .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = board_pin_cfg, }; ioport_instance_ctrl_t g_ioport_ctrl; -const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; +//const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler @@ -204,7 +204,6 @@ uint32_t board_millis(void) { return system_ticks; } -#else #endif int close(int fd) diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake new file mode 100644 index 000000000..c4c25bf4f --- /dev/null +++ b/hw/bsp/ra/family.cmake @@ -0,0 +1,114 @@ +include_guard() + +if (NOT BOARD) + message(FATAL_ERROR "BOARD not specified") +endif () + +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) +set(FSP_RA ${TOP}/hw/mcu/renesas/fsp/ra/fsp) + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS RA CACHE INTERNAL "") + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (NOT TARGET ${BOARD_TARGET}) + add_library(${BOARD_TARGET} STATIC + ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/startup.c + ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/system.c + ${FSP_RA}/src/bsp/mcu/all/bsp_clocks.c + ${FSP_RA}/src/bsp/mcu/all/bsp_common.c + ${FSP_RA}/src/bsp/mcu/all/bsp_delay.c + ${FSP_RA}/src/bsp/mcu/all/bsp_group_irq.c + ${FSP_RA}/src/bsp/mcu/all/bsp_guard.c + ${FSP_RA}/src/bsp/mcu/all/bsp_io.c + ${FSP_RA}/src/bsp/mcu/all/bsp_irq.c + ${FSP_RA}/src/bsp/mcu/all/bsp_register_protection.c + ${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c + ${FSP_RA}/src/bsp/mcu/all/bsp_sbrk.c + ${FSP_RA}/src/bsp/mcu/all/bsp_security.c + ${FSP_RA}/src/r_ioport/r_ioport.c + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + _RA_TZ_NONSECURE + ) + + target_compile_options(${BOARD_TARGET} PUBLIC + -ffreestanding + ) + + target_include_directories(${BOARD_TARGET} PUBLIC + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg + ${CMSIS_DIR}/CMSIS/Core/Include + ${FSP_RA}/inc + ${FSP_RA}/inc/api + ${FSP_RA}/inc/instances + ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include + ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT} + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_link_options(${BOARD_TARGET} PUBLIC + # linker file + "LINKER:--script=${LD_FILE_GNU}" + -nostartfiles + # nanolib + --specs=nano.specs + --specs=nosys.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS}) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c + ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) +endfunction() diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index 103d3cfa6..8e4f80eaf 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -35,9 +35,9 @@ SRC_C += \ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ - $(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(BOARD_PATH)/fsp_cfg \ + $(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \ $(TOP)/$(FSP_RA)/inc \ $(TOP)/$(FSP_RA)/inc/api \ $(TOP)/$(FSP_RA)/inc/instances \ diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h index 5be9f11ce..be0a9fa66 100644 --- a/src/portable/renesas/rusb2/rusb2_ra.h +++ b/src/portable/renesas/rusb2/rusb2_ra.h @@ -31,9 +31,21 @@ extern "C" { #endif +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-prototypes" + +// extra push due to https://github.com/renesas/fsp/pull/278 +#pragma GCC diagnostic push +#endif + /* renesas fsp api */ #include "bsp_api.h" +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + #define RUSB2_REG_BASE (0x40090000) #if defined(__ICCARM__) From 22fb66436db38e701b0b1c69ea80c5c3d50d445e Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 16:40:47 +0700 Subject: [PATCH 83/94] update linker --- hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h | 180 ++++++ hw/bsp/ra/boards/ra4m1_ek/board.cmake | 11 +- hw/bsp/ra/boards/ra4m1_ek/board.h | 18 +- hw/bsp/ra/boards/ra4m1_ek/board.mk | 5 - hw/bsp/ra/boards/ra4m3_ek/board.cmake | 11 +- hw/bsp/ra/boards/ra4m3_ek/board.mk | 5 - hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld | 576 ------------------ hw/bsp/ra/family.c | 167 +++-- hw/bsp/ra/family.cmake | 17 +- hw/bsp/ra/family.mk | 5 + .../ra4m1_ek.ld => linker/gcc/fsp.ld} | 33 +- hw/bsp/ra/linker/gcc/ra4m1.ld | 22 + hw/bsp/ra/linker/gcc/ra4m3.ld | 22 + hw/bsp/ra/linker/gcc/ra6m1.ld | 22 + tools/cmake/cpu/cortex-m4.cmake | 8 +- 15 files changed, 375 insertions(+), 727 deletions(-) create mode 100644 hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld rename hw/bsp/ra/{boards/ra4m1_ek/ra4m1_ek.ld => linker/gcc/fsp.ld} (97%) create mode 100644 hw/bsp/ra/linker/gcc/ra4m1.ld create mode 100644 hw/bsp/ra/linker/gcc/ra4m3.ld create mode 100644 hw/bsp/ra/linker/gcc/ra6m1.ld diff --git a/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..8c39a2fb8 --- /dev/null +++ b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,180 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + +#ifdef __GNUC__ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wstrict-prototypes" +#pragma GCC diagnostic ignored "-Wundef" + +// extra push due to https://github.com/renesas/fsp/pull/278 +#pragma GCC diagnostic push +#endif + +#include "bsp_api.h" + +#ifdef __GNUC__ +#pragma GCC diagnostic pop +#endif + +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#define configENABLE_FPU 1 +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 0 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS __NVIC_PRIO_BITS + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< FLASH = 0xFF - - __Vectors_Size = __Vectors_End - __Vectors; - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - /* To copy multiple ROM to RAM sections, - * uncomment .copy.table section and, - * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */ - /* - .copy.table : - { - . = ALIGN(4); - __copy_table_start__ = .; - LONG (__etext) - LONG (__data_start__) - LONG (__data_end__ - __data_start__) - LONG (__etext2) - LONG (__data2_start__) - LONG (__data2_end__ - __data2_start__) - __copy_table_end__ = .; - } > FLASH - */ - - /* To clear multiple BSS sections, - * uncomment .zero.table section and, - * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */ - /* - .zero.table : - { - . = ALIGN(4); - __zero_table_start__ = .; - LONG (__bss_start__) - LONG (__bss_end__ - __bss_start__) - LONG (__bss2_start__) - LONG (__bss2_end__ - __bss2_start__) - __zero_table_end__ = .; - } > FLASH - */ - - __etext = .; - - __tz_RAM_S = ORIGIN(RAM); - - /* If DTC is used, put the DTC vector table at the start of SRAM. - This avoids memory holes due to 1K alignment required by it. */ - .fsp_dtc_vector_table (NOLOAD) : - { - . = ORIGIN(RAM); - *(.fsp_dtc_vector_table) - } > RAM - - /* Initialized data section. */ - .data : - { - __data_start__ = .; - . = ALIGN(4); - - __Code_In_RAM_Start = .; - - KEEP(*(.code_in_ram*)) - __Code_In_RAM_End = .; - - *(vtable) - /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */ - *(.data.*) - *(.data) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - - . = ALIGN(4); - - /* All data end */ - __data_end__ = .; - - } > RAM AT > FLASH - - - /* TrustZone Secure Gateway Stubs Section. */ - .gnu.sgstubs : ALIGN (1024) - { - . = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(1024); - __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024); - _start_sg = .; - *(.gnu.sgstubs*) - . = ALIGN(32); - _end_sg = .; - } > FLASH - - __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(32768); - - /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ - __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH); - - /* QSPI_FLASH section to be downloaded via debugger */ - .qspi_flash : - { - __qspi_flash_start__ = .; - KEEP(*(.qspi_flash*)) - KEEP(*(.code_in_qspi*)) - __qspi_flash_end__ = .; - } > QSPI_FLASH - __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__; - - /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */ - __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__); - .qspi_non_retentive : AT (__qspi_flash_code_addr__) - { - __qspi_non_retentive_start__ = .; - KEEP(*(.qspi_non_retentive*)) - __qspi_non_retentive_end__ = .; - } > QSPI_FLASH - __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__; - - __qspi_region_max_size__ = 0x4000000; /* Must be the same as defined in MEMORY above */ - __qspi_region_start_address__ = __qspi_flash_start__; - __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__; - - /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ - __tz_QSPI_FLASH_N = __qspi_non_retentive_end__; - - /* Note: There are no secure/non-secure boundaries for QSPI. These symbols are provided for the RA configuration tool. */ - __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0); - - /* OSPI_DEVICE_0 section to be downloaded via debugger */ - .OSPI_DEVICE_0 : - { - __ospi_device_0_start__ = .; - KEEP(*(.ospi_device_0*)) - KEEP(*(.code_in_ospi_device_0*)) - __ospi_device_0_end__ = .; - } > OSPI_DEVICE_0 - __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__; - - /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ - __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__); - .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__) - { - __ospi_device_0_non_retentive_start__ = .; - KEEP(*(.ospi_device_0_non_retentive*)) - __ospi_device_0_non_retentive_end__ = .; - } > OSPI_DEVICE_0 - __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__; - - __ospi_device_0_region_max_size__ = 0x8000000; /* Must be the same as defined in MEMORY above */ - __ospi_device_0_region_start_address__ = __ospi_device_0_start__; - __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__; - - /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ - __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__; - - /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ - __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1); - - /* OSPI_DEVICE_1 section to be downloaded via debugger */ - .OSPI_DEVICE_1 : - { - __ospi_device_1_start__ = .; - KEEP(*(.ospi_device_1*)) - KEEP(*(.code_in_ospi_device_1*)) - __ospi_device_1_end__ = .; - } > OSPI_DEVICE_1 - __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__; - - /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */ - __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__); - .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__) - { - __ospi_device_1_non_retentive_start__ = .; - KEEP(*(.ospi_device_1_non_retentive*)) - __ospi_device_1_non_retentive_end__ = .; - } > OSPI_DEVICE_1 - __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__; - - __ospi_device_1_region_max_size__ = 0x10000000; /* Must be the same as defined in MEMORY above */ - __ospi_device_1_region_start_address__ = __ospi_device_1_start__; - __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__; - - /* Note: There are no secure/non-secure boundaries for OSPI. These symbols are provided for the RA configuration tool. */ - __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__; - - .noinit (NOLOAD): - { - . = ALIGN(4); - __noinit_start = .; - KEEP(*(.noinit*)) - . = ALIGN(8); - /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */ - KEEP(*(.heap.*)) - __noinit_end = .; - } > RAM - - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > RAM - - .heap (NOLOAD): - { - . = ALIGN(8); - __HeapBase = .; - PROVIDE(end = .); - /* Place the STD heap here. */ - KEEP(*(.heap)) - __HeapLimit = .; - } > RAM - - /* Stacks are stored in this section. */ - .stack_dummy (NOLOAD): - { - . = ALIGN(8); - __StackLimit = .; - /* Main stack */ - KEEP(*(.stack)) - __StackTop = .; - /* Thread stacks */ - KEEP(*(.stack*)) - __StackTopAll = .; - } > RAM - - PROVIDE(__stack = __StackTopAll); - - /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used - at run time for things such as ThreadX memory pool allocations. */ - __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4); - - /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects. - * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary. - * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ - __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024); - - /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects. - * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not - * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary. - * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */ - __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192); - - /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects. - * The EDMAC is a non-secure bus master and can only access non-secure RAM. */ - .ns_buffer (NOLOAD): - { - /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */ - . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .; - - KEEP(*(.ns_buffer*)) - } > RAM - - /* Data flash. */ - .data_flash : - { - . = ORIGIN(DATA_FLASH); - __tz_DATA_FLASH_S = .; - __Data_Flash_Start = .; - KEEP(*(.data_flash*)) - __Data_Flash_End = .; - - __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024); - } > DATA_FLASH - - /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ - __tz_SDRAM_S = ORIGIN(SDRAM); - - /* SDRAM */ - .sdram (NOLOAD): - { - __SDRAM_Start = .; - KEEP(*(.sdram*)) - KEEP(*(.frame*)) - __SDRAM_End = .; - } > SDRAM - - /* Note: There are no secure/non-secure boundaries for SDRAM. These symbols are provided for the RA configuration tool. */ - __tz_SDRAM_N = __SDRAM_End; - - /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ - __tz_ID_CODE_S = ORIGIN(ID_CODE); - - .id_code : - { - __ID_Code_Start = .; - KEEP(*(.id_code*)) - __ID_Code_End = .; - } > ID_CODE - - /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ - __tz_ID_CODE_N = __ID_Code_End; - - /* Symbol required for RA Configuration tool. */ - __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING); - - .option_setting : - { - __OPTION_SETTING_Start = .; - KEEP(*(.option_setting_ofs0)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start; - KEEP(*(.option_setting_dualsel)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start; - KEEP(*(.option_setting_sas)) - __OPTION_SETTING_End = .; - } > OPTION_SETTING = 0xFF - - /* Symbol required for RA Configuration tool. */ - __tz_OPTION_SETTING_N = OPTION_SETTING_START_NS; - - .option_setting_ns : - { - __OPTION_SETTING_NS_Start = .; - KEEP(*(.option_setting_ofs1)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_banksel)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_bps0)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_bps1)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_bps2)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_pbps0)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_pbps1)) - . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start; - KEEP(*(.option_setting_pbps2)) - __OPTION_SETTING_NS_End = .; - } > OPTION_SETTING = 0xFF - - /* Symbol required for RA Configuration tool. */ - __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S); - - .option_setting_s : - { - __OPTION_SETTING_S_Start = .; - KEEP(*(.option_setting_ofs1_sec)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_banksel_sec)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sec0)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sec1)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sec2)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_pbps_sec0)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_pbps_sec1)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_pbps_sec2)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_ofs1_sel)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_banksel_sel)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sel0)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sel1)) - . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start; - KEEP(*(.option_setting_bps_sel2)) - __OPTION_SETTING_S_End = .; - } > OPTION_SETTING_S = 0xFF - - /* Symbol required for RA Configuration tool. */ - __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End; -} diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index 42cb2d4a4..82d7a60c5 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -49,9 +49,9 @@ #include "board.h" /* Key code for writing PRCR register. */ -#define BSP_PRV_PRCR_KEY (0xA500U) +#define BSP_PRV_PRCR_KEY (0xA500U) #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) -#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) +#define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) /* ISR prototypes */ void usbfs_interrupt_handler(void); @@ -59,26 +59,87 @@ void usbfs_resume_handler(void); void usbfs_d0fifo_handler(void); void usbfs_d1fifo_handler(void); -BSP_DONT_REMOVE const -fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { +const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ [3] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */ }; const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = { - [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ - [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ - [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ - [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ + [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */ + [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */ + [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */ + [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ }; -const ioport_cfg_t g_bsp_pin_cfg = { - .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), - .p_pin_cfg_data = board_pin_cfg, +static const ioport_cfg_t family_pin_cfg = { + .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = board_pin_cfg, }; -ioport_instance_ctrl_t g_ioport_ctrl; -//const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg}; +static ioport_instance_ctrl_t port_ctrl; + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_init(void) +{ + /* Configure pins. */ + R_IOPORT_Open(&port_ctrl, &family_pin_cfg); + + board_led_write(false); + + /* Enable USB_BASE */ + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; + R_MSTP->MSTPCRB &= ~(1U << 11U); + R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + +#if CFG_TUSB_OS == OPT_OS_NONE + SysTick_Config(SystemCoreClock / 1000); +#endif +} + +void board_led_write(bool state) { + R_IOPORT_PinWrite(&port_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON); +} + +uint32_t board_button_read(void) { + bsp_io_level_t lvl; + R_IOPORT_PinRead(&port_ctrl, SW1, &lvl); + return lvl == BUTTON_STATE_ACTIVE; +} + +int board_uart_read(uint8_t *buf, int len) { + (void) buf; + (void) len; + return 0; +} + +int board_uart_write(void const *buf, int len) { + (void) buf; + (void) len; + return 0; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) { + system_ticks++; +} + +uint32_t board_millis(void) { + return system_ticks; +} +#endif //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler @@ -139,93 +200,29 @@ void usbfs_d1fifo_handler(void) #endif } -void board_init(void) -{ - /* Configure pins. */ - R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); - - /* Enable USB_BASE */ - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK; - R_MSTP->MSTPCRB &= ~(1U << 11U); - R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK; - -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); -#endif - -#if CFG_TUSB_OS == OPT_OS_NONE - /* Init systick */ - SysTick_Config(SystemCoreClock / 1000); -#endif -} - //--------------------------------------------------------------------+ -// Board porting API +// stdlib //--------------------------------------------------------------------+ -void board_led_write(bool state) -{ - R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON); -} - -uint32_t board_button_read(void) -{ - bsp_io_level_t lvl; - R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl); - return lvl == BUTTON_STATE_ACTIVE; -} - -int board_uart_read(uint8_t *buf, int len) -{ - (void) buf; - (void) len; - return 0; -} - -int board_uart_write(void const *buf, int len) -{ - (void) buf; - (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler(void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif - -int close(int fd) -{ +int close(int fd) { (void) fd; return -1; } -int fstat(int fd, void *pstat) -{ + +int fstat(int fd, void *pstat) { (void) fd; (void) pstat; return 0; } -off_t lseek(int fd, off_t pos, int whence) -{ + +off_t lseek(int fd, off_t pos, int whence) { (void) fd; (void) pos; (void) whence; return 0; } -int isatty(int fd) -{ + +int isatty(int fd) { (void) fd; return 1; } diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake index c4c25bf4f..57e05a4b1 100644 --- a/hw/bsp/ra/family.cmake +++ b/hw/bsp/ra/family.cmake @@ -9,6 +9,7 @@ set(FSP_RA ${TOP}/hw/mcu/renesas/fsp/ra/fsp) # include board specific include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) +#set(FREERTOS_PORT A_CUSTOM_PORT CACHE INTERNAL "") set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake) @@ -58,10 +59,15 @@ function(add_board_target BOARD_TARGET) update_board(${BOARD_TARGET}) + if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID}) + set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc/${MCU_VARIANT}.ld) + endif () + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") target_link_options(${BOARD_TARGET} PUBLIC # linker file "LINKER:--script=${LD_FILE_GNU}" + -L${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc -nostartfiles # nanolib --specs=nano.specs @@ -98,7 +104,16 @@ function(family_configure_example TARGET RTOS) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ ) - # Add TinyUSB target and port source +# # RA has custom freertos port +# if (NOT TARGET freertos_kernel_port) +# add_library(freertos_kernel_port STATIC) +# target_sources(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port/port.c) +# target_include_directories(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port) +# +# target_link_libraries(freertos_kernel_port PUBLIC freertos_kernel) +# endif () + + # Add TinyUSB target and port source family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS}) target_sources(${TARGET}-tinyusb PUBLIC ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index 8e4f80eaf..6e90583e7 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -43,6 +43,11 @@ INC += \ $(TOP)/$(FSP_RA)/inc/instances \ $(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \ +ifndef LD_FILE +LD_FILE = $(FAMILY_PATH)/linker/gcc/$(MCU_VARIANT).ld +LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc +endif + # For freeRTOS port source # hack to use the port provided by renesas FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/linker/gcc/fsp.ld similarity index 97% rename from hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld rename to hw/bsp/ra/linker/gcc/fsp.ld index 63c1d33aa..453d46f24 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld +++ b/hw/bsp/ra/linker/gcc/fsp.ld @@ -1,29 +1,3 @@ -/* generated memory regions file - do not edit */ -RAM_START = 0x20000000; -RAM_LENGTH = 0x8000; -FLASH_START = 0x00000000; -FLASH_LENGTH = 0x40000; -DATA_FLASH_START = 0x40100000; -DATA_FLASH_LENGTH = 0x2000; -OPTION_SETTING_START = 0x00000000; -OPTION_SETTING_LENGTH = 0x0; -OPTION_SETTING_S_START = 0x80000000; -OPTION_SETTING_S_LENGTH = 0x0; -ID_CODE_START = 0x01010018; -ID_CODE_LENGTH = 0x20; -SDRAM_START = 0x80010000; -SDRAM_LENGTH = 0x0; -QSPI_FLASH_START = 0x60000000; -QSPI_FLASH_LENGTH = 0x0; -OSPI_DEVICE_0_START = 0x80020000; -OSPI_DEVICE_0_LENGTH = 0x0; -OSPI_DEVICE_1_START = 0x80030000; -OSPI_DEVICE_1_LENGTH = 0x0; - -/* - Linker File for Renesas FSP -*/ - /* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/ /* XIP_SECONDARY_SLOT_IMAGE = 1; @@ -629,6 +603,11 @@ SECTIONS /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ __tz_ID_CODE_S = ORIGIN(ID_CODE); + /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. + * Set this symbol to the same value as __tz_ID_CODE_S so the RA configuration tool does not split the ID_CODE + * memory region between TrustZone projects. */ + __tz_ID_CODE_N = __tz_ID_CODE_S; + .id_code : { __ID_Code_Start = .; @@ -636,8 +615,6 @@ SECTIONS __ID_Code_End = .; } > ID_CODE - /* Note: There are no secure/non-secure boundaries for ID_CODE. These symbols are provided for the RA configuration tool. */ - __tz_ID_CODE_N = __ID_Code_End; /* Symbol required for RA Configuration tool. */ __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING_OFS); diff --git a/hw/bsp/ra/linker/gcc/ra4m1.ld b/hw/bsp/ra/linker/gcc/ra4m1.ld new file mode 100644 index 000000000..218acbb2a --- /dev/null +++ b/hw/bsp/ra/linker/gcc/ra4m1.ld @@ -0,0 +1,22 @@ +RAM_START = 0x20000000; +RAM_LENGTH = 0x8000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x40000; +DATA_FLASH_START = 0x40100000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x00000000; +OPTION_SETTING_LENGTH = 0x0; +OPTION_SETTING_S_START = 0x80000000; +OPTION_SETTING_S_LENGTH = 0x0; +ID_CODE_START = 0x01010018; +ID_CODE_LENGTH = 0x20; +SDRAM_START = 0x80010000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x0; +OSPI_DEVICE_0_START = 0x80020000; +OSPI_DEVICE_0_LENGTH = 0x0; +OSPI_DEVICE_1_START = 0x80030000; +OSPI_DEVICE_1_LENGTH = 0x0; + +INCLUDE fsp.ld diff --git a/hw/bsp/ra/linker/gcc/ra4m3.ld b/hw/bsp/ra/linker/gcc/ra4m3.ld new file mode 100644 index 000000000..7b3a63fbe --- /dev/null +++ b/hw/bsp/ra/linker/gcc/ra4m3.ld @@ -0,0 +1,22 @@ +RAM_START = 0x20000000; +RAM_LENGTH = 0x20000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x100000; +DATA_FLASH_START = 0x08000000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x0100A100; +OPTION_SETTING_LENGTH = 0x100; +OPTION_SETTING_S_START = 0x0100A200; +OPTION_SETTING_S_LENGTH = 0x100; +ID_CODE_START = 0x00000000; +ID_CODE_LENGTH = 0x0; +SDRAM_START = 0x80010000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x4000000; +OSPI_DEVICE_0_START = 0x80020000; +OSPI_DEVICE_0_LENGTH = 0x0; +OSPI_DEVICE_1_START = 0x80030000; +OSPI_DEVICE_1_LENGTH = 0x0; + +INCLUDE fsp.ld diff --git a/hw/bsp/ra/linker/gcc/ra6m1.ld b/hw/bsp/ra/linker/gcc/ra6m1.ld new file mode 100644 index 000000000..91d27f74c --- /dev/null +++ b/hw/bsp/ra/linker/gcc/ra6m1.ld @@ -0,0 +1,22 @@ +RAM_START = 0x1FFE0000; +RAM_LENGTH = 0x40000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x80000; +DATA_FLASH_START = 0x40100000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x00000000; +OPTION_SETTING_LENGTH = 0x0; +OPTION_SETTING_S_START = 0x80000000; +OPTION_SETTING_S_LENGTH = 0x0; +ID_CODE_START = 0x0100A150; +ID_CODE_LENGTH = 0x10; +SDRAM_START = 0x80010000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x4000000; +OSPI_DEVICE_0_START = 0x80020000; +OSPI_DEVICE_0_LENGTH = 0x0; +OSPI_DEVICE_1_START = 0x80030000; +OSPI_DEVICE_1_LENGTH = 0x0; + +INCLUDE fsp.ld diff --git a/tools/cmake/cpu/cortex-m4.cmake b/tools/cmake/cpu/cortex-m4.cmake index a0cf3498f..4e9bc242d 100644 --- a/tools/cmake/cpu/cortex-m4.cmake +++ b/tools/cmake/cpu/cortex-m4.cmake @@ -6,7 +6,9 @@ if (TOOLCHAIN STREQUAL "gcc") -mfpu=fpv4-sp-d16 ) - set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") + if (NOT DEFINED FREERTOS_PORT) + set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "") + endif () elseif (TOOLCHAIN STREQUAL "iar") set(TOOLCHAIN_COMMON_FLAGS @@ -14,6 +16,8 @@ elseif (TOOLCHAIN STREQUAL "iar") --fpu VFPv4 ) - set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "") + if (NOT DEFINED FREERTOS_PORT) + set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "") + endif () endif () From 50381f7b4caf2d5ee10de16e9cf7bf2fb113364a Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 17:08:20 +0700 Subject: [PATCH 84/94] refactor to match fsp_cfg --- .../ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_cfg.h | 0 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h | 0 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_cfg.h | 0 .../fsp_cfg/{ => bsp}/bsp_mcu_device_pn_cfg.h | 0 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h | 0 .../ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_cfg.h | 0 .../ra4m3_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h | 0 .../ra4m3_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h | 0 hw/bsp/ra/boards/ra6m1_ek/board.cmake | 13 +++++++++++++ hw/bsp/ra/family.cmake | 1 + hw/bsp/ra/family.mk | 1 + 11 files changed, 15 insertions(+) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_cfg.h (100%) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h (100%) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_cfg.h (100%) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_pn_cfg.h (100%) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h (100%) rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_cfg.h (100%) mode change 100755 => 100644 rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h (100%) rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h (100%) create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.cmake diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h old mode 100755 new mode 100644 similarity index 100% rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.cmake b/hw/bsp/ra/boards/ra6m1_ek/board.cmake new file mode 100644 index 000000000..0d599b2da --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/board.cmake @@ -0,0 +1,13 @@ +set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor") +set(MCU_VARIANT ra6m1) + +set(JLINK_DEVICE R7FA6M1AD) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + ) + target_sources(${TARGET} PRIVATE + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ) +endfunction() diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake index 57e05a4b1..cf7dfad55 100644 --- a/hw/bsp/ra/family.cmake +++ b/hw/bsp/ra/family.cmake @@ -49,6 +49,7 @@ function(add_board_target BOARD_TARGET) ${CMAKE_CURRENT_FUNCTION_LIST_DIR} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg/bsp ${CMSIS_DIR}/CMSIS/Core/Include ${FSP_RA}/inc ${FSP_RA}/inc/api diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk index 6e90583e7..03125aac5 100644 --- a/hw/bsp/ra/family.mk +++ b/hw/bsp/ra/family.mk @@ -37,6 +37,7 @@ INC += \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/$(BOARD_PATH) \ $(TOP)/$(BOARD_PATH)/fsp_cfg \ + $(TOP)/$(BOARD_PATH)/fsp_cfg/bsp \ $(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \ $(TOP)/$(FSP_RA)/inc \ $(TOP)/$(FSP_RA)/inc/api \ From c5d958d104d4ded1554876cf86aec85dc98a1b37 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 17:27:45 +0700 Subject: [PATCH 85/94] add ra6m1 board --- .../ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h | 4 + .../ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 5 -- hw/bsp/ra/boards/ra6m1_ek/board.h | 53 ++++++++++++ .../ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h | 77 +++++++++++++++++ .../ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h | 23 +++++ .../ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h | 5 ++ .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h | 11 +++ .../ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 84 +++++++++++++++++++ .../boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h | 16 ++++ .../ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h | 7 ++ .../ra/boards/ra6m1_ek/fsp_cfg/vector_data.h | 5 ++ 11 files changed, 285 insertions(+), 5 deletions(-) create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h index b337e49f2..700d9b29f 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h @@ -31,7 +31,11 @@ #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0 + #define BSP_FEATURE_TFU_SUPPORTED 0 +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (0) // for SystemInit() void bsp_init(void * p_args); diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h index 4e080023e..3bde2db0d 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h +++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h @@ -25,11 +25,6 @@ #define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) #define BSP_VECTOR_TABLE_MAX_ENTRIES (48U) -#define BSP_TZ_SECURE_BUILD (0) -#define BSP_TZ_NONSECURE_BUILD (0) - -#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0 - #define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) #define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) #define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h new file mode 100644 index 000000000..982a78e52 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/board.h @@ -0,0 +1,53 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define LED1 BSP_IO_PORT_01_PIN_12 +#define LED_STATE_ON 1 + +#define SW1 BSP_IO_PORT_04_PIN_15 +#define BUTTON_STATE_ACTIVE 0 + +const ioport_pin_cfg_t board_pin_cfg[] = { + {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT}, + {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT}, + // USB D+, D-, VBus + {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, + {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, + {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, +}; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h new file mode 100644 index 000000000..c2b23b16c --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h @@ -0,0 +1,77 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CFG_H_ +#define BSP_CFG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "bsp_clock_cfg.h" +#include "bsp_mcu_family_cfg.h" + +#define RA_NOT_DEFINED 0 +#ifndef BSP_CFG_RTOS +#if (RA_NOT_DEFINED) != (2) +#define BSP_CFG_RTOS (2) +#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED) + #define BSP_CFG_RTOS (1) +#else + #define BSP_CFG_RTOS (0) +#endif +#endif + +#ifndef BSP_CFG_RTC_USED +#define BSP_CFG_RTC_USED (RA_NOT_DEFINED) +#endif + +#undef RA_NOT_DEFINED +#if defined(_RA_BOOT_IMAGE) + #define BSP_CFG_BOOT_IMAGE (1) +#endif + +#define BSP_CFG_MCU_VCC_MV (3300) +#define BSP_CFG_STACK_MAIN_BYTES (0x400) +#define BSP_CFG_HEAP_BYTES (0x1000) +#define BSP_CFG_PARAM_CHECKING_ENABLE (1) +#define BSP_CFG_ASSERT (0) +#define BSP_CFG_ERROR_LOG (0) + +#define BSP_CFG_PFS_PROTECT ((1)) + +#define BSP_CFG_C_RUNTIME_INIT ((1)) +#define BSP_CFG_EARLY_INIT ((0)) + +#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0)) + +#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED +#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) +#endif + +#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE +#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE +#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED +#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS +#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 +#endif + +#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0 +#define BSP_FEATURE_TFU_SUPPORTED 0 +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (0) + +#define BSP_CFG_USE_LOW_VOLTAGE_MODE 0 + +// for SystemInit() +void bsp_init(void * p_args); + +#ifdef __cplusplus +} +#endif + +#endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h new file mode 100644 index 000000000..1cdfae949 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h @@ -0,0 +1,23 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CLOCK_CFG_H_ +#define BSP_CLOCK_CFG_H_ +#define BSP_CFG_CLOCKS_SECURE (0) +#define BSP_CFG_CLOCKS_OVERRIDE (0) +#define BSP_CFG_XTAL_HZ (12000000) /* XTAL 12000000Hz */ +#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */ +#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */ +#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_1) /* PLL Div /1 */ +#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL Mul x20.0 */ +#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */ +#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* ICLK Div /2 */ +#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */ +#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */ +#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */ +#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */ +#define BSP_CFG_BCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* BCLK Div /2 */ +#define BSP_CFG_BCLK_OUTPUT (2) /* EBCLK Div /2 */ +#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ +#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */ +#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */ +#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */ +#endif /* BSP_CLOCK_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h new file mode 100644 index 000000000..bd6a901c3 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h @@ -0,0 +1,5 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_CFG_H_ +#define BSP_MCU_DEVICE_CFG_H_ +#define BSP_CFG_MCU_PART_SERIES (6) +#endif /* BSP_MCU_DEVICE_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h new file mode 100644 index 000000000..40bb3a3bf --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h @@ -0,0 +1,11 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_R7FA6M1AD3CFP +#define BSP_MCU_FEATURE_SET ('A') +#define BSP_ROM_SIZE_BYTES (524288) +#define BSP_RAM_SIZE_BYTES (262144) +#define BSP_DATA_FLASH_SIZE_BYTES (8192) +#define BSP_PACKAGE_LQFP +#define BSP_PACKAGE_PINS (100) +#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h new file mode 100644 index 000000000..5fedd754f --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h @@ -0,0 +1,84 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_FAMILY_CFG_H_ +#define BSP_MCU_FAMILY_CFG_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#include "bsp_mcu_device_pn_cfg.h" +#include "bsp_mcu_device_cfg.h" +#include "../../../ra/fsp/src/bsp/mcu/ra6m1/bsp_mcu_info.h" +#include "bsp_clock_cfg.h" + +#define BSP_MCU_GROUP_RA6M1 (1) +#define BSP_LOCO_HZ (32768) +#define BSP_MOCO_HZ (8000000) +#define BSP_SUB_CLOCK_HZ (32768) +#if BSP_CFG_HOCO_FREQUENCY == 0 +#define BSP_HOCO_HZ (16000000) +#elif BSP_CFG_HOCO_FREQUENCY == 1 + #define BSP_HOCO_HZ (18000000) +#elif BSP_CFG_HOCO_FREQUENCY == 2 + #define BSP_HOCO_HZ (20000000) +#else + #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h" +#endif + +#define BSP_CFG_FLL_ENABLE (0) + +#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) +#define BSP_VECTOR_TABLE_MAX_ENTRIES (112U) + +#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) +#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) +#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) +#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26) +#define OFS_SEQ5 (1 << 28) | (1 << 30) +#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5) +#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) +#define BSP_CFG_ROM_REG_MPU_PC0_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_PC0_START (0xFFFFFFFC) +#define BSP_CFG_ROM_REG_MPU_PC0_END (0xFFFFFFFF) +#define BSP_CFG_ROM_REG_MPU_PC1_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_PC1_START (0xFFFFFFFC) +#define BSP_CFG_ROM_REG_MPU_PC1_END (0xFFFFFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION0_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION0_START (0x00FFFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION0_END (0x00FFFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION1_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION1_START (0x200FFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION1_END (0x200FFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION2_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION2_START (0x407FFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION2_END (0x407FFFFF) +#define BSP_CFG_ROM_REG_MPU_REGION3_ENABLE (1) +#define BSP_CFG_ROM_REG_MPU_REGION3_START (0x400DFFFC) +#define BSP_CFG_ROM_REG_MPU_REGION3_END (0x400DFFFF) +#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT +#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) +#endif +/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */ +#define BSP_PRV_IELS_ENUM(vector) (ELC_ ## vector) + +/* + ID Code + Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings. + WARNING: This will disable debug access to the part and cannot be reversed by a debug probe. + */ +#if defined(BSP_ID_CODE_PERMANENTLY_LOCKED) + #define BSP_CFG_ID_CODE_LONG_1 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_2 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_3 (0x00000000) + #define BSP_CFG_ID_CODE_LONG_4 (0x00000000) +#else + /* ID CODE: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */ + #define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF) + #define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF) + #define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF) + #define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF) +#endif + +#ifdef __cplusplus +} +#endif +#endif /* BSP_MCU_FAMILY_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h new file mode 100644 index 000000000..95ceca3e2 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h @@ -0,0 +1,16 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_PIN_CFG_H_ +#define BSP_PIN_CFG_H_ +#include "r_ioport.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +extern const ioport_cfg_t g_bsp_pin_cfg; /* RA6M1-EK.pincfg */ + +void BSP_PinConfigSecurityInit(); + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif /* BSP_PIN_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h new file mode 100644 index 000000000..cb7c07932 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h @@ -0,0 +1,7 @@ +/* generated configuration header file - do not edit */ +#ifndef R_IOPORT_CFG_H_ +#define R_IOPORT_CFG_H_ + +#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) + +#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h new file mode 100644 index 000000000..37739c12a --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h @@ -0,0 +1,5 @@ +/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ +#define TU_IRQn 0 +#define USBFS_RESUME_IRQn 1 +#define USBFS_FIFO_0_IRQn 2 +#define USBFS_FIFO_1_IRQn 3 From 54dc699ddd4ff0c9ac4595ff752a97861dd434dc Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 17:43:06 +0700 Subject: [PATCH 86/94] forgot board.mk for ra6m1 --- hw/bsp/ra/boards/ra4m1_ek/board.mk | 1 - hw/bsp/ra/boards/ra4m3_ek/board.mk | 1 - hw/bsp/ra/boards/ra6m1_ek/board.mk | 7 +++++++ 3 files changed, 7 insertions(+), 2 deletions(-) create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.mk diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk index a06d75ef3..f257c0000 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk @@ -3,6 +3,5 @@ MCU_VARIANT = ra4m1 # For flash-jlink target JLINK_DEVICE = R7FA4M1AB -JLINK_IF = SWD flash: flash-jlink diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk index f2d0ecfc5..5987269b5 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.mk +++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk @@ -3,6 +3,5 @@ MCU_VARIANT = ra4m3 # For flash-jlink target JLINK_DEVICE = R7FA4M3AF -JLINK_IF = SWD flash: flash-jlink diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.mk b/hw/bsp/ra/boards/ra6m1_ek/board.mk new file mode 100644 index 000000000..f06b693d8 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m1_ek/board.mk @@ -0,0 +1,7 @@ +CPU_CORE = cortex-m4 +MCU_VARIANT = ra6m1 + +# For flash-jlink target +JLINK_DEVICE = R7FA6M1AD + +flash: flash-jlink From e7431f54f207b8563f2d8dba3384dba243d55bf4 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 17:46:21 +0700 Subject: [PATCH 87/94] fix undef with fsp --- src/portable/renesas/rusb2/rusb2_ra.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h index be0a9fa66..df4afdfa0 100644 --- a/src/portable/renesas/rusb2/rusb2_ra.h +++ b/src/portable/renesas/rusb2/rusb2_ra.h @@ -34,6 +34,7 @@ extern "C" { #ifdef __GNUC__ #pragma GCC diagnostic push #pragma GCC diagnostic ignored "-Wstrict-prototypes" +#pragma GCC diagnostic ignored "-Wundef" // extra push due to https://github.com/renesas/fsp/pull/278 #pragma GCC diagnostic push From 14f1123bbdb221a1ff755ca64061ec72b8baca67 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 17:55:36 +0700 Subject: [PATCH 88/94] remove left-over build_arm --- .github/workflows/build_arm.yml | 84 --------------------------------- 1 file changed, 84 deletions(-) diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml index 0b770f379..72ddf164b 100644 --- a/.github/workflows/build_arm.yml +++ b/.github/workflows/build_arm.yml @@ -67,12 +67,6 @@ jobs: repository: hathach/linkermap path: linkermap - - name: Checkout pico-sdk for rp2040 - if: matrix.family == 'rp2040' - run: | - git clone --depth 1 -b develop https://github.com/raspberrypi/pico-sdk ~/pico-sdk - echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk - - name: Get Dependencies run: python3 tools/get_deps.py ${{ matrix.family }} @@ -87,81 +81,3 @@ jobs: do find ${ex} -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"' done - - # Upload binaries for hardware test with self-hosted - - name: Prepare stm32l412nucleo Artifacts - if: contains(matrix.family, 'stm32l4') - run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \; - - - name: Upload Artifacts for stm32l412nucleo - if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach' - uses: actions/upload-artifact@v3 - with: - name: stm32l4 - path: | - *.elf - -# # --------------------------------------- -# # Hardware in the loop (HIL) -# # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user -# # - STM32L412 Nucleo with on-board jlink as ttyACM0 -# # --------------------------------------- -# hw-stm32l412nucleo-test: -# needs: build-arm -# runs-on: [self-hosted, Linux, X64, hifiphile] -# -# steps: -# - name: Clean workspace -# run: | -# echo "Cleaning up previous run" -# rm -rf "${{ github.workspace }}" -# mkdir -p "${{ github.workspace }}" -# -# - name: Download stm32l4 Artifacts -# uses: actions/download-artifact@v3 -# with: -# name: stm32l4 -# -# - name: Create flash.sh -# run: | -# echo > flash.sh 'echo halt > flash.jlink' -# echo >> flash.sh 'echo r >> flash.jlink' -# echo >> flash.sh 'echo loadfile $1 >> flash.jlink' -# echo >> flash.sh 'echo r >> flash.jlink' -# echo >> flash.sh 'echo go >> flash.jlink' -# echo >> flash.sh 'echo exit >> flash.jlink' -# echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)' -# echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi' -# chmod +x flash.sh -# -# - name: Test cdc_dual_ports -# run: | -# ./flash.sh cdc_dual_ports.elf -# while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done -# test -e /dev/ttyACM1 && echo "ttyACM1 exists" -# test -e /dev/ttyACM2 && echo "ttyACM2 exists" -# -# # Debian does not auto mount usb drive. skip this test for now -# - name: Test cdc_msc -# if: false -# run: | -# ./flash.sh cdc_msc.elf -# readme='/media/pi/TinyUSB MSC/README.TXT' -# while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done -# test -e /dev/ttyACM1 && echo "ttyACM1 exists" -# test -f "$readme" && echo "$readme exists" -# cat "$readme" -# -# - name: Test dfu -# run: | -# ./flash.sh dfu.elf -# while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done -# dfu-util -d cafe -a 0 -U dfu0 -# dfu-util -d cafe -a 1 -U dfu1 -# grep "TinyUSB DFU! - Partition 0" dfu0 -# grep "TinyUSB DFU! - Partition 1" dfu1 -# -# - name: Test dfu_runtime -# run: | -# ./flash.sh dfu_runtime.elf -# while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done From ec02ddf9863ee6e1b7a464d73b6cce205c772f43 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 1 Jul 2023 21:43:52 +0700 Subject: [PATCH 89/94] initial ra6m5 ek, board_test led + sw works --- hw/bsp/ra/boards/ra4m1_ek/board.cmake | 6 +- hw/bsp/ra/boards/ra4m3_ek/board.cmake | 6 +- hw/bsp/ra/boards/ra6m1_ek/board.cmake | 9 +- .../boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h | 16 - hw/bsp/ra/boards/ra6m5_ek/board.cmake | 10 + hw/bsp/ra/boards/ra6m5_ek/board.h | 52 +++ hw/bsp/ra/boards/ra6m5_ek/board.mk | 7 + .../ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h | 65 +++ .../ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h | 5 + .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h | 11 + .../ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 387 ++++++++++++++++++ .../boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h | 35 ++ .../ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h | 7 + .../ra/boards/ra6m5_ek/fsp_cfg/vector_data.h | 5 + hw/bsp/ra/family.cmake | 1 + hw/bsp/ra/linker/gcc/ra6m5.ld | 22 + 16 files changed, 616 insertions(+), 28 deletions(-) delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.cmake create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.mk create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h create mode 100644 hw/bsp/ra/linker/gcc/ra6m5.ld diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.cmake b/hw/bsp/ra/boards/ra4m1_ek/board.cmake index 51c1f3d6c..4188d3188 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.cmake +++ b/hw/bsp/ra/boards/ra4m1_ek/board.cmake @@ -4,7 +4,7 @@ set(MCU_VARIANT ra4m1) set(JLINK_DEVICE R7FA4M1AB) function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC) - target_sources(${TARGET} PRIVATE) - target_include_directories(${BOARD_TARGET} PUBLIC) +# target_compile_definitions(${TARGET} PUBLIC) +# target_sources(${TARGET} PRIVATE) +# target_include_directories(${BOARD_TARGET} PUBLIC) endfunction() diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.cmake b/hw/bsp/ra/boards/ra4m3_ek/board.cmake index 637e99db6..dfd5fc95a 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.cmake +++ b/hw/bsp/ra/boards/ra4m3_ek/board.cmake @@ -4,7 +4,7 @@ set(MCU_VARIANT ra4m3) set(JLINK_DEVICE R7FA4M3AF) function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC) - target_sources(${TARGET} PRIVATE) - target_include_directories(${BOARD_TARGET} PUBLIC) +# target_compile_definitions(${TARGET} PUBLIC) +# target_sources(${TARGET} PRIVATE) +# target_include_directories(${BOARD_TARGET} PUBLIC) endfunction() diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.cmake b/hw/bsp/ra/boards/ra6m1_ek/board.cmake index 0d599b2da..b2f41a354 100644 --- a/hw/bsp/ra/boards/ra6m1_ek/board.cmake +++ b/hw/bsp/ra/boards/ra6m1_ek/board.cmake @@ -4,10 +4,7 @@ set(MCU_VARIANT ra6m1) set(JLINK_DEVICE R7FA6M1AD) function(update_board TARGET) - target_compile_definitions(${TARGET} PUBLIC - ) - target_sources(${TARGET} PRIVATE - ) - target_include_directories(${BOARD_TARGET} PUBLIC - ) +# target_compile_definitions(${TARGET} PUBLIC) +# target_sources(${TARGET} PRIVATE) +# target_include_directories(${BOARD_TARGET} PUBLIC) endfunction() diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h deleted file mode 100644 index 95ceca3e2..000000000 --- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h +++ /dev/null @@ -1,16 +0,0 @@ -/* generated configuration header file - do not edit */ -#ifndef BSP_PIN_CFG_H_ -#define BSP_PIN_CFG_H_ -#include "r_ioport.h" - -/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ -FSP_HEADER - -extern const ioport_cfg_t g_bsp_pin_cfg; /* RA6M1-EK.pincfg */ - -void BSP_PinConfigSecurityInit(); - -/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ -FSP_FOOTER - -#endif /* BSP_PIN_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake new file mode 100644 index 000000000..42a4c7417 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake @@ -0,0 +1,10 @@ +set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor") +set(MCU_VARIANT ra6m5) + +set(JLINK_DEVICE R7FA6M5BH) + +function(update_board TARGET) +# target_compile_definitions(${TARGET} PUBLIC) +# target_sources(${TARGET} PRIVATE) +# target_include_directories(${BOARD_TARGET} PUBLIC) +endfunction() diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h new file mode 100644 index 000000000..4a1527f93 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/board.h @@ -0,0 +1,52 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2023 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define LED1 BSP_IO_PORT_00_PIN_08 +#define LED_STATE_ON 1 + +#define SW1 BSP_IO_PORT_00_PIN_05 +#define BUTTON_STATE_ACTIVE 0 + +const ioport_pin_cfg_t board_pin_cfg[] = { + {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, + {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, + {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, +}; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.mk b/hw/bsp/ra/boards/ra6m5_ek/board.mk new file mode 100644 index 000000000..567908b63 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/board.mk @@ -0,0 +1,7 @@ +CPU_CORE = cortex-m33 +MCU_VARIANT = ra6m5 + +# For flash-jlink target +JLINK_DEVICE = R7FA6M5BH + +flash: flash-jlink diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h new file mode 100644 index 000000000..e41f603ad --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h @@ -0,0 +1,65 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CFG_H_ +#define BSP_CFG_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#include "bsp_clock_cfg.h" +#include "bsp_mcu_family_cfg.h" + +#define RA_NOT_DEFINED 0 +#ifndef BSP_CFG_RTOS +#if (RA_NOT_DEFINED) != (2) +#define BSP_CFG_RTOS (2) +#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED) + #define BSP_CFG_RTOS (1) +#else + #define BSP_CFG_RTOS (0) +#endif +#endif +#ifndef BSP_CFG_RTC_USED +#define BSP_CFG_RTC_USED (RA_NOT_DEFINED) +#endif +#undef RA_NOT_DEFINED +#if defined(_RA_BOOT_IMAGE) + #define BSP_CFG_BOOT_IMAGE (1) +#endif +#define BSP_CFG_MCU_VCC_MV (3300) +#define BSP_CFG_STACK_MAIN_BYTES (0x400) +#define BSP_CFG_HEAP_BYTES (0x1000) +#define BSP_CFG_PARAM_CHECKING_ENABLE (1) +#define BSP_CFG_ASSERT (0) +#define BSP_CFG_ERROR_LOG (0) + +#define BSP_CFG_PFS_PROTECT ((1)) + +#define BSP_CFG_C_RUNTIME_INIT ((1)) +#define BSP_CFG_EARLY_INIT ((0)) + +#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0)) + +#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED +#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) +#endif + +#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE +#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE +#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED +#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) +#endif +#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS +#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 +#endif + +// for SystemInit() +void bsp_init(void * p_args); + +#ifdef __cplusplus +} +#endif +#endif /* BSP_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h new file mode 100644 index 000000000..bd6a901c3 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h @@ -0,0 +1,5 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_CFG_H_ +#define BSP_MCU_DEVICE_CFG_H_ +#define BSP_CFG_MCU_PART_SERIES (6) +#endif /* BSP_MCU_DEVICE_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h new file mode 100644 index 000000000..6845183db --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h @@ -0,0 +1,11 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_DEVICE_PN_CFG_H_ +#define BSP_MCU_R7FA6M5BH3CFC +#define BSP_MCU_FEATURE_SET ('B') +#define BSP_ROM_SIZE_BYTES (2097152) +#define BSP_RAM_SIZE_BYTES (524288) +#define BSP_DATA_FLASH_SIZE_BYTES (8192) +#define BSP_PACKAGE_LQFP +#define BSP_PACKAGE_PINS (176) +#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h new file mode 100644 index 000000000..d5428540f --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h @@ -0,0 +1,387 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_MCU_FAMILY_CFG_H_ +#define BSP_MCU_FAMILY_CFG_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#include "bsp_mcu_device_pn_cfg.h" +#include "bsp_mcu_device_cfg.h" +#include "../../../ra/fsp/src/bsp/mcu/ra6m5/bsp_mcu_info.h" +#include "bsp_clock_cfg.h" + +#define BSP_MCU_GROUP_RA6M5 (1) +#define BSP_LOCO_HZ (32768) +#define BSP_MOCO_HZ (8000000) +#define BSP_SUB_CLOCK_HZ (32768) +#if BSP_CFG_HOCO_FREQUENCY == 0 +#define BSP_HOCO_HZ (16000000) +#elif BSP_CFG_HOCO_FREQUENCY == 1 + #define BSP_HOCO_HZ (18000000) +#elif BSP_CFG_HOCO_FREQUENCY == 2 + #define BSP_HOCO_HZ (20000000) +#else + #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h" +#endif + +#define BSP_CFG_FLL_ENABLE (0) + +#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U) +#define BSP_VECTOR_TABLE_MAX_ENTRIES (112U) + +#if defined(_RA_TZ_SECURE) + #define BSP_TZ_SECURE_BUILD (1) + #define BSP_TZ_NONSECURE_BUILD (0) + #elif defined(_RA_TZ_NONSECURE) + #define BSP_TZ_SECURE_BUILD (0) + #define BSP_TZ_NONSECURE_BUILD (1) + #else +#define BSP_TZ_SECURE_BUILD (0) +#define BSP_TZ_NONSECURE_BUILD (0) +#endif + +/* TrustZone Settings */ +#define BSP_TZ_CFG_INIT_SECURE_ONLY (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE)) +#define BSP_TZ_CFG_SKIP_INIT (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY) +#define BSP_TZ_CFG_EXCEPTION_RESPONSE (0) + +/* CMSIS TrustZone Settings */ +#define SCB_CSR_AIRCR_INIT (1) +#define SCB_AIRCR_BFHFNMINS_VAL (0) +#define SCB_AIRCR_SYSRESETREQS_VAL (1) +#define SCB_AIRCR_PRIS_VAL (0) +#define TZ_FPU_NS_USAGE (1) +#ifndef SCB_NSACR_CP10_11_VAL +#define SCB_NSACR_CP10_11_VAL (3U) +#endif + +#ifndef FPU_FPCCR_TS_VAL +#define FPU_FPCCR_TS_VAL (1U) +#endif +#define FPU_FPCCR_CLRONRETS_VAL (1) + +#ifndef FPU_FPCCR_CLRONRET_VAL +#define FPU_FPCCR_CLRONRET_VAL (1) +#endif + +/* The C-Cache line size that is configured during startup. */ +#ifndef BSP_CFG_C_CACHE_LINE_SIZE +#define BSP_CFG_C_CACHE_LINE_SIZE (1U) +#endif + +/* Type 1 Peripheral Security Attribution */ + +/* Peripheral Security Attribution Register (PSAR) Settings */ +#ifndef BSP_TZ_CFG_PSARB +#define BSP_TZ_CFG_PSARB (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \ + (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | \ + 0x33f4f9) /* Unused */ +#endif +#ifndef BSP_TZ_CFG_PSARC +#define BSP_TZ_CFG_PSARC (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | \ + 0x7fffcef4) /* Unused */ +#endif +#ifndef BSP_TZ_CFG_PSARD +#define BSP_TZ_CFG_PSARD (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 16) /* ADC0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \ + 0xffae07f0) /* Unused */ +#endif +#ifndef BSP_TZ_CFG_PSARE +#define BSP_TZ_CFG_PSARE (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* GPT6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* GPT3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* GPT1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* GPT0 */ | \ + 0x3f3ff8) /* Unused */ +#endif +#ifndef BSP_TZ_CFG_MSSAR +#define BSP_TZ_CFG_MSSAR (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \ + 0xfffffffc) /* Unused */ +#endif + +/* Type 2 Peripheral Security Attribution */ + +/* Security attribution for Cache registers. */ +#ifndef BSP_TZ_CFG_CSAR +#define BSP_TZ_CFG_CSAR (0xFFFFFFFFU) +#endif + +/* Security attribution for RSTSRn registers. */ +#ifndef BSP_TZ_CFG_RSTSAR +#define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU) +#endif + +/* Security attribution for registers of LVD channels. */ +#ifndef BSP_TZ_CFG_LVDSAR +#define BSP_TZ_CFG_LVDSAR (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \ + 0xFFFFFFFCU) +#endif + +/* Security attribution for LPM registers. */ +#ifndef BSP_TZ_CFG_LPMSAR +#define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU) +#endif +/* Deep Standby Interrupt Factor Security Attribution Register. */ +#ifndef BSP_TZ_CFG_DPFSAR +#define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU) +#endif + +/* Security attribution for CGC registers. */ +#ifndef BSP_TZ_CFG_CGFSAR +#if BSP_CFG_CLOCKS_SECURE +/* Protect all CGC registers from Non-secure write access. */ +#define BSP_TZ_CFG_CGFSAR (0xFFFCE402U) +#else +/* Allow Secure and Non-secure write access. */ +#define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU) +#endif +#endif + +/* Security attribution for Battery Backup registers. */ +#ifndef BSP_TZ_CFG_BBFSAR +#define BSP_TZ_CFG_BBFSAR (0x00FFFFFF) +#endif + +/* Security attribution for registers for IRQ channels. */ +#ifndef BSP_TZ_CFG_ICUSARA +#define BSP_TZ_CFG_ICUSARA (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | \ + 0xFFFF0000U) +#endif + +/* Security attribution for NMI registers. */ +#ifndef BSP_TZ_CFG_ICUSARB +#define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */ +#endif + +/* Security attribution for registers for DMAC channels */ +#ifndef BSP_TZ_CFG_ICUSARC +#define BSP_TZ_CFG_ICUSARC (\ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \ + (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | \ + 0xFFFFFF00U) +#endif + +/* Security attribution registers for SELSR0. */ +#ifndef BSP_TZ_CFG_ICUSARD +#define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU) +#endif + +/* Security attribution registers for WUPEN0. */ +#ifndef BSP_TZ_CFG_ICUSARE +#define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU) +#endif + +/* Security attribution registers for WUPEN1. */ +#ifndef BSP_TZ_CFG_ICUSARF +#define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU) +#endif + +/* Set DTCSTSAR if the Secure program uses the DTC. */ +#if RA_NOT_DEFINED == RA_NOT_DEFINED +#define BSP_TZ_CFG_DTC_USED (0U) +#else + #define BSP_TZ_CFG_DTC_USED (1U) +#endif + +/* Security attribution of FLWT and FCKMHZ registers. */ +#ifndef BSP_TZ_CFG_FSAR +/* If the CGC registers are only accessible in Secure mode, than there is no + * reason for nonsecure applications to access FLWT and FCKMHZ. */ +#if BSP_CFG_CLOCKS_SECURE +/* Protect FLWT and FCKMHZ registers from nonsecure write access. */ +#define BSP_TZ_CFG_FSAR (0xFEFEU) +#else +/* Allow Secure and Non-secure write access. */ +#define BSP_TZ_CFG_FSAR (0xFFFFU) +#endif +#endif + +/* Security attribution for SRAM registers. */ +#ifndef BSP_TZ_CFG_SRAMSAR +/* If the CGC registers are only accessible in Secure mode, than there is no reason for Non Secure applications to access + * SRAM0WTEN and therefore there is no reason to access PRCR2. */ +#define BSP_TZ_CFG_SRAMSAR (\ + 1 | \ + ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \ + 4 | \ + 0xFFFFFFF8U) +#endif + +/* Security attribution for Standby RAM registers. */ +#ifndef BSP_TZ_CFG_STBRAMSAR +#define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U) +#endif + +/* Security attribution for the DMAC Bus Master MPU settings. */ +#ifndef BSP_TZ_CFG_MMPUSARA +/* The DMAC Bus Master MPU settings should align with the DMAC channel settings. */ +#define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC) +#endif + +/* Security Attribution Register A for BUS Control registers. */ +#ifndef BSP_TZ_CFG_BUSSARA +#define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU) +#endif +/* Security Attribution Register B for BUS Control registers. */ +#ifndef BSP_TZ_CFG_BUSSARB +#define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU) +#endif + +/* Enable Uninitialized Non-Secure Application Fallback. */ +#ifndef BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK +#define BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK (1U) +#endif + +#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2) +#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10) +#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17) +#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26) +#define OFS_SEQ5 (1 << 28) | (1 << 30) +#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5) + +/* Option Function Select Register 1 Security Attribution */ +#ifndef BSP_CFG_ROM_REG_OFS1_SEL +#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE) + #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U)) +#else +#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U) +#endif +#endif + +#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8)) + +/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */ +#define BSP_PRV_IELS_ENUM(vector) (ELC_ ## vector) + +/* Dual Mode Select Register */ +#ifndef BSP_CFG_ROM_REG_DUALSEL +#define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFF8U | (0x7U)) +#endif + +/* Block Protection Register 0 */ +#ifndef BSP_CFG_ROM_REG_BPS0 +#define BSP_CFG_ROM_REG_BPS0 (~( 0U)) +#endif +/* Block Protection Register 1 */ +#ifndef BSP_CFG_ROM_REG_BPS1 +#define BSP_CFG_ROM_REG_BPS1 (~( 0U)) +#endif +/* Block Protection Register 2 */ +#ifndef BSP_CFG_ROM_REG_BPS2 +#define BSP_CFG_ROM_REG_BPS2 (~( 0U)) +#endif +/* Block Protection Register 3 */ +#ifndef BSP_CFG_ROM_REG_BPS3 +#define BSP_CFG_ROM_REG_BPS3 (0xFFFFFFFFU) +#endif +/* Permanent Block Protection Register 0 */ +#ifndef BSP_CFG_ROM_REG_PBPS0 +#define BSP_CFG_ROM_REG_PBPS0 (~( 0U)) +#endif +/* Permanent Block Protection Register 1 */ +#ifndef BSP_CFG_ROM_REG_PBPS1 +#define BSP_CFG_ROM_REG_PBPS1 (~( 0U)) +#endif +/* Permanent Block Protection Register 2 */ +#ifndef BSP_CFG_ROM_REG_PBPS2 +#define BSP_CFG_ROM_REG_PBPS2 (~( 0U)) +#endif +/* Permanent Block Protection Register 3 */ +#ifndef BSP_CFG_ROM_REG_PBPS3 +#define BSP_CFG_ROM_REG_PBPS3 (0xFFFFFFFFU) +#endif +/* Security Attribution for Block Protection Register 0 (If any blocks are marked as protected in the secure application, then mark them as secure) */ +#ifndef BSP_CFG_ROM_REG_BPS_SEL0 +#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0) +#endif +/* Security Attribution for Block Protection Register 1 (If any blocks are marked as protected in the secure application, then mark them as secure) */ +#ifndef BSP_CFG_ROM_REG_BPS_SEL1 +#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1) +#endif +/* Security Attribution for Block Protection Register 2 (If any blocks are marked as protected in the secure application, then mark them as secure) */ +#ifndef BSP_CFG_ROM_REG_BPS_SEL2 +#define BSP_CFG_ROM_REG_BPS_SEL2 (BSP_CFG_ROM_REG_BPS2 & BSP_CFG_ROM_REG_PBPS2) +#endif +/* Security Attribution for Block Protection Register 3 (If any blocks are marked as protected in the secure application, then mark them as secure) */ +#ifndef BSP_CFG_ROM_REG_BPS_SEL3 +#define BSP_CFG_ROM_REG_BPS_SEL3 (BSP_CFG_ROM_REG_BPS3 & BSP_CFG_ROM_REG_PBPS3) +#endif +#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT +#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) +#endif + +#ifdef __cplusplus +} +#endif +#endif /* BSP_MCU_FAMILY_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h new file mode 100644 index 000000000..77ac41d0a --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h @@ -0,0 +1,35 @@ +/* generated configuration header file - do not edit */ +#ifndef BSP_CLOCK_CFG_H_ +#define BSP_CLOCK_CFG_H_ +#define BSP_CFG_CLOCKS_SECURE (0) +#define BSP_CFG_CLOCKS_OVERRIDE (0) +#define BSP_CFG_XTAL_HZ (24000000) /* XTAL 24000000Hz */ +#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */ +#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */ +#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL Div /3 */ +#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_25_0 /* PLL Mul x25.0 */ +#define BSP_CFG_PLL2_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */ +#define BSP_CFG_PLL2_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL2 Div /2 */ +#define BSP_CFG_PLL2_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL2 Mul x20.0 */ +#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */ +#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */ +#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL2) /* UCLK Src: PLL2 */ +#define BSP_CFG_U60CK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* U60CK Disabled */ +#define BSP_CFG_OCTA_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* OCTASPICLK Disabled */ +#define BSP_CFG_CANFDCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CANFDCLK Disabled */ +#define BSP_CFG_CECCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CECCLK Disabled */ +#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */ +#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */ +#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */ +#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */ +#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */ +#define BSP_CFG_BCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* BCLK Div /2 */ +#define BSP_CFG_BCLK_OUTPUT (2) /* EBCLK Div /2 */ +#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */ +#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */ +#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */ +#define BSP_CFG_U60CK_DIV (BSP_CLOCKS_USB60_CLOCK_DIV_1) /* U60CK Div /1 */ +#define BSP_CFG_OCTA_DIV (BSP_CLOCKS_OCTA_CLOCK_DIV_1) /* OCTASPICLK Div /1 */ +#define BSP_CFG_CANFDCLK_DIV (BSP_CLOCKS_CANFD_CLOCK_DIV_1) /* CANFDCLK Div /1 */ +#define BSP_CFG_CECCLK_DIV (BSP_CLOCKS_CEC_CLOCK_DIV_1) /* CECCLK Div /1 */ +#endif /* BSP_CLOCK_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h new file mode 100644 index 000000000..cb7c07932 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h @@ -0,0 +1,7 @@ +/* generated configuration header file - do not edit */ +#ifndef R_IOPORT_CFG_H_ +#define R_IOPORT_CFG_H_ + +#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) + +#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h new file mode 100644 index 000000000..37739c12a --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h @@ -0,0 +1,5 @@ +/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ +#define TU_IRQn 0 +#define USBFS_RESUME_IRQn 1 +#define USBFS_FIFO_0_IRQn 2 +#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake index cf7dfad55..f93880dff 100644 --- a/hw/bsp/ra/family.cmake +++ b/hw/bsp/ra/family.cmake @@ -55,6 +55,7 @@ function(add_board_target BOARD_TARGET) ${FSP_RA}/inc/api ${FSP_RA}/inc/instances ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include + ${FSP_RA}/src/bsp/mcu/all ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT} ) diff --git a/hw/bsp/ra/linker/gcc/ra6m5.ld b/hw/bsp/ra/linker/gcc/ra6m5.ld new file mode 100644 index 000000000..af747fd9b --- /dev/null +++ b/hw/bsp/ra/linker/gcc/ra6m5.ld @@ -0,0 +1,22 @@ +RAM_START = 0x20000000; +RAM_LENGTH = 0x80000; +FLASH_START = 0x00000000; +FLASH_LENGTH = 0x200000; +DATA_FLASH_START = 0x08000000; +DATA_FLASH_LENGTH = 0x2000; +OPTION_SETTING_START = 0x0100A100; +OPTION_SETTING_LENGTH = 0x100; +OPTION_SETTING_S_START = 0x0100A200; +OPTION_SETTING_S_LENGTH = 0x100; +ID_CODE_START = 0x00000000; +ID_CODE_LENGTH = 0x0; +SDRAM_START = 0x80010000; +SDRAM_LENGTH = 0x0; +QSPI_FLASH_START = 0x60000000; +QSPI_FLASH_LENGTH = 0x4000000; +OSPI_DEVICE_0_START = 0x68000000; +OSPI_DEVICE_0_LENGTH = 0x8000000; +OSPI_DEVICE_1_START = 0x70000000; +OSPI_DEVICE_1_LENGTH = 0x10000000; + +INCLUDE fsp.ld From 787229a35e20e488b642e879e4f068571e9488df Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 2 Jul 2023 23:39:43 +0700 Subject: [PATCH 90/94] add etm trace for 6m5 --- hw/bsp/ra/boards/ra6m5_ek/board.h | 19 ++++++++--- hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug | 35 ++++++++++++++++++++ hw/bsp/ra/family.c | 5 +++ 3 files changed, 54 insertions(+), 5 deletions(-) create mode 100644 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h index 4a1527f93..9c9bb6dcf 100644 --- a/hw/bsp/ra/boards/ra6m5_ek/board.h +++ b/hw/bsp/ra/boards/ra6m5_ek/board.h @@ -38,11 +38,20 @@ extern "C" { #define BUTTON_STATE_ACTIVE 0 const ioport_pin_cfg_t board_pin_cfg[] = { - {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, + { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, + { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, + { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, + { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW }, + { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT }, + + #ifdef TRACE_ETM + // ETM Trace + { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, + { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, + { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, + { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, + { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, + #endif }; #ifdef __cplusplus diff --git a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug new file mode 100644 index 000000000..fa55d40b2 --- /dev/null +++ b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug @@ -0,0 +1,35 @@ + +/********************************************************************* +* +* OnProjectLoad +* +* Function description +* Project load routine. Required. +* +********************************************************************** +*/ +void OnProjectLoad (void) { + Project.AddSvdFile ("Cortex-M33.svd"); + Project.AddSvdFile ("./R7FA6M5BH.svd"); + + Project.SetDevice ("R7FA6M5BH"); + Project.SetHostIF ("USB", ""); + Project.SetTargetIF ("SWD"); + Project.SetTIFSpeed ("50 MHz"); + + Project.SetTraceSource ("Trace Pins"); + Project.SetTracePortWidth (4); + + File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ra6m5/cdc_msc.elf"); +} +/********************************************************************* +* +* BeforeTargetConnect +* +********************************************************************** +*/ +void BeforeTargetConnect (void) { + // + // Trace pin init is done by J-Link script file as J-Link script files are IDE independent + // +} diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index 82d7a60c5..f7c5e36f9 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -87,6 +87,11 @@ void board_init(void) /* Configure pins. */ R_IOPORT_Open(&port_ctrl, &family_pin_cfg); +#ifdef TRACE_ETM + // Enable trace clock with div 1 (100 Mhz) + R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk; +#endif + board_led_write(false); /* Enable USB_BASE */ From ad7764b5b2f4fc3be3e7da53731559c92784d796 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Jul 2023 10:54:37 +0700 Subject: [PATCH 91/94] move vector_data.h and ioport_cfg.h to common family --- hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h | 7 ------- hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h | 5 ----- hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h | 7 ------- hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h | 5 ----- hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/r_ioport_cfg.h | 0 hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/vector_data.h | 0 6 files changed, 24 deletions(-) delete mode 100755 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h rename hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/r_ioport_cfg.h (100%) rename hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/vector_data.h (100%) diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h deleted file mode 100755 index cb7c07932..000000000 --- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h +++ /dev/null @@ -1,7 +0,0 @@ -/* generated configuration header file - do not edit */ -#ifndef R_IOPORT_CFG_H_ -#define R_IOPORT_CFG_H_ - -#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h deleted file mode 100644 index 37739c12a..000000000 --- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h +++ /dev/null @@ -1,5 +0,0 @@ -/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ -#define TU_IRQn 0 -#define USBFS_RESUME_IRQn 1 -#define USBFS_FIFO_0_IRQn 2 -#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h deleted file mode 100644 index cb7c07932..000000000 --- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h +++ /dev/null @@ -1,7 +0,0 @@ -/* generated configuration header file - do not edit */ -#ifndef R_IOPORT_CFG_H_ -#define R_IOPORT_CFG_H_ - -#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h deleted file mode 100644 index 37739c12a..000000000 --- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h +++ /dev/null @@ -1,5 +0,0 @@ -/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ -#define TU_IRQn 0 -#define USBFS_RESUME_IRQn 1 -#define USBFS_FIFO_0_IRQn 2 -#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/r_ioport_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h rename to hw/bsp/ra/r_ioport_cfg.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/vector_data.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h rename to hw/bsp/ra/vector_data.h From 960d9fa6f1a2b4e6c17eda354847acbbb6501d77 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Jul 2023 11:03:50 +0700 Subject: [PATCH 92/94] move files around --- .../ra4m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h | 0 .../ra4m3_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h | 0 .../ra6m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h | 0 .../ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h | 7 ------- hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h | 5 ----- hw/bsp/ra/family.c | 17 ++++++++++------- 6 files changed, 10 insertions(+), 19 deletions(-) rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%) rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%) rename hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%) delete mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h delete mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h similarity index 100% rename from hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h rename to hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h deleted file mode 100644 index cb7c07932..000000000 --- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h +++ /dev/null @@ -1,7 +0,0 @@ -/* generated configuration header file - do not edit */ -#ifndef R_IOPORT_CFG_H_ -#define R_IOPORT_CFG_H_ - -#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE) - -#endif /* R_IOPORT_CFG_H_ */ diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h deleted file mode 100644 index 37739c12a..000000000 --- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h +++ /dev/null @@ -1,5 +0,0 @@ -/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ -#define TU_IRQn 0 -#define USBFS_RESUME_IRQn 1 -#define USBFS_FIFO_0_IRQn 2 -#define USBFS_FIFO_1_IRQn 3 diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index f7c5e36f9..850498fbb 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -53,7 +53,16 @@ #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U) #define BSP_PRV_PRCR_LOCK ((BSP_PRV_PRCR_KEY) | 0x0U) -/* ISR prototypes */ +static const ioport_cfg_t family_pin_cfg = { + .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), + .p_pin_cfg_data = board_pin_cfg, +}; +static ioport_instance_ctrl_t port_ctrl; + +//--------------------------------------------------------------------+ +// Vector Data +//--------------------------------------------------------------------+ + void usbfs_interrupt_handler(void); void usbfs_resume_handler(void); void usbfs_d0fifo_handler(void); @@ -72,12 +81,6 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1) /* USBFS FIFO 1 (DMA transfer request 1) */ }; -static const ioport_cfg_t family_pin_cfg = { - .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t), - .p_pin_cfg_data = board_pin_cfg, -}; -static ioport_instance_ctrl_t port_ctrl; - //--------------------------------------------------------------------+ // Board porting API //--------------------------------------------------------------------+ From 4080ab3d034557572bcaf17c340026865137bf15 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Jul 2023 11:22:19 +0700 Subject: [PATCH 93/94] wrap up ra update --- .idea/cmake.xml | 7 +++++-- .idea/runConfigurations/kl25.xml | 2 +- .idea/runConfigurations/stm32g474.xml | 2 +- hw/bsp/ra/family.c | 7 +------ hw/bsp/ra/vector_data.h | 24 ++++++++++++++++++++++++ 5 files changed, 32 insertions(+), 10 deletions(-) diff --git a/.idea/cmake.xml b/.idea/cmake.xml index 2ac7993c1..47ca8253e 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -2,7 +2,7 @@ - + @@ -25,7 +25,7 @@ - + @@ -43,6 +43,9 @@ + + + \ No newline at end of file diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml index add9a0d6b..3052b440b 100644 --- a/.idea/runConfigurations/kl25.xml +++ b/.idea/runConfigurations/kl25.xml @@ -1,5 +1,5 @@ - + diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml index bbab2a5c5..6076320b5 100644 --- a/.idea/runConfigurations/stm32g474.xml +++ b/.idea/runConfigurations/stm32g474.xml @@ -1,5 +1,5 @@ - + diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index 850498fbb..00b87f335 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -63,12 +63,7 @@ static ioport_instance_ctrl_t port_ctrl; // Vector Data //--------------------------------------------------------------------+ -void usbfs_interrupt_handler(void); -void usbfs_resume_handler(void); -void usbfs_d0fifo_handler(void); -void usbfs_d1fifo_handler(void); - -const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { +BSP_DONT_REMOVE const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = { [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */ [1] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */ [2] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */ diff --git a/hw/bsp/ra/vector_data.h b/hw/bsp/ra/vector_data.h index 37739c12a..400743d17 100644 --- a/hw/bsp/ra/vector_data.h +++ b/hw/bsp/ra/vector_data.h @@ -1,5 +1,29 @@ /* vector numbers are configurable/dynamic, hence this, it will be used inside the port */ +#ifndef VECTOR_DATA_H +#define VECTOR_DATA_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef VECTOR_DATA_IRQ_COUNT + #define VECTOR_DATA_IRQ_COUNT 4 +#endif + +/* ISR prototypes */ +void usbfs_interrupt_handler(void); +void usbfs_resume_handler(void); +void usbfs_d0fifo_handler(void); +void usbfs_d1fifo_handler(void); + +/* Vector table allocations */ #define TU_IRQn 0 #define USBFS_RESUME_IRQn 1 #define USBFS_FIFO_0_IRQn 2 #define USBFS_FIFO_1_IRQn 3 + +#ifdef __cplusplus +} +#endif + +#endif From d5d1b43eb9d1a619b71879892ada7cb85ca3c00f Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 3 Jul 2023 12:07:27 +0700 Subject: [PATCH 94/94] board pin data clean up --- hw/bsp/ra/boards/ra4m1_ek/board.h | 2 +- hw/bsp/ra/boards/ra4m3_ek/board.h | 11 ++++++----- hw/bsp/ra/boards/ra6m1_ek/board.h | 2 +- hw/bsp/ra/boards/ra6m5_ek/board.h | 15 ++++++++++----- 4 files changed, 18 insertions(+), 12 deletions(-) diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h index b580bb5e9..ba3698f3d 100644 --- a/hw/bsp/ra/boards/ra4m1_ek/board.h +++ b/hw/bsp/ra/boards/ra4m1_ek/board.h @@ -40,7 +40,7 @@ extern "C" { const ioport_pin_cfg_t board_pin_cfg[] = { {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT}, {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT}, - // USB D+, D-, VBus + // USB FS D+, D-, VBus {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h index e41302f90..c2f150b33 100644 --- a/hw/bsp/ra/boards/ra4m3_ek/board.h +++ b/hw/bsp/ra/boards/ra4m3_ek/board.h @@ -38,11 +38,12 @@ extern "C" { #define BUTTON_STATE_ACTIVE 0 const ioport_pin_cfg_t board_pin_cfg[] = { - {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)}, - {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)}, - {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}, + {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT}, + {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT}, + // USB FS D+, D-, VBus + {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, + {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, + {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, }; #ifdef __cplusplus diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h index 982a78e52..0b7297fd4 100644 --- a/hw/bsp/ra/boards/ra6m1_ek/board.h +++ b/hw/bsp/ra/boards/ra6m1_ek/board.h @@ -40,7 +40,7 @@ extern "C" { const ioport_pin_cfg_t board_pin_cfg[] = { {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT}, {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT}, - // USB D+, D-, VBus + // USB FS D+, D-, VBus {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS}, diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h index 9c9bb6dcf..87434630f 100644 --- a/hw/bsp/ra/boards/ra6m5_ek/board.h +++ b/hw/bsp/ra/boards/ra6m5_ek/board.h @@ -38,20 +38,25 @@ extern "C" { #define BUTTON_STATE_ACTIVE 0 const ioport_pin_cfg_t board_pin_cfg[] = { - { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, - { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, - { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS }, { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW }, { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT }, - #ifdef TRACE_ETM + // USB FS D+, D-, VBus + { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH }, + { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH}, + { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH}, + + // USB HS D+, D-, VBus + { .pin = BSP_IO_PORT_07_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS }, + { .pin = BSP_IO_PORT_11_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH}, + { .pin = BSP_IO_PORT_11_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH}, + // ETM Trace { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE }, - #endif }; #ifdef __cplusplus