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made line ends consistent.

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This commit is contained in:
Lars Pötter 2023-07-02 09:02:24 +02:00
parent f5d0510064
commit 0693462eba
12 changed files with 72 additions and 72 deletions
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4
src/class/cdc/cdc_host.c
View File

@ -973,7 +973,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud)
static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
{
uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\r\n", baudrate, divisor);
p_cdc->user_control_cb = complete_cb;
_ftdi_requested_baud = baudrate;
@ -1108,7 +1108,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe
}
static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\n", baudrate);
TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\r\n", baudrate);
uint32_t baud_le = tu_htole32(baudrate);
p_cdc->user_control_cb = complete_cb;
return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,

16
src/class/video/video_device.c
View File

@ -609,17 +609,17 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
* @param[in] altnum The target alternate setting number. */
static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum)
{
TU_LOG2(" open VC %d\n", altnum);
TU_LOG2(" open VC %d\r\n", altnum);
uint8_t const *beg = self->beg;
uint8_t const *end = beg + self->len;
/* The first descriptor is a video control interface descriptor. */
uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
TU_LOG2(" cur %d\n", cur - beg);
TU_LOG2(" cur %d\r\n", cur - beg);
TU_VERIFY(cur < end);
tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur;
TU_LOG2(" bInCollection %d\n", vc->ctl.bInCollection);
TU_LOG2(" bInCollection %d\r\n", vc->ctl.bInCollection);
/* Support for up to 2 streaming interfaces only. */
TU_ASSERT(vc->ctl.bInCollection <= CFG_TUD_VIDEO_STREAMING);
@ -628,7 +628,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
/* Advance to the next descriptor after the class-specific VC interface header descriptor. */
cur += vc->std.bLength + vc->ctl.bLength;
TU_LOG2(" bNumEndpoints %d\n", vc->std.bNumEndpoints);
TU_LOG2(" bNumEndpoints %d\r\n", vc->std.bNumEndpoints);
/* Open the notification endpoint if it exist. */
if (vc->std.bNumEndpoints) {
/* Support for 1 endpoint only. */
@ -662,7 +662,7 @@ static bool _init_vs_configuration(videod_streaming_interface_t *stm)
static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint_fast8_t altnum)
{
uint_fast8_t i;
TU_LOG2(" reopen VS %d\n", altnum);
TU_LOG2(" reopen VS %d\r\n", altnum);
uint8_t const *desc = _videod_itf[stm->index_vc].beg;
/* Close endpoints of previous settings. */
@ -672,7 +672,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
uint8_t ep_adr = _desc_ep_addr(desc + ofs_ep);
usbd_edpt_close(rhport, ep_adr);
stm->desc.ep[i] = 0;
TU_LOG2(" close EP%02x\n", ep_adr);
TU_LOG2(" close EP%02x\r\n", ep_adr);
}
/* clear transfer management information */
@ -709,12 +709,12 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
}
TU_ASSERT(usbd_edpt_open(rhport, ep));
stm->desc.ep[i] = (uint16_t) (cur - desc);
TU_LOG2(" open EP%02x\n", _desc_ep_addr(cur));
TU_LOG2(" open EP%02x\r\n", _desc_ep_addr(cur));
}
if (altnum) {
stm->state = VS_STATE_STREAMING;
}
TU_LOG2(" done\n");
TU_LOG2(" done\r\n");
return true;
}

2
src/common/tusb_fifo.c
View File

@ -539,7 +539,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
// Advance index
f->wr_idx = advance_index(f->depth, wr_idx, n);
TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx);
TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
}
_ff_unlock(f->mutex_wr);

2
src/portable/dialog/da146xx/dcd_da146xx.c
View File

@ -651,7 +651,7 @@ static void handle_epx_tx_ev(xfer_ctl_t *xfer)
}
if (txs & USB_USB_TXS1_REG_USB_TX_URUN_Msk)
{
TU_LOG1("EP %d FIFO underrun\n", epnum);
TU_LOG1("EP %d FIFO underrun\r\n", epnum);
}
// Start next or repeated packet.
start_tx_packet(xfer);

30
src/portable/mentor/musb/dcd_musb.c
View File

@ -317,7 +317,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
const unsigned mps = regs->TXMAXP;
const unsigned len = TU_MIN(mps, rem);
void *buf = pipe->buf;
// TU_LOG1(" %p mps %d len %d rem %d\n", buf, mps, len, rem);
// TU_LOG1(" %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
if (len) {
if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_IN);
@ -328,7 +328,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
pipe->remaining = rem - len;
}
regs->TXCSRL = USB_TXCSRL1_TXRDY;
// TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
// TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
return false;
}
@ -337,7 +337,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
// TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL);
// TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
@ -399,14 +399,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
* may have already finished and received the next setup packet
* without calling this function, so we have no choice but to
* invoke the callback function of status packet here. */
// TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
// TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
_dcd.status_out = 0;
if (req == REQUEST_TYPE_INVALID) {
dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
} else {
/* The next setup packet has already been received, it aborts
* invoking callback function to avoid confusing TUSB stack. */
TU_LOG1("Drop CONTROL_STAGE_ACK\n");
TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
}
return true;
}
@ -431,16 +431,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
} else {
USB0->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
}
// TU_LOG1(" IN USB0->CSRL0 = %x\n", USB0->CSRL0);
// TU_LOG1(" IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
} else {
// TU_LOG1(" OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
// TU_LOG1(" OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
_dcd.pipe0.buf = buffer;
_dcd.pipe0.length = len;
_dcd.pipe0.remaining = len;
USB0->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
}
} else if (dir_in) {
// TU_LOG1(" STATUS IN USB0->CSRL0 = %x\n", USB0->CSRL0);
// TU_LOG1(" STATUS IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
_dcd.pipe0.buf = NULL;
_dcd.pipe0.length = 0;
_dcd.pipe0.remaining = 0;
@ -454,7 +454,7 @@ static void process_ep0(uint8_t rhport)
{
uint_fast8_t csrl = USB0->CSRL0;
// TU_LOG1(" EP0 USB0->CSRL0 = %x\n", csrl);
// TU_LOG1(" EP0 USB0->CSRL0 = %x\r\n", csrl);
if (csrl & USB_CSRL0_STALLED) {
/* Returned STALL packet to HOST. */
@ -464,7 +464,7 @@ static void process_ep0(uint8_t rhport)
unsigned req = _dcd.setup_packet.bmRequestType;
if (csrl & USB_CSRL0_SETEND) {
TU_LOG1(" ABORT by the next packets\n");
TU_LOG1(" ABORT by the next packets\r\n");
USB0->CSRL0 = USB_CSRL0_SETENDC;
if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
/* DATA stage was aborted by receiving STATUS or SETUP packet. */
@ -539,14 +539,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
volatile hw_endpoint_t *regs = edpt_regs(epn_minus1);
if (dir_in) {
// TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL);
// TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL);
if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
return;
}
completed = handle_xfer_in(ep_addr);
} else {
// TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL);
// TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL);
if (regs->RXCSRL & USB_RXCSRL1_STALLED) {
regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
return;
@ -789,7 +789,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
{
(void)rhport;
bool ret;
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
// TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
unsigned const epnum = tu_edpt_number(ep_addr);
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
NVIC_DisableIRQ(USB0_IRQn);
@ -807,7 +807,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
{
(void)rhport;
bool ret;
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
// TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
unsigned const epnum = tu_edpt_number(ep_addr);
TU_ASSERT(epnum);
unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
@ -869,7 +869,7 @@ void dcd_int_handler(uint8_t rhport)
is = USB0->IS; /* read and clear interrupt status */
txis = USB0->TXIS; /* read and clear interrupt status */
rxis = USB0->RXIS; /* read and clear interrupt status */
// TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis);
// TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
is &= USB0->IE; /* Clear disabled interrupts */
if (is & USB_IS_DISCON) {

8
src/portable/mentor/musb/hcd_musb.c
View File

@ -418,7 +418,7 @@ static void process_ep0(uint8_t rhport)
(void)rhport;
uint_fast8_t csrl = USB0->CSRL0;
// TU_LOG1(" EP0 CSRL = %x\n", csrl);
// TU_LOG1(" EP0 CSRL = %x\r\n", csrl);
unsigned const dev_addr = USB0->TXFUNCADDR0;
unsigned const req = _hcd.bmRequestType;
@ -508,7 +508,7 @@ static void process_pipe_tx(uint8_t rhport, uint_fast8_t pipenum)
volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1);
unsigned const csrl = regs->TXCSRL;
// TU_LOG1(" TXCSRL%d = %x\n", pipenum, csrl);
// TU_LOG1(" TXCSRL%d = %x\r\n", pipenum, csrl);
if (csrl & (USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) {
if (csrl & USB_TXCSRL1_TXRDY)
regs->TXCSRL = (csrl & ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) | USB_TXCSRL1_FLUSH;
@ -537,7 +537,7 @@ static void process_pipe_rx(uint8_t rhport, uint_fast8_t pipenum)
volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1);
unsigned const csrl = regs->RXCSRL;
// TU_LOG1(" RXCSRL%d = %x\n", pipenum, csrl);
// TU_LOG1(" RXCSRL%d = %x\r\n", pipenum, csrl);
if (csrl & (USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) {
if (csrl & USB_RXCSRL1_RXRDY)
regs->RXCSRL = (csrl & ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) | USB_RXCSRL1_FLUSH;
@ -846,7 +846,7 @@ void hcd_int_handler(uint8_t rhport)
is = USB0->IS; /* read and clear interrupt status */
txis = USB0->TXIS; /* read and clear interrupt status */
rxis = USB0->RXIS; /* read and clear interrupt status */
// TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis);
// TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
is &= USB0->IE; /* Clear disabled interrupts */
if (is & USB_IS_RESUME) {

16
src/portable/nxp/khci/hcd_khci.c
View File

@ -161,7 +161,7 @@ static int prepare_packets(int pipenum)
buffer_descriptor_t *bd = _hcd.bdt[dir_tx];
TU_ASSERT(0 == bd[odd].own, -1);
// TU_LOG1(" %p dir %d odd %d data %d\n", &bd[odd], dir_tx, odd, pipe->data);
// TU_LOG1(" %p dir %d odd %d data %d\r\n", &bd[odd], dir_tx, odd, pipe->data);
ep->pipenum = pipenum;
@ -251,7 +251,7 @@ static bool resume_transfer(int pipenum)
flags |= USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPCTLDIS_MASK | USB_ENDPT_RETRYDIS_MASK;
break;
}
// TU_LOG1(" resume pipenum %d flags %x\n", pipenum, flags);
// TU_LOG1(" resume pipenum %d flags %x\r\n", pipenum, flags);
KHCI->ENDPOINT[0].ENDPT = flags;
KHCI->ADDR = (KHCI->ADDR & USB_ADDR_LSEN_MASK) | pipe->dev_addr;
@ -302,7 +302,7 @@ static void process_tokdne(uint8_t rhport)
int pipenum = ep->pipenum;
int next_pipenum;
// TU_LOG1("TOKDNE %x PID %x pipe %d\n", s, pid, pipenum);
// TU_LOG1("TOKDNE %x PID %x pipe %d\r\n", s, pid, pipenum);
xfer_result_t result;
switch (pid) {
@ -479,7 +479,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
{
(void)rhport;
// TU_LOG1("SETUP %u\n", dev_addr);
// TU_LOG1("SETUP %u\r\n", dev_addr);
TU_ASSERT(0 == (_hcd.in_progress & TU_BIT(0)));
int pipenum = find_pipe(dev_addr, 0);
@ -510,7 +510,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
{
(void)rhport;
uint8_t const ep_addr = ep_desc->bEndpointAddress;
// TU_LOG1("O %u %x\n", dev_addr, ep_addr);
// TU_LOG1("O %u %x\r\n", dev_addr, ep_addr);
/* Find a free pipe */
pipe_state_t *p = &_hcd.pipe[0];
pipe_state_t *end = &_hcd.pipe[CFG_TUH_ENDPOINT_MAX * 2];
@ -543,7 +543,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
{
(void)rhport;
// TU_LOG1("X %u %x %x %d\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen);
// TU_LOG1("X %u %x %x %d\r\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen);
int pipenum = find_pipe(dev_addr, ep_addr);
TU_ASSERT(0 <= pipenum);
@ -580,7 +580,7 @@ void hcd_int_handler(uint8_t rhport)
uint32_t is = KHCI->ISTAT;
uint32_t msk = KHCI->INTEN;
// TU_LOG1("S %lx\n", is);
// TU_LOG1("S %lx\r\n", is);
/* clear disabled interrupts */
KHCI->ISTAT = (is & ~msk & ~USB_ISTAT_TOKDNE_MASK) | USB_ISTAT_SOFTOK_MASK;
@ -589,7 +589,7 @@ void hcd_int_handler(uint8_t rhport)
if (is & USB_ISTAT_ERROR_MASK) {
unsigned err = KHCI->ERRSTAT;
if (err) {
TU_LOG1(" ERR %x\n", err);
TU_LOG1(" ERR %x\r\n", err);
KHCI->ERRSTAT = err;
} else {
KHCI->INTEN &= ~USB_ISTAT_ERROR_MASK;

4
src/portable/raspberrypi/rp2040/hcd_rp2040.c
View File

@ -219,7 +219,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
if ( status & USB_INTS_BUFF_STATUS_BITS )
{
handled |= USB_INTS_BUFF_STATUS_BITS;
TU_LOG(2, "Buffer complete\n");
TU_LOG(2, "Buffer complete\r\n");
hw_handle_buff_status();
}
@ -227,7 +227,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
{
handled |= USB_INTS_TRANS_COMPLETE_BITS;
usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS;
TU_LOG(2, "Transfer complete\n");
TU_LOG(2, "Transfer complete\r\n");
hw_trans_complete();
}

4
src/portable/raspberrypi/rp2040/rp2040_usb.c
View File

@ -219,7 +219,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to
if ( ep->active )
{
// TODO: Is this acceptable for interrupt packets?
TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr),
TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\r\n", tu_edpt_number(ep->ep_addr),
ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
hw_endpoint_reset_transfer(ep);
@ -419,7 +419,7 @@ static bool __tusb_irq_path_func(e15_is_critical_frame_period) (struct hw_endpoi
if (delta < 800 || delta > 998) {
return false;
}
TU_LOG(3, "Avoiding sof %lu now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
TU_LOG(3, "Avoiding sof %lu now %lu last %lu\r\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
return true;
}

8
src/portable/renesas/rusb2/hcd_rusb2.c
View File

@ -409,7 +409,7 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
(void)rhport;
xfer_result_t result;
uint16_t volatile *ctr = get_pipectr(num);
// TU_LOG1("NRDY %d %x\n", num, *ctr);
// TU_LOG1("NRDY %d %x\r\n", num, *ctr);
switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
default: return;
case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
@ -608,7 +608,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
{
(void)rhport;
// TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR);
// TU_LOG1("S %d %x\r\n", dev_addr, RUSB2->DCPCTR);
TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ);
@ -701,7 +701,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
{
bool r;
hcd_int_disable(rhport);
// TU_LOG1("X %d %x %u\n", dev_addr, ep_addr, buflen);
// TU_LOG1("X %d %x %u\r\n", dev_addr, ep_addr, buflen);
r = process_edpt_xfer(dev_addr, ep_addr, buffer, buflen);
hcd_int_enable(rhport);
return r;
@ -745,7 +745,7 @@ void hcd_int_handler(uint8_t rhport)
/* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
// TU_LOG1("IS %04x %04x\n", is0, is1);
// TU_LOG1("IS %04x %04x\r\n", is0, is1);
is1 &= RUSB2->INTENB1;
is0 &= RUSB2->INTENB0;

18
src/portable/st/typec/typec_stm32.c
View File

@ -246,7 +246,7 @@ void tcd_int_handler(uint8_t rhport) {
v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
TU_LOG3("VState CC1 = %lu, CC2 = %lu\n", v_cc[0], v_cc[1]);
TU_LOG3("VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]);
uint32_t cr = UCPD1->CR;
@ -255,15 +255,15 @@ void tcd_int_handler(uint8_t rhport) {
// FIXME somehow CC2 is vstate is not correct, always 1 even not attached.
// on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something.
if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) {
TU_LOG3("Attach CC1\n");
TU_LOG3("Attach CC1\r\n");
cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE);
cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0;
} else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) {
TU_LOG3("Attach CC2\n");
TU_LOG3("Attach CC2\r\n");
cr &= ~UCPD_CR_CCENABLE;
cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1);
} else {
TU_LOG3("Detach\n");
TU_LOG3("Detach\r\n");
cr &= ~UCPD_CR_PHYRXEN;
cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
}
@ -290,7 +290,7 @@ void tcd_int_handler(uint8_t rhport) {
//------------- RX -------------//
if (sr & UCPD_SR_RXORDDET) {
// SOP: Start of Packet.
TU_LOG3("SOP\n");
TU_LOG3("SOP\r\n");
// UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
// ack
@ -299,7 +299,7 @@ void tcd_int_handler(uint8_t rhport) {
// Received full message
if (sr & UCPD_SR_RXMSGEND) {
TU_LOG3("RX MSG END\n");
TU_LOG3("RX MSG END\r\n");
// stop TX
dma_stop(rhport, true);
@ -328,7 +328,7 @@ void tcd_int_handler(uint8_t rhport) {
}
if (sr & UCPD_SR_RXOVR) {
TU_LOG3("RXOVR\n");
TU_LOG3("RXOVR\r\n");
// ack
UCPD1->ICR = UCPD_ICR_RXOVRCF;
}
@ -343,12 +343,12 @@ void tcd_int_handler(uint8_t rhport) {
uint8_t result;
if ( sr & UCPD_SR_TXMSGSENT ) {
TU_LOG3("TX MSG SENT\n");
TU_LOG3("TX MSG SENT\r\n");
result = XFER_RESULT_SUCCESS;
// ack
UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
}else {
TU_LOG3("TX Error\n");
TU_LOG3("TX Error\r\n");
result = XFER_RESULT_FAILED;
// ack
UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;

32
src/portable/sunxi/dcd_sunxi_musb.c
View File

@ -408,9 +408,9 @@ static inline unsigned free_block_size(free_block_t const *blk)
#if 0
static inline void print_block_list(free_block_t const *blk, unsigned num)
{
TU_LOG1("*************\n");
TU_LOG1("*************\r\n");
for (unsigned i = 0; i < num; ++i) {
TU_LOG1(" Blk%u %u %u\n", i, blk->beg, blk->end);
TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end);
++blk;
}
}
@ -590,7 +590,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
const unsigned mps = USBC_Readw(USBC_REG_TXMAXP(USBC0_BASE));
const unsigned len = TU_MIN(mps, rem);
uint8_t *buf = pipe->buf;
// TU_LOG1(" %p mps %d len %d rem %d\n", buf, mps, len, rem);
// TU_LOG1(" %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
if (len) {
volatile void* addr = (volatile void*)(USBC_REG_EPFIFO1(USBC0_BASE) + (epnum_minus1 << 2));
if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
@ -602,7 +602,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
pipe->remaining = rem - len;
}
__USBC_Dev_Tx_WriteDataComplete();
// TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
// TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
return false;
}
@ -610,7 +610,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
{
unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
pipe_state_t *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
// TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL);
// TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
TU_ASSERT(__USBC_Dev_Rx_IsReadDataReady());
@ -677,14 +677,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
* may have already finished and received the next setup packet
* without calling this function, so we have no choice but to
* invoke the callback function of status packet here. */
// TU_LOG1(" STATUS OUT CSRL0 = %x\n", CSRL0);
// TU_LOG1(" STATUS OUT CSRL0 = %x\r\n", CSRL0);
_dcd.status_out = 0;
if (req == REQUEST_TYPE_INVALID) {
dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
} else {
/* The next setup packet has already been received, it aborts
* invoking callback function to avoid confusing TUSB stack. */
TU_LOG1("Drop CONTROL_STAGE_ACK\n");
TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
}
return true;
}
@ -709,16 +709,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
} else {
__USBC_Dev_ep0_WriteDataHalf();
}
// TU_LOG1(" IN CSRL0 = %x\n", CSRL0);
// TU_LOG1(" IN CSRL0 = %x\r\n", CSRL0);
} else {
// TU_LOG1(" OUT CSRL0 = %x\n", CSRL0);
// TU_LOG1(" OUT CSRL0 = %x\r\n", CSRL0);
_dcd.pipe0.buf = buffer;
_dcd.pipe0.length = len;
_dcd.pipe0.remaining = len;
__USBC_Dev_ep0_ReadDataHalf();
}
} else if (dir_in) {
// TU_LOG1(" STATUS IN CSRL0 = %x\n", CSRL0);
// TU_LOG1(" STATUS IN CSRL0 = %x\r\n", CSRL0);
_dcd.pipe0.buf = NULL;
_dcd.pipe0.length = 0;
_dcd.pipe0.remaining = 0;
@ -733,7 +733,7 @@ static void process_ep0(uint8_t rhport)
USBC_SelectActiveEp(0);
uint_fast8_t csrl = USBC_Readw(USBC_REG_CSR0(USBC0_BASE));
// TU_LOG1(" EP0 CSRL0 = %x\n", csrl);
// TU_LOG1(" EP0 CSRL0 = %x\r\n", csrl);
if (csrl & USB_CSRL0_STALLED) {
/* Returned STALL packet to HOST. */
@ -743,7 +743,7 @@ static void process_ep0(uint8_t rhport)
unsigned req = _dcd.setup_packet.bmRequestType;
if (csrl & USB_CSRL0_SETEND) {
// TU_LOG1(" ABORT by the next packets\n");
// TU_LOG1(" ABORT by the next packets\r\n");
USBC_Dev_Ctrl_ClearSetupEnd();
if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
/* DATA stage was aborted by receiving STATUS or SETUP packet. */
@ -819,14 +819,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
USBC_SelectActiveEp(epn);
if (dir_in) {
// TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL);
// TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL);
if (__USBC_Dev_Tx_IsEpStall()) {
__USBC_Dev_Tx_ClearStall();
return;
}
completed = handle_xfer_in(ep_addr);
} else {
// TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL);
// TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL);
if (__USBC_Dev_Rx_IsEpStall()) {
__USBC_Dev_Rx_ClearStall();
return;
@ -1092,7 +1092,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
{
(void)rhport;
bool ret;
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
// TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
unsigned const epnum = tu_edpt_number(ep_addr);
musb_int_mask();
@ -1111,7 +1111,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
{
(void)rhport;
bool ret;
// TU_LOG1("X %x %d\n", ep_addr, total_bytes);
// TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
unsigned const epnum = tu_edpt_number(ep_addr);
TU_ASSERT(epnum);