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update stm32f7 to build with iar

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This commit is contained in:
hathach 2023-01-22 12:10:27 +07:00
parent db36075721
commit 0a4e611e37
10 changed files with 73 additions and 23 deletions
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2
.github/workflows/build_iar.yml vendored
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@ -29,6 +29,8 @@ jobs:
# Alphabetical order
- 'stm32f0'
- 'stm32f1'
- 'stm32f4'
- 'stm32f7'
steps:
- name: Clean workspace
run: |

4
hw/bsp/stm32f4/family.mk
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@ -30,6 +30,10 @@ GCC_CFLAGS += -Wno-error=cast-align
IAR_CFLAGS += --cpu cortex-m4
IAR_ASFLAGS += --cpu cortex-m4
# -----------------
# Sources & Include
# -----------------
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \

10
hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
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@ -6,9 +6,13 @@ CFLAGS += \
-DSTM32F723xx \
-DHSE_VALUE=25000000 \
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
# flash target using on-board stlink
flash: flash-stlink

9
hw/bsp/stm32f7/boards/stm32f723disco/board.mk
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@ -5,8 +5,13 @@ CFLAGS += \
-DSTM32F723xx \
-DHSE_VALUE=25000000 \
LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
# flash target using on-board stlink
flash: flash-stlink

9
hw/bsp/stm32f7/boards/stm32f746disco/board.mk
View File

@ -5,8 +5,13 @@ CFLAGS += \
-DSTM32F746xx \
-DHSE_VALUE=25000000
LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
# flash target using on-board stlink
flash: flash-stlink

9
hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
View File

@ -5,8 +5,13 @@ CFLAGS += \
-DSTM32F746xx \
-DHSE_VALUE=8000000
LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
# flash target using on-board stlink
flash: flash-stlink

9
hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
View File

@ -5,8 +5,13 @@ CFLAGS += \
-DSTM32F767xx \
-DHSE_VALUE=8000000 \
LD_FILE = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f767zi

9
hw/bsp/stm32f7/boards/stm32f769disco/board.mk
View File

@ -6,8 +6,13 @@ CFLAGS += \
-DSTM32F769xx \
-DHSE_VALUE=25000000 \
LD_FILE = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s
# GCC
GCC_LD_FILE = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf
# flash target using on-board stlink
flash: flash-stlink

5
hw/bsp/stm32f7/family.c
View File

@ -268,7 +268,8 @@ void board_init(void)
void board_led_write(bool state)
{
HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
}
uint32_t board_button_read(void)
@ -303,7 +304,7 @@ uint32_t board_millis(void)
void HardFault_Handler (void)
{
asm("bkpt");
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using

30
hw/bsp/stm32f7/family.mk
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@ -7,14 +7,10 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
include $(TOP)/$(BOARD_PATH)/board.mk
# --------------
# Compiler Flags
# --------------
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m7 \
-mfloat-abi=hard \
-mfpu=fpv5-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32F7 \
-DBOARD_TUD_RHPORT=$(PORT)
@ -30,8 +26,26 @@ else
$(info "Using OTG_FS")
endif
# GCC Flags
GCC_CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m7 \
-mfloat-abi=hard \
-mfpu=fpv5-d16 \
-nostdlib -nostartfiles
# mcu driver cause following warnings
CFLAGS += -Wno-error=shadow -Wno-error=cast-align
GCC_CFLAGS += -Wno-error=shadow -Wno-error=cast-align
# IAR Flags
IAR_CFLAGS += --cpu cortex-m7
IAR_ASFLAGS += --cpu cortex-m7
# -----------------
# Sources & Include
# -----------------
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \