Fix typo.

Signed-off-by: HiFiPhile <admin@hifiphile.com>
This commit is contained in:
HiFiPhile 2024-11-30 21:57:47 +01:00
parent 0074ed7c67
commit 0bca377d52
2 changed files with 5 additions and 5 deletions

View File

@ -81,7 +81,7 @@
// Only STM32 and dcd_transdimension use non-linear buffer for now // Only STM32 and dcd_transdimension use non-linear buffer for now
// dwc2 except esp32sx (since it may use dcd_esp32sx) // dwc2 except esp32sx (since it may use dcd_esp32sx)
// Ring buffer is imcompatible with dcache, since neither address nor size is aligned to cache line // Ring buffer is incompatible with dcache, since neither address nor size is aligned to cache line
#if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \ #if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \
defined(TUP_USBIP_FSDEV) || \ defined(TUP_USBIP_FSDEV) || \
CFG_TUSB_MCU == OPT_MCU_RX63X || \ CFG_TUSB_MCU == OPT_MCU_RX63X || \
@ -179,13 +179,13 @@ tu_static OUT_SW_BUF_MEM_ATTR struct {
#if CFG_FIFO_MUTEX #if CFG_FIFO_MUTEX
#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0 #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
tu_static osal_mutex_def_t ep_out_ff_mutex_wr_1; tu_static osal_mutex_def_t ep_out_ff_mutex_rd_1;
#endif #endif
#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0 #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
tu_static osal_mutex_def_t ep_out_ff_mutex_wr_2; tu_static osal_mutex_def_t ep_out_ff_mutex_rd_2;
#endif #endif
#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0 #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
tu_static osal_mutex_def_t ep_out_ff_mutex_wr_3; tu_static osal_mutex_def_t ep_out_ff_mutex_rd_3;
#endif #endif
#endif #endif
#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING

View File

@ -467,7 +467,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
#if !CFG_TUD_MEM_DCACHE_ENABLE #if !CFG_TUD_MEM_DCACHE_ENABLE
// fifo has to be aligned to 4k boundary // fifo has to be aligned to 4k boundary
// It's imcompatible with dcache enabled transfer, since neither address nor size is aligned to cache line // It's incompatible with dcache enabled transfer, since neither address nor size is aligned to cache line
bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes) bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
{ {
uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const epnum = tu_edpt_number(ep_addr);