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Fix typo.
Signed-off-by: HiFiPhile <admin@hifiphile.com>
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0074ed7c67
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@ -81,7 +81,7 @@
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// Only STM32 and dcd_transdimension use non-linear buffer for now
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// Only STM32 and dcd_transdimension use non-linear buffer for now
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// dwc2 except esp32sx (since it may use dcd_esp32sx)
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// dwc2 except esp32sx (since it may use dcd_esp32sx)
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// Ring buffer is imcompatible with dcache, since neither address nor size is aligned to cache line
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// Ring buffer is incompatible with dcache, since neither address nor size is aligned to cache line
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#if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \
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#if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \
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defined(TUP_USBIP_FSDEV) || \
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defined(TUP_USBIP_FSDEV) || \
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CFG_TUSB_MCU == OPT_MCU_RX63X || \
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CFG_TUSB_MCU == OPT_MCU_RX63X || \
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@ -179,13 +179,13 @@ tu_static OUT_SW_BUF_MEM_ATTR struct {
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#if CFG_FIFO_MUTEX
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#if CFG_FIFO_MUTEX
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#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
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#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
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tu_static osal_mutex_def_t ep_out_ff_mutex_wr_1;
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tu_static osal_mutex_def_t ep_out_ff_mutex_rd_1;
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#endif
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#endif
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#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
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#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
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tu_static osal_mutex_def_t ep_out_ff_mutex_wr_2;
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tu_static osal_mutex_def_t ep_out_ff_mutex_rd_2;
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#endif
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#endif
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#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
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#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
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tu_static osal_mutex_def_t ep_out_ff_mutex_wr_3;
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tu_static osal_mutex_def_t ep_out_ff_mutex_rd_3;
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#endif
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#endif
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#endif
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#endif
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#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
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#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
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@ -467,7 +467,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
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#if !CFG_TUD_MEM_DCACHE_ENABLE
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#if !CFG_TUD_MEM_DCACHE_ENABLE
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// fifo has to be aligned to 4k boundary
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// fifo has to be aligned to 4k boundary
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// It's imcompatible with dcache enabled transfer, since neither address nor size is aligned to cache line
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// It's incompatible with dcache enabled transfer, since neither address nor size is aligned to cache line
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bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
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bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
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{
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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